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raw | patch | inline | side by side (parent: 6497492)
raw | patch | inline | side by side (parent: 6497492)
author | John Dowdal <jdowdal@ti.com> | |
Wed, 15 May 2013 23:46:58 +0000 (19:46 -0400) | ||
committer | John Dowdal <jdowdal@ti.com> | |
Wed, 15 May 2013 23:46:58 +0000 (19:46 -0400) |
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diff --git a/example/multicoreExample/src/cppi_qmss_mgmt.c b/example/multicoreExample/src/cppi_qmss_mgmt.c
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diff --git a/example/multicoreExample/src/multicore_example.c b/example/multicoreExample/src/multicore_example.c
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diff --git a/example/multicoreExample/src/multicore_example.h b/example/multicoreExample/src/multicore_example.h
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diff --git a/example/simpleExample/paExample/src/config.h b/example/simpleExample/paExample/src/config.h
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diff --git a/example/simpleExample/paExample/src/cpsw_mgmt.c b/example/simpleExample/paExample/src/cpsw_mgmt.c
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diff --git a/example/simpleExample/paExample/src/ex1util.c b/example/simpleExample/paExample/src/ex1util.c
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diff --git a/example/simpleExample/paExample/src/expa.c b/example/simpleExample/paExample/src/expa.c
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diff --git a/example/simpleExample/paExample/src/memory.c b/example/simpleExample/paExample/src/memory.c
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diff --git a/example/simpleExample/paExample/src/memory.h b/example/simpleExample/paExample/src/memory.h
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diff --git a/example/simpleExample/paExample/src/paExample.c b/example/simpleExample/paExample/src/paExample.c
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diff --git a/example/simpleExample/paExample/src/pkttxrx.c b/example/simpleExample/paExample/src/pkttxrx.c
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diff --git a/example/simpleExample/paExample/src/setupqm.c b/example/simpleExample/paExample/src/setupqm.c
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diff --git a/example/simpleExample2/k2h/armv7/linux/cppi_qmss_mgmt.c b/example/simpleExample2/k2h/armv7/linux/cppi_qmss_mgmt.c
*
* \par
* ============================================================================
- * @n (C) Copyright 2012, Texas Instruments, Inc.
+ * @n (C) Copyright 2012-2013, Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtDataReg =
FW_GET_REG_VADDR(fw_qmssDataVaddr,QMSS_DATA_BASE_ADDR,(uint32_t)fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtDataReg);
- fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg =
- FW_GET_REG_VADDR(fw_qmssDataVaddr,QMSS_DATA_BASE_ADDR,(uint32_t)fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg);
+ fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg = NULL; /* not supported on k2 hardware, and not used by lld */
}
for(count=0;count < QMSS_MAX_INTD;count++)
diff --git a/example/simpleExample2/k2h/armv7/linux/fw_osal.c b/example/simpleExample2/k2h/armv7/linux/fw_osal.c
index e98b4a176aae84c7ffbd000efba37634fb1e0266..7f3d1778de719687d9d3da85bc5be7baed225fe4 100644 (file)
*
* REVISION HISTORY:
*
- * Copyright (c) Texas Instruments Incorporated 2010-2011
+ * Copyright (c) Texas Instruments Incorporated 2010-2013
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/* Lock to be used for critical section */
pthread_mutex_t mutex_lock;
+/**
+ * @b Description
+ * @n
+ * General Memory Barrier guarantees that all LOAD and STORE operations that were issued before the
+ * barrier occur before the LOAD and STORE operations issued after the barrier
+ *
+ */
+static inline void fw_mMemBarrier(void) {__sync_synchronize();}
+
void fw_osalInit()
{
pthread_mutex_init(&mutex_lock, NULL);
descAddr = Osal_qmssVirtToPhy(descAddr);
if (!descAddr) return (void *)0;
}
+ /* Issue memory barrier */
+ fw_mMemBarrier();
return descAddr;
}
diff --git a/example/simpleExample2/k2h/armv7/linux/fw_test.h b/example/simpleExample2/k2h/armv7/linux/fw_test.h
index 3693f75b9d12ac41a05016710c5c158d3e4c4817..e9e3251be55f575dca2b0c2be4713211fbf7d31c 100644 (file)
*
* \par
* ============================================================================
- * @n (C) Copyright 2012, Texas Instruments, Inc.
+ * @n (C) Copyright 2012-2013, Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/* Physical address map & size for various subsystems */
#define QMSS_CFG_BASE_ADDR CSL_QMSS_CFG_BASE
-#define QMSS_CFG_BLK_SZ ((CSL_QMSS_LINKING_RAM - CSL_QMSS_CFG_BASE) + 0x100000)
-#define QMSS_DATA_BASE_ADDR CSL_QMSS_DATA_QM1_QUEUE_MANAGEMENT_REGS
-#define QMSS_DATA_BASE_QUEUE_PROXY_ADDR CSL_QMSS_DATA_BASE
-#define QMSS_DATA_BLK_SZ ((CSL_QMSS_DATA_QM2_QUEUE_PROXY_REGS - QMSS_DATA_BASE_QUEUE_PROXY_ADDR) + 0x50000)
+#define QMSS_CFG_BLK_SZ (0x00200000)
+#define QMSS_DATA_BASE_ADDR CSL_QMSS_DATA_BASE
+#define QMSS_DATA_BLK_SZ (0x00100000)
#define SRIO_CFG_BASE_ADDR CSL_SRIO_CFG_REGS
#define SRIO_CFG_BLK_SZ (132*1024)
#define PASS_CFG_BASE_ADDR CSL_NETCP_CFG_REGS
diff --git a/example/simpleExample2/k2k/armv7/linux/cppi_qmss_mgmt.c b/example/simpleExample2/k2k/armv7/linux/cppi_qmss_mgmt.c
index 82455a6ddfb450ac4165c29ec73fe1211037c229..96be99b8a29d47601e6c817016fbc5c3300cc413 100644 (file)
*
* \par
* ============================================================================
- * @n (C) Copyright 2012, Texas Instruments, Inc.
+ * @n (C) Copyright 2012-2013, Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtDataReg =
FW_GET_REG_VADDR(fw_qmssDataVaddr,QMSS_DATA_BASE_ADDR,(uint32_t)fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtDataReg);
- fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg =
- FW_GET_REG_VADDR(fw_qmssDataVaddr,QMSS_DATA_BASE_ADDR,(uint32_t)fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg);
+ fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg = NULL; /* not supported on k2 hardware, and not used by lld */
}
for(count=0;count < QMSS_MAX_INTD;count++)
diff --git a/example/simpleExample2/k2k/armv7/linux/fw_osal.c b/example/simpleExample2/k2k/armv7/linux/fw_osal.c
index e98b4a176aae84c7ffbd000efba37634fb1e0266..7f3d1778de719687d9d3da85bc5be7baed225fe4 100644 (file)
*
* REVISION HISTORY:
*
- * Copyright (c) Texas Instruments Incorporated 2010-2011
+ * Copyright (c) Texas Instruments Incorporated 2010-2013
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/* Lock to be used for critical section */
pthread_mutex_t mutex_lock;
+/**
+ * @b Description
+ * @n
+ * General Memory Barrier guarantees that all LOAD and STORE operations that were issued before the
+ * barrier occur before the LOAD and STORE operations issued after the barrier
+ *
+ */
+static inline void fw_mMemBarrier(void) {__sync_synchronize();}
+
void fw_osalInit()
{
pthread_mutex_init(&mutex_lock, NULL);
descAddr = Osal_qmssVirtToPhy(descAddr);
if (!descAddr) return (void *)0;
}
+ /* Issue memory barrier */
+ fw_mMemBarrier();
return descAddr;
}
diff --git a/example/simpleExample2/k2k/armv7/linux/fw_test.h b/example/simpleExample2/k2k/armv7/linux/fw_test.h
index 3693f75b9d12ac41a05016710c5c158d3e4c4817..e9e3251be55f575dca2b0c2be4713211fbf7d31c 100644 (file)
*
* \par
* ============================================================================
- * @n (C) Copyright 2012, Texas Instruments, Inc.
+ * @n (C) Copyright 2012-2013, Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/* Physical address map & size for various subsystems */
#define QMSS_CFG_BASE_ADDR CSL_QMSS_CFG_BASE
-#define QMSS_CFG_BLK_SZ ((CSL_QMSS_LINKING_RAM - CSL_QMSS_CFG_BASE) + 0x100000)
-#define QMSS_DATA_BASE_ADDR CSL_QMSS_DATA_QM1_QUEUE_MANAGEMENT_REGS
-#define QMSS_DATA_BASE_QUEUE_PROXY_ADDR CSL_QMSS_DATA_BASE
-#define QMSS_DATA_BLK_SZ ((CSL_QMSS_DATA_QM2_QUEUE_PROXY_REGS - QMSS_DATA_BASE_QUEUE_PROXY_ADDR) + 0x50000)
+#define QMSS_CFG_BLK_SZ (0x00200000)
+#define QMSS_DATA_BASE_ADDR CSL_QMSS_DATA_BASE
+#define QMSS_DATA_BLK_SZ (0x00100000)
#define SRIO_CFG_BASE_ADDR CSL_SRIO_CFG_REGS
#define SRIO_CFG_BLK_SZ (132*1024)
#define PASS_CFG_BASE_ADDR CSL_NETCP_CFG_REGS
diff --git a/fw/cde.h b/fw/cde.h
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diff --git a/fw/classify1.p b/fw/classify1.p
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diff --git a/fw/lut1_lut2.h b/fw/lut1_lut2.h
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diff --git a/fw/meminit.p b/fw/meminit.p
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diff --git a/fw/pacfgcmn.p b/fw/pacfgcmn.p
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diff --git a/fw/pafw.h b/fw/pafw.h
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diff --git a/fw/pam.p b/fw/pam.p
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diff --git a/fw/parsescope.h b/fw/parsescope.h
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diff --git a/fw/pdsp_ethproto.h b/fw/pdsp_ethproto.h
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diff --git a/fw/pdsp_pa.h b/fw/pdsp_pa.h
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diff --git a/fw/pm_config.h b/fw/pm_config.h
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diff --git a/fw/pm_constants.h b/fw/pm_constants.h
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diff --git a/pa_osal.h b/pa_osal.h
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diff --git a/pasahost.h b/pasahost.h
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diff --git a/src/pa.c b/src/pa.c
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diff --git a/src/pafrm.h b/src/pafrm.h
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diff --git a/src/painit.c b/src/painit.c
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fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtDataReg =
FW_GET_REG_VADDR(fw_qmssDataVaddr,QMSS_DATA_BASE_ADDR,(uint32_t)fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtDataReg);
- fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg =
- FW_GET_REG_VADDR(fw_qmssDataVaddr,QMSS_DATA_BASE_ADDR,(uint32_t)fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg);
+ fw_qmssGblCfgParams.groupRegs[count].qmQueMgmtProxyDataReg = NULL; /* not supported on k2 hardware, and not used by lld */
}
for(count=0;count < QMSS_MAX_INTD;count++)
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diff --git a/test/PAUnitTest/src/armv7/linux/fw_mem_allocator.c b/test/PAUnitTest/src/armv7/linux/fw_mem_allocator.c
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diff --git a/test/PAUnitTest/src/armv7/linux/fw_mem_allocator.h b/test/PAUnitTest/src/armv7/linux/fw_mem_allocator.h
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*
* REVISION HISTORY:
*
- * Copyright (c) Texas Instruments Incorporated 2010-2011
+ * Copyright (c) Texas Instruments Incorporated 2010-2013
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/* Lock to be used for critical section */
pthread_mutex_t mutex_lock;
+/**
+ * @b Description
+ * @n
+ * General Memory Barrier guarantees that all LOAD and STORE operations that were issued before the
+ * barrier occur before the LOAD and STORE operations issued after the barrier
+ *
+ */
+static inline void fw_mMemBarrier(void) {__sync_synchronize();}
+
void fw_osalInit()
{
pthread_mutex_init(&mutex_lock, NULL);
descAddr = Osal_qmssVirtToPhy(descAddr);
if (!descAddr) return (void *)0;
}
+ /* Issue memory barrier */
+ fw_mMemBarrier();
return descAddr;
}
*
* \par
* ============================================================================
- * @n (C) Copyright 2012, Texas Instruments, Inc.
+ * @n (C) Copyright 2012-2013, Texas Instruments, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
/* Physical address map & size for various subsystems */
#define QMSS_CFG_BASE_ADDR CSL_QMSS_CFG_BASE
-#define QMSS_CFG_BLK_SZ ((CSL_QMSS_LINKING_RAM - CSL_QMSS_CFG_BASE) + 0x100000)
-#define QMSS_DATA_BASE_ADDR CSL_QMSS_DATA_QM1_QUEUE_MANAGEMENT_REGS
-#define QMSS_DATA_BASE_QUEUE_PROXY_ADDR CSL_QMSS_DATA_BASE
-#define QMSS_DATA_BLK_SZ ((CSL_QMSS_DATA_QM2_QUEUE_PROXY_REGS - QMSS_DATA_BASE_QUEUE_PROXY_ADDR) + 0x50000)
+#define QMSS_CFG_BLK_SZ (0x00200000)
+#define QMSS_DATA_BASE_ADDR CSL_QMSS_DATA_BASE
+#define QMSS_DATA_BLK_SZ (0x00100000)
#define SRIO_CFG_BASE_ADDR CSL_SRIO_CFG_REGS
#define SRIO_CFG_BLK_SZ (132*1024)
#define PASS_CFG_BASE_ADDR CSL_NETCP_CFG_REGS
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