diff --git a/pcie_component.mk b/pcie_component.mk
index 45286fef1600e40f68157f3f9af7d446ecda6520..a06bb3cfe49307602078e0ba54d5f45f80c9fc73 100644 (file)
--- a/pcie_component.mk
+++ b/pcie_component.mk
#
-# Copyright (c) 2016, Texas Instruments Incorporated
+# Copyright (c) 2016-2019, Texas Instruments Incorporated
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
ifeq ($(pcie_component_make_include), )
# under other list
-drvpcie_BOARDLIST =
-drvpcie_SOCLIST = am572x am571x k2h k2k k2l k2e k2g c6678 c6657
+drvpcie_BOARDLIST = am65xx_evm am65xx_idk
+drvpcie_SOCLIST = am574x am572x am571x k2h k2k k2l k2e k2g c6678 c6657 am65xx
+drvpcie_am574x_CORELIST = c66x a15_0 ipu1_0
drvpcie_am572x_CORELIST = c66x a15_0 ipu1_0
drvpcie_am571x_CORELIST = c66x a15_0 ipu1_0
drvpcie_k2h_CORELIST = c66x a15_0
drvpcie_c6678_CORELIST = c66x
drvpcie_c6657_CORELIST = c66x
+drvpcie_am65xx_CORELIST = mpu1_0 mcu1_0
############################
-# uart package
-# List of components included under uart lib
-# The components included here are built and will be part of uart lib
+# pcie package
+# List of components included under pcie lib
+# The components included here are built and will be part of pcie lib
############################
pcie_LIB_LIST = pcie pcie_profile pcie_indp pcie_profile_indp
drvpcie_LIB_LIST = $(pcie_LIB_LIST)
+############################
+# pcie examples
+# List of examples under pcie
+# All the tests mentioned in list are built when test target is called
+# List below all examples for allowed values
+############################
+pcie_EXAMPLE_LIST = PCIE_sample_ExampleProject PCIE_Qos_ExampleProject PCIE_sample_SMP_ExampleProject
+drvpcie_EXAMPLE_LIST = $(pcie_EXAMPLE_LIST)
+
#
# PCIE Modules
#
pcie_profile_indp_$(SOC)_CORELIST = $(drvpcie_$(SOC)_CORELIST)
export pcie_profile_indp_$(SOC)_CORELIST
+#
+# PCIE Examples
+#
+
+# PCIE basic example app
+PCIE_sample_ExampleProject_COMP_LIST = PCIE_sample_ExampleProject
+PCIE_sample_ExampleProject_RELPATH = ti/drv/pcie/example/sample
+PCIE_sample_ExampleProject_PATH = $(PDK_PCIE_COMP_PATH)/example/sample
+PCIE_sample_ExampleProject_BOARD_DEPENDENCY = yes
+PCIE_sample_ExampleProject_CORE_DEPENDENCY = no
+PCIE_sample_ExampleProject_XDC_CONFIGURO = yes
+export PCIE_sample_ExampleProject_COMP_LIST
+export PCIE_sample_ExampleProject_BOARD_DEPENDENCY
+export PCIE_sample_ExampleProject_CORE_DEPENDENCY
+export PCIE_sample_ExampleProject_XDC_CONFIGURO
+PCIE_sample_ExampleProject_PKG_LIST = PCIE_sample_ExampleProject
+PCIE_sample_ExampleProject_INCLUDE = $(PCIE_sample_ExampleProject_PATH)
+PCIE_sample_ExampleProject_BOARDLIST = $(drvpcie_BOARDLIST)
+export PCIE_sample_ExampleProject_BOARDLIST
+PCIE_sample_ExampleProject_$(SOC)_CORELIST = $(drvpcie_$(SOC)_CORELIST)
+export PCIE_sample_ExampleProject_$(SOC)_CORELIST
+
+# PCIE Qos basic example app
+PCIE_Qos_ExampleProject_COMP_LIST = PCIE_Qos_ExampleProject
+PCIE_Qos_ExampleProject_RELPATH = ti/drv/pcie/example/Qos
+PCIE_Qos_ExampleProject_PATH = $(PDK_PCIE_COMP_PATH)/example/Qos
+PCIE_Qos_ExampleProject_BOARD_DEPENDENCY = yes
+PCIE_Qos_ExampleProject_CORE_DEPENDENCY = no
+PCIE_Qos_ExampleProject_XDC_CONFIGURO = yes
+export PCIE_Qos_ExampleProject_COMP_LIST
+export PCIE_Qos_ExampleProject_BOARD_DEPENDENCY
+export PCIE_Qos_ExampleProject_CORE_DEPENDENCY
+export PCIE_Qos_ExampleProject_XDC_CONFIGURO
+PCIE_Qos_ExampleProject_PKG_LIST = PCIE_Qos_ExampleProject
+PCIE_Qos_ExampleProject_INCLUDE = $(PCIE_Qos_ExampleProject_PATH)
+PCIE_Qos_ExampleProject_BOARDLIST = $(drvpcie_BOARDLIST)
+export PCIE_Qos_ExampleProject_BOARDLIST
+PCIE_Qos_ExampleProject_$(SOC)_CORELIST = $(drvpcie_$(SOC)_CORELIST)
+export PCIE_Qos_ExampleProject_$(SOC)_CORELIST
+
+# PCIE basic example app with SMP enabled
+PCIE_sample_SMP_ExampleProject_COMP_LIST = PCIE_sample_SMP_ExampleProject
+PCIE_sample_SMP_ExampleProject_RELPATH = ti/drv/pcie/example/sample
+PCIE_sample_SMP_ExampleProject_PATH = $(PDK_PCIE_COMP_PATH)/example/sample
+PCIE_sample_SMP_ExampleProject_MAKEFILE = -f makefile SMP=enable
+PCIE_sample_SMP_ExampleProject_BOARD_DEPENDENCY = yes
+PCIE_sample_SMP_ExampleProject_CORE_DEPENDENCY = no
+PCIE_sample_SMP_ExampleProject_XDC_CONFIGURO = yes
+export PCIE_sample_SMP_ExampleProject_COMP_LIST
+export PCIE_sample_SMP_ExampleProject_BOARD_DEPENDENCY
+export PCIE_sample_SMP_ExampleProject_CORE_DEPENDENCY
+export PCIE_sample_SMP_ExampleProject_XDC_CONFIGURO
+PCIE_sample_SMP_ExampleProject_PKG_LIST = PCIE_sample_SMP_ExampleProject
+PCIE_sample_SMP_ExampleProject_INCLUDE = $(PCIE_sample_SMP_ExampleProject_PATH)
+PCIE_sample_SMP_ExampleProject_BOARDLIST = $(drvpcie_BOARDLIST)
+export PCIE_sample_SMP_ExampleProject_BOARDLIST
+PCIE_sample_SMP_ExampleProject_$(SOC)_CORELIST = $(drvpcie_$(SOC)_CORELIST)
+export PCIE_sample_SMP_ExampleProject_$(SOC)_CORELIST
+
export drvpcie_LIB_LIST
export pcie_LIB_LIST
export pcie_EXAMPLE_LIST
+export drvpcie_EXAMPLE_LIST
pcie_component_make_include := 1
endif