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raw | patch | inline | side by side (parent: f4837e9)
author | Tinku Mannan <tmannan@ti.com> | |
Tue, 19 Jun 2018 12:51:41 +0000 (08:51 -0400) | ||
committer | Tinku Mannan <tmannan@ti.com> | |
Tue, 19 Jun 2018 13:24:47 +0000 (09:24 -0400) |
index a58f7b136bedd870ac6af1640f6c053785592397..b7cb374024f1db9fe7a18a00968fc0e1da192e00 100644 (file)
--- a/soc/am335x/pruicss_soc.c
+++ b/soc/am335x/pruicss_soc.c
* @brief This is soc specific configuration file .
*/
/*
- * Copyright (c) 2015, Texas Instruments Incorporated
+ * Copyright (c) 2015-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
const PRUICSS_HwAttrs prussInitCfg =
{
- 0x4a300000,
- 0,
- SOC_PRU_ICSS_PRU0_CTRL_REG,
- SOC_PRU_ICSS_PRU1_CTRL_REG,
- SOC_PRU_ICSS_INTC_REG,
- SOC_PRU_ICSS_CFG_REG,
- SOC_PRU_ICSS_UART_REG,
- SOC_PRU_ICSS_IEP_REG,
- SOC_PRU_ICSS_ECAP_REG,
- SOC_PRU_ICSS_MII_RT_CFG_REG,
- SOC_PRU_ICSS_MII_MDIO_REG,
- SOC_PRU_ICSS_DATA_RAM0,
- SOC_PRU_ICSS_DATA_RAM1,
- SOC_PRU_ICSS_INST_RAM0,
- SOC_PRU_ICSS_INST_RAM1,
- SOC_PRU_ICSS_SHARED_RAM,
- 0U,
- 0U,
- 0U,
- 0U,
- SOC_PRU_ICSS_DATA_RAM0_SIZE,
- SOC_PRU_ICSS_DATA_RAM1_SIZE,
- SOC_PRU_ICSS_INST_RAM0_SIZE,
- SOC_PRU_ICSS_INST_RAM1_SIZE,
- SOC_PRU_ICSS_SHARED_RAM_SIZE,
- 0U,
- 0U,
- 0U,
- 0U
+ 0x4a300000,
+ 0,
+ SOC_PRU_ICSS_PRU0_CTRL_REG,
+ SOC_PRU_ICSS_PRU1_CTRL_REG,
+ SOC_PRU_ICSS_INTC_REG,
+ SOC_PRU_ICSS_CFG_REG,
+ SOC_PRU_ICSS_UART_REG,
+ SOC_PRU_ICSS_IEP_REG,
+ SOC_PRU_ICSS_ECAP_REG,
+ SOC_PRU_ICSS_MII_RT_CFG_REG,
+ SOC_PRU_ICSS_MII_MDIO_REG,
+ SOC_PRU_ICSS_DATA_RAM0,
+ SOC_PRU_ICSS_DATA_RAM1,
+ SOC_PRU_ICSS_INST_RAM0,
+ SOC_PRU_ICSS_INST_RAM1,
+ SOC_PRU_ICSS_SHARED_RAM,
+ 0U,
+ 0U,
+ 0U,
+ 0U,
+ SOC_PRU_ICSS_DATA_RAM0_SIZE,
+ SOC_PRU_ICSS_DATA_RAM1_SIZE,
+ SOC_PRU_ICSS_INST_RAM0_SIZE,
+ SOC_PRU_ICSS_INST_RAM1_SIZE,
+ SOC_PRU_ICSS_SHARED_RAM_SIZE,
+ 0U,
+ 0U
};
/* PRUICSS objects */
index 942b46c1370175e6b5b8a451bc0a7809e425d782..5caa9453ec7a938c2480489293129604452882da 100644 (file)
--- a/soc/am437x/pruicss_soc.c
+++ b/soc/am437x/pruicss_soc.c
* @brief This is soc specific configuration file .
*/
/*
- * Copyright (c) 2015, Texas Instruments Incorporated
+ * Copyright (c) 2015-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
SOC_PRU_ICSS0_U_INST_RAM1_SIZE,
SOC_PRU_ICSS0_U_SHARED_RAM_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
SOC_PRU_ICSS1_U_INST_RAM1_SIZE,
SOC_PRU_ICSS1_U_SHARED_RAM_SIZE,
0U,
- 0U,
- 0U,
0U
}
};
index a6b2761d74987ba41aca75f25d74d1e629979d4a..0dd461f5963e06375773edd949bf3a8f0ebf2cc2 100644 (file)
--- a/soc/am571x/pruicss_soc.c
+++ b/soc/am571x/pruicss_soc.c
* @brief This is soc specific configuration file .
*/
/*
- * Copyright (c) 2015, Texas Instruments Incorporated
+ * Copyright (c) 2015-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
}
#elif defined (__TMS320C6X__)
CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_DSP_PRUSS2_U_INST_RAM0_12KB_REGS,
CSL_DSP_PRUSS2_U_INST_RAM1_12KB_REGS,
CSL_DSP_PRUSS2_U_DATA_RAM_32KB_REGS,
+ 0U,
+ 0U,
+ 0U,
+ 0U,
CSL_DSP_PRUSS2_U_DATA_RAM0_8KB_SIZE,
CSL_DSP_PRUSS2_U_DATA_RAM1_8KB_SIZE,
CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE,
CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE,
- CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE
+ CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE,
+ 0,
+ 0
}
#else
{
CSL_MPU_PRUSS1_U_INST_RAM0_12KB_REGS,
CSL_MPU_PRUSS1_U_INST_RAM1_12KB_REGS,
CSL_MPU_PRUSS1_U_DATA_RAM_32KB_REGS,
+ 0U,
+ 0U,
+ 0U,
+ 0U,
CSL_MPU_PRUSS1_U_DATA_RAM0_8KB_SIZE,
CSL_MPU_PRUSS1_U_DATA_RAM1_8KB_SIZE,
CSL_MPU_PRUSS1_U_INST_RAM0_12KB_SIZE,
CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
- CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE
+ CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
+ 0,
+ 0
},
{
0x4b280000,
CSL_MPU_PRUSS2_U_INST_RAM0_12KB_REGS,
CSL_MPU_PRUSS2_U_INST_RAM1_12KB_REGS,
CSL_MPU_PRUSS2_U_DATA_RAM_32KB_REGS,
+ 0U,
+ 0U,
+ 0U,
+ 0U,
CSL_MPU_PRUSS2_U_DATA_RAM0_8KB_SIZE,
CSL_MPU_PRUSS2_U_DATA_RAM1_8KB_SIZE,
CSL_MPU_PRUSS2_U_INST_RAM0_12KB_SIZE,
CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
- CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE
+ CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
+ 0,
+ 0
}
#endif
};
index d5d7c2686fb2a32b69f5dcce0d4946e846250e9a..8c31875c51c22338e80ef12ca6a10e361670d47c 100644 (file)
--- a/soc/am572x/pruicss_soc.c
+++ b/soc/am572x/pruicss_soc.c
* @brief This is soc specific configuration file .
*/
/*
- * Copyright (c) 2015, Texas Instruments Incorporated
+ * Copyright (c) 2015-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
}
#elif defined (__TMS320C6X__)
CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE,
CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE,
- 0U,
- 0U,
- 0U,
- 0U
+ 0U,
+ 0U
}
#else
{
CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
}
#endif
index c61a917d35210c57a87ee9faa76bb0810f3fbc32..049767f135e05da5f6dba6d5924a807df386e39a 100644 (file)
--- a/soc/am574x/pruicss_soc.c
+++ b/soc/am574x/pruicss_soc.c
* @brief This is soc specific configuration file .
*/
/*
- * Copyright (c) 2017, Texas Instruments Incorporated
+ * Copyright (c) 2017-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
CSL_IPU_PRUSS1_U_INST_RAM0_12KB_REGS,
CSL_IPU_PRUSS1_U_INST_RAM1_12KB_REGS,
CSL_IPU_PRUSS1_U_DATA_RAM_32KB_REGS,
+ 0U,
+ 0U,
+ 0U,
+ 0U,
CSL_IPU_PRUSS1_U_DATA_RAM0_8KB_SIZE,
CSL_IPU_PRUSS1_U_DATA_RAM1_8KB_SIZE,
CSL_IPU_PRUSS1_U_INST_RAM0_12KB_SIZE,
CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
- CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE
+ CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
+ 0U,
+ 0U
},
{
0x4b280000,
CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
}
#elif defined (__TMS320C6X__)
CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
}
#else
CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
},
{
CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
0U,
- 0U,
- 0U,
0U
}
#endif
index b022ca57fd0b0b99de611fabce4d895c5b91bbc7..71f3997c8f74c54ff4aa26d257501e8572a01b43 100644 (file)
--- a/soc/am65xx/pruicss_soc.c
+++ b/soc/am65xx/pruicss_soc.c
* @brief This is device specific configuration file .
*/
/*
- * Copyright (c) 2017, Texas Instruments Incorporated
+ * Copyright (c) 2017-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/soc/k2g/pruicss_soc.c b/soc/k2g/pruicss_soc.c
index eefe7670dc5e3b9b62cd8994d42f939b6e8ef8cd..4f397052690e973b6e8d94a39cc479572289f268 100644 (file)
--- a/soc/k2g/pruicss_soc.c
+++ b/soc/k2g/pruicss_soc.c
* @brief This is device specific configuration file .
*/
/*
- * Copyright (c) 2016, Texas Instruments Incorporated
+ * Copyright (c) 2016-2018, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE,
0U,
0U,
- 0U,
- 0U,
},
{
CSL_ICSS_1_DATA_RAM_8KB_0_REGS,
CSL_ICSS_0_INST_RAM_16KB_1_REGS_SIZE,
CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE,
0U,
- 0U,
- 0U,
0U
}
};
diff --git a/src/pruicss_drv.c b/src/pruicss_drv.c
index 79f6905b310b98a0915682f085f8152c119a3fd2..d033f3cbf98b9233a2f3bf175da01e03e1828433 100644 (file)
--- a/src/pruicss_drv.c
+++ b/src/pruicss_drv.c
#include <ti/drv/pruss/soc/pruicss_v1.h>
#include <ti/drv/pruss/src/pruicss_osal.h>
+#include <ti/csl/cslr.h>
#include <ti/csl/src/ip/icss/V1/cslr_icss_pru_ctrl.h>
#include <ti/csl/src/ip/icss/V1/cslr_icss_intc.h>
#include <ti/csl/src/ip/icss/V1/cslr_icss_cfg.h>