4d2c47f625611da81af11aabb3e7f4fc244db708
1 /dts-v1/;
3 /* Policy assigning all resources to RM instances running on DSP. */
5 / {
6 /* Valid instance list contains instance names used within TI example projects
7 * utilizing RM. The list can be modified as needed by applications integrating
8 * RM. For an RM instance to be given permissions the name used to initialize it
9 * must be present in this list */
10 valid-instances = "RM_Server",
11 "RM_Client0",
12 "RM_Client1",
13 "RM_Client2",
14 "RM_Client3",
15 "RM_Client4",
16 "RM_Client5",
17 "RM_Client6",
18 "RM_Client7";
20 qmss {
21 control-qm1 {
22 assignments = <0 1>, "iu = (*)";
23 };
25 linkram-control-qm1 {
26 assignments = <0 1>, "iu = (*)";
27 };
29 linkram-int-qm1 {
30 /* hw allows max of 16K "internal" descriptors */
31 assignments = <0x00000000 0x00004000>, "iu = (*)";
32 };
33 linkram-ext-qm1 {
34 /* hw allows max of 496K "external" descriptors */
35 assignments = <0x00004000 0x0007C000>, "iu = (*)";
36 };
38 memory-regions-qm1 {
39 assignments = <0 64>, "iu = (*)";
40 };
42 LOW_PRIORITY_QUEUE-qm1 {
43 assignments = <0 512>, "iu = (*)";
44 };
45 GIC400_QUEUE-qm1 {
46 assignments = <528 32>, "iu = (*)";
47 };
48 EDMA_0_QUEUE-qm1 {
49 assignments = <560 10>, "iu = (*)";
50 };
51 EDMA_1_QUEUE-qm1 {
52 assignments = <570 11>, "iu = (*)";
53 };
54 EDMA_2_QUEUE-qm1 {
55 assignments = <581 8>, "iu = (*)";
56 };
57 EDMA_3_QUEUE-qm1 {
58 assignments = <589 16>, "iu = (*)";
59 };
60 EDMA_4_QUEUE-qm1 {
61 assignments = <605 8>, "iu = (*)";
62 };
63 INTC_QUEUE-qm1 {
64 assignments = <652 6>, "iu = (*)";
65 };
66 SOC_SET0_QUEUE-qm1 {
67 assignments = <658 8>, "iu = (*)";
68 };
69 INTC_SET2_QUEUE-qm1 {
70 assignments = <666 26>, "iu = (*)";
71 };
72 XGE_QUEUE-qm1 {
73 assignments = <692 8>, "iu = (*)";
74 };
75 HIGH_PRIORITY_QUEUE-qm1 {
76 assignments = <704 32>, "iu = (*)";
77 };
78 STARVATION_COUNTER_QUEUE-qm1 {
79 assignments = <736 64>, "iu = (*)";
80 };
81 INFRASTRUCTURE_QUEUE-qm1 {
82 assignments = <800 32>, "iu = (*)";
83 };
84 PASS_QUEUE-qm1 {
85 assignments = <896 21>, "iu = (*)";
86 };
87 GENERAL_PURPOSE_QUEUE-qm1 {
88 assignments = <1024 7168>, "iu = (*)";
89 };
91 firmware-pdsp {
92 assignments = <0 8>, "iu = (*)";
93 };
94 accumulator0-ch { /* accumulator using first INTD */
95 assignments = <0 48>, "iu = (*)";
96 };
97 accumulator1-ch { /* accumulator using second INTD */
98 assignments = <0 48>, "iu = (*)";
99 };
101 netss-control-qm1 {
102 assignments = <0 1>, "iu = (*)";
103 };
104 netss-linkram-control-qm1 {
105 assignments = <0 1>, "iu = (*)";
106 };
107 netss-linkram-qm1 {
108 assignments = <0x00000000 0x00004000>, "iu = (*)";
109 };
110 netss-memory-regions-qm1 {
111 assignments = <0 16>, "iu = (*)";
112 };
114 netss-control-qm2 {
115 assignments = <0 1>, "iu = (*)";
116 };
117 netss-linkram-control-qm2 {
118 assignments = <0 1>, "iu = (*)";
119 };
120 netss-linkram-qm2 {
121 assignments = <0x00000000 0x00004000>, "iu = (*)";
122 };
123 netss-memory-regions-qm2 {
124 assignments = <0 16>, "iu = (*)";
125 };
127 NETSS_PASS_QUEUE-qm1 {
128 assignments = <0 21>, "iu = (*)";
129 };
130 NETSS_GENERAL_PURPOSE_QUEUE-qm1 {
131 assignments = <21 43>, "iu = (*)";
132 };
133 NETSS_GENERAL_PURPOSE_QUEUE-qm2 {
134 assignments = <0 64>, "iu = (*)";
135 };
136 }; /* qmss */
138 cppi {
139 netcp-hw-open {
140 assignments = <0 1>, "iu = (*)";
141 };
142 netcp-rx-ch {
143 assignments = <0 91>, "iu = (*)";
144 };
145 netcp-tx-ch {
146 assignments = <0 21>, "iu = (*)";
147 };
148 netcp-rx-flow-id {
149 assignments = <0 32>, "iu = (*)";
150 };
152 qmss-qm1-hw-open {
153 assignments = <0 1>, "iu = (*)";
154 };
155 qmss-qm1-rx-ch {
156 assignments = <0 32>, "iu = (*)";
157 };
158 qmss-qm1-tx-ch {
159 assignments = <0 32>, "iu = (*)";
160 };
161 qmss-qm1-rx-flow-id {
162 assignments = <0 64>, "iu = (*)";
163 };
165 netcp-local-hw-open {
166 assignments = <0 1>, "iu = (*)";
167 };
168 netcp-local-rx-ch {
169 assignments = <0 91>, "iu = (*)";
170 };
171 netcp-local-tx-ch {
172 assignments = <0 21>, "iu = (*)";
173 };
174 netcp-local-rx-flow-id {
175 assignments = <0 32>, "iu = (*)";
176 };
178 xge-hw-open {
179 assignments = <0 1>, "iu = (*)";
180 };
181 xge-rx-ch {
182 assignments = <0 16>, "iu = (*)";
183 };
184 xge-tx-ch {
185 assignments = <0 8>, "iu = (*)";
186 };
187 xge-rx-flow-id {
188 assignments = <0 32>, "iu = (*)";
189 };
190 }; /* cppi */
192 pa {
193 pa-lut {
194 assignments = <0 8>, "iu = (*)";
195 };
196 pa-firmware {
197 assignments = <0 1>, "iu = (*)";
198 };
199 pa-32bUsrStats {
200 assignments = <0 512>, "iu = (*)";
201 };
202 pa-64bUsrStats {
203 assignments = <0 256>, "iu = (*)";
204 };
205 }; /* pa */
206 };