016aa337add8e35536cc124b97841da00cb605c7
1 /dts-v1/;
3 /* Policy assigning all resources to RM instances running on DSP. */
5 / {
6 /* Valid instance list contains instance names used within TI example projects
7 * utilizing RM. The list can be modified as needed by applications integrating
8 * RM. For an RM instance to be given permissions the name used to initialize it
9 * must be present in this list */
10 valid-instances = "RM_Server",
11 "RM_Client0",
12 "RM_Client1",
13 "RM_Client2",
14 "RM_Client3",
15 "RM_Client4",
16 "RM_Client5",
17 "RM_Client6",
18 "RM_Client7";
20 qmss {
21 control-qm1 {
22 assignments = <0 1>, "iu = (*)";
23 };
24 control-qm2 {
25 assignments = <0 1>, "iu = (*)";
26 };
28 linkram-control-qm1 {
29 assignments = <0 1>, "iu = (*)";
30 };
31 linkram-control-qm2 {
32 assignments = <0 1>, "iu = (*)";
33 };
35 linkram-int-qm1 {
36 /* hw allows max of 32K "internal" descriptors */
37 assignments = <0x00000000 0x00008000>, "iu = (*)";
38 };
39 linkram-int-qm2 {
40 /* hw allows max of 32K "internal" descriptors */
41 assignments = <0x00000000 0x00008000>, "iu = (*)";
42 };
43 linkram-ext-qm1 {
44 /* hw allows max of 480K "external" descriptors */
45 assignments = <0x00008000 0x00078000>, "iu = (*)";
46 };
47 linkram-ext-qm2 {
48 /* hw allows max of 480K "external" descriptors */
49 assignments = <0x00008000 0x00078000>, "iu = (*)";
50 };
52 memory-regions-qm1 {
53 assignments = <0 64>, "iu = (*)";
54 };
55 memory-regions-qm2 {
56 assignments = <0 64>, "iu = (*)";
57 };
59 /* Queues match device specification and/or csl_qm_queue.h regardless of split or joint mode */
60 LOW_PRIORITY_QUEUE-qm1 {
61 assignments = <0 512>, "iu = (*)";
62 };
63 AIF_QUEUE-qm1 {
64 assignments = <512 128>, "iu = (*)";
65 };
66 PASS_QUEUE-qm1 {
67 assignments = <640 9>, "iu = (*)";
68 };
69 INTC_QUEUE-qm1 {
70 assignments = <652 6>, "iu = (*)";
71 };
72 INTC_SET2_QUEUE-qm1 {
73 assignments = <658 8>, "iu = (*)";
74 };
75 INTC_SET3_QUEUE-qm1 {
76 assignments = <666 6>, "iu = (*)";
77 };
78 SRIO_QUEUE-qm1 {
79 assignments = <672 16>, "iu = (*)";
80 };
81 FFTC_A_QUEUE-qm1 {
82 assignments = <688 4>, "iu = (*)";
83 };
84 FFTC_B_QUEUE-qm1 {
85 assignments = <692 4>, "iu = (*)";
86 };
87 HIGH_PRIORITY_QUEUE-qm1 {
88 assignments = <704 32>, "iu = (*)";
89 };
90 STARVATION_COUNTER_QUEUE-qm1 {
91 assignments = <736 64>, "iu = (*)";
92 };
93 INFRASTRUCTURE_QUEUE-qm1 {
94 assignments = <800 32>, "iu = (*)";
95 };
96 TRAFFIC_SHAPING_QUEUE-qm1 {
97 assignments = <832 32>, "iu = (*)";
98 };
99 BCP_QUEUE-qm1 {
100 assignments = <864 8>, "iu = (*)";
101 };
102 FFTC_C_QUEUE-qm1 {
103 assignments = <872 4>, "iu = (*)";
104 };
105 FFTC_D_QUEUE-qm1 {
106 assignments = <876 4>, "iu = (*)";
107 };
108 FFTC_E_QUEUE-qm1 {
109 assignments = <880 4>, "iu = (*)";
110 };
111 FFTC_F_QUEUE-qm1 {
112 assignments = <884 4>, "iu = (*)";
113 };
114 GENERAL_PURPOSE_QUEUE-qm1 {
115 assignments = <896 7296>, "iu = (*)";
116 };
117 LOW_PRIORITY_QUEUE-qm2 {
118 assignments = <8192 512>, "iu = (*)";
119 };
120 INTC_SET4_QUEUE-qm2 {
121 assignments = <8844 20>, "iu = (*)";
122 };
123 GIC400_QUEUE-qm2 {
124 assignments = <8704 32>, "iu = (*)";
125 };
126 EDMA_4_QUEUE-qm2 {
127 assignments = <8736 8>, "iu = (*)";
128 };
129 HLINK_BROADCAST_QUEUE-qm2 {
130 assignments = <8744 8>, "iu = (*)";
131 };
132 XGE_QUEUE-qm2 {
133 assignments = <8752 8>, "iu = (*)";
134 };
135 HLINK_0_QUEUE-qm2 {
136 assignments = <8796 16>, "iu = (*)";
137 };
138 DXB_QUEUE-qm2 {
139 assignments = <8836 8>, "iu = (*)";
140 };
141 HLINK_1_QUEUE-qm2 {
142 assignments = <8864 16>, "iu = (*)";
143 };
144 HIGH_PRIORITY_QUEUE-qm2 {
145 assignments = <8896 32>, "iu = (*)";
146 };
147 STARVATION_COUNTER_QUEUE-qm2 {
148 assignments = <8928 64>, "iu = (*)";
149 };
150 QM2_INFRASTRUCTURE_QUEUE-qm2 {
151 assignments = <8992 32>, "iu = (*)";
152 };
153 GENERAL_PURPOSE_QUEUE-qm2 {
154 assignments = <9024 7360>, "iu = (*)";
155 };
157 firmware-pdsp {
158 assignments = <0 8>, "iu = (*)";
159 };
160 accumulator0-ch { /* accumulator using first INTD */
161 assignments = <0 48>, "iu = (*)";
162 };
163 accumulator1-ch { /* accumulator using second INTD */
164 assignments = <0 48>, "iu = (*)";
165 };
166 }; /* qmss */
168 cppi {
169 srio-hw-open {
170 assignments = <0 1>, "iu = (*)";
171 };
172 srio-rx-ch {
173 assignments = <0 16>, "iu = (*)";
174 };
175 srio-tx-ch {
176 assignments = <0 16>, "iu = (*)";
177 };
178 srio-rx-flow-id {
179 assignments = <0 20>, "iu = (*)";
180 };
182 aif-hw-open {
183 assignments = <0 1>, "iu = (*)";
184 };
185 aif-rx-ch {
186 assignments = <0 129>, "iu = (*)";
187 };
188 aif-tx-ch {
189 assignments = <0 129>, "iu = (*)";
190 };
191 aif-rx-flow-id {
192 assignments = <0 129>, "iu = (*)";
193 };
195 fftc-a-hw-open {
196 assignments = <0 1>, "iu = (*)";
197 };
198 fftc-a-rx-ch {
199 assignments = <0 4>, "iu = (*)";
200 };
201 fftc-a-tx-ch {
202 assignments = <0 4>, "iu = (*)";
203 };
204 fftc-a-rx-flow-id {
205 assignments = <0 8>, "iu = (*)";
206 };
208 fftc-b-hw-open {
209 assignments = <0 1>, "iu = (*)";
210 };
211 fftc-b-rx-ch {
212 assignments = <0 4>, "iu = (*)";
213 };
214 fftc-b-tx-ch {
215 assignments = <0 4>, "iu = (*)";
216 };
217 fftc-b-rx-flow-id {
218 assignments = <0 8>, "iu = (*)";
219 };
221 fftc-c-hw-open {
222 assignments = <0 1>, "iu = (*)";
223 };
224 fftc-c-rx-ch {
225 assignments = <0 4>, "iu = (*)";
226 };
227 fftc-c-tx-ch {
228 assignments = <0 4>, "iu = (*)";
229 };
230 fftc-c-rx-flow-id {
231 assignments = <0 8>, "iu = (*)";
232 };
234 fftc-d-hw-open {
235 assignments = <0 1>, "iu = (*)";
236 };
237 fftc-d-rx-ch {
238 assignments = <0 4>, "iu = (*)";
239 };
240 fftc-d-tx-ch {
241 assignments = <0 4>, "iu = (*)";
242 };
243 fftc-d-rx-flow-id {
244 assignments = <0 8>, "iu = (*)";
245 };
247 fftc-e-hw-open {
248 assignments = <0 1>, "iu = (*)";
249 };
250 fftc-e-rx-ch {
251 assignments = <0 4>, "iu = (*)";
252 };
253 fftc-e-tx-ch {
254 assignments = <0 4>, "iu = (*)";
255 };
256 fftc-e-rx-flow-id {
257 assignments = <0 8>, "iu = (*)";
258 };
260 fftc-f-hw-open {
261 assignments = <0 1>, "iu = (*)";
262 };
263 fftc-f-rx-ch {
264 assignments = <0 4>, "iu = (*)";
265 };
266 fftc-f-tx-ch {
267 assignments = <0 4>, "iu = (*)";
268 };
269 fftc-f-rx-flow-id {
270 assignments = <0 8>, "iu = (*)";
271 };
273 pass-hw-open {
274 assignments = <0 1>, "iu = (*)";
275 };
276 pass-rx-ch {
277 assignments = <0 24>, "iu = (*)";
278 };
279 pass-tx-ch {
280 assignments = <0 9>, "iu = (*)";
281 };
282 pass-rx-flow-id {
283 assignments = <0 32>, "iu = (*)";
284 };
286 qmss-qm1-hw-open {
287 assignments = <0 1>, "iu = (*)";
288 };
289 qmss-qm1-rx-ch {
290 assignments = <0 32>, "iu = (*)";
291 };
292 qmss-qm1-tx-ch {
293 assignments = <0 32>, "iu = (*)";
294 };
295 qmss-qm1-rx-flow-id {
296 assignments = <0 64>, "iu = (*)";
297 };
299 qmss-qm2-hw-open {
300 assignments = <0 1>, "iu = (*)";
301 };
302 qmss-qm2-rx-ch {
303 assignments = <0 32>, "iu = (*)";
304 };
305 qmss-qm2-tx-ch {
306 assignments = <0 32>, "iu = (*)";
307 };
308 qmss-qm2-rx-flow-id {
309 assignments = <0 64>, "iu = (*)";
310 };
312 bcp-hw-open {
313 assignments = <0 1>, "iu = (*)";
314 };
315 bcp-rx-ch {
316 assignments = <0 8>, "iu = (*)";
317 };
318 bcp-tx-ch {
319 assignments = <0 8>, "iu = (*)";
320 };
321 bcp-rx-flow-id {
322 assignments = <0 64>, "iu = (*)";
323 };
325 xge-hw-open {
326 assignments = <0 1>, "iu = (*)";
327 };
328 xge-rx-ch {
329 assignments = <0 16>, "iu = (*)";
330 };
331 xge-tx-ch {
332 assignments = <0 8>, "iu = (*)";
333 };
334 xge-rx-flow-id {
335 assignments = <0 32>, "iu = (*)";
336 };
337 }; /* cppi */
339 pa {
340 pa-lut {
341 assignments = <0 5>, "iu = (*)";
342 };
343 pa-firmware {
344 assignments = <0 1>, "iu = (*)";
345 };
346 pa-32bUsrStats {
347 assignments = <0 512>, "iu = (*)";
348 };
349 pa-64bUsrStats {
350 assignments = <0 256>, "iu = (*)";
351 };
352 }; /* pa */
354 srio {
355 srio-dio-sockets {
356 assignments = <0 8>, "iu = (*)";
357 };
358 srio-type9-type11-sockets {
359 assignments = <0 64>, "iu = (*)";
360 };
361 srio-type9-type11-mappings {
362 assignments = <0 64>, "iu = (*)";
363 };
364 srio-lsus {
365 assignments = <0 8>, "iu = (*)";
366 };
367 srio-init-hw {
368 assignments = <0 1>, "iu = (*)";
369 };
370 };
371 };