1 /dts-v1/;
3 /* Policy assigning all resources to RM instances running on DSP. */
5 / {
6 /* Valid instance list contains instance names used within TI example projects
7 * utilizing RM. The list can be modified as needed by applications integrating
8 * RM. For an RM instance to be given permissions the name used to initialize it
9 * must be present in this list */
10 valid-instances = "RM_Server",
11 "RM_Client0",
12 "RM_Client1",
13 "RM_Client2",
14 "RM_Client3",
15 "RM_Client4",
16 "RM_Client5",
17 "RM_Client6",
18 "RM_Client7";
20 qmss {
21 control-qm1 {
22 assignments = <0 1>, "iu = (*)";
23 };
25 linkram-control-qm1 {
26 assignments = <0 1>, "iu = (*)";
27 };
29 linkram-int-qm1 {
30 /* hw allows max of 16K "internal" descriptors */
31 assignments = <0x00000000 0x00004000>, "iu = (*)";
32 };
33 linkram-ext-qm1 {
34 /* hw allows max of 496K "external" descriptors */
35 assignments = <0x00004000 0x0007C000>, "iu = (*)";
36 };
38 memory-regions-qm1 {
39 assignments = <0 64>, "iu = (*)";
40 };
42 LOW_PRIORITY_QUEUE-qm1 {
43 assignments = <0 512>, "iu = (*)";
44 };
45 GIC400_QUEUE-qm1 {
46 assignments = <528 32>, "iu = (*)";
47 };
48 EDMA_0_QUEUE-qm1 {
49 assignments = <560 6>, "iu = (*)";
50 };
51 INTC_QUEUE-qm1 {
52 assignments = <570 18>, "iu = (*)";
53 };
54 INTC_EDMA_SET0_QUEUE-qm1 {
55 assignments = <589 2>, "iu = (*)";
56 };
57 INTC_EDMA_SET1_QUEUE-qm1 {
58 assignments = <591 8>, "iu = (*)";
59 };
60 INTC_SET5_QUEUE-qm1 {
61 assignments = <599 4>, "iu = (*)";
62 };
63 INTC_EDMA_SET2_QUEUE-qm1 {
64 assignments = <603 2>, "iu = (*)";
65 };
66 INTC_SET2_QUEUE-qm1 {
67 assignments = <605 32>, "iu = (*)";
68 };
69 SOC_SET0_QUEUE-qm1 {
70 assignments = <637 15>, "iu = (*)";
71 };
72 INTC_SET3_QUEUE-qm1 {
73 assignments = <652 6>, "iu = (*)";
74 };
75 SOC_SET1_QUEUE-qm1 {
76 assignments = <658 8>, "iu = (*)";
77 };
78 INTC_SET4_QUEUE-qm1 {
79 assignments = <666 22>, "iu = (*)";
80 };
81 FFTC_A_QUEUE-qm1 {
82 assignments = <688 4>, "iu = (*)";
83 };
84 FFTC_B_QUEUE-qm1 {
85 assignments = <692 4>, "iu = (*)";
86 };
87 BCP_QUEUE-qm1 {
88 assignments = <696 8>, "iu = (*)";
89 };
90 HIGH_PRIORITY_QUEUE-qm1 {
91 assignments = <704 32>, "iu = (*)";
92 };
93 STARVATION_COUNTER_QUEUE-qm1 {
94 assignments = <736 64>, "iu = (*)";
95 };
96 INFRASTRUCTURE_QUEUE-qm1 {
97 assignments = <800 32>, "iu = (*)";
98 };
99 IQNET_QUEUE-qm1 {
100 assignments = <832 48>, "iu = (*)";
101 };
102 PASS_QUEUE-qm1 {
103 assignments = <896 21>, "iu = (*)";
104 };
105 GENERAL_PURPOSE_QUEUE-qm1 {
106 assignments = <1024 3071>, "iu = (*)",
107 <4095 1>, "iue = (*)", /* Queues ending in 0xfff can't be used as return queue (hw reserved) */
108 <4096 4095>, "iu = (*)",
109 <8191 1>, "iue = (*)"; /* Queues ending in 0xfff can't be used as return queue (hw reserved) */
110 };
112 firmware-pdsp {
113 assignments = <0 8>, "iu = (*)";
114 };
115 accumulator0-ch { /* accumulator using first INTD */
116 assignments = <0 48>, "iu = (*)";
117 };
118 accumulator1-ch { /* accumulator using second INTD */
119 assignments = <0 48>, "iu = (*)";
120 };
122 netss-control-qm1 {
123 assignments = <0 1>, "iu = (*)";
124 };
125 netss-linkram-control-qm1 {
126 assignments = <0 1>, "iu = (*)";
127 };
128 netss-linkram-qm1 {
129 assignments = <0x00000000 0x00004000>, "iu = (*)";
130 };
131 netss-memory-regions-qm1 {
132 assignments = <0 16>, "iu = (*)";
133 };
135 netss-control-qm2 {
136 assignments = <0 1>, "iu = (*)";
137 };
138 netss-linkram-control-qm2 {
139 assignments = <0 1>, "iu = (*)";
140 };
141 netss-linkram-qm2 {
142 assignments = <0x00000000 0x00004000>, "iu = (*)";
143 };
144 netss-memory-regions-qm2 {
145 assignments = <0 16>, "iu = (*)";
146 };
148 NETSS_PASS_QUEUE-qm1 {
149 assignments = <0 21>, "iu = (*)";
150 };
151 NETSS_GENERAL_PURPOSE_QUEUE-qm1 {
152 assignments = <21 43>, "iu = (*)";
153 };
154 NETSS_GENERAL_PURPOSE_QUEUE-qm2 {
155 assignments = <0 64>, "iu = (*)";
156 };
157 }; /* qmss */
159 cppi {
160 fftc-a-hw-open {
161 assignments = <0 1>, "iu = (*)";
162 };
163 fftc-a-rx-ch {
164 assignments = <0 4>, "iu = (*)";
165 };
166 fftc-a-tx-ch {
167 assignments = <0 4>, "iu = (*)";
168 };
169 fftc-a-rx-flow-id {
170 assignments = <0 8>, "iu = (*)";
171 };
173 fftc-b-hw-open {
174 assignments = <0 1>, "iu = (*)";
175 };
176 fftc-b-rx-ch {
177 assignments = <0 4>, "iu = (*)";
178 };
179 fftc-b-tx-ch {
180 assignments = <0 4>, "iu = (*)";
181 };
182 fftc-b-rx-flow-id {
183 assignments = <0 8>, "iu = (*)";
184 };
186 netcp-hw-open {
187 assignments = <0 1>, "iu = (*)";
188 };
189 netcp-rx-ch {
190 assignments = <0 91>, "iu = (*)";
191 };
192 netcp-tx-ch {
193 assignments = <0 21>, "iu = (*)";
194 };
195 netcp-rx-flow-id {
196 assignments = <0 32>, "iu = (*)";
197 };
199 qmss-qm1-hw-open {
200 assignments = <0 1>, "iu = (*)";
201 };
202 qmss-qm1-rx-ch {
203 assignments = <0 32>, "iu = (*)";
204 };
205 qmss-qm1-tx-ch {
206 assignments = <0 32>, "iu = (*)";
207 };
208 qmss-qm1-rx-flow-id {
209 assignments = <0 64>, "iu = (*)";
210 };
212 bcp-hw-open {
213 assignments = <0 1>, "iu = (*)";
214 };
215 bcp-rx-ch {
216 assignments = <0 8>, "iu = (*)";
217 };
218 bcp-tx-ch {
219 assignments = <0 8>, "iu = (*)";
220 };
221 bcp-rx-flow-id {
222 assignments = <0 64>, "iu = (*)";
223 };
225 netcp-local-hw-open {
226 assignments = <0 1>, "iu = (*)";
227 };
228 netcp-local-rx-ch {
229 assignments = <0 91>, "iu = (*)";
230 };
231 netcp-local-tx-ch {
232 assignments = <0 21>, "iu = (*)";
233 };
234 netcp-local-rx-flow-id {
235 assignments = <0 32>, "iu = (*)";
236 };
238 iqn-hw-open {
239 assignments = <0 1>, "iu = (*)";
240 };
241 iqn-rx-ch {
242 assignments = <0 47>, "iu = (*)";
243 };
244 iqn-tx-ch {
245 assignments = <0 47>, "iu = (*)";
246 };
247 iqn-rx-flow-id {
248 assignments = <0 47>, "iu = (*)";
249 };
250 }; /* cppi */
252 pa {
253 pa-lut {
254 assignments = <0 8>, "iu = (*)";
255 };
256 pa-firmware {
257 assignments = <0 1>, "iu = (*)";
258 };
259 pa-32bUsrStats {
260 assignments = <0 512>, "iu = (*)";
261 };
262 pa-64bUsrStats {
263 assignments = <0 256>, "iu = (*)";
264 };
265 }; /* pa */
266 };