src/rm.c

   1 /**
   2  *   @file  rm.c
   3  *
   4  *   @brief
   5  *      This is the Resource Manager Low Level Driver file.
   6  *
   7  *  \par
   8  *  ============================================================================
   9  *  @n   (C) Copyright 2012, Texas Instruments, Inc.
  10  *
  11  *  Redistribution and use in source and binary forms, with or without
  12  *  modification, are permitted provided that the following conditions
  13  *  are met:
  14  *
  15  *    Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  *
  18  *    Redistributions in binary form must reproduce the above copyright
  19  *    notice, this list of conditions and the following disclaimer in the
  20  *    documentation and/or other materials provided with the
  21  *    distribution.
  22  *
  23  *    Neither the name of Texas Instruments Incorporated nor the names of
  24  *    its contributors may be used to endorse or promote products derived
  25  *    from this software without specific prior written permission.
  26  *
  27  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  30  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  32  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  33  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  34  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  35  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  36  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  37  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38  *
  39  *  \par
  40 */
  41
  42 /* c99 include */
  43 #include <stdint.h>
  44 #include <stdlib.h>
  45
  46 /* RM includes */
  47 #include <ti/drv/rm/rm.h>
  48 #include <ti/drv/rm/rm_public_lld.h>
  49 #include <ti/drv/rm/resource_table_defs.h>
  50 #include <ti/drv/rm/include/rm_pvt.h>
  51
  52 /* RM OSAL layer */
  53 #include <rm_osal.h>
  54
  55 /* CSL includes */
  56 #include <ti/csl/csl_qm_queue.h>
  57
  58 /**********************************************************************
  59  ************************** Globals ***********************************
  60  **********************************************************************/
  61
  62 /* Place QMSS PDSP permissions array */
  63 #pragma DATA_SECTION (rmQmssPdspFirmwarePerms, ".rm");
  64 #pragma DATA_ALIGN (rmQmssPdspFirmwarePerms, 128)
  65 Rm_Perms rmQmssPdspFirmwarePerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_FIRMWARE_PDSPS, Rm_Perms)];
  66
  67 /* Place QMSS queue permissions array */
  68 #pragma DATA_SECTION (rmQmssQueuePerms, ".rm");
  69 #pragma DATA_ALIGN (rmQmssQueuePerms, 128)
  70 Rm_Perms rmQmssQueuePerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_QUEUES, Rm_Perms)];
  71
  72 /* Place QMSS memory region permissions array */
  73 #pragma DATA_SECTION (rmQmssMemRegionPerms, ".rm");
  74 #pragma DATA_ALIGN (rmQmssMemRegionPerms, 128)
  75 Rm_Perms rmQmssMemRegionPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_MEM_REGIONS, Rm_Perms)];
  76
  77 /* Place QMSS Linking RAM permissions array */
  78 #pragma DATA_SECTION (rmQmssLinkingRamPerms, ".rm");
  79 #pragma DATA_ALIGN (rmQmssLinkingRamPerms, 128)
  80 Rm_qmssLinkingRamPerms rmQmssLinkingRamPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_LINKING_RAM_RANGES, Rm_qmssLinkingRamPerms)];
  81
  82 /* Place QMSS accumulator channel permissions array */
  83 #pragma DATA_SECTION (rmQmssAccumChPerms, ".rm");
  84 #pragma DATA_ALIGN (rmQmssAccumChPerms, 128)
  85 Rm_Perms rmQmssAccumChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_ACCUM_CH, Rm_Perms)];
  86
  87 /* Place QMSS QOS cluster permissions array */
  88 #pragma DATA_SECTION (rmQmssQosClusterPerms, ".rm");
  89 #pragma DATA_ALIGN (rmQmssQosClusterPerms, 128)
  90 Rm_Perms rmQmssQosClusterPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_QOS_CLUSTER, Rm_Perms)];
  91
  92 /* Place QMSS QOS queue permissions array */
  93 #pragma DATA_SECTION (rmQmssQosQueuePerms, ".rm");
  94 #pragma DATA_ALIGN (rmQmssQosQueuePerms, 128)
  95 Rm_Perms rmQmssQosQueuePerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_QOS_QUEUES, Rm_Perms)];
  96
  97 /* Place CPPI SRIO TX channel permissions array */
  98 #pragma DATA_SECTION (rmCppiSrioTxChPerms, ".rm");
  99 #pragma DATA_ALIGN (rmCppiSrioTxChPerms, 128)
 100 Rm_Perms rmCppiSrioTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_SRIO_TX_CH, Rm_Perms)];
 101
 102 #ifdef QMSS_MAX_AIF_QUEUE
 103 /* Place CPPI AIF TX channel permissions array */
 104 #pragma DATA_SECTION (rmCppiAifTxChPerms, ".rm");
 105 #pragma DATA_ALIGN (rmCppiAifTxChPerms, 128)
 106 Rm_Perms rmCppiAifTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_AIF_TX_CH, Rm_Perms)];
 107 #endif
 108
 109 #ifdef QMSS_MAX_FFTC_A_QUEUE
 110 /* Place CPPI FFTC A TX channel permissions array */
 111 #pragma DATA_SECTION (rmCppiFftcATxChPerms, ".rm");
 112 #pragma DATA_ALIGN (rmCppiFftcATxChPerms, 128)
 113 Rm_Perms rmCppiFftcATxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_A_TX_CH, Rm_Perms)];
 114 #endif
 115
 116 #ifdef QMSS_MAX_FFTC_B_QUEUE
 117 /* Place CPPI FFTC B TX channel permissions array */
 118 #pragma DATA_SECTION (rmCppiFftcBTxChPerms, ".rm");
 119 #pragma DATA_ALIGN (rmCppiFftcBTxChPerms, 128)
 120 Rm_Perms rmCppiFftcBTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_B_TX_CH, Rm_Perms)];
 121 #endif
 122
 123 #ifdef QMSS_MAX_PASS_QUEUE
 124 /* Place CPPI PASS TX channel permissions array */
 125 #pragma DATA_SECTION (rmCppiPassTxChPerms, ".rm");
 126 #pragma DATA_ALIGN (rmCppiPassTxChPerms, 128)
 127 Rm_Perms rmCppiPassTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_PASS_TX_CH, Rm_Perms)];
 128 #endif
 129
 130 /* Place CPPI QMSS TX channel permissions array */
 131 #pragma DATA_SECTION (rmCppiQmssTxChPerms, ".rm");
 132 #pragma DATA_ALIGN (rmCppiQmssTxChPerms, 128)
 133 Rm_Perms rmCppiQmssTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_QMSS_TX_CH, Rm_Perms)];
 134
 135 #ifdef QMSS_MAX_FFTC_C_QUEUE
 136 /* Place CPPI FFTC C TX channel permissions array */
 137 #pragma DATA_SECTION (rmCppiFftcCTxChPerms, ".rm");
 138 #pragma DATA_ALIGN (rmCppiFftcCTxChPerms, 128)
 139 Rm_Perms rmCppiFftcCTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_C_TX_CH, Rm_Perms)];
 140 #endif
 141
 142 #ifdef QMSS_MAX_BCP_QUEUE
 143 /* Place CPPI BCP TX channel permissions array */
 144 #pragma DATA_SECTION (rmCppiBcpTxChPerms, ".rm");
 145 #pragma DATA_ALIGN (rmCppiBcpTxChPerms, 128)
 146 Rm_Perms rmCppiBcpTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_BCP_TX_CH, Rm_Perms)];
 147 #endif
 148
 149 /* Place CPPI SRIO RX channel permissions array */
 150 #pragma DATA_SECTION (rmCppiSrioRxChPerms, ".rm");
 151 #pragma DATA_ALIGN (rmCppiSrioRxChPerms, 128)
 152 Rm_Perms rmCppiSrioRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_SRIO_RX_CH, Rm_Perms)];
 153
 154 #ifdef QMSS_MAX_AIF_QUEUE
 155 /* Place CPPI AIF RX channel permissions array */
 156 #pragma DATA_SECTION (rmCppiAifRxChPerms, ".rm");
 157 #pragma DATA_ALIGN (rmCppiAifRxChPerms, 128)
 158 Rm_Perms rmCppiAifRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_AIF_RX_CH, Rm_Perms)];
 159 #endif
 160
 161 #ifdef QMSS_MAX_FFTC_A_QUEUE
 162 /* Place CPPI FFTC A RX channel permissions array */
 163 #pragma DATA_SECTION (rmCppiFftcARxChPerms, ".rm");
 164 #pragma DATA_ALIGN (rmCppiFftcARxChPerms, 128)
 165 Rm_Perms rmCppiFftcARxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_A_RX_CH, Rm_Perms)];
 166 #endif
 167
 168 #ifdef QMSS_MAX_FFTC_B_QUEUE
 169 /* Place CPPI FFTC B RX channel permissions array */
 170 #pragma DATA_SECTION (rmCppiFftcBRxChPerms, ".rm");
 171 #pragma DATA_ALIGN (rmCppiFftcBRxChPerms, 128)
 172 Rm_Perms rmCppiFftcBRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_B_RX_CH, Rm_Perms)];
 173 #endif
 174
 175 #ifdef QMSS_MAX_PASS_QUEUE
 176 /* Place CPPI PASS RX channel permissions array */
 177 #pragma DATA_SECTION (rmCppiPassRxChPerms, ".rm");
 178 #pragma DATA_ALIGN (rmCppiPassRxChPerms, 128)
 179 Rm_Perms rmCppiPassRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_PASS_RX_CH, Rm_Perms)];
 180 #endif
 181
 182 /* Place CPPI QMSS RX channel permissions array */
 183 #pragma DATA_SECTION (rmCppiQmssRxChPerms, ".rm");
 184 #pragma DATA_ALIGN (rmCppiQmssRxChPerms, 128)
 185 Rm_Perms rmCppiQmssRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_QMSS_RX_CH, Rm_Perms)];
 186
 187 #ifdef QMSS_MAX_FFTC_C_QUEUE
 188 /* Place CPPI FFTC C RX channel permissions array */
 189 #pragma DATA_SECTION (rmCppiFftcCRxChPerms, ".rm");
 190 #pragma DATA_ALIGN (rmCppiFftcCRxChPerms, 128)
 191 Rm_Perms rmCppiFftcCRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_C_RX_CH, Rm_Perms)];
 192 #endif
 193
 194 #ifdef QMSS_MAX_BCP_QUEUE
 195 /* Place CPPI BCP RX channel permissions array */
 196 #pragma DATA_SECTION (rmCppiBcpRxChPerms, ".rm");
 197 #pragma DATA_ALIGN (rmCppiBcpRxChPerms, 128)
 198 Rm_Perms rmCppiBcpRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_BCP_RX_CH, Rm_Perms)];
 199 #endif
 200
 201 /* Place CPPI SRIO flow permissions array */
 202 #pragma DATA_SECTION (rmCppiSrioFlowPerms, ".rm");
 203 #pragma DATA_ALIGN (rmCppiSrioFlowPerms, 128)
 204 Rm_Perms rmCppiSrioFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_SRIO_FLOW, Rm_Perms)];
 205
 206 #ifdef QMSS_MAX_AIF_QUEUE
 207 /* Place CPPI AIF flow permissions array */
 208 #pragma DATA_SECTION (rmCppiAifFlowPerms, ".rm");
 209 #pragma DATA_ALIGN (rmCppiAifFlowPerms, 128)
 210 Rm_Perms rmCppiAifFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_AIF_FLOW, Rm_Perms)];
 211 #endif
 212
 213 #ifdef QMSS_MAX_FFTC_A_QUEUE
 214 /* Place CPPI FFTC A flow permissions array */
 215 #pragma DATA_SECTION (rmCppiFftcAFlowPerms, ".rm");
 216 #pragma DATA_ALIGN (rmCppiFftcAFlowPerms, 128)
 217 Rm_Perms rmCppiFftcAFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_A_FLOW, Rm_Perms)];
 218 #endif
 219
 220 #ifdef QMSS_MAX_FFTC_B_QUEUE
 221 /* Place CPPI FFTC B flow permissions array */
 222 #pragma DATA_SECTION (rmCppiFftcBFlowPerms, ".rm");
 223 #pragma DATA_ALIGN (rmCppiFftcBFlowPerms, 128)
 224 Rm_Perms rmCppiFftcBFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_B_FLOW, Rm_Perms)];
 225 #endif
 226
 227 #ifdef QMSS_MAX_PASS_QUEUE
 228 /* Place CPPI PASS flow permissions array */
 229 #pragma DATA_SECTION (rmCppiPassFlowPerms, ".rm");
 230 #pragma DATA_ALIGN (rmCppiPassFlowPerms, 128)
 231 Rm_Perms rmCppiPassFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_PASS_FLOW, Rm_Perms)];
 232 #endif
 233
 234 /* Place CPPI QMSS flow permissions array */
 235 #pragma DATA_SECTION (rmCppiQmssFlowPerms, ".rm");
 236 #pragma DATA_ALIGN (rmCppiQmssFlowPerms, 128)
 237 Rm_Perms rmCppiQmssFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_QMSS_FLOW, Rm_Perms)];
 238
 239 #ifdef QMSS_MAX_FFTC_C_QUEUE
 240 /* Place CPPI FFTC C flow permissions array */
 241 #pragma DATA_SECTION (rmCppiFftcCFlowPerms, ".rm");
 242 #pragma DATA_ALIGN (rmCppiFftcCFlowPerms, 128)
 243 Rm_Perms rmCppiFftcCFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_C_FLOW, Rm_Perms)];
 244 #endif
 245
 246 #ifdef QMSS_MAX_BCP_QUEUE
 247 /* Place CPPI BCP flow permissions array */
 248 #pragma DATA_SECTION (rmCppiBcpFlowPerms, ".rm");
 249 #pragma DATA_ALIGN (rmCppiBcpFlowPerms, 128)
 250 Rm_Perms rmCppiBcpFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_BCP_FLOW, Rm_Perms)];
 251 #endif
 252
 253 /* Place PA lookup table permissions array */
 254 #pragma DATA_SECTION (rmPaLutPerms, ".rm");
 255 #pragma DATA_ALIGN (rmPaLutPerms, 128)
 256 Rm_Perms rmPaLutPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_PA_LUT, Rm_Perms)];
 257
 258 /* Rm_init/Rm_start synchronization object.  Initialized to 0. */
 259 #pragma DATA_SECTION (rmGSyncObj, ".rm");
 260 #pragma DATA_ALIGN (rmGSyncObj, 128)
 261 Rm_Sync_Obj rmGSyncObj =
 262 {
 263     {
 264         RM_PERMISSION_TABLE_NOT_VALID,
 265     }
 266 };
 267
 268 /* Create, populate, and place RM global permissions object */
 269 #pragma DATA_SECTION (rmGPermsObj, ".rm");
 270 #pragma DATA_ALIGN (rmGPermsObj, 128)
 271 Rm_GlobalPermissionsObj rmGPermsObj =
 272 {
 273     {
 274         /* qmssPdspFirmwarePerms */
 275         &rmQmssPdspFirmwarePerms[0],
 276         /* Pointer: qmssQueuePerms */
 277         &rmQmssQueuePerms[0],
 278         /* Pointer: qmssMemRegionPerms */
 279         &rmQmssMemRegionPerms[0],
 280         /* qmssLinkRamControlPerms */
 281         {
 282             0u,
 283             0u,
 284         },
 285         /* Pointer: qmssLinkRamPerms */
 286         &rmQmssLinkingRamPerms[0],
 287         /* Pointer: qmssAccumChPerms */
 288         &rmQmssAccumChPerms[0],
 289         /* qmssQosPdspTimerPerms */
 290         {
 291             0u,
 292             0u,
 293         },
 294         /* Pointer: qmssQosClusterPerms */
 295         &rmQmssQosClusterPerms[0],
 296         /* Pointer: qmssQosQueuePerms */
 297         &rmQmssQosQueuePerms[0],
 298         /* Pointer array: cppiTxChPerms - Must be in same order as DMA objects */
 299         {
 300             { &rmCppiSrioTxChPerms[0],
 301 #ifdef QMSS_MAX_AIF_QUEUE
 302                &rmCppiAifTxChPerms[0],
 303 #endif
 304 #ifdef QMSS_MAX_FFTC_A_QUEUE
 305                &rmCppiFftcATxChPerms[0],
 306 #endif
 307 #ifdef QMSS_MAX_FFTC_B_QUEUE
 308                &rmCppiFftcBTxChPerms[0],
 309 #endif
 310 #ifdef QMSS_MAX_PASS_QUEUE
 311                &rmCppiPassTxChPerms[0],
 312 #endif
 313                &rmCppiQmssTxChPerms[0],
 314 #ifdef QMSS_MAX_FFTC_C_QUEUE
 315                &rmCppiFftcCTxChPerms[0],
 316 #endif
 317 #ifdef QMSS_MAX_BCP_QUEUE
 318                &rmCppiBcpTxChPerms[0]
 319 #endif
 320             }
 321         },
 322         /* Pointer array: cppiRxChPerms - Must be in same order as DMA objects  */
 323         {
 324             { &rmCppiSrioRxChPerms[0],
 325 #ifdef QMSS_MAX_AIF_QUEUE
 326                &rmCppiAifRxChPerms[0],
 327 #endif
 328 #ifdef QMSS_MAX_FFTC_A_QUEUE
 329                &rmCppiFftcARxChPerms[0],
 330 #endif
 331 #ifdef QMSS_MAX_FFTC_B_QUEUE
 332                &rmCppiFftcBRxChPerms[0],
 333 #endif
 334 #ifdef QMSS_MAX_PASS_QUEUE
 335                &rmCppiPassRxChPerms[0],
 336 #endif
 337                &rmCppiQmssRxChPerms[0],
 338 #ifdef QMSS_MAX_FFTC_C_QUEUE
 339                &rmCppiFftcCRxChPerms[0],
 340 #endif
 341 #ifdef QMSS_MAX_BCP_QUEUE
 342                &rmCppiBcpRxChPerms[0]
 343 #endif
 344             }
 345         },
 346         /* Pointer array: cppiFlowPerms - Must be in same order as DMA objects  */
 347         {
 348             { &rmCppiSrioFlowPerms[0],
 349 #ifdef QMSS_MAX_AIF_QUEUE
 350                &rmCppiAifFlowPerms[0],
 351 #endif
 352 #ifdef QMSS_MAX_FFTC_A_QUEUE
 353                &rmCppiFftcAFlowPerms[0],
 354 #endif
 355 #ifdef QMSS_MAX_FFTC_B_QUEUE
 356                &rmCppiFftcBFlowPerms[0],
 357 #endif
 358 #ifdef QMSS_MAX_PASS_QUEUE
 359                &rmCppiPassFlowPerms[0],
 360 #endif
 361                &rmCppiQmssFlowPerms[0],
 362 #ifdef QMSS_MAX_FFTC_C_QUEUE
 363                &rmCppiFftcCFlowPerms[0],
 364 #endif
 365 #ifdef QMSS_MAX_BCP_QUEUE
 366                &rmCppiBcpFlowPerms[0]
 367 #endif
 368             }
 369         },
 370         /* paFirmwarePerms */
 371         {
 372             0u,
 373             0u,
 374         },
 375         /* Pointer: paLutPerms */
 376         &rmPaLutPerms[0],
 377     }
 378 };
 379
 380 /** @brief Global Variable (should be local per DSP) containing LLD RM permission checkers */
 381 Rm_LldPermCallouts rmPermissionCheckers =
 382 {
 383     Rm_initPermissionChecker,
 384     Rm_usePermissionChecker,
 385 };
 386
 387 /** @brief Global Variable which describes the RM LLD Version Information */
 388 const char   rmLldVersionStr[] = RM_LLD_VERSION_STR ":" __DATE__  ":" __TIME__;
 389
 390 /**********************************************************************
 391  ********************** Internal Functions *********************************
 392  **********************************************************************/
 393
 394 /**
 395  *  @b Description
 396  *  @n
 397  *      Initialize the permission tables.  All resources are intialized to deny all initialization
 398  *      and usage permissions.
 399  *
 400  */
 401 void Rm_permissionTableInit(void)
 402 {
 403     uint16_t resourceIndex;
 404     Rm_Perms *resArrayPtr;
 405     uint16_t dmaNum;
 406     uint16_t dmaTxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_TX_CH,
 407 #ifdef QMSS_MAX_AIF_QUEUE
 408                                           RM_CPPI_AIF_TX_CH,
 409 #endif
 410 #ifdef QMSS_MAX_FFTC_A_QUEUE
 411                                           RM_CPPI_FFTC_A_TX_CH,
 412 #endif
 413 #ifdef QMSS_MAX_FFTC_B_QUEUE
 414                                           RM_CPPI_FFTC_B_TX_CH,
 415 #endif
 416 #ifdef QMSS_MAX_PASS_QUEUE
 417                                           RM_CPPI_PASS_TX_CH,
 418 #endif
 419                                           RM_CPPI_QMSS_TX_CH,
 420 #ifdef QMSS_MAX_FFTC_C_QUEUE
 421                                           RM_CPPI_FFTC_C_TX_CH,
 422 #endif
 423 #ifdef QMSS_MAX_BCP_QUEUE
 424                                           RM_CPPI_BCP_TX_CH
 425 #endif
 426                                          };
 427     uint16_t dmaRxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_RX_CH,
 428 #ifdef QMSS_MAX_AIF_QUEUE
 429                                           RM_CPPI_AIF_RX_CH,
 430 #endif
 431 #ifdef QMSS_MAX_FFTC_A_QUEUE
 432                                           RM_CPPI_FFTC_A_RX_CH,
 433 #endif
 434 #ifdef QMSS_MAX_FFTC_B_QUEUE
 435                                           RM_CPPI_FFTC_B_RX_CH,
 436 #endif
 437 #ifdef QMSS_MAX_PASS_QUEUE
 438                                           RM_CPPI_PASS_RX_CH,
 439 #endif
 440                                           RM_CPPI_QMSS_RX_CH,
 441 #ifdef QMSS_MAX_FFTC_C_QUEUE
 442                                           RM_CPPI_FFTC_C_RX_CH,
 443 #endif
 444 #ifdef QMSS_MAX_BCP_QUEUE
 445                                           RM_CPPI_BCP_RX_CH
 446 #endif
 447                                          };
 448     uint16_t dmaFlow[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_FLOW,
 449 #ifdef QMSS_MAX_AIF_QUEUE
 450                                           RM_CPPI_AIF_FLOW,
 451 #endif
 452 #ifdef QMSS_MAX_FFTC_A_QUEUE
 453                                           RM_CPPI_FFTC_A_FLOW,
 454 #endif
 455 #ifdef QMSS_MAX_FFTC_B_QUEUE
 456                                           RM_CPPI_FFTC_B_FLOW,
 457 #endif
 458 #ifdef QMSS_MAX_PASS_QUEUE
 459                                           RM_CPPI_PASS_FLOW,
 460 #endif
 461                                           RM_CPPI_QMSS_FLOW,
 462 #ifdef QMSS_MAX_FFTC_C_QUEUE
 463                                           RM_CPPI_FFTC_C_FLOW,
 464 #endif
 465 #ifdef QMSS_MAX_BCP_QUEUE
 466                                           RM_CPPI_BCP_FLOW
 467 #endif
 468                                          };
 469
 470     /* QMSS Linking RAM Control */
 471     rmGPermsObj.obj.qmssLinkRamControlPerms.initPerms = 0;
 472     rmGPermsObj.obj.qmssLinkRamControlPerms.usePerms = 0;
 473
 474     /* QMSS QOS PDSP Timer */
 475     rmGPermsObj.obj.qmssQosPdspTimerPerms.initPerms = 0;
 476     rmGPermsObj.obj.qmssQosPdspTimerPerms.usePerms = 0;
 477
 478     /* PA Firmware */
 479     rmGPermsObj.obj.paFirmwarePerms.initPerms = 0;
 480     rmGPermsObj.obj.paFirmwarePerms.usePerms = 0;
 481
 482     /* Writeback the values that were initialized in the global object itself */
 483     Rm_osalEndMemAccess ((void *) &rmGPermsObj, sizeof (Rm_GlobalPermissionsObj));
 484
 485     /* QMSS PDSP Firmware */
 486     for (resourceIndex = 0; resourceIndex < RM_QMSS_FIRMWARE_PDSPS; resourceIndex++)
 487     {
 488         rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceIndex].initPerms = 0;
 489         rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceIndex].usePerms = 0;
 490     }
 491     /* Writeback the qmssPdspFirmwarePerms array */
 492     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssPdspFirmwarePerms, sizeof (Rm_Perms)*RM_QMSS_FIRMWARE_PDSPS);
 493
 494     /* QMSS queues */
 495     for (resourceIndex = 0; resourceIndex < RM_QMSS_QUEUES; resourceIndex++)
 496     {
 497         rmGPermsObj.obj.qmssQueuePerms[resourceIndex].initPerms = 0;
 498         rmGPermsObj.obj.qmssQueuePerms[resourceIndex].usePerms = 0;
 499     }
 500     /* Writeback the qmssQueuePerms array */
 501     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssQueuePerms, sizeof (Rm_Perms)*RM_QMSS_QUEUES);
 502
 503     /* QMSS memory regions */
 504     for (resourceIndex = 0; resourceIndex < RM_QMSS_MEM_REGIONS; resourceIndex++)
 505     {
 506         rmGPermsObj.obj.qmssMemRegionPerms[resourceIndex].initPerms = 0;
 507         rmGPermsObj.obj.qmssMemRegionPerms[resourceIndex].usePerms = 0;
 508     }
 509     /* Writeback the qmssMemRegionPerms array */
 510     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssMemRegionPerms, sizeof (Rm_Perms)*RM_QMSS_MEM_REGIONS);
 511
 512     /* QMSS Linking RAM */
 513     for (resourceIndex = 0; resourceIndex < RM_QMSS_LINKING_RAM_RANGES; resourceIndex++)
 514     {
 515         rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].startIndex = RM_QMSS_LINKING_RAM_RANGE_INIT;
 516         rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].endIndex = RM_QMSS_LINKING_RAM_RANGE_INIT;
 517         rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].rangePerms.initPerms = 0;
 518         rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].rangePerms.usePerms = 0;
 519     }
 520     /* Writeback the qmssLinkRamPerms array */
 521     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssLinkRamPerms, sizeof (Rm_Perms)*RM_QMSS_LINKING_RAM_RANGES);
 522
 523     /* QMSS accumulator channels */
 524     for (resourceIndex = 0; resourceIndex < RM_QMSS_ACCUM_CH; resourceIndex++)
 525     {
 526         rmGPermsObj.obj.qmssAccumChPerms[resourceIndex].initPerms = 0;
 527         rmGPermsObj.obj.qmssAccumChPerms[resourceIndex].usePerms = 0;
 528     }
 529     /* Writeback the qmssAccumChPerms array */
 530     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssAccumChPerms, sizeof (Rm_Perms)*RM_QMSS_ACCUM_CH);
 531
 532     /* QMSS QOS Clusters */
 533     for (resourceIndex = 0; resourceIndex < RM_QMSS_QOS_CLUSTER; resourceIndex++)
 534     {
 535         rmGPermsObj.obj.qmssQosClusterPerms[resourceIndex].initPerms = 0;
 536         rmGPermsObj.obj.qmssQosClusterPerms[resourceIndex].usePerms = 0;
 537     }
 538     /* Writeback the qmssQosClusterPerms array */
 539     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssQosClusterPerms, sizeof (Rm_Perms)*RM_QMSS_QOS_CLUSTER);
 540
 541     /* QMSS QOS Queues */
 542     for (resourceIndex = 0; resourceIndex < RM_QMSS_QOS_QUEUES; resourceIndex++)
 543     {
 544         rmGPermsObj.obj.qmssQosQueuePerms[resourceIndex].initPerms = 0;
 545         rmGPermsObj.obj.qmssQosQueuePerms[resourceIndex].usePerms = 0;
 546     }
 547     /* Writeback the qmssQosQueuePerms array */
 548     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssQosQueuePerms, sizeof (Rm_Perms)*RM_QMSS_QOS_QUEUES);
 549
 550     /* CPPI DMA transmit channels */
 551     for (dmaNum = 0; dmaNum < RM_CPPI_MAX_DMAS; dmaNum++)
 552     {
 553         resArrayPtr = rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[dmaNum];
 554
 555         for (resourceIndex = 0; resourceIndex < dmaTxCh[dmaNum]; resourceIndex++)
 556         {
 557             resArrayPtr[resourceIndex].initPerms = 0;
 558             resArrayPtr[resourceIndex].usePerms = 0;
 559         }
 560
 561         /* Writeback each of the transmit channel arrays  */
 562         Rm_osalEndMemAccess ((void *) resArrayPtr, sizeof (Rm_Perms)*dmaTxCh[dmaNum]);
 563     }
 564
 565     /* CPPI DMA receive channels */
 566     for (dmaNum = 0; dmaNum < RM_CPPI_MAX_DMAS; dmaNum++)
 567     {
 568         resArrayPtr = rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[dmaNum];
 569
 570         for (resourceIndex = 0; resourceIndex < dmaRxCh[dmaNum]; resourceIndex++)
 571         {
 572             resArrayPtr[resourceIndex].initPerms = 0;
 573             resArrayPtr[resourceIndex].usePerms = 0;
 574         }
 575
 576         /* Writeback each of the receive channel arrays */
 577         Rm_osalEndMemAccess ((void *) resArrayPtr, sizeof (Rm_Perms)*dmaRxCh[dmaNum]);
 578     }
 579
 580     /* CPPI DMA flows */
 581     for (dmaNum = 0; dmaNum < RM_CPPI_MAX_DMAS; dmaNum++)
 582     {
 583         resArrayPtr = rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[dmaNum];
 584
 585         for (resourceIndex = 0; resourceIndex < dmaFlow[dmaNum]; resourceIndex++)
 586         {
 587             resArrayPtr[resourceIndex].initPerms = 0;
 588             resArrayPtr[resourceIndex].usePerms = 0;
 589         }
 590
 591         /* Writeback each of the flow arrays */
 592         Rm_osalEndMemAccess ((void *) resArrayPtr, sizeof (Rm_Perms)*dmaFlow[dmaNum]);
 593     }
 594
 595     /* PA Lookup tables */
 596     for (resourceIndex = 0; resourceIndex < RM_PA_LUT; resourceIndex++)
 597     {
 598         rmGPermsObj.obj.paLutPerms[resourceIndex].initPerms = 0;
 599         rmGPermsObj.obj.paLutPerms[resourceIndex].usePerms = 0;
 600     }
 601     /* Writeback the paLutPerms array */
 602     Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.paLutPerms, sizeof (Rm_Perms)*RM_PA_LUT);
 603
 604 }
 605
 606 /**
 607  *  @b Description
 608  *  @n
 609  *      Sets a list of entries in a permissions array to the specified permissions
 610  *
 611  *  @param[in]  resourceEntry
 612  *      The resource entry from the application defined resource table containing
 613  *      a range of resources and the permissions to assign to them.
 614  *
 615  *  @param[in]  rmPermsArray
 616  *      The permissions array for the resource specified in the resourceEntry.
 617  *
 618  *  @param[in]  len
 619  *      Full length of permissions array for writeback after the permissions have been
 620  *      transferred.
 621  */
 622 void Rm_setTablePermissions (const Rm_Resource *resourceEntry, Rm_Perms *rmPermsArray, uint32_t len)
 623 {
 624     uint32_t index;
 625
 626     /* Scan through the resource range filling in the specified permission */
 627     for (index = resourceEntry->resourceStart; index < resourceEntry->resourceEnd + 1; index++)
 628     {
 629         rmPermsArray[index].initPerms = resourceEntry->resourceInitFlags;
 630         rmPermsArray[index].usePerms  = resourceEntry->resourceUseFlags;
 631     }
 632
 633     Rm_osalEndMemAccess ((void *)rmPermsArray, sizeof (Rm_Perms)* len);
 634 }
 635
 636 /**
 637  *  @b Description
 638  *  @n
 639  *      Takes an application specified resource table as input and transfers all
 640  *      resource permissions specified within into the internal resource
 641  *      permission tables.  Upon completion of permission transfer a global
 642  *      synchronization object is written to sync with slave cores.
 643  *
 644  *  @param[in]  rmResourceTable
 645  *      Application defined resource table containing all resources that should
 646  *      have permissions set for the DSPs
 647  *
 648  *  @retval
 649  *      Success -   RM_OK
 650  *  @retval
 651  *      Failure -   RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED
 652  */
 653 Rm_Result Rm_populatePermissionTable(const Rm_Resource *rmResourceTable)
 654 {
 655     const Rm_Resource *resourceEntry;
 656     uint16_t linkRamIndex;
 657
 658     /* Verify resource table can be read by verifying magic number is contained
 659      * in first entry of the resource table */
 660     resourceEntry = rmResourceTable;
 661
 662     /* Invalidate the resource */
 663     Rm_osalBeginMemAccess ((void *) resourceEntry, sizeof (Rm_Resource));
 664     if (resourceEntry->resourceId != RM_RESOURCE_MAGIC_NUMBER)
 665     {
 666         return RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED;
 667     }
 668
 669     /* Magic number is visible start parsing the resource table and transferring
 670       * permissions to the internal permissions tables */
 671
 672     /* Parse resource table until last entry field is encountered */
 673     while (resourceEntry->resourceId != RM_RESOURCE_FINAL_ENTRY)
 674     {
 675         /* Invalidate the resource */
 676         Rm_osalBeginMemAccess ((void *) resourceEntry, sizeof (Rm_Resource));
 677
 678         /* Populate a permission table based on the resourceId */
 679         switch (resourceEntry->resourceId)
 680         {
 681             case RM_RESOURCE_MAGIC_NUMBER:
 682                 break;
 683
 684             case RM_RESOURCE_QMSS_FIRMWARE_PDSP:
 685                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_FIRMWARE_PDSPS, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 686                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssPdspFirmwarePerms, RM_QMSS_FIRMWARE_PDSPS);
 687                   break;
 688
 689             case RM_RESOURCE_QMSS_QUEUE:
 690                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_QUEUES, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 691                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssQueuePerms, RM_QMSS_QUEUES);
 692                   break;
 693
 694             case RM_RESOURCE_QMSS_MEMORY_REGION:
 695                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_MEM_REGIONS, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 696                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssMemRegionPerms, RM_QMSS_MEM_REGIONS);
 697                   break;
 698
 699             case RM_RESOURCE_QMSS_LINKING_RAM_CONTROL:
 700                 rmGPermsObj.obj.qmssLinkRamControlPerms.initPerms = resourceEntry->resourceInitFlags;
 701                 rmGPermsObj.obj.qmssLinkRamControlPerms.usePerms  = resourceEntry->resourceUseFlags;
 702                   break;
 703
 704             case RM_RESOURCE_QMSS_LINKING_RAM:
 705                 /* Expect Linking RAM ranges to be presented in order */
 706
 707                 /* Find next available unused Linking RAM permissions entry */
 708                 for (linkRamIndex = 0; linkRamIndex < RM_QMSS_LINKING_RAM_RANGES; linkRamIndex++)
 709                 {
 710                     if ((rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].startIndex == RM_QMSS_LINKING_RAM_RANGE_INIT) &&
 711                          (rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].endIndex == RM_QMSS_LINKING_RAM_RANGE_INIT))
 712                     {
 713                         RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_LINKING_RAM_RANGE_INIT,
 714                                         RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 715                         /* Populate the entry with the Linking RAM resource data */
 716                         rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].startIndex = resourceEntry->resourceStart;
 717                         rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].endIndex = resourceEntry->resourceEnd;
 718                         rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].rangePerms.initPerms = resourceEntry->resourceInitFlags;
 719                         rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].rangePerms.usePerms  = resourceEntry->resourceUseFlags;
 720
 721                         Rm_osalEndMemAccess ((void *)&rmGPermsObj.obj.qmssLinkRamPerms[0], sizeof (Rm_Perms)* RM_QMSS_LINKING_RAM_RANGES);
 722
 723                         /* Leave search loop */
 724                         break;
 725                     }
 726                 }
 727                   break;
 728
 729             case RM_RESOURCE_QMSS_ACCUMULATOR_CH:
 730                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_ACCUM_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 731                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssAccumChPerms, RM_QMSS_ACCUM_CH);
 732                   break;
 733
 734             case RM_RESOURCE_QMSS_QOS_PDSP_TIMER:
 735                 rmGPermsObj.obj.qmssQosPdspTimerPerms.initPerms = resourceEntry->resourceInitFlags;
 736                 rmGPermsObj.obj.qmssQosPdspTimerPerms.usePerms  = resourceEntry->resourceUseFlags;
 737                   break;
 738
 739             case RM_RESOURCE_QMSS_QOS_CLUSTER:
 740                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_QOS_CLUSTER, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 741                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssQosClusterPerms, RM_QMSS_QOS_CLUSTER);
 742                   break;
 743
 744             case RM_RESOURCE_QMSS_QOS_QUEUE:
 745                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_QOS_QUEUES, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 746                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssQosQueuePerms, RM_QMSS_QOS_QUEUES);
 747                   break;
 748
 749             case RM_RESOURCE_CPPI_SRIO_TX_CH:
 750                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_SRIO_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 751                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_SRIO_DMA_ID], RM_CPPI_SRIO_TX_CH);
 752                   break;
 753
 754             case RM_RESOURCE_CPPI_SRIO_RX_CH:
 755                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_SRIO_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 756                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_SRIO_DMA_ID], RM_CPPI_SRIO_RX_CH);
 757                   break;
 758
 759             case RM_RESOURCE_CPPI_SRIO_FLOW:
 760                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_SRIO_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 761                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_SRIO_DMA_ID], RM_CPPI_SRIO_FLOW);
 762                   break;
 763
 764 #ifdef QMSS_MAX_AIF_QUEUE
 765             case RM_RESOURCE_CPPI_AIF_TX_CH:
 766                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_AIF_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 767                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_AIF_DMA_ID], RM_CPPI_AIF_TX_CH);
 768                   break;
 769
 770             case RM_RESOURCE_CPPI_AIF_RX_CH:
 771                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_AIF_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 772                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_AIF_DMA_ID], RM_CPPI_AIF_RX_CH);
 773                   break;
 774
 775             case RM_RESOURCE_CPPI_AIF_FLOW:
 776                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_AIF_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 777                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_AIF_DMA_ID], RM_CPPI_AIF_FLOW);
 778                   break;
 779 #endif
 780
 781 #ifdef QMSS_MAX_FFTC_A_QUEUE
 782             case RM_RESOURCE_CPPI_FFTC_A_TX_CH:
 783                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_A_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 784                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_FFTC_A_DMA_ID], RM_CPPI_FFTC_A_TX_CH);
 785                   break;
 786
 787             case RM_RESOURCE_CPPI_FFTC_A_RX_CH:
 788                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_A_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 789                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_FFTC_A_DMA_ID], RM_CPPI_FFTC_A_RX_CH);
 790                   break;
 791
 792             case RM_RESOURCE_CPPI_FFTC_A_FLOW:
 793                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_A_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 794                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_FFTC_A_DMA_ID], RM_CPPI_FFTC_A_FLOW);
 795                   break;
 796 #endif
 797
 798 #ifdef QMSS_MAX_FFTC_B_QUEUE
 799             case RM_RESOURCE_CPPI_FFTC_B_TX_CH:
 800                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_B_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 801                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_FFTC_B_DMA_ID], RM_CPPI_FFTC_B_TX_CH);
 802                   break;
 803
 804             case RM_RESOURCE_CPPI_FFTC_B_RX_CH:
 805                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_B_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 806                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_FFTC_B_DMA_ID], RM_CPPI_FFTC_B_RX_CH);
 807                   break;
 808
 809             case RM_RESOURCE_CPPI_FFTC_B_FLOW:
 810                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_B_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 811                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_FFTC_B_DMA_ID], RM_CPPI_FFTC_B_FLOW);
 812                   break;
 813 #endif
 814
 815 #ifdef QMSS_MAX_PASS_QUEUE
 816             case RM_RESOURCE_CPPI_PASS_TX_CH:
 817                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_PASS_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 818                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_PASS_DMA_ID], RM_CPPI_PASS_TX_CH);
 819                   break;
 820
 821             case RM_RESOURCE_CPPI_PASS_RX_CH:
 822                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_PASS_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 823                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_PASS_DMA_ID], RM_CPPI_PASS_RX_CH);
 824                   break;
 825
 826             case RM_RESOURCE_CPPI_PASS_FLOW:
 827                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_PASS_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 828                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_PASS_DMA_ID], RM_CPPI_PASS_FLOW);
 829                   break;
 830 #endif
 831
 832             case RM_RESOURCE_CPPI_QMSS_TX_CH:
 833                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_QMSS_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 834                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_QMSS_DMA_ID], RM_CPPI_QMSS_TX_CH);
 835                   break;
 836
 837             case RM_RESOURCE_CPPI_QMSS_RX_CH:
 838                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_QMSS_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 839                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_QMSS_DMA_ID], RM_CPPI_QMSS_RX_CH);
 840                   break;
 841
 842             case RM_RESOURCE_CPPI_QMSS_FLOW:
 843                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_QMSS_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 844                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_QMSS_DMA_ID], RM_CPPI_QMSS_FLOW);
 845                   break;
 846
 847 #ifdef QMSS_MAX_FFTC_C_QUEUE
 848             case RM_RESOURCE_CPPI_FFTC_C_TX_CH:
 849                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_C_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 850                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_FFTC_C_DMA_ID], RM_CPPI_FFTC_C_TX_CH);
 851                   break;
 852
 853             case RM_RESOURCE_CPPI_FFTC_C_RX_CH:
 854                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_C_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 855                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_FFTC_C_DMA_ID], RM_CPPI_FFTC_C_RX_CH);
 856                   break;
 857
 858             case RM_RESOURCE_CPPI_FFTC_C_FLOW:
 859                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_C_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 860                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_FFTC_C_DMA_ID], RM_CPPI_FFTC_C_FLOW);
 861                   break;
 862 #endif
 863
 864 #ifdef QMSS_MAX_BCP_QUEUE
 865             case RM_RESOURCE_CPPI_BCP_TX_CH:
 866                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_BCP_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 867                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_BCP_DMA_ID], RM_CPPI_BCP_TX_CH);
 868                   break;
 869
 870             case RM_RESOURCE_CPPI_BCP_RX_CH:
 871                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_BCP_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 872                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_BCP_DMA_ID], RM_CPPI_BCP_RX_CH);
 873                   break;
 874
 875             case RM_RESOURCE_CPPI_BCP_FLOW:
 876                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_BCP_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 877                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_BCP_DMA_ID], RM_CPPI_BCP_FLOW);
 878                   break;
 879 #endif
 880
 881             case RM_RESOURCE_PA_FIRMWARE:
 882                 rmGPermsObj.obj.paFirmwarePerms.initPerms = resourceEntry->resourceInitFlags;
 883                 rmGPermsObj.obj.paFirmwarePerms.usePerms  = resourceEntry->resourceUseFlags;
 884                   break;
 885
 886             case RM_RESOURCE_PA_LUT_ENTRY:
 887                 RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_PA_LUT, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
 888                 Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.paLutPerms, RM_PA_LUT);
 889                   break;
 890
 891             default:
 892                 return RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED;
 893
 894         }
 895
 896         resourceEntry++;
 897     };
 898
 899     /* Write synchronization object so that slave cores know permissions table is
 900       * populated and valid */
 901     rmGSyncObj.obj.globalSyncObj = RM_PERMISSION_TABLE_VALID;
 902
 903     /* Writeback Sync Object */
 904     Rm_osalEndMemAccess ((void *) &rmGSyncObj, sizeof (Rm_Sync_Obj));
 905
 906     return RM_OK;
 907 }
 908
 909 /**
 910  *  @b Description
 911  *  @n
 912  *      This function is called on slave DSPs after the master DSP has populated
 913  *      the internal permission tables.  This function invalidates all internal
 914  *      global permission tables so that no further invalidates are required
 915  *      when LLDs perform resource permission checks
 916  *
 917  */
 918 void Rm_updatePermissionTables(void)
 919 {
 920     uint16_t dmaIndex;
 921     const uint16_t dmaTxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_TX_CH,
 922 #ifdef QMSS_MAX_AIF_QUEUE
 923                                                 RM_CPPI_AIF_TX_CH,
 924 #endif
 925 #ifdef QMSS_MAX_FFTC_A_QUEUE
 926                                                 RM_CPPI_FFTC_A_TX_CH,
 927 #endif
 928 #ifdef QMSS_MAX_FFTC_B_QUEUE
 929                                                 RM_CPPI_FFTC_B_TX_CH,
 930 #endif
 931 #ifdef QMSS_MAX_PASS_QUEUE
 932                                                 RM_CPPI_PASS_TX_CH,
 933 #endif
 934                                                 RM_CPPI_QMSS_TX_CH,
 935 #ifdef QMSS_MAX_FFTC_C_QUEUE
 936                                                 RM_CPPI_FFTC_C_TX_CH,
 937 #endif
 938 #ifdef QMSS_MAX_BCP_QUEUE
 939                                                 RM_CPPI_BCP_TX_CH
 940 #endif
 941                                                };
 942     const uint16_t dmaRxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_RX_CH,
 943 #ifdef QMSS_MAX_AIF_QUEUE
 944                                                 RM_CPPI_AIF_RX_CH,
 945 #endif
 946 #ifdef QMSS_MAX_FFTC_A_QUEUE
 947                                                 RM_CPPI_FFTC_A_RX_CH,
 948 #endif
 949 #ifdef QMSS_MAX_FFTC_B_QUEUE
 950                                                 RM_CPPI_FFTC_B_RX_CH,
 951 #endif
 952 #ifdef QMSS_MAX_PASS_QUEUE
 953                                                 RM_CPPI_PASS_RX_CH,
 954 #endif
 955                                                 RM_CPPI_QMSS_RX_CH,
 956 #ifdef QMSS_MAX_FFTC_C_QUEUE
 957                                                 RM_CPPI_FFTC_C_RX_CH,
 958 #endif
 959 #ifdef QMSS_MAX_BCP_QUEUE
 960                                                 RM_CPPI_BCP_RX_CH
 961 #endif
 962                                                };
 963     const uint16_t dmaFlow[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_FLOW,
 964 #ifdef QMSS_MAX_AIF_QUEUE
 965                                                 RM_CPPI_AIF_FLOW,
 966 #endif
 967 #ifdef QMSS_MAX_FFTC_A_QUEUE
 968                                                 RM_CPPI_FFTC_A_FLOW,
 969 #endif
 970 #ifdef QMSS_MAX_FFTC_B_QUEUE
 971                                                 RM_CPPI_FFTC_B_FLOW,
 972 #endif
 973 #ifdef QMSS_MAX_PASS_QUEUE
 974                                                 RM_CPPI_PASS_FLOW,
 975 #endif
 976                                                 RM_CPPI_QMSS_FLOW,
 977 #ifdef QMSS_MAX_FFTC_C_QUEUE
 978                                                 RM_CPPI_FFTC_C_FLOW,
 979 #endif
 980 #ifdef QMSS_MAX_BCP_QUEUE
 981                                                 RM_CPPI_BCP_FLOW
 982 #endif
 983                                                };
 984
 985     /* Invalidate all permission tables so no further invalidates are required
 986       * on slave cores */
 987
 988     /* Global permissions object */
 989     Rm_osalBeginMemAccess ((void *) &rmGPermsObj, sizeof (Rm_GlobalPermissionsObj));
 990
 991     /* QMSS Permission Tables */
 992
 993     /* QMSS PDSPs */
 994     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssPdspFirmwarePerms, sizeof (Rm_Perms) * RM_QMSS_FIRMWARE_PDSPS);
 995     /* QMSS Queues */
 996     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssQueuePerms, sizeof (Rm_Perms) * RM_QMSS_QUEUES);
 997     /* QMSS Memory Regions */
 998     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssMemRegionPerms, sizeof (Rm_Perms) * RM_QMSS_MEM_REGIONS);
 999     /* QMSS Linking RAM */
1000     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssLinkRamPerms, sizeof (Rm_qmssLinkingRamPerms) * RM_QMSS_LINKING_RAM_RANGES);
1001     /* QMSS Accumulator Channels */
1002     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssAccumChPerms, sizeof (Rm_Perms) * RM_QMSS_ACCUM_CH);
1003     /* QMSS QOS Clusters */
1004     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssQosClusterPerms, sizeof (Rm_Perms) * RM_QMSS_QOS_CLUSTER);
1005     /* QMSS QOS Queues */
1006     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssQosQueuePerms, sizeof (Rm_Perms) * RM_QMSS_QOS_QUEUES);
1007
1008     /* CPPI Permission Tables */
1009
1010     /* CPPI DMA Transmit Channels */
1011     for (dmaIndex = 0; dmaIndex < RM_CPPI_MAX_DMAS; dmaIndex++)
1012     {
1013         Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[dmaIndex], sizeof (Rm_Perms)*dmaTxCh[dmaIndex]);
1014     }
1015     /* CPPI DMA Receive Channels */
1016     for (dmaIndex = 0; dmaIndex < RM_CPPI_MAX_DMAS; dmaIndex++)
1017     {
1018         Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[dmaIndex], sizeof (Rm_Perms)*dmaRxCh[dmaIndex]);
1019     }
1020     /* CPPI DMA Receive Flows */
1021     for (dmaIndex = 0; dmaIndex < RM_CPPI_MAX_DMAS; dmaIndex++)
1022     {
1023         Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[dmaIndex], sizeof (Rm_Perms)*dmaFlow[dmaIndex]);
1024     }
1025
1026     /* PA permission tables */
1027
1028     /* PA Firmware invalidated as part of global permissions object invalidate */
1029     /* PA LUTs */
1030     Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.paLutPerms, sizeof (Rm_Perms) * RM_PA_LUT);
1031 }
1032
1033 /**
1034  *  @b Description
1035  *  @n
1036  *      This function extracts the initialization permission for a DSP from a resource
1037  *      permission element.
1038  *
1039  *  @param[in]  resourcePermissions
1040  *      A permissions structure element to extract the per DSP initialization permission
1041  *
1042  *  @retval
1043  *      Success -   RM_INIT_PERMISSION_APPROVED
1044  *  @retval
1045  *      Failure -   RM_INIT_PERMISSION_DENIED
1046  */
1047 Rm_Result Rm_getInitPermissions (Rm_Perms *resourcePermissions)
1048 {
1049     /* Check the init permissions for the calling DSP */
1050     if (!(RM_GET_PERMISSIONS(resourcePermissions->initPerms)))
1051     {
1052         return RM_INIT_PERMISSION_DENIED;
1053     }
1054
1055     return RM_INIT_PERMISSION_APPROVED;
1056 }
1057
1058 /**
1059  *  @b Description
1060  *  @n
1061  *      This function extracts the usage permission for a DSP from a resource
1062  *      permission element.
1063  *
1064  *  @param[in]  resourcePermissions
1065  *      A permissions structure element to extract the per DSP usage permission
1066  *
1067  *  @retval
1068  *      Success -   RM_INIT_PERMISSION_APPROVED
1069  *  @retval
1070  *      Failure -   RM_INIT_PERMISSION_DENIED
1071  */
1072 Rm_Result Rm_getUsePermissions (Rm_Perms *resourcePermissions)
1073 {
1074     /* Check the use permissions for the calling DSP */
1075     if (!(RM_GET_PERMISSIONS(resourcePermissions->usePerms)))
1076     {
1077         return RM_USE_PERMISSION_DENIED;
1078     }
1079
1080     return RM_USE_PERMISSION_APPROVED;
1081 }
1082
1083 /**
1084  *  @b Description
1085  *  @n
1086  *      This function searches the list of linking RAM address ranges to find one that has
1087  *      the requested linking RAM address within it.  If found the function returns the permissions
1088  *      for this range.  Otherwise it returns denied.
1089  *
1090  *  @param[in]  isInitCheck
1091  *      True - Permissions check is for initialization
1092  *      False - Permissions check is for usage
1093  *
1094  *  @param[in]  linkRamPermArray
1095  *      Internal array of linking RAM ranges and their permissions
1096  *
1097  *  @param[in]  linkRamResData
1098  *      Linking RAM addresses to check for initialization or usage permissions
1099  *
1100  *  @retval
1101  *      Success -   RM_INIT_PERMISSION_APPROVED
1102  *  @retval
1103  *      Failure -   RM_INIT_PERMISSION_DENIED
1104  */
1105 Rm_Result Rm_getLinkRamPermissions (Bool isInitCheck, Rm_qmssLinkingRamPerms *linkRamPermArray, Rm_ResourceInfo *linkRamResData)
1106 {
1107     Rm_Result retVal;
1108     uint16_t linkRamIndex;
1109
1110     /* Initialize the return value based on type of check boolean */
1111     if (isInitCheck)
1112     {
1113         retVal = RM_INIT_PERMISSION_DENIED;
1114     }
1115     else
1116     {
1117         retVal = RM_USE_PERMISSION_DENIED;
1118     }
1119
1120     for (linkRamIndex = 0; linkRamIndex < RM_QMSS_LINKING_RAM_RANGES; linkRamIndex++)
1121     {
1122         if ((linkRamResData->res_info.linkRamData.linkRamStartIndex >= linkRamPermArray[linkRamIndex].startIndex) &&
1123              (linkRamResData->res_info.linkRamData.linkRamEndIndex <= linkRamPermArray[linkRamIndex].endIndex))
1124         {
1125             /* Check the use permissions for the calling DSP */
1126             if (isInitCheck)
1127             {
1128                 if (RM_GET_PERMISSIONS(linkRamPermArray[linkRamIndex].rangePerms.initPerms))
1129                 {
1130                     retVal = RM_USE_PERMISSION_APPROVED;
1131                 }
1132             }
1133             else
1134             {
1135                 if (RM_GET_PERMISSIONS(linkRamPermArray[linkRamIndex].rangePerms.usePerms))
1136                 {
1137                     retVal = RM_USE_PERMISSION_APPROVED;
1138                 }
1139             }
1140             break;
1141         }
1142     }
1143
1144     return (retVal);
1145 }
1146
1147 /**********************************************************************
1148  **********APIs visible to other LLDs internally via call table *******************
1149  **********************************************************************/
1150
1151 /**
1152  *  @b Description
1153  *  @n
1154  *      This function is used by LLDs to check initialization permissions for a resource
1155  *
1156  *  @param[in]  resourceData
1157  *      Structure containing resource information such as resource type and the
1158  *      resource value to be checked
1159  *
1160  *  @retval
1161  *      Success -   RM_INIT_PERMISSION_APPROVED
1162  *  @retval
1163  *      Failure -   RM_INIT_PERMISSION_DENIED
1164  */
1165 Rm_Result Rm_initPermissionChecker (Rm_ResourceInfo *resourceData)
1166 {
1167     switch (resourceData->resourceType)
1168     {
1169         case Rm_resource_QMSS_FIRMWARE_PDSP:
1170             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceData->res_info.pdspNum]));
1171
1172         case Rm_resource_QMSS_QUEUE:
1173             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQueuePerms[resourceData->res_info.queNum]));
1174
1175         case Rm_resource_QMSS_MEMORY_REGION:
1176             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssMemRegionPerms[resourceData->res_info.memRegion]));
1177
1178         case Rm_resource_QMSS_LINKING_RAM_CONTROL:
1179             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssLinkRamControlPerms));
1180
1181         case Rm_resource_QMSS_LINKING_RAM:
1182             return (Rm_getLinkRamPermissions (TRUE, &rmGPermsObj.obj.qmssLinkRamPerms[0], resourceData));
1183
1184         case Rm_resource_QMSS_ACCUM_CH:
1185             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssAccumChPerms[resourceData->res_info.accumCh]));
1186
1187         case Rm_resource_QMSS_QOS_TIMER:
1188             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQosPdspTimerPerms));
1189
1190         case Rm_resource_QMSS_QOS_CLUSTER:
1191             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQosClusterPerms[resourceData->res_info.qosCluster]));
1192
1193         case Rm_resource_QMSS_QOS_QUEUE:
1194             return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQosQueuePerms[resourceData->res_info.qosQueue]));
1195
1196         case Rm_resource_CPPI_TX_CH:
1197             {
1198                 Rm_Perms *txChPermsArray = rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
1199                 return (Rm_getInitPermissions(&txChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
1200             }
1201
1202         case Rm_resource_CPPI_RX_CH:
1203             {
1204                 Rm_Perms *rxChPermsArray = rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
1205                 return (Rm_getInitPermissions(&rxChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
1206             }
1207
1208         case Rm_resource_CPPI_RX_FLOW:
1209             {
1210                 Rm_Perms *flowPermsArray = rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
1211                 return (Rm_getInitPermissions(&flowPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
1212             }
1213
1214         case Rm_resource_PA_FIRMWARE:
1215             return (Rm_getInitPermissions(&rmGPermsObj.obj.paFirmwarePerms));
1216
1217         case Rm_resource_PA_LUT:
1218             return (Rm_getInitPermissions(&rmGPermsObj.obj.paLutPerms[resourceData->res_info.lutEntry]));
1219
1220         default:
1221             return (RM_INIT_PERMISSION_DENIED);
1222     }
1223 }
1224
1225 /**
1226  *  @b Description
1227  *  @n
1228  *      This function is used by LLDs to check usage permissions for a resource
1229  *
1230  *  @param[in]  resourceData
1231  *      Structure containing resource information such as resource type and the
1232  *      resource value to be checked
1233  *
1234  *  @retval
1235  *      Success -   RM_INIT_PERMISSION_APPROVED
1236  *  @retval
1237  *      Failure -   RM_INIT_PERMISSION_DENIED
1238  */
1239 Rm_Result Rm_usePermissionChecker (Rm_ResourceInfo *resourceData)
1240 {
1241     switch (resourceData->resourceType)
1242     {
1243         case Rm_resource_QMSS_FIRMWARE_PDSP:
1244             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceData->res_info.pdspNum]));
1245
1246         case Rm_resource_QMSS_QUEUE:
1247             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQueuePerms[resourceData->res_info.queNum]));
1248
1249         case Rm_resource_QMSS_MEMORY_REGION:
1250             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssMemRegionPerms[resourceData->res_info.memRegion]));
1251
1252         case Rm_resource_QMSS_LINKING_RAM_CONTROL:
1253             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssLinkRamControlPerms));
1254
1255         case Rm_resource_QMSS_LINKING_RAM:
1256             return (Rm_getLinkRamPermissions(FALSE, &rmGPermsObj.obj.qmssLinkRamPerms[0], resourceData));
1257
1258         case Rm_resource_QMSS_ACCUM_CH:
1259             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssAccumChPerms[resourceData->res_info.accumCh]));
1260
1261         case Rm_resource_QMSS_QOS_TIMER:
1262             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQosPdspTimerPerms));
1263
1264         case Rm_resource_QMSS_QOS_CLUSTER:
1265             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQosClusterPerms[resourceData->res_info.qosCluster]));
1266
1267         case Rm_resource_QMSS_QOS_QUEUE:
1268             return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQosQueuePerms[resourceData->res_info.qosQueue]));
1269
1270         case Rm_resource_CPPI_TX_CH:
1271             {
1272                 Rm_Perms *txChPermsArray = rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
1273                 return (Rm_getUsePermissions(&txChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
1274             }
1275
1276         case Rm_resource_CPPI_RX_CH:
1277             {
1278                 Rm_Perms *rxChPermsArray = rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
1279                 return (Rm_getUsePermissions(&rxChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
1280             }
1281
1282         case Rm_resource_CPPI_RX_FLOW:
1283             {
1284                 Rm_Perms *flowPermsArray = rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
1285                 return (Rm_getUsePermissions(&flowPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
1286             }
1287
1288         case Rm_resource_PA_FIRMWARE:
1289             return (Rm_getUsePermissions(&rmGPermsObj.obj.paFirmwarePerms));
1290
1291         case Rm_resource_PA_LUT:
1292             return (Rm_getUsePermissions(&rmGPermsObj.obj.paLutPerms[resourceData->res_info.lutEntry]));
1293
1294         default:
1295             return (RM_USE_PERMISSION_DENIED);
1296     }
1297 }
1298
1299 /*  */
1300
1301 /**********************************************************************
1302  *********************** Application visible APIs ***************************
1303  **********************************************************************/
1304
1305 /** @addtogroup RM_LLD_FUNCTION
1306 @{
1307 */
1308
1309 /**
1310  *  @b Description
1311  *  @n
1312  *      This function initializes the Resource Manager low level driver
1313  *      This function is called once in the system to setup the Resource Manager
1314  *      low level driver by mapping the application defined resource table to internal
1315  *      permission tables.  After mapping is complete a global synchronization object
1316  *      is written to sync with slave cores
1317  *
1318  *  @param[in]  rmResourceTable
1319  *      Resource table defined by application.  Used to populate internal permission
1320  *      tables.
1321  *
1322  *  @post
1323  *      RM LLD global permissions are set.
1324  *
1325  *  @retval
1326  *      Success -   RM_OK
1327  *  @retval
1328  *      Failure -   RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED
1329  */
1330 Rm_Result Rm_init (const Rm_Resource *rmResourceTable)
1331 {
1332     void *key;
1333     Rm_Result ret_val = RM_ERROR;
1334
1335     /* Check permission structure sizes to make sure they're evenly
1336       * divisible into a cache line.  This generates no object code when
1337       * optimizer is on.  If failes, assert will occur at compile time */
1338     RM_COMPILE_TIME_SIZE_CHECK((RM_MAX_CACHE_ALIGN/sizeof(Rm_Perms)) * sizeof(Rm_Perms) == RM_MAX_CACHE_ALIGN);
1339     RM_COMPILE_TIME_SIZE_CHECK((RM_MAX_CACHE_ALIGN/sizeof(Rm_qmssLinkingRamPerms)) * \
1340                                                           sizeof(Rm_qmssLinkingRamPerms) == RM_MAX_CACHE_ALIGN);
1341
1342     /* Begin Critical Section before accessing shared resources. */
1343     key = Rm_osalCsEnter ();
1344
1345     /* Initialize the permissions table */
1346     Rm_permissionTableInit();
1347
1348     if (!rmResourceTable)
1349     {
1350         /* End Critical Section */
1351         Rm_osalCsExit (key);
1352         return RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED;
1353     }
1354
1355     ret_val = Rm_populatePermissionTable(rmResourceTable);
1356
1357     /* End Critical Section */
1358     Rm_osalCsExit (key);
1359     return ret_val;
1360 }
1361
1362 /**
1363  *  @b Description
1364  *  @n
1365  *      This function waits for the Resource Manager master to populate the
1366  *      global permissions table based on a global sync object.  Once the
1367  *      global sync object has been written by the master core this function
1368  *      will invalidate all permissions tables.  Since the permissions table are
1369  *      static, and will not change through the system up-time, a single
1370  *      invalidation at the start will suffice.
1371  *
1372  *      This function can be called on all core besides that which called
1373  *      Rm_init.  Calling this function on said cores will act as a blocking
1374  *      synchronization point.
1375  *
1376  *  @retval
1377  *      Success -   RM_OK
1378  *  @retval
1379  *      Failure -   RM_FAILURE
1380  */
1381 Rm_Result Rm_start (void)
1382 {
1383     /* Loop until the global sync object signals the permissions table has been
1384       * populated and valid */
1385     do
1386     {
1387         /* Invalidate the global sync object */
1388         Rm_osalBeginMemAccess ((void *) &rmGSyncObj, sizeof (Rm_Sync_Obj));
1389     } while (rmGSyncObj.obj.globalSyncObj != RM_PERMISSION_TABLE_VALID);
1390
1391     /* Master core finished populating the permission tables.  Must invalidate
1392       * all tables to see latest permissions */
1393     Rm_updatePermissionTables();
1394
1395     return RM_OK;
1396 }
1397
1398 /**
1399  *  @b Description
1400  *  @n
1401  *      This function returns an RM handle to the application to provide
1402  *      to LLDs that want to use the RM.
1403  *
1404  *  @retval
1405  *      Success -   RM Handle.  Used an an input parameter for LLD startCfg functions.
1406  *  @retval
1407  *      Failure -   NULL
1408  */
1409 Rm_Handle Rm_getHandle(void)
1410 {
1411    return ((void *) &rmPermissionCheckers);
1412 }
1413
1414 /**
1415  *  @b Description
1416  *  @n
1417  *      The function is used to get the version information of the RM LLD.
1418  *
1419  *  @retval
1420  *      Version Information.
1421  */
1422 uint32_t Rm_getVersion (void)
1423 {
1424     return RM_LLD_VERSION_ID;
1425 }
1426
1427 /**
1428  *  @b Description
1429  *  @n
1430  *      The function is used to get the version string for the RM LLD.
1431  *
1432  *  @retval
1433  *      Version String.
1434  */
1435 const char* Rm_getVersionStr (void)
1436 {
1437     return rmLldVersionStr;
1438 }
1439
1440 /**
1441 @}
1442 */