]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - keystone-rtos/rm-lld.git/blobdiff - test/c6657/c66/bios/rm_shared_test.cfg
C6657 Test: clean up RTSC configuration
[keystone-rtos/rm-lld.git] / test / c6657 / c66 / bios / rm_shared_test.cfg
index c35421afb9e4f739f876b840b9b4643af15d2c2d..2910b06b5a9ee9f115268dbb79582c68033b01ab 100644 (file)
@@ -65,6 +65,11 @@ var BIOS        = xdc.useModule('ti.sysbios.BIOS');
 BIOS.heapSize   = 0x10000;
 var Task        = xdc.useModule('ti.sysbios.knl.Task');
 
 BIOS.heapSize   = 0x10000;
 var Task        = xdc.useModule('ti.sysbios.knl.Task');
 
+Program.sectMap[".text"] = "MSMCSRAM";
+Program.sectMap[".const"] = "MSMCSRAM";
+Program.sectMap[".cinit"] = "MSMCSRAM";
+Program.sectMap[".switch"] = "MSMCSRAM";
+
 Program.sectMap[".rmSharedHandleTest"] = new Program.SectionSpec();
 Program.sectMap[".rmSharedHandleTest"] = "MSMCSRAM";
 
 Program.sectMap[".rmSharedHandleTest"] = new Program.SectionSpec();
 Program.sectMap[".rmSharedHandleTest"] = "MSMCSRAM";
 
@@ -88,7 +93,7 @@ var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
 SharedRegion.translate = false;
 SharedRegion.setEntryMeta(0,
     { base: 0x0C000000, 
 SharedRegion.translate = false;
 SharedRegion.setEntryMeta(0,
     { base: 0x0C000000, 
-      len:  0x00100000,
+      len:  0x00040000,
       ownerProcId: 0,
       isValid: true,
       name: "sharemem",
       ownerProcId: 0,
       isValid: true,
       name: "sharemem",