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raw | patch | inline | side by side (parent: 8fdef06)
add K2G support
authorEric Ruei <e-ruei1@ti.com>
Tue, 13 Jan 2015 00:15:28 +0000 (19:15 -0500)
committerEric Ruei <e-ruei1@ti.com>
Tue, 13 Jan 2015 00:15:28 +0000 (19:15 -0500)
17 files changed:
device/k2g/global-resource-list-arm-dsp.c [new file with mode: 0644] patch | blob
device/k2g/global-resource-list-arm-dsp.dtb [new file with mode: 0644] patch | blob
device/k2g/global-resource-list-arm-dsp.dts [new file with mode: 0644] patch | blob
device/k2g/global-resource-list.c [new file with mode: 0644] patch | blob
device/k2g/global-resource-list.dtb [new file with mode: 0644] patch | blob
device/k2g/global-resource-list.dts [new file with mode: 0644] patch | blob
device/k2g/policy_dsp-only.c [new file with mode: 0644] patch | blob
device/k2g/policy_dsp-only.dtb [new file with mode: 0644] patch | blob
device/k2g/policy_dsp-only.dts [new file with mode: 0644] patch | blob
device/k2g/policy_dsp_arm.c [new file with mode: 0644] patch | blob
device/k2g/policy_dsp_arm.dtb [new file with mode: 0644] patch | blob
device/k2g/policy_dsp_arm.dts [new file with mode: 0644] patch | blob
package.xdc patch | blob | history
rmver.h patch | blob | history
test/k2g/c66/bios/dsp_client.cfg [new file with mode: 0644] patch | blob
test/k2g/c66/bios/rmK2GArmv7LinuxDspClientTestProject.txt [new file with mode: 0644] patch | blob
test/k2g/c66/bios/rm_osal.c [new file with mode: 0644] patch | blob

diff --git a/device/k2g/global-resource-list-arm-dsp.c b/device/k2g/global-resource-list-arm-dsp.c
new file mode 100644 (file)
index 0000000..be2ac9b
--- /dev/null
+++ b/device/k2g/global-resource-list-arm-dsp.c
@@ -0,0 +1,900 @@
+#pragma DATA_SECTION (rmGlobalResourceList, ".sharedGRL");
+#pragma DATA_ALIGN (rmGlobalResourceList, 128)
+const char rmGlobalResourceList[] = {
+0xd0,
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diff --git a/device/k2g/global-resource-list-arm-dsp.dtb b/device/k2g/global-resource-list-arm-dsp.dtb
new file mode 100644 (file)
index 0000000..3bc4ca3
Binary files /dev/null and b/device/k2g/global-resource-list-arm-dsp.dtb differ
diff --git a/device/k2g/global-resource-list-arm-dsp.dts b/device/k2g/global-resource-list-arm-dsp.dts
new file mode 100644 (file)
index 0000000..91cd4b4
--- /dev/null
+++ b/device/k2g/global-resource-list-arm-dsp.dts
@@ -0,0 +1,73 @@
+/dts-v1/;
+
+/ {
+    /* Device resource definitions based on current supported QMSS, CPPI, and 
+     * PA LLD resources */
+       
+    qmss {
+        /* Number of descriptors inserted by ARM */
+        ns-assignment = "ARM_Descriptors", <0 512>;
+    
+        /* QMSS in joint mode affects only -qm1 resource */
+        control-qm1 {
+            resource-range = <0 1>;
+        };
+        
+        /* QMSS in joint mode affects only -qm1 resource */
+        linkram-control-qm1 {
+            resource-range = <0 1>;
+        };
+
+        /* QMSS in joint mode affects only -qm1 resource */
+        linkram-int-qm1 {
+            /* hw allows max of 2K "internal" descriptors */
+            resource-range = <0x00000000 0x00000800>;
+        };
+        linkram-ext-qm1 {
+            /* hw allows max of 0 "external" descriptors */
+            resource-range = <0x00000800 0x00000000>;
+        };
+
+        /* QMSS in joint mode affects only -qm1 resource */
+        memory-regions-qm1 {
+            resource-range = <0 64>;
+        };
+
+        /* Queues match device specification and/or csl_qm_queue.h regardless of split or joint mode */
+        INFRASTRUCTURE_QUEUE-qm1 {
+            resource-range = <0 4>;
+        }; 
+        PASS_QUEUE-qm1 {
+            resource-range = <4 17>;
+        };
+        RECEIVE_QUEUE-qm1 {
+            resource-range = <21 32>;
+        };
+        EDMA_0_QUEUE-qm1 {
+            resource-range = <69 4>;
+        };
+        SOC_SET0_QUEUE-qm1 {
+            resource-range = <77 4>;
+        };
+        INTC_EDMA_SET0_QUEUE-qm1 {
+            resource-range = <85 4>;
+        }; 
+        GENERAL_PURPOSE_QUEUE-qm1 {
+            resource-range = <89 39>;
+        }; 
+           
+    }; /* qmss */
+
+    cppi {
+        netcp-rx-ch {
+            resource-range = <0 32>;
+        };
+        netcp-tx-ch {
+            resource-range = <0 21>;
+        };
+        netcp-rx-flow-id {
+            resource-range = <0 32>;
+        };   
+
+    }; /* cppi */
+};
diff --git a/device/k2g/global-resource-list.c b/device/k2g/global-resource-list.c
new file mode 100644 (file)
index 0000000..3478bfc
--- /dev/null
+++ b/device/k2g/global-resource-list.c
@@ -0,0 +1,900 @@
+#pragma DATA_SECTION (rmGlobalResourceList, ".sharedGRL");
+#pragma DATA_ALIGN (rmGlobalResourceList, 128)
+const char rmGlobalResourceList[] = {
+0xd0,
+0x0d,
+0xfe,
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+};
diff --git a/device/k2g/global-resource-list.dtb b/device/k2g/global-resource-list.dtb
new file mode 100644 (file)
index 0000000..1cfcadb
Binary files /dev/null and b/device/k2g/global-resource-list.dtb differ
diff --git a/device/k2g/global-resource-list.dts b/device/k2g/global-resource-list.dts
new file mode 100644 (file)
index 0000000..e689a70
--- /dev/null
+++ b/device/k2g/global-resource-list.dts
@@ -0,0 +1,70 @@
+/dts-v1/;
+
+/ {
+    /* Device resource definitions based on current supported QMSS, CPPI, and 
+     * PA LLD resources */
+       
+    qmss {
+        /* QMSS in joint mode affects only -qm1 resource */
+        control-qm1 {
+            resource-range = <0 1>;
+        };
+        
+        /* QMSS in joint mode affects only -qm1 resource */
+        linkram-control-qm1 {
+            resource-range = <0 1>;
+        };
+
+        /* QMSS in joint mode affects only -qm1 resource */
+        linkram-int-qm1 {
+            /* hw allows max of 2K "internal" descriptors */
+            resource-range = <0x00000000 0x00000800>;
+        };
+        linkram-ext-qm1 {
+            /* hw allows max of 0K "external" descriptors */
+            resource-range = <0x00000800 0x00000000>;
+        };
+
+        /* QMSS in joint mode affects only -qm1 resource */
+        memory-regions-qm1 {
+            resource-range = <0 64>;
+        };
+
+        /* Queues match device specification and/or csl_qm_queue.h regardless of split or joint mode */
+        INFRASTRUCTURE_QUEUE-qm1 {
+            resource-range = <0 4>;
+        }; 
+        PASS_QUEUE-qm1 {
+            resource-range = <4 17>;
+        };
+        RECEIVE_QUEUE-qm1 {
+            resource-range = <21 32>;
+        };
+        EDMA_0_QUEUE-qm1 {
+            resource-range = <69 4>;
+        };
+        SOC_SET0_QUEUE-qm1 {
+            resource-range = <77 4>;
+        };
+        INTC_EDMA_SET0_QUEUE-qm1 {
+            resource-range = <85 4>;
+        }; 
+        GENERAL_PURPOSE_QUEUE-qm1 {
+            resource-range = <89 39>;
+        };    
+    }; /* qmss */
+
+    cppi {
+        netcp-rx-ch {
+            resource-range = <0 32>;
+        };
+        netcp-tx-ch {
+            resource-range = <0 21>;
+        };
+        netcp-rx-flow-id {
+            resource-range = <0 32>;
+        };   
+
+    }; /* cppi */
+
+};
diff --git a/device/k2g/policy_dsp-only.c b/device/k2g/policy_dsp-only.c
new file mode 100644 (file)
index 0000000..e458866
--- /dev/null
+++ b/device/k2g/policy_dsp-only.c
@@ -0,0 +1,1156 @@
+#pragma DATA_SECTION (rmDspOnlyPolicy, ".sharedPolicy");
+#pragma DATA_ALIGN (rmDspOnlyPolicy, 128)
+const char rmDspOnlyPolicy[] = {
+0xd0,
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+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+};
diff --git a/device/k2g/policy_dsp-only.dtb b/device/k2g/policy_dsp-only.dtb
new file mode 100644 (file)
index 0000000..66bafa1
Binary files /dev/null and b/device/k2g/policy_dsp-only.dtb differ
diff --git a/device/k2g/policy_dsp-only.dts b/device/k2g/policy_dsp-only.dts
new file mode 100644 (file)
index 0000000..d2b923b
--- /dev/null
+++ b/device/k2g/policy_dsp-only.dts
@@ -0,0 +1,79 @@
+/dts-v1/;
+
+/* Policy assigning all resources to RM instances running on DSP. */
+
+/ {
+    /* Valid instance list contains instance names used within TI example projects
+     * utilizing RM.  The list can be modified as needed by applications integrating
+     * RM.  For an RM instance to be given permissions the name used to initialize it
+     * must be present in this list */
+    valid-instances = "RM_Server",
+                      "RM_Client0",
+                      "RM_Client1",
+                      "RM_Client2",
+                      "RM_Client3",
+                      "RM_Client4",
+                      "RM_Client5",
+                      "RM_Client6",
+                      "RM_Client7";
+       
+    qmss {
+        control-qm1 {
+            assignments = <0 1>, "iu = (*)";
+        };
+        
+        linkram-control-qm1 {
+            assignments = <0 1>, "iu = (*)";
+        };
+        
+        linkram-int-qm1 {
+            /* hw allows max of 2K "internal" descriptors */
+            assignments = <0x00000000 0x00000800>, "iu = (*)";
+        };
+        linkram-ext-qm1 {
+            /* hw allows max of 0 "external" descriptors */
+            assignments = <0x00000800 0x00000000>, "iu = (*)";
+        };
+        
+        memory-regions-qm1 {
+            assignments = <0 64>, "iu = (*)";
+        };
+
+        INFRASTRUCTURE_QUEUE-qm1 {
+            assignments = <0 4>, "iu = (*)";
+        }; 
+        PASS_QUEUE-qm1 {
+            assignments = <4 17>, "iu = (*)";
+        };
+        RECEIVE_QUEUE-qm1 {
+            assignments = <21 32>, "iu = (*)";
+        }; 
+        EDMA_0_QUEUE-qm1 {
+            assignments = <69 4>, "iu = (*)";
+        };
+        SOC_SET0_QUEUE-qm1 {
+            assignments = <77 4>, "iu = (*)";
+        };
+        INTC_EDMA_SET0_QUEUE-qm1 {
+            assignments = <85 4>,  "iu = (*)";
+        }; 
+        GENERAL_PURPOSE_QUEUE-qm1 {
+            assignments = <89 39>, "iu = (*)";
+        };    
+
+    }; /* qmss */
+
+    cppi {
+        netcp-rx-ch {
+            assignments = <0 32>, "iu = (*)";
+        };
+        netcp-tx-ch {
+            assignments = <0 21>, "iu = (*)";
+        };
+        netcp-rx-flow-id {
+            assignments = <0 32>, "iu = (*)";
+        }; 
+          
+    }; /* cppi */
+    
+};
diff --git a/device/k2g/policy_dsp_arm.c b/device/k2g/policy_dsp_arm.c
new file mode 100644 (file)
index 0000000..501ce36
--- /dev/null
+++ b/device/k2g/policy_dsp_arm.c
@@ -0,0 +1,1284 @@
+#pragma DATA_SECTION (rmDspPlusArmPolicy, ".sharedPolicy");
+#pragma DATA_ALIGN (rmDspPlusArmPolicy, 128)
+const char rmDspPlusArmPolicy[] = {
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+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x02,
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+0x00,
+0x00,
+0x01,
+0x47,
+0x45,
+0x4e,
+0x45,
+0x52,
+0x41,
+0x4c,
+0x5f,
+0x50,
+0x55,
+0x52,
+0x50,
+0x4f,
+0x53,
+0x45,
+0x5f,
+0x51,
+0x55,
+0x45,
+0x55,
+0x45,
+0x2d,
+0x71,
+0x6d,
+0x31,
+0x00,
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+0x69,
+0x75,
+0x20,
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+0x28,
+0x2a,
+0x29,
+0x00,
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+0x00,
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+0x63,
+0x70,
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+0x69,
+0x00,
+0x00,
+0x00,
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+0x00,
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+0x01,
+0x6e,
+0x65,
+0x74,
+0x63,
+0x70,
+0x2d,
+0x72,
+0x78,
+0x2d,
+0x63,
+0x68,
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+0x74,
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+0x28,
+0x2a,
+0x29,
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+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x02,
+0x00,
+0x00,
+0x00,
+0x01,
+0x6e,
+0x65,
+0x74,
+0x63,
+0x70,
+0x2d,
+0x72,
+0x78,
+0x2d,
+0x66,
+0x6c,
+0x6f,
+0x77,
+0x2d,
+0x69,
+0x64,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x03,
+0x00,
+0x00,
+0x00,
+0x1d,
+0x00,
+0x00,
+0x00,
+0x10,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x01,
+0x28,
+0x2a,
+0x29,
+0x00,
+0x00,
+0x00,
+0x00,
+0x01,
+0x00,
+0x00,
+0x00,
+0x1f,
+0x69,
+0x75,
+0x20,
+0x3d,
+0x20,
+0x28,
+0x2a,
+0x29,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x02,
+0x00,
+0x00,
+0x00,
+0x02,
+0x00,
+0x00,
+0x00,
+0x02,
+0x00,
+0x00,
+0x00,
+0x09,
+0x76,
+0x61,
+0x6c,
+0x69,
+0x64,
+0x2d,
+0x69,
+0x6e,
+0x73,
+0x74,
+0x61,
+0x6e,
+0x63,
+0x65,
+0x73,
+0x00,
+0x61,
+0x73,
+0x73,
+0x69,
+0x67,
+0x6e,
+0x6d,
+0x65,
+0x6e,
+0x74,
+0x73,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+};
diff --git a/device/k2g/policy_dsp_arm.dtb b/device/k2g/policy_dsp_arm.dtb
new file mode 100644 (file)
index 0000000..d41a369
Binary files /dev/null and b/device/k2g/policy_dsp_arm.dtb differ
diff --git a/device/k2g/policy_dsp_arm.dts b/device/k2g/policy_dsp_arm.dts
new file mode 100644 (file)
index 0000000..bf94c5a
--- /dev/null
+++ b/device/k2g/policy_dsp_arm.dts
@@ -0,0 +1,88 @@
+/dts-v1/;
+
+/* Keystone II policy containing reserving resources used by Linux Kernel */
+
+/ {
+    /* Valid instance list contains instance names used within TI example projects
+     * utilizing RM.  The list can be modified as needed by applications integrating
+     * RM.  For an RM instance to be given permissions the name used to initialize it
+     * must be present in this list */
+    valid-instances = "RM_Server",
+                      "RM_Client0",
+                      "RM_Client1",
+                      "RM_Client2",
+                      "RM_Client3",
+                      "RM_Client4",
+                      "RM_Client5",
+                      "RM_Client6",
+                      "RM_Client7",
+                      "RM_Client_NETAPI";
+       
+    qmss {
+        control-qm1 {
+            assignments = <0 1>, "iu = (*)";
+        };
+        
+        linkram-control-qm1 {
+            assignments = <0 1>, "(*)";             /* Used by Kernel */
+        };
+        
+        linkram-int-qm1 {
+            assignments = <0x00000000 0x00000600>, "iu = (*)",
+                          <0x00000600 0x00000200>, "(*)"; /* used by Kernel */
+            
+        };
+        linkram-ext-qm1 {
+            /* linux provided 0x14000 descriptors of linking RAM but uses 0x4000 to 0x9000 */
+            assignments = <0x00004000 0x00005000>, "(*)", /* used by Kernel */
+                          <0x00009000 0x0000B000>, "iu = (*)";
+        };
+        
+        memory-regions-qm1 {
+            assignments = <0  12>, "iu = (*)",
+                          <12 3>,  "(*)",             /* Used by Kernel */
+                          <15 49>, "iu = (*)";
+        };
+
+        INFRASTRUCTURE_QUEUE-qm1 {
+            assignments = <0 3>, "(*)",    /* Used by Kernel - 2 (data channel usage irrespective of device) +  1 (channel per DSP core) */
+                          <3 1>, "iu = (*)";
+        }; 
+        PASS_QUEUE-qm1 {
+            assignments = <4 17>, "iu = (*)";   /* used by both kernel and DSP */
+        };
+        RECEIVE_QUEUE-qm1 {
+            assignments = <21 32>, "iu = (*)";  /* used by both kernel and DSP */
+        }; 
+        EDMA_0_QUEUE-qm1 {
+            assignments = <69 4>, "iu = (*)";
+        };
+        SOC_SET0_QUEUE-qm1 {
+            assignments = <77 2>, "(*)", /* potentially used by kernel */
+                          <79 2>, "iu = (*)";
+        };
+        INTC_EDMA_SET0_QUEUE-qm1 {
+            assignments = <85 4>,  "iu = (*)";
+        }; 
+        GENERAL_PURPOSE_QUEUE-qm1 {
+            assignments = <89 39>, "iu = (*)";
+        };
+            
+    }; /* qmss */
+
+    cppi {
+        netcp-rx-ch {
+            assignments = <0 32>, "     (*)"; /* initialized by kernel */
+        };
+        netcp-tx-ch {
+            assignments = <0  4>, "     (*)", /* Infrastructure channels: initialized by kernel, can directly open queuse */
+                          <4  1>, "iu = (*)", /* SA channel.  Linux initializes, but some applications need to enable/disable on fly */
+                          <5  16>, "    (*)"; /* initialized by kernel, can directly open queuse */
+        };
+        netcp-rx-flow-id {
+            assignments = <0  1>, "(*)",  /* Used by kernel - netrx0 */
+                          <1  31>, "iu = (*)";
+        };   
+    }; /* cppi */
+
+};
diff --git a/package.xdc b/package.xdc
index 4cf527caa9fbcbc4af5843229693cf1c5dde8b49..44846598036b0d5c5749beb1c59fb62233a3526c 100644 (file)
--- a/package.xdc
+++ b/package.xdc
@@ -6,9 +6,9 @@
  * DESCRIPTION: \r
  *  This file contains the package specification for the RM library\r
  *\r
- * Copyright (C) 2012-2014, Texas Instruments, Inc.\r
+ * Copyright (C) 2012-2015, Texas Instruments, Inc.\r
  *****************************************************************************/\r
 \r
-package ti.drv.rm[2, 1, 0, 7] {\r
+package ti.drv.rm[2, 2, 0, 0] {\r
     module Settings;\r
 }\r
diff --git a/rmver.h b/rmver.h
index d148be427d92c11de2f0c995de259b1166d7ae7b..ea28602e6aa92ac9f6e647f93781cf1165a14837 100755 (executable)
--- a/rmver.h
+++ b/rmver.h
@@ -51,13 +51,13 @@ extern "C" {
  * format:
  *  0xAABBCCDD -> Arch (AA); API Changes (BB); Major (CC); Minor (DD)
  */
-#define RM_VERSION_ID                   (0x02010007)
+#define RM_VERSION_ID                   (0x02020000)
 
 /**
  * @brief   This is the version string which describes the RM along with the
  * date and build information.
  */
-#define RM_VERSION_STR                  "RM Revision: 02.01.00.07"
+#define RM_VERSION_STR                  "RM Revision: 02.02.00.00"
 
 
 #ifdef __cplusplus
diff --git a/test/k2g/c66/bios/dsp_client.cfg b/test/k2g/c66/bios/dsp_client.cfg
new file mode 100644 (file)
index 0000000..1e2d0c8
--- /dev/null
+++ b/test/k2g/c66/bios/dsp_client.cfg
@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2012-2014, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+var Memory = xdc.useModule('xdc.runtime.Memory');
+var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+BIOS.heapSize = 0x20000;
+BIOS.libType = BIOS.LibType_Custom;
+
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.deleteTerminatedTasks = true;
+
+var Idle = xdc.useModule('ti.sysbios.knl.Idle');
+Idle.addFunc('&VirtQueue_cacheWb');
+
+var System = xdc.useModule('xdc.runtime.System');
+var SysMin = xdc.useModule('xdc.runtime.SysMin');
+System.SupportProxy = SysMin;
+
+var Diags = xdc.useModule('xdc.runtime.Diags');
+
+xdc.useModule("ti.ipc.namesrv.NameServerRemoteRpmsg");
+
+print ("Program.cpu.deviceName = " + Program.cpu.deviceName);
+print ("Program.platformName = " + Program.platformName);
+
+var VirtQueue = xdc.useModule('ti.ipc.family.tci6638.VirtQueue');
+var Interrupt = xdc.useModule('ti.ipc.family.tci6638.Interrupt');
+
+/* Note: MultiProc_self is set during VirtQueue_init based on DNUM. */
+var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+
+/* K2E - TMS320C66AK2E05 */
+MultiProc.setConfig(null, ["HOST", "CORE0"]);
+Program.sectMap[".text:_c_int00"] = new Program.SectionSpec();
+Program.sectMap[".text:_c_int00"].loadSegment = "L2SRAM";
+Program.sectMap[".text:_c_int00"].loadAlign = 0x400;
+
+Program.sectMap[".far"] = "MSMCSRAM";
+
+var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
+Hwi.enableException = true;
+
+/* This makes the vrings address range 0xa0000000 to 0xa1ffffff uncachable.
+   We assume the rest is to be left cacheable.
+   Per sprugw0b.pdf
+    0184 8280h MAR160 Memory Attribute Register 160 A000 0000h - A0FF FFFFh
+    0184 8284h MAR161 Memory Attribute Register 161 A100 0000h - A1FF FFFFh
+*/
+var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
+/*  Mark external memory used by kernel as uncached so that IPC vring CMA
+ *  region can operate properly when exchanging messages between DSP and ARM.
+ *  Marking entire DDR3 as uncached since the memory used by kernel can 
+ *  change between device revisions.  Need to find better way of doing this. */
+Cache.setMarMeta(0x80000000, 0x7FFFFFFF, 0xC);
+
+Program.global.sysMinBufSize = 0x8000;
+SysMin.bufSize  =  Program.global.sysMinBufSize;
+
+/* Enable Memory Translation module that operates on the Resource Table */
+var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
+/* Make sure RemoteProc's .resource_table doesn't conflict with secure kernel when
+ * on secure board.  Secure kernel is located from 0x00800000 - 0x00810000 */
+Resource.loadAddr = 0x00810000;
+
+/*  COMMENT OUT TO SHUT OFF LOG FOR BENCHMARKS: */
+/*
+Diags.setMaskMeta("ti.ipc.family.tci6638.Interrupt", Diags.USER1,
+    Diags.ALWAYS_ON);
+Diags.setMaskMeta("ti.ipc.family.tci6638.VirtQueue", Diags.USER1,
+    Diags.ALWAYS_ON);
+Diags.setMaskMeta("ti.ipc.transports.TransportRpmsg",
+    Diags.INFO|Diags.USER1|Diags.STATUS,
+    Diags.ALWAYS_ON);
+Diags.setMaskMeta("ti.ipc.namesrv.NameServerRemoteRpmsg", Diags.INFO,
+    Diags.ALWAYS_ON);
+*/
+
+Hwi.enableException = true;
+
+xdc.loadPackage('ti.ipc.ipcmgr');
+BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');
+
+var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+var params = new HeapBuf.Params;
+params.align = 8;
+params.blockSize = 512;
+params.numBlocks = 256;
+var msgHeap = HeapBuf.create(params);
+
+var MessageQ  = xdc.useModule('ti.sdo.ipc.MessageQ');
+MessageQ.registerHeapMeta(msgHeap, 0);
+
+var Assert = xdc.useModule('xdc.runtime.Assert');
+var Defaults = xdc.useModule('xdc.runtime.Defaults');
+var Text = xdc.useModule('xdc.runtime.Text');
+Text.isLoaded = true;
+
+var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
+var LoggerSysParams = new LoggerSys.Params();
+
+Defaults.common$.logger = LoggerSys.create(LoggerSysParams);
+
+var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup');
+VirtioSetup.common$.diags_INFO = Diags.RUNTIME_OFF;
+
+var Main = xdc.useModule('xdc.runtime.Main');
+Main.common$.diags_ASSERT = Diags.ALWAYS_ON;
+Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
+
+xdc.loadPackage('ti.ipc.transports').profile = 'release';
+
+/* PDK packages */
+var devType = "k2g"
+var Csl = xdc.useModule('ti.csl.Settings');
+Csl.deviceType = devType;
+var Rm = xdc.loadPackage('ti.drv.rm'); 
+
+var MessageQ  = xdc.useModule('ti.sdo.ipc.MessageQ');
+
+var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup');
+MessageQ.SetupTransportProxy = VirtioSetup;
+
+var NameServer = xdc.useModule("ti.sdo.utils.NameServer");
+var NsRemote = xdc.useModule("ti.ipc.namesrv.NameServerRemoteRpmsg");
+NameServer.SetupProxy = NsRemote;
+
+var TransportRpmsg = xdc.useModule('ti.ipc.transports.TransportRpmsg');
+
diff --git a/test/k2g/c66/bios/rmK2GArmv7LinuxDspClientTestProject.txt b/test/k2g/c66/bios/rmK2GArmv7LinuxDspClientTestProject.txt
new file mode 100644 (file)
index 0000000..a4642c9
--- /dev/null
+++ b/test/k2g/c66/bios/rmK2GArmv7LinuxDspClientTestProject.txt
@@ -0,0 +1,7 @@
+-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/test/src/dsp_client.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/test/dts_files/static-policy.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/test/k2g/c66/bios/rm_osal.c"
+-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/test/k2g/c66/bios/dsp_client.cfg"
+-ccs.setCompilerOptions "-mv6600 -g -DDEVICE_K2G --diag_warning=225 -I${PDK_INSTALL_PATH}/ti/drv/rm" 
+-rtsc.enableRtsc
+
diff --git a/test/k2g/c66/bios/rm_osal.c b/test/k2g/c66/bios/rm_osal.c
new file mode 100644 (file)
index 0000000..62fda05
--- /dev/null
+++ b/test/k2g/c66/bios/rm_osal.c
@@ -0,0 +1,275 @@
+/**
+ *   @file  rm_osal.c
+ *
+ *   @brief
+ *      This is the OS abstraction layer used by the Resource Manager.
+ *
+ *  \par
+ *  ============================================================================
+ *  @n   (C) Copyright 2012-2013, Texas Instruments, Inc.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+
+/* Standard Includes */
+#include <stdarg.h>
+
+/* XDC Includes */
+#include <xdc/std.h>
+#include <xdc/runtime/Memory.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/System.h>
+
+/* BIOS Includes */
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/hal/Hwi.h>
+#include <ti/sysbios/knl/Semaphore.h>
+
+/* CSL includes */
+#include <ti/csl/csl_cacheAux.h>
+#include <ti/csl/csl_xmcAux.h>
+
+/**********************************************************************
+ ****************************** Defines *******************************
+ **********************************************************************/
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+uint32_t rmMallocCounter = 0;
+uint32_t rmFreeCounter   = 0;
+
+int32_t rmByteAlloc = 0;
+int32_t rmByteFree = 0;
+
+/**********************************************************************
+ *************************** OSAL Functions **************************
+ **********************************************************************/
+
+/* FUNCTION PURPOSE: Allocates memory
+ ***********************************************************************
+ * DESCRIPTION: The function is used to allocate a memory block of the
+ *              specified size.
+ */
+void *Osal_rmMalloc (uint32_t num_bytes)
+{
+       Error_Block     errorBlock;
+
+    /* Increment the allocation counter. */
+    rmMallocCounter++;
+    rmByteAlloc += num_bytes;
+
+       /* Allocate memory. */
+       return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
+}
+
+/* FUNCTION PURPOSE: Frees memory
+ ***********************************************************************
+ * DESCRIPTION: The function is used to free a memory block of the
+ *              specified size.
+ */ 
+void Osal_rmFree (void *ptr, uint32_t size)
+{
+    /* Increment the free counter. */
+    rmFreeCounter++;
+    rmByteFree += size;
+       Memory_free(NULL, ptr, size);
+}
+
+/* FUNCTION PURPOSE: Critical section enter
+ ***********************************************************************
+ * DESCRIPTION: The function is used to enter a critical section.
+ *              Function protects against 
+ *      
+ *              access from multiple cores 
+ *              and 
+ *              access from multiple threads on single core
+ */  
+void *Osal_rmCsEnter(void)
+{
+
+    return NULL;
+}
+
+/* FUNCTION PURPOSE: Critical section exit
+ ***********************************************************************
+ * DESCRIPTION: The function is used to exit a critical section 
+ *              protected using Osal_rmCsEnter() API.
+ */  
+void Osal_rmCsExit(void *CsHandle)
+{
+
+}
+
+/* FUNCTION PURPOSE: Multi-threaded critical section enter
+ ***********************************************************************
+ * DESCRIPTION: The function is used to enter a multi-threaded critical
+ *              section. Function protects against 
+ *      
+ *              access from multiple threads on single core
+ */  
+void *Osal_rmMtCsEnter(void *mtSemObj)
+{
+
+    return NULL;
+}
+
+/* FUNCTION PURPOSE: Multi-threaded critical section exit
+ ***********************************************************************
+ * DESCRIPTION: The function is used to exit a multi-threaded critical
+ *              section protected using Osal_rmMtCsEnter() API.
+ */  
+void Osal_rmMtCsExit(void *mtSemObj, void *CsHandle)
+{
+
+}
+
+/* FUNCTION PURPOSE: Cache invalidate
+ ***********************************************************************
+ * DESCRIPTION: The function is used to indicate that a block of memory is 
+ *              about to be accessed. If the memory block is cached then this 
+ *              indicates that the application would need to ensure that the 
+ *              cache is updated with the data from the actual memory.
+ */  
+void Osal_rmBeginMemAccess(void *ptr, uint32_t size)
+{
+    uint32_t    key;
+
+    /* Disable Interrupts */
+    key = Hwi_disable();
+
+    /* Cleanup the prefetch buffer also. */
+    CSL_XMC_invalidatePrefetchBuffer();
+
+#ifdef L2_CACHE
+    /* Invalidate L2 cache. This should invalidate L1D as well. 
+     * Wait until operation is complete. */    
+    CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
+#else       
+    /* Invalidate L1D cache and wait until operation is complete. 
+     * Use this approach if L2 cache is not enabled */    
+    CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
+#endif
+
+    /* Reenable Interrupts. */
+    Hwi_restore(key);
+
+    return;
+}
+
+/* FUNCTION PURPOSE: Cache writeback
+ ***********************************************************************
+ * DESCRIPTION: The function is used to indicate that the block of memory has 
+ *              finished being accessed. If the memory block is cached then the 
+ *              application would need to ensure that the contents of the cache 
+ *              are updated immediately to the actual memory. 
+ */  
+void Osal_rmEndMemAccess(void *ptr, uint32_t size)
+{
+    uint32_t    key;
+
+    /* Disable Interrupts */
+    key = Hwi_disable();
+
+#ifdef L2_CACHE
+    /* Writeback L2 cache. This should Writeback L1D as well. 
+     * Wait until operation is complete. */ 
+    CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
+
+#else    
+    /* Writeback L1D cache and wait until operation is complete. 
+     * Use this approach if L2 cache is not enabled */    
+    CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
+#endif
+
+    /* Reenable Interrupts. */
+    Hwi_restore(key);
+
+    return;
+}
+
+/* FUNCTION PURPOSE: Creates a task blocking object
+ ***********************************************************************
+ * DESCRIPTION: The function is used to create a task blocking object
+ *              capable of blocking the task a RM instance is running
+ *              within
+ */
+void *Osal_rmTaskBlockCreate(void)
+{
+    Semaphore_Params semParams;    
+
+    Semaphore_Params_init(&semParams);
+    return((void *)Semaphore_create(0, &semParams, NULL));
+}
+
+/* FUNCTION PURPOSE: Blocks a RM instance
+ ***********************************************************************
+ * DESCRIPTION: The function is used to block a task whose context a
+ *              RM instance is running within.
+ */
+void Osal_rmTaskBlock(void *handle)
+{
+    Semaphore_pend((Semaphore_Handle)handle, BIOS_WAIT_FOREVER);
+}
+
+/* FUNCTION PURPOSE: unBlocks a RM instance
+ ***********************************************************************
+ * DESCRIPTION: The function is used to unblock a task whose context a
+ *              RM instance is running within.
+ */
+void Osal_rmTaskUnblock(void *handle)
+{
+    Semaphore_post((Semaphore_Handle)handle);
+}
+
+/* FUNCTION PURPOSE: Deletes a task blocking object
+ ***********************************************************************
+ * DESCRIPTION: The function is used to delete a task blocking object
+ *              provided to a RM instance
+ */
+void Osal_rmTaskBlockDelete(void *handle)
+{
+    Semaphore_delete((Semaphore_Handle *)&handle);
+}
+
+/* FUNCTION PURPOSE: Prints a variable list
+ ***********************************************************************
+ * DESCRIPTION: The function is used to print a string to the console
+ */
+void Osal_rmLog (char *fmt, ... )
+{
+    VaList ap;
+    
+    va_start(ap, fmt);
+    System_vprintf(fmt, ap);
+    va_end(ap);
+}
+
Project to include GIT repos for RTOS components including user mode CSL & NetCP LLDs (CPPI/QMSS/PA/RM), PDK components (NWAL/PKTLIB) and Transport Net Lib components (NetAPI/HPLIB) - Resource Manager to manager system resource contentions.