Base directory structure for new RM
authorJustin Sobota <jsobota@ti.com>
Fri, 12 Oct 2012 20:31:30 +0000 (16:31 -0400)
committerJustin Sobota <jsobota@ti.com>
Fri, 12 Oct 2012 20:31:30 +0000 (16:31 -0400)
17 files changed:
Settings.xdc [deleted file]
config.bld
docs/Doxyfile [deleted file]
include/Module.xs [new file with mode: 0644]
include/rm_pvt.h [new file with mode: 0644]
package.bld
package.xdc
resource_table_defs.h [new file with mode: 0644]
rm.h [new file with mode: 0644]
rm_osal.h [new file with mode: 0644]
rm_public.h [moved from rm_public_lld.h with 96% similarity]
rmver.h [deleted file]
setupenv.bat
setupenv.sh [new file with mode: 0644]
src/Module.xs [new file with mode: 0644]
src/rm.c [new file with mode: 0644]
test/Module.xs [new file with mode: 0644]

diff --git a/Settings.xdc b/Settings.xdc
deleted file mode 100644 (file)
index ef7e138..0000000
+++ /dev/null
@@ -1,7 +0,0 @@
-
-
-module Settings
-{
-    config string rmlldVersionString = "01.00.00.11";
-}
-
index 796e82a3959e60d8902f2e122b5546395b06abb8..f929e70569113c43ade8f1cc5887eeb65d6f35ce 100644 (file)
@@ -1,12 +1,12 @@
 /******************************************************************************\r
- * FILE PURPOSE: Build configuration Script for the RM LLD\r
+ * FILE PURPOSE: Build configuration Script for the RM\r
  ******************************************************************************\r
  * FILE NAME: config.bld\r
  *\r
  * DESCRIPTION: \r
- *  This file contains the build configuration script for RM LLD \r
+ *  This file contains the build configuration script for RM \r
  *  and is responsible for configuration of the paths for the various tools\r
- *  required to build RM LLD.\r
+ *  required to build RM.\r
  *\r
  * Copyright (C) 2012, Texas Instruments, Inc.\r
  *****************************************************************************/\r
@@ -14,7 +14,7 @@
 /* Get the Tools Base directory from the Environment Variable. */\r
 var toolsBaseDir = java.lang.System.getenv("XDCCGROOT");\r
 \r
-/* Get the base directory for the RM LLD Package */\r
+/* Get the base directory for the RM Package */\r
 var lldPath = new java.io.File(".//").getPath();\r
 \r
 var lldInstallType;\r
@@ -25,11 +25,11 @@ var lldPartNumber = java.lang.System.getenv("PARTNO");
 /* Include Path */\r
 var lldIncludePath = " -i" + lldPath + "/src" + " -i" + lldPath  + " -i" + lldPath + "/test";\r
 \r
-/* Configure the RM LLD Release Version Information */\r
-var lldReleaseVersion = [01,00,00,11];\r
+/* Configure the RM Release Version Information */\r
+var lldReleaseVersion = [02,00,00,00];\r
 \r
-/* RM LLD Coverity Analysis: Check the environment variable to determine if Static\r
- * Analysis has to be done on the RM LLD Code base or not? */\r
+/* RM Coverity Analysis: Check the environment variable to determine if Static\r
+ * Analysis has to be done on the RM Code base or not? */\r
 var lldCoverityAnalysis = java.lang.System.getenv("LLDCOV");\r
 \r
 /* C66 ELF compiler configuration for Little Endian Mode. */\r
diff --git a/docs/Doxyfile b/docs/Doxyfile
deleted file mode 100644 (file)
index ab5ee83..0000000
+++ /dev/null
@@ -1,293 +0,0 @@
-
-# Doxyfile 1.5.6
-
-#---------------------------------------------------------------------------
-# Project related configuration options
-#---------------------------------------------------------------------------
-DOXYFILE_ENCODING      = UTF-8
-PROJECT_NAME           = "RM Low Level Driver"
-PROJECT_NUMBER         = 1.0.0.11
-OUTPUT_DIRECTORY       = ./docs/doxygen
-CREATE_SUBDIRS         = NO
-OUTPUT_LANGUAGE        = English
-BRIEF_MEMBER_DESC      = YES
-REPEAT_BRIEF           = YES
-ABBREVIATE_BRIEF       = "The $name class" \
-                         "The $name widget" \
-                         "The $name file" \
-                         is \
-                         provides \
-                         specifies \
-                         contains \
-                         represents \
-                         a \
-                         an \
-                         the
-ALWAYS_DETAILED_SEC    = NO
-INLINE_INHERITED_MEMB  = NO
-FULL_PATH_NAMES        = NO
-STRIP_FROM_PATH        = 
-STRIP_FROM_INC_PATH    = 
-SHORT_NAMES            = NO
-JAVADOC_AUTOBRIEF      = NO
-QT_AUTOBRIEF           = NO
-MULTILINE_CPP_IS_BRIEF = NO
-DETAILS_AT_TOP         = NO
-INHERIT_DOCS           = YES
-SEPARATE_MEMBER_PAGES  = NO
-TAB_SIZE               = 8
-ALIASES                = 
-OPTIMIZE_OUTPUT_FOR_C  = YES
-OPTIMIZE_OUTPUT_JAVA   = NO
-OPTIMIZE_FOR_FORTRAN   = NO
-OPTIMIZE_OUTPUT_VHDL   = NO
-BUILTIN_STL_SUPPORT    = NO
-CPP_CLI_SUPPORT        = NO
-SIP_SUPPORT            = NO
-IDL_PROPERTY_SUPPORT   = YES
-DISTRIBUTE_GROUP_DOC   = NO
-SUBGROUPING            = YES
-TYPEDEF_HIDES_STRUCT   = NO
-#---------------------------------------------------------------------------
-# Build related configuration options
-#---------------------------------------------------------------------------
-EXTRACT_ALL            = NO
-EXTRACT_PRIVATE        = NO
-EXTRACT_STATIC         = YES
-EXTRACT_LOCAL_CLASSES  = YES
-EXTRACT_LOCAL_METHODS  = NO
-EXTRACT_ANON_NSPACES   = NO
-HIDE_UNDOC_MEMBERS     = YES
-HIDE_UNDOC_CLASSES     = YES
-HIDE_FRIEND_COMPOUNDS  = NO
-HIDE_IN_BODY_DOCS      = NO
-INTERNAL_DOCS          = NO
-CASE_SENSE_NAMES       = NO
-HIDE_SCOPE_NAMES       = NO
-SHOW_INCLUDE_FILES     = YES
-INLINE_INFO            = YES
-SORT_MEMBER_DOCS       = YES
-SORT_BRIEF_DOCS        = NO
-SORT_GROUP_NAMES       = NO
-SORT_BY_SCOPE_NAME     = NO
-GENERATE_TODOLIST      = YES
-GENERATE_TESTLIST      = YES
-GENERATE_BUGLIST       = YES
-GENERATE_DEPRECATEDLIST= YES
-ENABLED_SECTIONS       = 
-MAX_INITIALIZER_LINES  = 30
-SHOW_USED_FILES        = YES
-SHOW_DIRECTORIES       = NO
-SHOW_FILES             = YES
-SHOW_NAMESPACES        = YES
-FILE_VERSION_FILTER    = 
-#---------------------------------------------------------------------------
-# configuration options related to warning and progress messages
-#---------------------------------------------------------------------------
-QUIET                  = NO
-WARNINGS               = YES
-WARN_IF_UNDOCUMENTED   = YES
-WARN_IF_DOC_ERROR      = YES
-WARN_NO_PARAMDOC       = NO
-WARN_FORMAT            = "$file:$line: $text"
-WARN_LOGFILE           = 
-#---------------------------------------------------------------------------
-# configuration options related to the input files
-#---------------------------------------------------------------------------
-INPUT                  = 
-INPUT_ENCODING         = UTF-8
-FILE_PATTERNS          = *.c \
-                         *.cc \
-                         *.cxx \
-                         *.cpp \
-                         *.c++ \
-                         *.d \
-                         *.java \
-                         *.ii \
-                         *.ixx \
-                         *.ipp \
-                         *.i++ \
-                         *.inl \
-                         *.h \
-                         *.hh \
-                         *.hxx \
-                         *.hpp \
-                         *.h++ \
-                         *.idl \
-                         *.odl \
-                         *.cs \
-                         *.php \
-                         *.php3 \
-                         *.inc \
-                         *.m \
-                         *.mm \
-                         *.dox \
-                         *.py \
-                         *.f90 \
-                         *.f \
-                         *.vhd \
-                         *.vhdl
-RECURSIVE              = YES
-EXCLUDE                = YES \
-                         ./example \
-                         ./test \
-                         ./package \
-                         ./packages
-EXCLUDE_SYMLINKS       = NO
-EXCLUDE_PATTERNS       = cslr_*.h
-EXCLUDE_SYMBOLS        = 
-EXAMPLE_PATH           = 
-EXAMPLE_PATTERNS       = *
-EXAMPLE_RECURSIVE      = NO
-IMAGE_PATH             = 
-INPUT_FILTER           = 
-FILTER_PATTERNS        = 
-FILTER_SOURCE_FILES    = NO
-#---------------------------------------------------------------------------
-# configuration options related to source browsing
-#---------------------------------------------------------------------------
-SOURCE_BROWSER         = NO
-INLINE_SOURCES         = NO
-STRIP_CODE_COMMENTS    = YES
-REFERENCED_BY_RELATION = NO
-REFERENCES_RELATION    = NO
-REFERENCES_LINK_SOURCE = YES
-USE_HTAGS              = NO
-VERBATIM_HEADERS       = NO
-#---------------------------------------------------------------------------
-# configuration options related to the alphabetical class index
-#---------------------------------------------------------------------------
-ALPHABETICAL_INDEX     = NO
-COLS_IN_ALPHA_INDEX    = 5
-IGNORE_PREFIX          = 
-#---------------------------------------------------------------------------
-# configuration options related to the HTML output
-#---------------------------------------------------------------------------
-GENERATE_HTML          = YES
-HTML_OUTPUT            = html
-HTML_FILE_EXTENSION    = .html
-HTML_HEADER            = ./docs/tiheader.htm
-HTML_FOOTER            = ./docs/tifooter.htm
-HTML_STYLESHEET        = 
-HTML_ALIGN_MEMBERS     = YES
-GENERATE_HTMLHELP      = YES
-GENERATE_DOCSET        = NO
-DOCSET_FEEDNAME        = "Doxygen generated docs"
-DOCSET_BUNDLE_ID       = org.doxygen.Project
-HTML_DYNAMIC_SECTIONS  = NO
-CHM_FILE               = ..\..\rmlldDocs.chm
-HHC_LOCATION           = hhc.exe
-GENERATE_CHI           = NO
-CHM_INDEX_ENCODING     = 
-BINARY_TOC             = NO
-TOC_EXPAND             = NO
-DISABLE_INDEX          = NO
-ENUM_VALUES_PER_LINE   = 4
-GENERATE_TREEVIEW      = NONE
-TREEVIEW_WIDTH         = 250
-FORMULA_FONTSIZE       = 10
-#---------------------------------------------------------------------------
-# configuration options related to the LaTeX output
-#---------------------------------------------------------------------------
-GENERATE_LATEX         = NO
-LATEX_OUTPUT           = latex
-LATEX_CMD_NAME         = latex
-MAKEINDEX_CMD_NAME     = makeindex
-COMPACT_LATEX          = NO
-PAPER_TYPE             = a4wide
-EXTRA_PACKAGES         = 
-LATEX_HEADER           = 
-PDF_HYPERLINKS         = YES
-USE_PDFLATEX           = YES
-LATEX_BATCHMODE        = NO
-LATEX_HIDE_INDICES     = NO
-#---------------------------------------------------------------------------
-# configuration options related to the RTF output
-#---------------------------------------------------------------------------
-GENERATE_RTF           = NO
-RTF_OUTPUT             = rtf
-COMPACT_RTF            = NO
-RTF_HYPERLINKS         = NO
-RTF_STYLESHEET_FILE    = 
-RTF_EXTENSIONS_FILE    = 
-#---------------------------------------------------------------------------
-# configuration options related to the man page output
-#---------------------------------------------------------------------------
-GENERATE_MAN           = NO
-MAN_OUTPUT             = man
-MAN_EXTENSION          = .3
-MAN_LINKS              = NO
-#---------------------------------------------------------------------------
-# configuration options related to the XML output
-#---------------------------------------------------------------------------
-GENERATE_XML           = NO
-XML_OUTPUT             = xml
-XML_SCHEMA             = 
-XML_DTD                = 
-XML_PROGRAMLISTING     = YES
-#---------------------------------------------------------------------------
-# configuration options for the AutoGen Definitions output
-#---------------------------------------------------------------------------
-GENERATE_AUTOGEN_DEF   = NO
-#---------------------------------------------------------------------------
-# configuration options related to the Perl module output
-#---------------------------------------------------------------------------
-GENERATE_PERLMOD       = NO
-PERLMOD_LATEX          = NO
-PERLMOD_PRETTY         = YES
-PERLMOD_MAKEVAR_PREFIX = 
-#---------------------------------------------------------------------------
-# Configuration options related to the preprocessor   
-#---------------------------------------------------------------------------
-ENABLE_PREPROCESSING   = YES
-MACRO_EXPANSION        = NO
-EXPAND_ONLY_PREDEF     = NO
-SEARCH_INCLUDES        = YES
-INCLUDE_PATH           = 
-INCLUDE_FILE_PATTERNS  = 
-PREDEFINED             = 
-EXPAND_AS_DEFINED      = 
-SKIP_FUNCTION_MACROS   = YES
-#---------------------------------------------------------------------------
-# Configuration::additions related to external references   
-#---------------------------------------------------------------------------
-TAGFILES               = 
-GENERATE_TAGFILE       = 
-ALLEXTERNALS           = NO
-EXTERNAL_GROUPS        = YES
-PERL_PATH              = /usr/bin/perl
-#---------------------------------------------------------------------------
-# Configuration options related to the dot tool   
-#---------------------------------------------------------------------------
-CLASS_DIAGRAMS         = NO
-MSCGEN_PATH            = 
-HIDE_UNDOC_RELATIONS   = YES
-HAVE_DOT               = NO
-DOT_FONTNAME           = FreeSans
-DOT_FONTPATH           = 
-CLASS_GRAPH            = YES
-COLLABORATION_GRAPH    = YES
-GROUP_GRAPHS           = YES
-UML_LOOK               = NO
-TEMPLATE_RELATIONS     = NO
-INCLUDE_GRAPH          = YES
-INCLUDED_BY_GRAPH      = YES
-CALL_GRAPH             = NO
-CALLER_GRAPH           = NO
-GRAPHICAL_HIERARCHY    = YES
-DIRECTORY_GRAPH        = YES
-DOT_IMAGE_FORMAT       = png
-DOT_PATH               = 
-DOTFILE_DIRS           = 
-DOT_GRAPH_MAX_NODES    = 50
-MAX_DOT_GRAPH_DEPTH    = 1000
-DOT_TRANSPARENT        = YES
-DOT_MULTI_TARGETS      = NO
-GENERATE_LEGEND        = YES
-DOT_CLEANUP            = YES
-#---------------------------------------------------------------------------
-# Configuration::additions related to the search engine   
-#---------------------------------------------------------------------------
-SEARCHENGINE           = NO
-
-
diff --git a/include/Module.xs b/include/Module.xs
new file mode 100644 (file)
index 0000000..517a602
--- /dev/null
@@ -0,0 +1,29 @@
+/******************************************************************************
+ * FILE PURPOSE: RM LLD include files.
+ ******************************************************************************
+ * FILE NAME: module.xs
+ *
+ * DESCRIPTION: 
+ *  This file contains the module specification for RM LLD include directory
+ *
+ * Copyright (C) 2012, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Load the library utility. */
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");
+
+/**************************************************************************
+ * FUNCTION NAME : modBuild
+ **************************************************************************
+ * DESCRIPTION   :
+ *  The function is used to add all the header files in the include 
+ *  directory into the package.
+ **************************************************************************/
+function modBuild() 
+{
+    /* Add all the .h files to the release package. */
+    var testFiles = libUtility.listAllFiles (".h", "include", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+}
+
diff --git a/include/rm_pvt.h b/include/rm_pvt.h
new file mode 100644 (file)
index 0000000..029b671
--- /dev/null
@@ -0,0 +1,330 @@
+/*
+ *  file  rm_pvt.h
+ *
+ *  Private data structures of Resource Manager Low Level Driver.
+ *
+ *  ============================================================================
+ *      (C) Copyright 2012, Texas Instruments, Inc.
+ * 
+ *  Redistribution and use in source and binary forms, with or without 
+ *  modification, are permitted provided that the following conditions 
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the   
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+
+#ifndef RM_PVT_H_
+#define RM_PVT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Device Include */
+#include <c6x.h>
+
+/* RM includes */
+#include <ti/drv/rm/rm_public_lld.h>
+
+/* CSL includes */
+#include <ti/csl/csl_qm_queue.h>
+
+/* QMSS Resource Information */
+#define RM_QMSS_FIRMWARE_PDSPS 2
+#define RM_QMSS_QUEUES 8192
+#define RM_QMSS_MEM_REGIONS 20
+#define RM_QMSS_LINKING_RAM_RANGES 40 /* Twice as many memory regions */
+#define RM_QMSS_ACCUM_CH 48
+#define RM_QMSS_QOS_CLUSTER 8
+#define RM_QMSS_QOS_QUEUES 64
+
+#define RM_QMSS_LINKING_RAM_RANGE_INIT  (0xFFFFFFFF)
+
+/* CPPI Resource Information */
+
+/* Set CPPI DMA increments based on which DMAs are present for the device */
+
+/* Set AIF increment if present */
+#ifdef QMSS_MAX_AIF_QUEUE
+#define RM_CPPI_AIF_INC 1
+#else
+#define RM_CPPI_AIF_INC 0
+#endif
+/* Set FFTC A increment if present */
+#ifdef QMSS_MAX_FFTC_A_QUEUE
+#define RM_CPPI_FFTC_A_INC 1
+#else
+#define RM_CPPI_FFTC_A_INC 0
+#endif
+/* Set FFTC B increment if present */
+#ifdef QMSS_MAX_FFTC_B_QUEUE
+#define RM_CPPI_FFTC_B_INC 1
+#else
+#define RM_CPPI_FFTC_B_INC 0
+#endif
+/* Set PASS increment if present */
+#ifdef QMSS_MAX_PASS_QUEUE
+#define RM_CPPI_PASS_INC 1
+#else
+#define RM_CPPI_PASS_INC 0
+#endif
+/* Set FFTC C increment if present */
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+#define RM_CPPI_FFTC_C_INC 1
+#else
+#define RM_CPPI_FFTC_C_INC 0
+#endif
+/* Set BCP increment if present */
+#ifdef QMSS_MAX_BCP_QUEUE
+#define RM_CPPI_BCP_INC 1
+#else
+#define RM_CPPI_BCP_INC 0
+#endif
+
+/* Base number of DMAs for all devices. */
+#define RM_CPPI_BASE_DMAS 2
+/* Set max DMAs, adding additional DMAs if present */
+#define RM_CPPI_MAX_DMAS (RM_CPPI_BASE_DMAS + RM_CPPI_AIF_INC + RM_CPPI_FFTC_A_INC + \
+                                                RM_CPPI_FFTC_B_INC + RM_CPPI_PASS_INC + RM_CPPI_FFTC_C_INC + \
+                                                RM_CPPI_BCP_INC)
+
+/* Set DMA indices based on which DMAs are present in device */
+#define RM_CPPI_SRIO_DMA_ID 0
+#define RM_CPPI_AIF_DMA_ID (RM_CPPI_SRIO_DMA_ID + RM_CPPI_AIF_INC)
+#define RM_CPPI_FFTC_A_DMA_ID (RM_CPPI_AIF_DMA_ID + RM_CPPI_FFTC_A_INC)
+#define RM_CPPI_FFTC_B_DMA_ID (RM_CPPI_FFTC_A_DMA_ID + RM_CPPI_FFTC_B_INC)
+#define RM_CPPI_PASS_DMA_ID (RM_CPPI_FFTC_B_DMA_ID + RM_CPPI_PASS_INC)
+#define RM_CPPI_QMSS_DMA_ID (RM_CPPI_PASS_DMA_ID + 1)
+#define RM_CPPI_FFTC_C_DMA_ID (RM_CPPI_QMSS_DMA_ID + RM_CPPI_FFTC_C_INC)
+#define RM_CPPI_BCP_DMA_ID (RM_CPPI_FFTC_C_DMA_ID + RM_CPPI_BCP_INC)
+
+#define RM_CPPI_SRIO_TX_CH 16
+#define RM_CPPI_AIF_TX_CH 129
+#define RM_CPPI_FFTC_A_TX_CH 4
+#define RM_CPPI_FFTC_B_TX_CH 4
+#define RM_CPPI_PASS_TX_CH 9
+#define RM_CPPI_QMSS_TX_CH 32
+#define RM_CPPI_FFTC_C_TX_CH 4
+#define RM_CPPI_BCP_TX_CH 8
+
+#define RM_CPPI_SRIO_RX_CH 16
+#define RM_CPPI_AIF_RX_CH 129
+#define RM_CPPI_FFTC_A_RX_CH 4
+#define RM_CPPI_FFTC_B_RX_CH 4
+#define RM_CPPI_PASS_RX_CH 24
+#define RM_CPPI_QMSS_RX_CH 32
+#define RM_CPPI_FFTC_C_RX_CH 4
+#define RM_CPPI_BCP_RX_CH 8
+
+#define RM_CPPI_SRIO_FLOW 20
+#define RM_CPPI_AIF_FLOW 129
+#define RM_CPPI_FFTC_A_FLOW 8
+#define RM_CPPI_FFTC_B_FLOW 8
+#define RM_CPPI_PASS_FLOW 32
+#define RM_CPPI_QMSS_FLOW 64
+#define RM_CPPI_FFTC_C_FLOW 8
+#define RM_CPPI_BCP_FLOW 64
+
+/* PA Resource Information */
+#define RM_PA_LUT 5
+
+/* Permissions Access Defines and Macros */
+#define RM_RESOURCE_PERM_INIT_SHIFT 0
+#define RM_RESOURCE_PERM_USE_SHIFT  1
+
+#define RM_GET_RESOURCE_FLAG(flag) ((flag) >> ((DNUM) << 1))
+
+#define RM_GET_RESOURCE_INIT_FLAG(flag) ((RM_GET_RESOURCE_FLAG (flag) >> RM_RESOURCE_PERM_INIT_SHIFT) & 1)
+#define RM_GET_RESOURCE_USE_FLAG(flag)  ((RM_GET_RESOURCE_FLAG (flag) >> RM_RESOURCE_PERM_USE_SHIFT)  & 1)
+
+#define RM_GET_PERMISSIONS(perms) (perms >> DNUM)
+
+#define RM_RANGE_CHECK(start, end, max, ret_val) \
+do { \
+    if ((start > end) || (end > max)) \
+    { \
+        return ret_val; \
+    } \
+} while(0)
+
+/* RM standard permission structure definition */
+typedef struct
+{
+    /** Initialization permissions
+      * Bit 0 - Core 0 init permission
+      * Bit 1 - Core 1 init permission
+      * Bit 2 - Core 2 init permission
+      * Bit 3 - Core 3 init permission
+      */    
+    uint32_t initPerms;  
+    /** Usage permissions
+      * Bit 0 - Core 0 use permission
+      * Bit 1 - Core 1 use permission
+      * Bit 2 - Core 2 use permission
+      * Bit 3 - Core 3 use permission
+      */    
+    uint32_t usePerms;
+} Rm_Perms;
+
+/* RM permissions structure for Linking RAM regions */
+typedef struct
+{
+    /** Linking RAM start index for these permissions */
+    uint32_t startIndex;
+    /** Linking RAM end index for these permissions */
+    uint32_t endIndex;
+    /** Permissions for the range */
+    Rm_Perms rangePerms;
+} Rm_qmssLinkingRamPerms;
+
+/* RM permissions structure for CPPI DMA channels and flows */
+typedef struct
+{
+    /** Array of pointers to each DMAs channel or flow permissions
+       * From CPPI LLD - DMA 0 = SRIO
+       *                          DMA 1 = AIF
+       *                          DMA 2 = FFTC A
+       *                          DMA 3 = FFTC B
+       *                          DMA 4 = PASS
+       *                          DMA 5 = QMSS
+       *                          DMA 6 = FFTC C
+       *                          DMA 7 = BCP 
+       * 
+       * Note: Some DMAs may not be supported based on the device */
+    Rm_Perms *dmaPermPtrs[RM_CPPI_MAX_DMAS];
+} Rm_CppiChAndFlowPerms;
+
+/* RM Cache Line Alignment Defines and Macros */
+
+#define RM_MAX_CACHE_ALIGN 128  /* Maximum alignment for cache line size */
+
+/* This macro generates compilier error if postulate is false, so 
+ * allows 0 overhead compile time size check.  This "works" when
+ * the expression contains sizeof() which otherwise doesn't work
+ * with preprocessor */
+#define RM_COMPILE_TIME_SIZE_CHECK(postulate)                         \
+   do {                                                                 \
+       typedef struct {                                                 \
+         uint8_t NegativeSizeIfPostulateFalse[((int)(postulate))*2 - 1];\
+       } PostulateCheck_t;                                              \
+   }                                                                    \
+   while (0)
+
+/* Macro to pad out internal permission structures to multiple of RM_MAX_CACHE_ALIGN bytes
+  * The macro prevent something else from being placed on same cache line as the permission.  
+  * arrays.  Note that pad[0] is illegal, so must add full RM_MAX_CACHE_ALIGN if structure
+  * is already padded by chance. */
+#define RM_ALIGN_PERMISSIONS_ARRAY(numElements, permStructType) ( \
+     (((sizeof(permStructType) * (numElements)) % RM_MAX_CACHE_ALIGN) == 0) ? (numElements) : \
+     ((numElements) + \
+       (RM_MAX_CACHE_ALIGN - \
+         ((sizeof(permStructType) * (numElements)) % RM_MAX_CACHE_ALIGN))/sizeof(permStructType)))
+
+/* RM Global Sync Object (unpadded) */
+typedef struct
+{
+    /** Rm_init/Rm_start synchronization object. */
+    uint8_t globalSyncObj;
+} Rm_Sync_Obj_Unpadded;
+
+/* RM Global Sync Object (padded) */
+typedef struct
+{
+    /** Data structure without padding, so sizeof() can compute padding */
+    Rm_Sync_Obj_Unpadded obj;
+    /** Pad out to end of RM_MAX_CACHE_ALIGN bytes to prevent something else
+     * from being placed on same cache line as Rm_Synci_Obj.  Note that 
+     * pad[0] is illegal, so must add full RM_MAX_CACHE_ALIGN if structure
+     * is already padded by chance. */
+    uint8_t  pad[RM_MAX_CACHE_ALIGN - 
+                       (sizeof(Rm_Sync_Obj_Unpadded) % RM_MAX_CACHE_ALIGN)];
+} Rm_Sync_Obj;
+
+
+/* RM Global permissions object definition. (unpadded) */
+typedef struct 
+{
+    /** Store the QMSS PDSP firmware permissions */
+    Rm_Perms *qmssPdspFirmwarePerms;  
+    /** Store a pointer to the QMSS queue permissions array */
+    Rm_Perms *qmssQueuePerms;
+    /** Store a pointer to the QMSS memory region permissions array */
+    Rm_Perms *qmssMemRegionPerms;
+    /** Store the QMSS Linking RAM Control permissions */
+    Rm_Perms qmssLinkRamControlPerms;
+    /** Store a pointer to the QMSS linking RAM permissions list */
+    Rm_qmssLinkingRamPerms *qmssLinkRamPerms;
+    /** Store a pointer to the QMSS accumulator channel permissions array */
+    Rm_Perms *qmssAccumChPerms;
+    /** Store the QMSS QOS PDSP timer permissions */
+    Rm_Perms qmssQosPdspTimerPerms;      
+    /** Store a pointer to the QMSS QOS cluster permissions array */
+    Rm_Perms *qmssQosClusterPerms;    
+    /** Store a pointer to the QMSS QOS queue permissions array */
+    Rm_Perms *qmssQosQueuePerms;       
+    /** Store the structure of pointers to the CPPI transmit channel permissions array */
+    Rm_CppiChAndFlowPerms cppiTxChPerms;
+    /** Store the structure of pointers to the CPPI receive channel permissions array */
+    Rm_CppiChAndFlowPerms cppiRxChPerms;
+    /** Store the structure of pointers to the CPPI flow permissions array */
+    Rm_CppiChAndFlowPerms cppiFlowPerms;
+    /** Store the PA firmware permissions */
+    Rm_Perms paFirmwarePerms;  
+    /** Store a pointer to the PA lookup table permissions array */
+    Rm_Perms *paLutPerms;    
+}Rm_GlobalPermissionsObj_Unpadded;
+
+/* RM Global Permissions Object (padded) */
+typedef struct
+{
+    /** Data structure without padding, so sizeof() can compute padding */
+    Rm_GlobalPermissionsObj_Unpadded obj;
+    /** Pad out to end of RM_MAX_CACHE_ALIGN bytes to prevent something else
+     * from being placed on same cache line as Rm_Synci_Obj.  Note that 
+     * pad[0] is illegal, so must add full RM_MAX_CACHE_ALIGN if structure
+     * is already padded by chance. */
+    uint8_t  pad[RM_MAX_CACHE_ALIGN - 
+                       (sizeof(Rm_GlobalPermissionsObj_Unpadded) % RM_MAX_CACHE_ALIGN)];
+} Rm_GlobalPermissionsObj;
+
+extern void Rm_permissionTableInit(void);
+extern void Rm_setTablePermissions (const Rm_Resource *resourceEntry, Rm_Perms *rmPermsArray, uint32_t len);
+extern Rm_Result Rm_populatePermissionTable(const Rm_Resource *rmResourceTable);
+extern void Rm_updatePermissionTable(void);
+extern Rm_Result Rm_getInitPermissions (Rm_Perms *resourcePermissions);
+extern Rm_Result Rm_getUsePermissions (Rm_Perms *resourcePermissions);
+
+/* Permission checker handlers */
+extern Rm_Result Rm_initPermissionChecker (Rm_ResourceInfo *resourceData);
+extern Rm_Result Rm_usePermissionChecker (Rm_ResourceInfo *resourceData);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RM_PVT_H_ */
+
index e2dd851c4f022dbe87c64c605acbf39403098246..39e8dfb146bc2e6064492596a861fec1d4302cdd 100644 (file)
@@ -1,14 +1,14 @@
 /******************************************************************************\r
- * FILE PURPOSE: Build description for the RM LLD Package\r
+ * FILE PURPOSE: Build description for the RM Package\r
  ******************************************************************************\r
  * FILE NAME: package.bld\r
  *\r
  * DESCRIPTION: \r
- *  This file contains the build specification and description for the RM LLD\r
+ *  This file contains the build specification and description for the RM\r
  *  \r
  *  The file takes the following parameters from the command line through the\r
  *  XDCARGS variable.\r
- *      XDCARGS[0] = RM LLD Install Type \r
+ *      XDCARGS[0] = RM Install Type \r
  *      Valid Values are "TAR" or "SETUP"\r
  *      DEFAULT is "SETUP"\r
  *\r
  * Copyright (C) 2012, Texas Instruments, Inc.\r
  *****************************************************************************/\r
 \r
+/* List of all subdirectories that combine to make the RM Package. */\r
+var subDirectories = [ "src", "docs", "include", "test", "resource_table"];\r
+\r
 /* Determine if we need to create the InstallJammer Application or not? \r
- * RM LLD Deliverables be either of the following formats:\r
+ * RM Deliverables be either of the following formats:\r
  *  - TAR Ball Package\r
  *  - Setup Executable \r
  * DEFAULT is a TAR Executable. */\r
@@ -41,18 +44,18 @@ var lldRTSCFileName = "rmlld" + "_" + lldPartNumber + "_" +
  ************************ Release Banner **************************\r
  ******************************************************************/\r
 \r
-print ("*************** RM LLD Build Information ****************");\r
-print ("RM LLD Install           : " + lldInstallType);\r
-print ("RM LLD Version           : " + lldReleaseVersion);\r
+print ("*************** RM Build Information ****************");\r
+print ("RM Install           : " + lldInstallType);\r
+print ("RM Version           : " + lldReleaseVersion);\r
 print ("Tools Directory            : " + toolsBaseDir);\r
 print ("RTSC File Name            : " + lldRTSCFileName);\r
-print ("RM LLD Path              : " + lldPath);\r
+print ("RM Path              : " + lldPath);\r
 print ("Coverity Analysis          : " + (coverityAnalysis == "ON" ? "ON" : "OFF"));\r
 print ("CC LE opts                 : " + C66LE.ccOpts.prefix);\r
 print ("CC BE opts                 : " + C66BE.ccOpts.prefix);\r
 print ("***********************************************************");\r
 \r
-/* Create the release package for the RM LLD */\r
+/* Create the release package for the RM */\r
 Pkg.defaultRelease = Pkg.addRelease (lldRTSCFileName, {prefix: "./packages/"});\r
 \r
 /* Moving forward we need to set the Archiver of the package to be ZIP. This is currently\r
@@ -63,6 +66,20 @@ Pkg.defaultRelease = Pkg.addRelease (lldRTSCFileName, {prefix: "./packages/"});
  * uncompression into a temporary directory. XDC Tools with xdc-rXX support the ZIP archiver. */\r
 //Pkg.attrs = {archiver : "zip"};\r
 \r
+/* Cycle through all the sub-directories and build all the files */\r
+for (var i = 0; i < subDirectories.length; i++) \r
+{\r
+    /* Load the capsule in the sub directory. */\r
+    var caps = xdc.loadCapsule (subDirectories[i]+"/Module.xs");\r
+\r
+    print ("Building directory " + subDirectories[i]);\r
+\r
+    /* Build the capsule. */\r
+    caps.modBuild();\r
+\r
+    /* Package the module.xs files for building via package */\r
+    Pkg.otherFiles[Pkg.otherFiles.length++] = subDirectories[i]+"/Module.xs";\r
+}\r
 \r
 /* Package the remaining files */\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "config.bld";\r
@@ -70,12 +87,16 @@ Pkg.otherFiles[Pkg.otherFiles.length++] = "package.bld";
 Pkg.otherFiles[Pkg.otherFiles.length++] = "package.xdc";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "Settings.xdc";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "Settings.xdc.xdt";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "rm.h";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "rm_public_lld.h";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "resource_table_defs.h";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "rm_osal.h";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "rmver.h";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "rmver.h.xdt";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/Doxyfile";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/doxyfile.xdt";\r
 Pkg.otherFiles[Pkg.otherFiles.length++] = "build/buildlib.xs";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "makefile";\r
 \r
 /* Generate Users Manual Doxyfile */\r
 var tplt = xdc.loadTemplate("./docs/doxyfile.xdt");\r
@@ -123,7 +144,7 @@ if (lldInstallType == "SETUP")
      * MPI File to create the Final executable. \r
      *  The format supported is as follows:-\r
      *   - setupwin32_rmlld_<part_number>_<version>.exe \r
-     *      This is for RM LLD Libraries and Header files\r
+     *      This is for RM Libraries and Header files\r
      */\r
     var InstallJammerVersion = "-DVersion " + lldPartNumber + "_" + lldReleaseVersion[0] + "_" +\r
                                lldReleaseVersion[1] + "_" +  lldReleaseVersion[2]  + "_" + lldReleaseVersion[3];\r
@@ -132,7 +153,7 @@ if (lldInstallType == "SETUP")
      * the input directory for the Install Jammer. */ \r
     var PackageBaseDir = " -DPackageBaseDir " + lldPath + "./tmp";\r
 \r
-    /* This is the location where the RM LLD will be installed by default. */\r
+    /* This is the location where the RM will be installed by default. */\r
     var WinInstallDir = " -DWinInstallDir C:/Program Files/Texas Instruments/rmlld" + "_" + \r
                             lldPartNumber + "_" + \r
                             lldReleaseVersion[0] + "_" +  lldReleaseVersion[1] + "_" +  \r
index e6810dfdf99505207f04dc91ee0755fef96008e3..5bee1a47d96b99b265f688272f8e1a1776d6f298 100644 (file)
@@ -4,12 +4,12 @@
  * FILE NAME: package.xdc\r
  *\r
  * DESCRIPTION: \r
- *  This file contains the package specification for the RM LLD library\r
+ *  This file contains the package specification for the RM library\r
  *\r
  * Copyright (C) 2012, Texas Instruments, Inc.\r
  *****************************************************************************/\r
 \r
-package ti.drv.rm[1, 0, 0, 11] {\r
+package ti.drv.rm[2, 0, 0, 0] {\r
     module Settings;\r
 }\r
 \r
diff --git a/resource_table_defs.h b/resource_table_defs.h
new file mode 100644 (file)
index 0000000..c9c9acd
--- /dev/null
@@ -0,0 +1,191 @@
+/**
+ *   @file  resource_table_defs.h
+ *
+ *   @brief   
+ *      This file defines the identifiers used to populate the resource table used
+ *      by the RM LLD to divy resources.
+ *
+ *  \par
+ *  NOTE:
+ *      (C) Copyright 2012 Texas Instruments, Inc.
+ * 
+ *  Redistribution and use in source and binary forms, with or without 
+ *  modification, are permitted provided that the following conditions 
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the   
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+#ifndef __RESOURCE_TABLE_DEFS_H__
+#define __RESOURCE_TABLE_DEFS_H__
+
+/* c99 include */
+#include <stdint.h>
+
+/**
+@addtogroup RM_LLD_RESOURCE_TABLE
+@{
+*/
+
+/** RM LLD Resource Table Resource Identifiers */
+/** This value should be first entry in the resource table.  Used to verify RM can read the resource table. */
+#define RM_RESOURCE_MAGIC_NUMBER (0x76543210)
+/** This value should be last entry in the resource table.  Used by RM to find last entry in resource table. */   
+#define RM_RESOURCE_FINAL_ENTRY (0xFFFFFFFF)                                                                                     
+
+/** Start of QMSS resource identifiers */
+#define RM_RESOURCE_QMSS_BASE 0
+/** QMSS Firmware PDSP write permissions */
+#define RM_RESOURCE_QMSS_FIRMWARE_PDSP (RM_RESOURCE_QMSS_BASE+1)
+/** QMSS queues.  This identifier will be expanded to identify all queue types in the near future */
+#define RM_RESOURCE_QMSS_QUEUE (RM_RESOURCE_QMSS_BASE+2) 
+/** QMSS Memory regions */
+#define RM_RESOURCE_QMSS_MEMORY_REGION (RM_RESOURCE_QMSS_BASE+3) 
+/** QMSS Linking RAM Control */
+#define RM_RESOURCE_QMSS_LINKING_RAM_CONTROL (RM_RESOURCE_QMSS_BASE+4) 
+/** QMSS Linking RAM indices */
+#define RM_RESOURCE_QMSS_LINKING_RAM (RM_RESOURCE_QMSS_BASE+5) 
+/** QMSS accumulator channels */
+#define RM_RESOURCE_QMSS_ACCUMULATOR_CH (RM_RESOURCE_QMSS_BASE+6) 
+/** QMSS QOS PDSP timer */
+#define RM_RESOURCE_QMSS_QOS_PDSP_TIMER (RM_RESOURCE_QMSS_BASE+7) 
+/** QMSS QOS clusters */
+#define RM_RESOURCE_QMSS_QOS_CLUSTER (RM_RESOURCE_QMSS_BASE+8) 
+/** QMSS QOS queues */
+#define RM_RESOURCE_QMSS_QOS_QUEUE (RM_RESOURCE_QMSS_BASE+9) 
+
+/** Start of CPPI resource identifiers */
+#define RM_RESOURCE_CPPI_BASE 64 
+/** CPPI SRIO transmit channel */
+#define RM_RESOURCE_CPPI_SRIO_TX_CH (RM_RESOURCE_CPPI_BASE+1) 
+/** CPPI SRIO receive channel */
+#define RM_RESOURCE_CPPI_SRIO_RX_CH (RM_RESOURCE_CPPI_BASE+2) 
+/** CPPI SRIO flow */
+#define RM_RESOURCE_CPPI_SRIO_FLOW (RM_RESOURCE_CPPI_BASE+3) 
+/** CPPI AIF transmit channel */
+#define RM_RESOURCE_CPPI_AIF_TX_CH (RM_RESOURCE_CPPI_BASE+4) 
+/** CPPI AIF receive channel */
+#define RM_RESOURCE_CPPI_AIF_RX_CH (RM_RESOURCE_CPPI_BASE+5) 
+/** CPPI AIF flow */
+#define RM_RESOURCE_CPPI_AIF_FLOW (RM_RESOURCE_CPPI_BASE+6) 
+/** CPPI FFTC_A transmit channel */
+#define RM_RESOURCE_CPPI_FFTC_A_TX_CH (RM_RESOURCE_CPPI_BASE+7) 
+/** CPPI FFTC_A receive channel */
+#define RM_RESOURCE_CPPI_FFTC_A_RX_CH (RM_RESOURCE_CPPI_BASE+8) 
+/** CPPI FFTC_A flow */
+#define RM_RESOURCE_CPPI_FFTC_A_FLOW  (RM_RESOURCE_CPPI_BASE+9) 
+/** CPPI FFTC_B transmit channel */
+#define RM_RESOURCE_CPPI_FFTC_B_TX_CH (RM_RESOURCE_CPPI_BASE+10) 
+/** CPPI FFTC_B receive channel */
+#define RM_RESOURCE_CPPI_FFTC_B_RX_CH (RM_RESOURCE_CPPI_BASE+11) 
+/** CPPI FFTC_B flow */
+#define RM_RESOURCE_CPPI_FFTC_B_FLOW (RM_RESOURCE_CPPI_BASE+12) 
+/** CPPI PASS transmit channel */
+#define RM_RESOURCE_CPPI_PASS_TX_CH (RM_RESOURCE_CPPI_BASE+13) 
+/** CPPI PASS receive channel */
+#define RM_RESOURCE_CPPI_PASS_RX_CH (RM_RESOURCE_CPPI_BASE+14) 
+/** CPPI PASS flow */
+#define RM_RESOURCE_CPPI_PASS_FLOW (RM_RESOURCE_CPPI_BASE+15) 
+/** CPPI QMSS transmit channel */
+#define RM_RESOURCE_CPPI_QMSS_TX_CH (RM_RESOURCE_CPPI_BASE+16) 
+/** CPPI QMSS receive channel */
+#define RM_RESOURCE_CPPI_QMSS_RX_CH (RM_RESOURCE_CPPI_BASE+17) 
+/** CPPI QMSS flow */
+#define RM_RESOURCE_CPPI_QMSS_FLOW (RM_RESOURCE_CPPI_BASE+18) 
+/** CPPI FFTC_C transmit channel */
+#define RM_RESOURCE_CPPI_FFTC_C_TX_CH (RM_RESOURCE_CPPI_BASE+19) 
+/** CPPI FFTC_C receive channel */
+#define RM_RESOURCE_CPPI_FFTC_C_RX_CH (RM_RESOURCE_CPPI_BASE+20) 
+/** CPPI FFTC_C flow */
+#define RM_RESOURCE_CPPI_FFTC_C_FLOW (RM_RESOURCE_CPPI_BASE+21) 
+/** CPPI BCP transmit channel */
+#define RM_RESOURCE_CPPI_BCP_TX_CH (RM_RESOURCE_CPPI_BASE+22) 
+/** CPPI BCP receive channel */
+#define RM_RESOURCE_CPPI_BCP_RX_CH (RM_RESOURCE_CPPI_BASE+23) 
+/** CPPI BCP flow */
+#define RM_RESOURCE_CPPI_BCP_FLOW (RM_RESOURCE_CPPI_BASE+24) 
+
+/** Start of CPPI resource identifiers */
+#define RM_RESOURCE_PA_BASE 128 
+/** PA Firmware write permissions */
+#define RM_RESOURCE_PA_FIRMWARE (RM_RESOURCE_PA_BASE+1) 
+/** PA look-up table entry */
+#define RM_RESOURCE_PA_LUT_ENTRY (RM_RESOURCE_PA_BASE+2) 
+
+/** RM LLD Resource Table Permission Codes */
+/** Init or use permission allowed */
+#define RM_RESOURCE_PERM_DENIED 0x0
+/** Init or use permission denied */
+#define RM_RESOURCE_PERM_ALLOWED 0x1
+
+/** Resource entry flags bitfield DSP shift macro */
+#define RM_RESOURCE_FLAG_DSP_SHIFT(dspNum, perms)  \
+                                          (((uint32_t) perms) << dspNum)
+
+/** Full Permissions - All DSPs can use and initialize resource */
+#define RM_RESOURCE_ALL_DSPS_FULL_PERMS  \
+                       ((RM_RESOURCE_FLAG_DSP_SHIFT(0, RM_RESOURCE_PERM_ALLOWED)) | \
+                        (RM_RESOURCE_FLAG_DSP_SHIFT(1, RM_RESOURCE_PERM_ALLOWED)) | \
+                        (RM_RESOURCE_FLAG_DSP_SHIFT(2, RM_RESOURCE_PERM_ALLOWED)) | \
+                        (RM_RESOURCE_FLAG_DSP_SHIFT(3, RM_RESOURCE_PERM_ALLOWED)))
+
+/** 
+ * @brief Resource Table resource definition structure
+ */
+typedef struct 
+{
+    /** Resouce identifier. */
+    uint32_t  resourceId;
+    /** Start range for identified resource */
+    uint32_t  resourceStart;
+    /** End range for identified resource */
+    uint32_t  resourceEnd;
+    /** Resource initialization permission flags
+      * Bits 0 : DSP 0 Permission Bit
+      * Bits 1 : DSP 1 Permission Bit 
+      * Bits 2 : DSP 2 Permission Bit
+      * Bits 3 : DSP 3 Permission Bit 
+      * Bits 31-8 : UNUSED
+      */
+    uint32_t  resourceInitFlags;
+    /** Resource usage permission flags
+      * Bits 0 : DSP 0 Permission Bit
+      * Bits 1 : DSP 1 Permission Bit 
+      * Bits 2 : DSP 2 Permission Bit
+      * Bits 3 : DSP 3 Permission Bit 
+      * Bits 31-8 : UNUSED
+      */    
+    uint32_t  resourceUseFlags;
+} Rm_Resource;
+
+/**
+@}
+*/
+
+#endif /* __RESOURCE_TABLE_DEFS_H__ */
+
+
+
diff --git a/rm.h b/rm.h
new file mode 100644 (file)
index 0000000..771bd7b
--- /dev/null
+++ b/rm.h
@@ -0,0 +1,209 @@
+/**
+ *   @file  rm.h
+ *
+ *   @brief   
+ *      This is the RM LLD include file.
+ *
+ *  \par
+ *  ============================================================================
+ *  @n   (C) Copyright 2012, Texas Instruments, Inc.
+ * 
+ *  Redistribution and use in source and binary forms, with or without 
+ *  modification, are permitted provided that the following conditions 
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the   
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+
+#ifndef RM_H_
+#define RM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* RM resource table defs include file */
+#include <ti/drv/rm/rmver.h>
+#include <ti/drv/rm/rm_public_lld.h>
+#include <ti/drv/rm/resource_table_defs.h>
+
+/**  @mainpage Resource Manager Low Level Driver
+ *
+ *   @section intro  Introduction
+ *
+ *   The Resource Manager low level driver (RM LLD) is designed to provide initialization and permissions checking
+ *   for LLD resources.  A system integrator can specify DSP permissions for LLD resources within the system.
+ *   The resource permissions are stored in the RM LLD and used to validate resource requests from supported LLDs.
+ *   Currently, the RM LLD supports permissions for the following LLDs
+ *      - QMSS
+ *      - CPPI
+ *      - PA
+ *    For information on the specific resources supported with each LLD please see @ref RM_LLD_RESOURCE_TABLE.
+ *
+ *    The system integrator must specify the supported LLD resource permissions for all DSPs prior to compile time.
+ *    An array of @ref Rm_Resource objects must be created.  Each @ref Rm_Resource entry in the array specifies
+ *    a resource type, start and end range for the resource, and the initialization and usage permissions for the
+ *    resource for each DSP.  For an example resource table definitions please see the @ref rmResourceTable array
+ *    defined in the resource_table\ directory.  This resource table assigns full initialization and usage permissions
+ *    to all DSPs for all supported resources.  Please note that the resouce table must start with the
+ *    @ref RM_RESOURCE_MAGIC_NUMBER entry and end with the @ref RM_RESOURCE_FINAL_ENTRY.  These
+ *    first and last entries are used the RM LLD to validate and parse the resource table.
+ *
+ *    The RM LLD must be initialized and started prior to all supported LLD initialization and start routines.  The
+ *    @ref Rm_init function should be invoked, and passed a pointer to the integrator defined resource table, on the
+ *    master DSP core in the system.  All other DSP cores should invoke the @ref Rm_start API.  The @ref Rm_init 
+ *    function first initializes the internal permission tables to deny all DSPs access to all resources.  Next the 
+ *    @ref Rm_init function parses the resource table provided and copies all specified permissions into the internal
+ *    tables.  When the permission transfer completes the @ref Rm_init function writes a global synchronization
+ *    object which the @ref Rm_start functions are spinning on.  The slave cores that have invoked @ref Rm_start
+ *    will stop spinning once the global synchronization has been written.  At this time @ref Rm_start will invalidate 
+ *    all internal permission tables so that no further cache invalidate operations need to be performed when 
+ *    checking resource permissions in the data path. The upfront cache invalidate operation is possible because 
+ *    the RM LLD does not allow dynamic resource permission modifications. The permissions defined by the system
+ *    integrator and loaded during RM initialization are static throughout the system up-time.
+ *
+ *    The RM LLD must be registered with a supported LLD in order for the supported LLD to perform resource 
+ *    permission checks.  If the RM LLD is not registered with a supported LLD the LLD will operate as if the RM LLD
+ *    is not there.  This maintains full backwards compatability with existing applications not using the RM LLD.  In order
+ *    to register the RM LLD with supported LLDs the following steps should be taken
+ *      - Get a @ref Rm_Handle via the @ref Rm_getHandle API on each DSP that uses the RM LLD.
+ *      - Register the RM LLD with the supported LLDs by passing the @ref Rm_Handle to the 
+ *          LLD's <<LLD name>>_startCfg API.  Again, this should be performed on all DSP cores using the RM LLD.
+ *          Note: The master core for the QMSS LLD should have the @ref Rm_Handle registered via the Qmss_init API.
+ *    After registering the RM LLD with supported LLDs all supported LLD resources covered by the RM LLD will invoke
+ *    permission check callouts to the RM.  A permission denied or approved response will be given back to the
+ *    invoking LLD based on the permissions stored in the RM LLD for the resource.
+ *
+ *    All internal RM LLD permission tables are placed into a single memory section called ".rm".  This memory section
+ *    MUST be placed in shared memory (MSMC or DDR).  The permission tables are shared between all DSPs utilizing
+ *    the RM LLD.
+ *
+ *    In summary, the initialization flow if the RM LLD is to be utilized should look like the following:
+ *    
+ *    Master DSP Core:
+ *      - Call @ref Rm_init passing in the system integrator defined resource table
+ *      - Call @ref Rm_getHandle
+ *      - Call supported LLD _init or _create functions (for QMSS pass the @ref Rm_Handle inside the 
+ *          Qmss_GlobalConfigParams structure)
+ *      - Call supported LLD _startCfg functions passing the @ref Rm_Handle as an argument
+ *
+ *    Slave DSP Cores:
+ *      - Call @ref Rm_start
+ *      - Call @ref Rm_getHandle
+ *      - Call supported LLD _start functions (if supported)
+ *      - Call supported LLD _startCfg functions passing the @ref Rm_Handle as an argument
+ *  
+ */
+/* Define RM_LLD_API as a master group in Doxygen format and add all RM LLD API 
+   definitions to this group. */
+/** @defgroup RM_LLD_API RM LLD Module API
+ *  @{
+ */
+/** @} */
+
+/**
+@defgroup RM_LLD_SYMBOL  RM Low Level Driver Symbols Defined
+@ingroup RM_LLD_API
+*/
+/**
+@defgroup RM_LLD_ENUM  RM Low Level Driver Enums
+@ingroup RM_LLD_API
+*/
+/**
+@defgroup RM_LLD_RESOURCE_TABLE  RM LLD Resource Table Definition Symbols and Structures
+@ingroup RM_LLD_API
+*/
+/**
+@defgroup RM_LLD_SHARED_RESOURCES  RM LLD ARM and DSP Shared Resources
+@ingroup RM_LLD_API
+*/
+/**
+@defgroup RM_LLD_DATASTRUCT  RM Low Level Driver Data Structures
+@ingroup RM_LLD_API
+*/
+/**
+@defgroup RM_LLD_FUNCTION  RM Low Level Driver Functions
+@ingroup RM_LLD_API
+*/
+/**
+@defgroup RM_LLD_OSAL  RM Low Level Driver OSAL Functions
+@ingroup RM_LLD_API
+*/
+
+/**
+@addtogroup RM_LLD_SYMBOL
+@{
+*/
+
+/** RM LLD Return And Error Codes */
+/** RM Resource Okay Return Base */
+#define RM_OK  0
+
+/** RM LLD Error Base */
+#define RM_ERROR (-64)
+/** RM LLD failed to populate internal permission tables */
+#define RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED (RM_ERROR-1)
+/** RM LLD Table entry population failure */
+#define RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE (RM_ERROR-2)
+
+/** Master/Slave synchronization defines */
+/** Permissions table not valid */
+#define RM_PERMISSION_TABLE_NOT_VALID 0
+/** Permissions table valid */
+#define RM_PERMISSION_TABLE_VALID 1
+
+/**
+@}
+*/
+
+/** @addtogroup RM_LLD_DATASTRUCT
+@{ 
+*/
+
+/** 
+ * @brief RM Handle for LLDs
+ */
+typedef void *Rm_Handle;
+
+/** 
+@} 
+*/
+
+/* Exported functions available to application */
+extern Rm_Result Rm_init (const Rm_Resource *rmResourceTable);
+extern Rm_Result Rm_start (void);
+extern Rm_Handle Rm_getHandle(void);
+extern uint32_t Rm_getVersion (void);
+extern const char* Rm_getVersionStr (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RM_H_ */
+
diff --git a/rm_osal.h b/rm_osal.h
new file mode 100644 (file)
index 0000000..c41032d
--- /dev/null
+++ b/rm_osal.h
@@ -0,0 +1,283 @@
+/**
+ *   @file  rm_osal.h
+ *
+ *   @brief   
+ *      This is the sample OS Adaptation layer which is used by the RM low level
+ *      driver. The OSAL layer can be ported in either of the following 
+ *      manners to a native OS:
+ *
+ *      <b> Approach 1: </b>
+ *      @n  Use Prebuilt Libraries
+ *           - Ensure that the provide an implementation of all 
+ *             Osal_XXX API for their native OS.
+ *           - Link the prebuilt libraries with their application.
+ *           - Refer to the "example" directory for an example of this
+ *       @n <b> Pros: </b>
+ *           - Customers can reuse prebuilt TI provided libraries
+ *       @n <b> Cons: </b>
+ *           - Level of indirection in the API to get to the actual OS call
+ *              
+ *      <b> Approach 2: </b>
+ *      @n  Rebuilt Library 
+ *           - Create a copy of this file and modify it to directly 
+ *             inline the native OS calls
+ *           - Rebuild the RM low level drivver library; ensure that the Include 
+ *             path points to the directory where the copy of this file 
+ *             has been provided.
+ *           - Please refer to the "test" directory for an example of this 
+ *       @n <b> Pros: </b>
+ *           - Optimizations can be done to remove the level of indirection
+ *       @n <b> Cons: </b>
+ *           - RM LLD Libraries need to be rebuilt by the customer.
+ *
+ *  \par
+ *  NOTE:
+ *      (C) Copyright 2012 Texas Instruments, Inc.
+ * 
+ *  Redistribution and use in source and binary forms, with or without 
+ *  modification, are permitted provided that the following conditions 
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the   
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+#ifndef __RM_OSAL_H__
+#define __RM_OSAL_H__
+
+/** @addtogroup RM_LLD_OSAL
+ @{ */
+
+/**********************************************************************
+ ************************* Extern Declarations ************************
+ **********************************************************************/
+
+/* #include <string.h> is here because there used to be 
+ * memcpy/memset prototypes here.  This #include prevents warnings in 
+ * other code that unintentionally worked because of these prototypes
+ */
+#include <string.h>
+
+extern void* Osal_rmMalloc (uint32_t num_bytes);
+extern void Osal_rmFree (void *ptr, uint32_t size);
+extern void* Osal_rmCsEnter (void);
+extern void Osal_rmCsExit (void *CsHandle);
+extern void* Osal_rmMtCsEnter (void);
+extern void Osal_rmMtCsExit (void *CsHandle);
+extern void Osal_rmLog (char *fmt, ... );
+extern void Osal_rmBeginMemAccess (void *ptr, uint32_t size);
+extern void Osal_rmEndMemAccess (void *ptr, uint32_t size);
+
+/**
+ * @brief   The macro is used by the RM LLD to allocate memory of specified
+ * size
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void* Osal_rmMalloc (uint32_t numBytes)
+    @endverbatim
+ *      
+ *  <b> Parameter </b>
+ *  @n  Number of bytes to be allocated
+ *
+ *  <b> Return Value </b>
+ *  @n  Pointer to the allocated block size
+ */
+
+#define Rm_osalMalloc             Osal_rmMalloc
+
+/**
+ * @brief   The macro is used by the RM LLD to free a allocated block of 
+ * memory 
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void Osal_rmFree (void *ptr, uint32_t size)
+    @endverbatim
+ *      
+ *  <b> Parameter </b>
+ *  @n  Pointer to the block of memory to be cleaned up.
+ *  @n  Size of the allocated memory which is being freed.
+ *
+ *  <b> Return Value </b>
+ *  @n  Not applicable.
+ */
+
+#define Rm_osalFree               Osal_rmFree
+
+/**
+ * @brief   The macro is used by the RM LLD to provide critical sections to 
+ * protect global and shared variables from
+ *
+ *      access from multiple cores 
+ *      and 
+ *      access from multiple threads on single core
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void* Osal_rmCsEnter (void)
+    @endverbatim
+ *      
+ *  <b> Parameter </b>
+ *  @n  None.
+ *
+ *  <b> Return Value </b>
+ *  @n  Handle used to lock critical section.
+ */
+#define Rm_osalCsEnter            Osal_rmCsEnter
+
+/**
+ * @brief   The macro is used by the RM LLD to exit a critical section 
+ *      protected using Osal_rmCsEnter() API.
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void Osal_rmCsExit (void *CsHandle)
+    @endverbatim
+ *      
+ *  <b> Parameter </b>
+ *  @n  Handle for unlocking critical section.
+ *
+ *  <b> Return Value </b>
+ *  @n  Not applicable.
+ */
+#define Rm_osalCsExit             Osal_rmCsExit
+
+/**
+ * @brief   The macro is used by the RM LLD to provide critical sections to 
+ * protect global and shared variables from
+ *
+ *      access from multiple threads on single core
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void* Osal_rmMtCsEnter (void)
+    @endverbatim
+ *      
+ *  <b> Parameter </b>
+ *  @n  None.
+ *
+ *  <b> Return Value </b>
+ *  @n  Handle used to lock critical section.
+ */
+#define Rm_osalMtCsEnter          Osal_rmMtCsEnter
+
+/**
+ * @brief   The macro is used by the RM LLD to exit a critical section 
+ *      protected using Osal_rmMtCsEnter() API.
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void Osal_rmMtCsExit (void *CsHandle)
+    @endverbatim
+ *      
+ *  <b> Parameter </b>
+ *  @n  Handle for unlocking critical section.
+ *
+ *  <b> Return Value </b>
+ *  @n  Not applicable.
+ */
+#define Rm_osalMtCsExit           Osal_rmMtCsExit
+
+/**
+ * @brief   The macro is used by the RM LLD to log various 
+ * messages. 
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void Osal_rmLog( char *fmt, ... ) 
+    @endverbatim
+ *
+ *  <b> Parameter </b>
+ *  @n  printf-style format string 
+ *
+ *  <b> Return Value </b>
+ *  @n  Not applicable.
+ */
+#define Rm_osalLog                Osal_rmLog
+
+/**
+ * @brief   The macro is used by the RM LLD to indicate that a block
+ * of memory is about to be accessed. If the memory block is cached then
+ * this indicates that the application would need to ensure that the cache
+ * is updated with the data from the actual memory.
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void Osal_rmBeginMemAccess (void *ptr, uint32_t size) 
+    @endverbatim
+ *
+ *  <b> Parameter </b>
+ *  @n  Address of memory block.
+ *  @n  Size of memory block.
+ *
+ *  <b> Return Value </b>
+ *  @n  Not applicable.
+ */
+#define Rm_osalBeginMemAccess     Osal_rmBeginMemAccess
+
+/**
+ * @brief   The macro is used by the RM LLD to indicate that the block of 
+ * memory has finished being accessed. If the memory block is cached then the 
+ * application would need to ensure that the contents of the cache are updated
+ * immediately to the actual memory.
+ *
+ * <b> Prototype: </b>
+ *  The following is the C prototype for the expected OSAL API.
+ *
+ *  @verbatim
+       void Osal_rmEndMemAccess (void *ptr, uint32_t size) 
+    @endverbatim
+ *
+ *  <b> Parameter </b>
+ *  @n  Address of memory block.
+ *  @n  Size of memory block.
+ *
+ *  <b> Return Value </b>
+ *  @n  Not applicable.
+ */
+#define Rm_osalEndMemAccess       Osal_rmEndMemAccess
+
+/**
+@}
+*/
+#endif /* __RM_OSAL_H__ */
+
similarity index 96%
rename from rm_public_lld.h
rename to rm_public.h
index 5b4ef35c7916576f0c8b8d88098e26b2cd810cb4..511ac5a876d06667a166d5df76c27bf5129e0060 100644 (file)
-/**\r
- *   @file  rm_public_lld.h\r
- *\r
- *   @brief   \r
- *      This is the RM LLD include file for other LLDs.\r
- *\r
- *  \par\r
- *  ============================================================================\r
- *  @n   (C) Copyright 2012, Texas Instruments, Inc.\r
- * \r
- *  Redistribution and use in source and binary forms, with or without \r
- *  modification, are permitted provided that the following conditions \r
- *  are met:\r
- *\r
- *    Redistributions of source code must retain the above copyright \r
- *    notice, this list of conditions and the following disclaimer.\r
- *\r
- *    Redistributions in binary form must reproduce the above copyright\r
- *    notice, this list of conditions and the following disclaimer in the \r
- *    documentation and/or other materials provided with the   \r
- *    distribution.\r
- *\r
- *    Neither the name of Texas Instruments Incorporated nor the names of\r
- *    its contributors may be used to endorse or promote products derived\r
- *    from this software without specific prior written permission.\r
- *\r
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- *  \par\r
-*/\r
-\r
-#ifndef RM_PUBLIC_LLD_H_\r
-#define RM_PUBLIC_LLD_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-/* QMSS type include */\r
-#include <ti/drv/qmss/qmss_qm.h>\r
-\r
-/* CPPI type include */\r
-#include <ti/csl/csl_cppi.h>\r
-\r
-/**\r
-@addtogroup RM_LLD_SYMBOL\r
-@{\r
-*/\r
-\r
-/** RM Permission Return And Error Codes */\r
-/** RM LLD Permission Approved Base */\r
-#define RM_APPROVED_BASE 0\r
-/** Resource initialization permission approved */\r
-#define RM_INIT_PERMISSION_APPROVED  (RM_APPROVED_BASE+1)\r
-/** Resource usage permission approved */\r
-#define RM_USE_PERMISSION_APPROVED  (RM_APPROVED_BASE+2)\r
-\r
-/** RM LLD Permission Denied Base */\r
-#define RM_DENIED_BASE (-64)\r
-/** Resource initialization permission denied */\r
-#define RM_INIT_PERMISSION_DENIED  (RM_DENIED_BASE-1)\r
-/** Resource usage permission denied */\r
-#define RM_USE_PERMISSION_DENIED  (RM_DENIED_BASE-2)\r
-\r
-/**\r
-@}\r
-*/\r
-\r
-/**\r
-@addtogroup RM_LLD_ENUM\r
-@{\r
-*/\r
-\r
-/** \r
- * @brief LLD resource type\r
- */\r
-typedef enum\r
-{\r
-    /** QMSS Firmware Type */\r
-    Rm_resource_QMSS_FIRMWARE_PDSP = 0,\r
-    /** QMSS Queue Type */\r
-    Rm_resource_QMSS_QUEUE,\r
-    /** QMSS Memory Region Type */\r
-    Rm_resource_QMSS_MEMORY_REGION,\r
-    /** QMSS Linking RAM Control Type */\r
-    Rm_resource_QMSS_LINKING_RAM_CONTROL,\r
-    /** QMSS Linking RAM Type */\r
-    Rm_resource_QMSS_LINKING_RAM,\r
-    /** QMSS Accumulator Channel Type */\r
-    Rm_resource_QMSS_ACCUM_CH,\r
-    /** QMSS QOS PDSP Timer */\r
-    Rm_resource_QMSS_QOS_TIMER,\r
-    /** QMSS QOS Cluster Type */\r
-    Rm_resource_QMSS_QOS_CLUSTER,\r
-    /** QMSS QOS Queue Type */\r
-    Rm_resource_QMSS_QOS_QUEUE,\r
-    /** CPPI Transmit Channel Type */\r
-    Rm_resource_CPPI_TX_CH,\r
-    /** CPPI Receive Channel Type */\r
-    Rm_resource_CPPI_RX_CH,\r
-    /** CPPI Receive Flow Type */\r
-    Rm_resource_CPPI_RX_FLOW,\r
-    /** PA Firmware Type */\r
-    Rm_resource_PA_FIRMWARE,\r
-    /** PA LUT Type */\r
-    Rm_resource_PA_LUT\r
-}Rm_ResourceType;\r
-\r
-/**\r
-@}\r
-*/\r
-\r
-/** @addtogroup RM_LLD_DATASTRUCT\r
-@{ \r
-*/\r
-\r
-/** \r
- * @brief Structure specifying the Linking RAM start and end indices\r
- */\r
-typedef struct\r
-{\r
-    uint32_t linkRamStartIndex;\r
-    uint32_t linkRamEndIndex;\r
-} Rm_ResourceLinkRamInfo;\r
-\r
-/** \r
- * @brief Structure specifying the CPPI rx channel, tx channel, and flow ID information\r
- */\r
-typedef struct\r
-{\r
-    Cppi_CpDma dmaNum;\r
-    int32_t cppiChNumOrFlowId;\r
-} Rm_ResourceCpDmaInfo;\r
-\r
-/** \r
- * @brief Structure specifying the LLD resource to have permissions checked by RM\r
- */\r
-typedef struct\r
-{\r
-    /** LLD resource type to be checked */\r
-    Rm_ResourceType resourceType;\r
-    \r
-    /** Resource parameters union. */\r
-    union\r
-    {\r
-        /** QMSS Resource Data */\r
-        uint16_t pdspNum;\r
-        int queNum;\r
-        Qmss_MemRegion memRegion;\r
-        Rm_ResourceLinkRamInfo linkRamData;\r
-        uint8_t accumCh;\r
-        uint32_t qosCluster;\r
-        uint32_t qosQueue;        \r
-\r
-        /** CPPI Resource Data */\r
-        Rm_ResourceCpDmaInfo cpDmaData;\r
-\r
-        /** PA Resource Data */\r
-        int32_t lutEntry;\r
-    } res_info;\r
-} Rm_ResourceInfo;\r
-\r
-/** \r
- * @brief RM return result\r
- */\r
-typedef int32_t   Rm_Result;\r
-\r
-/** \r
- * @brief Structure of LLD function callouts for permissions checks\r
- */\r
-typedef struct\r
-{\r
-    /** Init permissions check function */\r
-    Rm_Result  (*rmInitPermissionsCheck)(Rm_ResourceInfo *resourceData);\r
-    /** Use permissions check function */\r
-    Rm_Result  (*rmUsePermissionsCheck)(Rm_ResourceInfo *resourceData); \r
-}Rm_LldPermCallouts;\r
-\r
-/** \r
-@} \r
-*/\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* RM_PUBLIC_LLD_H_ */\r
-\r
+/**
+ *   @file  rm_public_lld.h
+ *
+ *   @brief   
+ *      This is the RM LLD include file for other LLDs.
+ *
+ *  \par
+ *  ============================================================================
+ *  @n   (C) Copyright 2012, Texas Instruments, Inc.
+ * 
+ *  Redistribution and use in source and binary forms, with or without 
+ *  modification, are permitted provided that the following conditions 
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the   
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+
+#ifndef RM_PUBLIC_LLD_H_
+#define RM_PUBLIC_LLD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* QMSS type include */
+#include <ti/drv/qmss/qmss_qm.h>
+
+/* CPPI type include */
+#include <ti/csl/csl_cppi.h>
+
+/**
+@addtogroup RM_LLD_SYMBOL
+@{
+*/
+
+/** RM Permission Return And Error Codes */
+/** RM LLD Permission Approved Base */
+#define RM_APPROVED_BASE 0
+/** Resource initialization permission approved */
+#define RM_INIT_PERMISSION_APPROVED  (RM_APPROVED_BASE+1)
+/** Resource usage permission approved */
+#define RM_USE_PERMISSION_APPROVED  (RM_APPROVED_BASE+2)
+
+/** RM LLD Permission Denied Base */
+#define RM_DENIED_BASE (-64)
+/** Resource initialization permission denied */
+#define RM_INIT_PERMISSION_DENIED  (RM_DENIED_BASE-1)
+/** Resource usage permission denied */
+#define RM_USE_PERMISSION_DENIED  (RM_DENIED_BASE-2)
+
+/**
+@}
+*/
+
+/**
+@addtogroup RM_LLD_ENUM
+@{
+*/
+
+/** 
+ * @brief LLD resource type
+ */
+typedef enum
+{
+    /** QMSS Firmware Type */
+    Rm_resource_QMSS_FIRMWARE_PDSP = 0,
+    /** QMSS Queue Type */
+    Rm_resource_QMSS_QUEUE,
+    /** QMSS Memory Region Type */
+    Rm_resource_QMSS_MEMORY_REGION,
+    /** QMSS Linking RAM Control Type */
+    Rm_resource_QMSS_LINKING_RAM_CONTROL,
+    /** QMSS Linking RAM Type */
+    Rm_resource_QMSS_LINKING_RAM,
+    /** QMSS Accumulator Channel Type */
+    Rm_resource_QMSS_ACCUM_CH,
+    /** QMSS QOS PDSP Timer */
+    Rm_resource_QMSS_QOS_TIMER,
+    /** QMSS QOS Cluster Type */
+    Rm_resource_QMSS_QOS_CLUSTER,
+    /** QMSS QOS Queue Type */
+    Rm_resource_QMSS_QOS_QUEUE,
+    /** CPPI Transmit Channel Type */
+    Rm_resource_CPPI_TX_CH,
+    /** CPPI Receive Channel Type */
+    Rm_resource_CPPI_RX_CH,
+    /** CPPI Receive Flow Type */
+    Rm_resource_CPPI_RX_FLOW,
+    /** PA Firmware Type */
+    Rm_resource_PA_FIRMWARE,
+    /** PA LUT Type */
+    Rm_resource_PA_LUT
+}Rm_ResourceType;
+
+/**
+@}
+*/
+
+/** @addtogroup RM_LLD_DATASTRUCT
+@{ 
+*/
+
+/** 
+ * @brief Structure specifying the Linking RAM start and end indices
+ */
+typedef struct
+{
+    uint32_t linkRamStartIndex;
+    uint32_t linkRamEndIndex;
+} Rm_ResourceLinkRamInfo;
+
+/** 
+ * @brief Structure specifying the CPPI rx channel, tx channel, and flow ID information
+ */
+typedef struct
+{
+    Cppi_CpDma dmaNum;
+    int32_t cppiChNumOrFlowId;
+} Rm_ResourceCpDmaInfo;
+
+/** 
+ * @brief Structure specifying the LLD resource to have permissions checked by RM
+ */
+typedef struct
+{
+    /** LLD resource type to be checked */
+    Rm_ResourceType resourceType;
+    
+    /** Resource parameters union. */
+    union
+    {
+        /** QMSS Resource Data */
+        uint16_t pdspNum;
+        int queNum;
+        Qmss_MemRegion memRegion;
+        Rm_ResourceLinkRamInfo linkRamData;
+        uint8_t accumCh;
+        uint32_t qosCluster;
+        uint32_t qosQueue;        
+
+        /** CPPI Resource Data */
+        Rm_ResourceCpDmaInfo cpDmaData;
+
+        /** PA Resource Data */
+        int32_t lutEntry;
+    } res_info;
+} Rm_ResourceInfo;
+
+/** 
+ * @brief RM return result
+ */
+typedef int32_t   Rm_Result;
+
+/** 
+ * @brief Structure of LLD function callouts for permissions checks
+ */
+typedef struct
+{
+    /** Init permissions check function */
+    Rm_Result  (*rmInitPermissionsCheck)(Rm_ResourceInfo *resourceData);
+    /** Use permissions check function */
+    Rm_Result  (*rmUsePermissionsCheck)(Rm_ResourceInfo *resourceData); 
+}Rm_LldPermCallouts;
+
+/** 
+@} 
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RM_PUBLIC_LLD_H_ */
+
diff --git a/rmver.h b/rmver.h
deleted file mode 100644 (file)
index e3be464..0000000
--- a/rmver.h
+++ /dev/null
@@ -1,68 +0,0 @@
-#ifndef _RMVER_H
-#define _RMVER_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* ============================================================= */
-/**
- *   @file  rmver.h
- *
- *   path  ti/drv/rm/rmver.h
- *
- *   @brief  Resource Manager LLD Version Definitions
- *
- *  ============================================================
- *  Copyright (c) Texas Instruments Incorporated 2009-2012
- * 
- *  Redistribution and use in source and binary forms, with or without 
- *  modification, are permitted provided that the following conditions 
- *  are met:
- *
- *    Redistributions of source code must retain the above copyright 
- *    notice, this list of conditions and the following disclaimer.
- *
- *    Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the 
- *    documentation and/or other materials provided with the   
- *    distribution.
- *
- *    Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
-*/
-
-/**
- * @brief   This is the RM LLD Version. Versions numbers are encoded in the following 
- * format:
- *  0xAABBCCDD -> Arch (AA); API Changes (BB); Major (CC); Minor (DD)
- */
-#define RM_LLD_VERSION_ID                   (0x0100000B)
-
-/**
- * @brief   This is the version string which describes the RM LLD along with the
- * date and build information.
- */
-#define RM_LLD_VERSION_STR                  "RM LLD Revision: 01.00.00.11"
-
-
-#ifdef __cplusplus
-}
-#endif
-  
-
-#endif  /* _RMVER_H */
index 81d8837e0e0768c8d3b2f00080ca81b6ce0209c3..cc9f1a9ca7d2ea32d7f3ca5410cb4a27c99b471d 100644 (file)
 \r
 IF DEFINED PARTNO GOTO partno_defined\r
 @REM Configure the Part Number\r
-set PARTNO=c6678\r
+set PARTNO=TCI6614\r
 :partno_Defined\r
 \r
 IF DEFINED PDK_INSTALL_PATH GOTO pdk_defined\r
-set PDK_INSTALL_PATH=c:/Program Files/Texas Instruments/pdk_c6678_1_0_0_17/packages\r
+set PDK_INSTALL_PATH=C:/Program Files/Texas Instruments/pdk_TCI6614_1_0_0_0/packages\r
 :pdk_defined\r
 \r
 @REM ---------------------------------\r
 @REM Enabling MINI PACKAGE to be Built\r
 @REM ---------------------------------\r
-set MINI_PACKAGE=OFF\r
+set MINI_PACKAGE=ON\r
 @echo MINI PACKAGE is set to %MINI_PACKAGE%\r
 \r
 @REM This is the base location for the various tools. \r
diff --git a/setupenv.sh b/setupenv.sh
new file mode 100644 (file)
index 0000000..eff5144
--- /dev/null
@@ -0,0 +1,14 @@
+#!/bin/sh
+
+# Output directory for generated libraries
+export LIBDIR=./lib
+
+# PDK install path
+export PDK_INSTALL_PATH=/sim/scratch_a0875039/user-space/pdk
+
+# ARM cross tool executable path
+export CROSS_TOOL_INSTALL_PATH=/apps/codesourcery/arm-2009q1/bin
+
+# ARM cross tool prefix 
+export CROSS_TOOL_PRFX=arm-none-linux-gnueabi-
+
diff --git a/src/Module.xs b/src/Module.xs
new file mode 100644 (file)
index 0000000..a9b672f
--- /dev/null
@@ -0,0 +1,46 @@
+/******************************************************************************
+ * FILE PURPOSE: RM LLD Source module specification file.
+ ******************************************************************************
+ * FILE NAME: module.xs
+ *
+ * DESCRIPTION: 
+ *  This file contains the module specification for the RM LLD source directory.
+ *
+ * Copyright (C) 2012, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Load the library utility. */
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");
+
+var rmlldFile = [
+    "src/rm.c",
+];
+
+/**************************************************************************
+ * FUNCTION NAME : modBuild
+ **************************************************************************
+ * DESCRIPTION   :
+ *  The function is used to build all the components of the RM library
+ **************************************************************************/
+function modBuild() 
+{
+    /* Build the libraries for all the targets specified. */
+    for (var targets=0; targets < Build.targets.length; targets++)
+    {
+        var libOptions = {
+            incs: lldIncludePath, 
+        };
+        
+        libUtility.buildLibrary (libOptions, "ti.drv.rm", Build.targets[targets], rmlldFile);
+    }
+
+    /* Add all the .c files to the release package. */
+    var testFiles = libUtility.listAllFiles (".c", "src", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+
+    /* Add all the .h files to the release package. */
+    var testFiles = libUtility.listAllFiles (".h", "src", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+}
diff --git a/src/rm.c b/src/rm.c
new file mode 100644 (file)
index 0000000..607eab1
--- /dev/null
+++ b/src/rm.c
@@ -0,0 +1,1442 @@
+/**
+ *   @file  rm.c
+ *
+ *   @brief   
+ *      This is the Resource Manager Low Level Driver file.
+ *
+ *  \par
+ *  ============================================================================
+ *  @n   (C) Copyright 2012, Texas Instruments, Inc.
+ * 
+ *  Redistribution and use in source and binary forms, with or without 
+ *  modification, are permitted provided that the following conditions 
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the   
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  \par
+*/
+
+/* c99 include */
+#include <stdint.h>
+#include <stdlib.h>
+
+/* RM includes */
+#include <ti/drv/rm/rm.h>
+#include <ti/drv/rm/rm_public_lld.h>
+#include <ti/drv/rm/resource_table_defs.h>
+#include <ti/drv/rm/include/rm_pvt.h>
+
+/* RM OSAL layer */
+#include <rm_osal.h>
+
+/* CSL includes */
+#include <ti/csl/csl_qm_queue.h>
+
+/**********************************************************************
+ ************************** Globals ***********************************
+ **********************************************************************/
+
+/* Place QMSS PDSP permissions array */
+#pragma DATA_SECTION (rmQmssPdspFirmwarePerms, ".rm");
+#pragma DATA_ALIGN (rmQmssPdspFirmwarePerms, 128)
+Rm_Perms rmQmssPdspFirmwarePerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_FIRMWARE_PDSPS, Rm_Perms)];
+
+/* Place QMSS queue permissions array */
+#pragma DATA_SECTION (rmQmssQueuePerms, ".rm");
+#pragma DATA_ALIGN (rmQmssQueuePerms, 128)
+Rm_Perms rmQmssQueuePerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_QUEUES, Rm_Perms)];
+
+/* Place QMSS memory region permissions array */
+#pragma DATA_SECTION (rmQmssMemRegionPerms, ".rm");
+#pragma DATA_ALIGN (rmQmssMemRegionPerms, 128)
+Rm_Perms rmQmssMemRegionPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_MEM_REGIONS, Rm_Perms)];
+
+/* Place QMSS Linking RAM permissions array */
+#pragma DATA_SECTION (rmQmssLinkingRamPerms, ".rm");
+#pragma DATA_ALIGN (rmQmssLinkingRamPerms, 128)
+Rm_qmssLinkingRamPerms rmQmssLinkingRamPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_LINKING_RAM_RANGES, Rm_qmssLinkingRamPerms)];
+
+/* Place QMSS accumulator channel permissions array */
+#pragma DATA_SECTION (rmQmssAccumChPerms, ".rm");
+#pragma DATA_ALIGN (rmQmssAccumChPerms, 128)
+Rm_Perms rmQmssAccumChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_ACCUM_CH, Rm_Perms)];
+
+/* Place QMSS QOS cluster permissions array */
+#pragma DATA_SECTION (rmQmssQosClusterPerms, ".rm");
+#pragma DATA_ALIGN (rmQmssQosClusterPerms, 128)
+Rm_Perms rmQmssQosClusterPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_QOS_CLUSTER, Rm_Perms)];
+
+/* Place QMSS QOS queue permissions array */
+#pragma DATA_SECTION (rmQmssQosQueuePerms, ".rm");
+#pragma DATA_ALIGN (rmQmssQosQueuePerms, 128)
+Rm_Perms rmQmssQosQueuePerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_QMSS_QOS_QUEUES, Rm_Perms)];
+
+/* Place CPPI SRIO TX channel permissions array */
+#pragma DATA_SECTION (rmCppiSrioTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiSrioTxChPerms, 128)
+Rm_Perms rmCppiSrioTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_SRIO_TX_CH, Rm_Perms)];
+
+#ifdef QMSS_MAX_AIF_QUEUE
+/* Place CPPI AIF TX channel permissions array */
+#pragma DATA_SECTION (rmCppiAifTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiAifTxChPerms, 128)
+Rm_Perms rmCppiAifTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_AIF_TX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_FFTC_A_QUEUE
+/* Place CPPI FFTC A TX channel permissions array */
+#pragma DATA_SECTION (rmCppiFftcATxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcATxChPerms, 128)
+Rm_Perms rmCppiFftcATxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_A_TX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_FFTC_B_QUEUE
+/* Place CPPI FFTC B TX channel permissions array */
+#pragma DATA_SECTION (rmCppiFftcBTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcBTxChPerms, 128)
+Rm_Perms rmCppiFftcBTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_B_TX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_PASS_QUEUE
+/* Place CPPI PASS TX channel permissions array */
+#pragma DATA_SECTION (rmCppiPassTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiPassTxChPerms, 128)
+Rm_Perms rmCppiPassTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_PASS_TX_CH, Rm_Perms)];
+#endif
+
+/* Place CPPI QMSS TX channel permissions array */
+#pragma DATA_SECTION (rmCppiQmssTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiQmssTxChPerms, 128)
+Rm_Perms rmCppiQmssTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_QMSS_TX_CH, Rm_Perms)];
+
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+/* Place CPPI FFTC C TX channel permissions array */
+#pragma DATA_SECTION (rmCppiFftcCTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcCTxChPerms, 128)
+Rm_Perms rmCppiFftcCTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_C_TX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_BCP_QUEUE
+/* Place CPPI BCP TX channel permissions array */
+#pragma DATA_SECTION (rmCppiBcpTxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiBcpTxChPerms, 128)
+Rm_Perms rmCppiBcpTxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_BCP_TX_CH, Rm_Perms)];
+#endif
+
+/* Place CPPI SRIO RX channel permissions array */
+#pragma DATA_SECTION (rmCppiSrioRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiSrioRxChPerms, 128)
+Rm_Perms rmCppiSrioRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_SRIO_RX_CH, Rm_Perms)];
+
+#ifdef QMSS_MAX_AIF_QUEUE
+/* Place CPPI AIF RX channel permissions array */
+#pragma DATA_SECTION (rmCppiAifRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiAifRxChPerms, 128)
+Rm_Perms rmCppiAifRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_AIF_RX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_FFTC_A_QUEUE
+/* Place CPPI FFTC A RX channel permissions array */
+#pragma DATA_SECTION (rmCppiFftcARxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcARxChPerms, 128)
+Rm_Perms rmCppiFftcARxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_A_RX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_FFTC_B_QUEUE
+/* Place CPPI FFTC B RX channel permissions array */
+#pragma DATA_SECTION (rmCppiFftcBRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcBRxChPerms, 128)
+Rm_Perms rmCppiFftcBRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_B_RX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_PASS_QUEUE
+/* Place CPPI PASS RX channel permissions array */
+#pragma DATA_SECTION (rmCppiPassRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiPassRxChPerms, 128)
+Rm_Perms rmCppiPassRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_PASS_RX_CH, Rm_Perms)];
+#endif
+
+/* Place CPPI QMSS RX channel permissions array */
+#pragma DATA_SECTION (rmCppiQmssRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiQmssRxChPerms, 128)
+Rm_Perms rmCppiQmssRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_QMSS_RX_CH, Rm_Perms)];
+
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+/* Place CPPI FFTC C RX channel permissions array */
+#pragma DATA_SECTION (rmCppiFftcCRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcCRxChPerms, 128)
+Rm_Perms rmCppiFftcCRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_C_RX_CH, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_BCP_QUEUE
+/* Place CPPI BCP RX channel permissions array */
+#pragma DATA_SECTION (rmCppiBcpRxChPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiBcpRxChPerms, 128)
+Rm_Perms rmCppiBcpRxChPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_BCP_RX_CH, Rm_Perms)];
+#endif
+
+/* Place CPPI SRIO flow permissions array */
+#pragma DATA_SECTION (rmCppiSrioFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiSrioFlowPerms, 128)
+Rm_Perms rmCppiSrioFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_SRIO_FLOW, Rm_Perms)];
+
+#ifdef QMSS_MAX_AIF_QUEUE
+/* Place CPPI AIF flow permissions array */
+#pragma DATA_SECTION (rmCppiAifFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiAifFlowPerms, 128)
+Rm_Perms rmCppiAifFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_AIF_FLOW, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_FFTC_A_QUEUE
+/* Place CPPI FFTC A flow permissions array */
+#pragma DATA_SECTION (rmCppiFftcAFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcAFlowPerms, 128)
+Rm_Perms rmCppiFftcAFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_A_FLOW, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_FFTC_B_QUEUE
+/* Place CPPI FFTC B flow permissions array */
+#pragma DATA_SECTION (rmCppiFftcBFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcBFlowPerms, 128)
+Rm_Perms rmCppiFftcBFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_B_FLOW, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_PASS_QUEUE
+/* Place CPPI PASS flow permissions array */
+#pragma DATA_SECTION (rmCppiPassFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiPassFlowPerms, 128)
+Rm_Perms rmCppiPassFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_PASS_FLOW, Rm_Perms)];
+#endif
+
+/* Place CPPI QMSS flow permissions array */
+#pragma DATA_SECTION (rmCppiQmssFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiQmssFlowPerms, 128)
+Rm_Perms rmCppiQmssFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_QMSS_FLOW, Rm_Perms)];
+
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+/* Place CPPI FFTC C flow permissions array */
+#pragma DATA_SECTION (rmCppiFftcCFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiFftcCFlowPerms, 128)
+Rm_Perms rmCppiFftcCFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_FFTC_C_FLOW, Rm_Perms)];
+#endif
+
+#ifdef QMSS_MAX_BCP_QUEUE
+/* Place CPPI BCP flow permissions array */
+#pragma DATA_SECTION (rmCppiBcpFlowPerms, ".rm");
+#pragma DATA_ALIGN (rmCppiBcpFlowPerms, 128)
+Rm_Perms rmCppiBcpFlowPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_CPPI_BCP_FLOW, Rm_Perms)];
+#endif
+
+/* Place PA lookup table permissions array */
+#pragma DATA_SECTION (rmPaLutPerms, ".rm");
+#pragma DATA_ALIGN (rmPaLutPerms, 128)
+Rm_Perms rmPaLutPerms[RM_ALIGN_PERMISSIONS_ARRAY(RM_PA_LUT, Rm_Perms)];
+
+/* Rm_init/Rm_start synchronization object.  Initialized to 0. */
+#pragma DATA_SECTION (rmGSyncObj, ".rm");
+#pragma DATA_ALIGN (rmGSyncObj, 128)
+Rm_Sync_Obj rmGSyncObj = 
+{
+    {
+        RM_PERMISSION_TABLE_NOT_VALID,
+    }
+};
+
+/* Create, populate, and place RM global permissions object */
+#pragma DATA_SECTION (rmGPermsObj, ".rm");
+#pragma DATA_ALIGN (rmGPermsObj, 128)
+Rm_GlobalPermissionsObj rmGPermsObj = 
+{
+    {
+        /* qmssPdspFirmwarePerms */
+        &rmQmssPdspFirmwarePerms[0],  
+        /* Pointer: qmssQueuePerms */
+        &rmQmssQueuePerms[0],
+        /* Pointer: qmssMemRegionPerms */
+        &rmQmssMemRegionPerms[0],
+        /* qmssLinkRamControlPerms */
+        {
+            0u,
+            0u,
+        },  
+        /* Pointer: qmssLinkRamPerms */
+        &rmQmssLinkingRamPerms[0],
+        /* Pointer: qmssAccumChPerms */
+        &rmQmssAccumChPerms[0], 
+        /* qmssQosPdspTimerPerms */
+        {
+            0u,
+            0u,
+        },  
+        /* Pointer: qmssQosClusterPerms */
+        &rmQmssQosClusterPerms[0],
+        /* Pointer: qmssQosQueuePerms */
+        &rmQmssQosQueuePerms[0],
+        /* Pointer array: cppiTxChPerms - Must be in same order as DMA objects */
+        {
+            { &rmCppiSrioTxChPerms[0], 
+#ifdef QMSS_MAX_AIF_QUEUE          
+               &rmCppiAifTxChPerms[0],
+#endif           
+#ifdef QMSS_MAX_FFTC_A_QUEUE           
+               &rmCppiFftcATxChPerms[0],
+#endif           
+#ifdef QMSS_MAX_FFTC_B_QUEUE           
+               &rmCppiFftcBTxChPerms[0],   
+#endif
+#ifdef QMSS_MAX_PASS_QUEUE
+               &rmCppiPassTxChPerms[0],
+#endif               
+               &rmCppiQmssTxChPerms[0],
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+               &rmCppiFftcCTxChPerms[0],
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+               &rmCppiBcpTxChPerms[0]
+#endif           
+            }
+        },
+        /* Pointer array: cppiRxChPerms - Must be in same order as DMA objects  */
+        {
+            { &rmCppiSrioRxChPerms[0], 
+#ifdef QMSS_MAX_AIF_QUEUE          
+               &rmCppiAifRxChPerms[0], 
+#endif           
+#ifdef QMSS_MAX_FFTC_A_QUEUE           
+               &rmCppiFftcARxChPerms[0],
+#endif           
+#ifdef QMSS_MAX_FFTC_B_QUEUE           
+               &rmCppiFftcBRxChPerms[0], 
+#endif           
+#ifdef QMSS_MAX_PASS_QUEUE
+               &rmCppiPassRxChPerms[0], 
+#endif               
+               &rmCppiQmssRxChPerms[0],
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+               &rmCppiFftcCRxChPerms[0],
+#endif              
+#ifdef QMSS_MAX_BCP_QUEUE
+               &rmCppiBcpRxChPerms[0]
+#endif           
+            }
+        },    
+        /* Pointer array: cppiFlowPerms - Must be in same order as DMA objects  */
+        {
+            { &rmCppiSrioFlowPerms[0], 
+#ifdef QMSS_MAX_AIF_QUEUE          
+               &rmCppiAifFlowPerms[0], 
+#endif           
+#ifdef QMSS_MAX_FFTC_A_QUEUE           
+               &rmCppiFftcAFlowPerms[0],
+#endif           
+#ifdef QMSS_MAX_FFTC_B_QUEUE           
+               &rmCppiFftcBFlowPerms[0],    
+#endif           
+#ifdef QMSS_MAX_PASS_QUEUE
+               &rmCppiPassFlowPerms[0], 
+#endif               
+               &rmCppiQmssFlowPerms[0],
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+               &rmCppiFftcCFlowPerms[0],
+#endif                     
+#ifdef QMSS_MAX_BCP_QUEUE
+               &rmCppiBcpFlowPerms[0]
+#endif           
+            }
+        },
+        /* paFirmwarePerms */
+        {
+            0u,
+            0u,
+        },  
+        /* Pointer: paLutPerms */
+        &rmPaLutPerms[0],
+    }
+};
+
+/** @brief Global Variable (should be local per DSP) containing LLD RM permission checkers */
+Rm_LldPermCallouts rmPermissionCheckers = 
+{
+    Rm_initPermissionChecker,
+    Rm_usePermissionChecker,
+};
+
+/** @brief Global Variable which describes the RM LLD Version Information */
+const char   rmLldVersionStr[] = RM_LLD_VERSION_STR ":" __DATE__  ":" __TIME__;
+
+/**********************************************************************
+ ********************** Internal Functions *********************************
+ **********************************************************************/
+
+/**
+ *  @b Description
+ *  @n  
+ *      Initialize the permission tables.  All resources are intialized to deny all initialization
+ *      and usage permissions.
+ *
+ */
+void Rm_permissionTableInit(void)
+{
+    uint16_t resourceIndex;
+    Rm_Perms *resArrayPtr;
+    uint16_t dmaNum;
+    uint16_t dmaTxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_TX_CH, 
+#ifdef QMSS_MAX_AIF_QUEUE      
+                                          RM_CPPI_AIF_TX_CH,
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_A_QUEUE                                                                       
+                                          RM_CPPI_FFTC_A_TX_CH, 
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_B_QUEUE                                                                       
+                                          RM_CPPI_FFTC_B_TX_CH, 
+#endif    
+#ifdef QMSS_MAX_PASS_QUEUE
+                                          RM_CPPI_PASS_TX_CH, 
+#endif
+                                          RM_CPPI_QMSS_TX_CH,
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+                                          RM_CPPI_FFTC_C_TX_CH,
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+                                          RM_CPPI_BCP_TX_CH
+#endif                                                                       
+                                         };
+    uint16_t dmaRxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_RX_CH,
+#ifdef QMSS_MAX_AIF_QUEUE      
+                                          RM_CPPI_AIF_RX_CH,
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_A_QUEUE                                                                       
+                                          RM_CPPI_FFTC_A_RX_CH, 
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_B_QUEUE                                                                       
+                                          RM_CPPI_FFTC_B_RX_CH, 
+#endif                                                               
+#ifdef QMSS_MAX_PASS_QUEUE
+                                          RM_CPPI_PASS_RX_CH, 
+#endif                                          
+                                          RM_CPPI_QMSS_RX_CH,
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+                                          RM_CPPI_FFTC_C_RX_CH,
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+                                          RM_CPPI_BCP_RX_CH
+#endif       
+                                         };
+    uint16_t dmaFlow[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_FLOW, 
+#ifdef QMSS_MAX_AIF_QUEUE      
+                                          RM_CPPI_AIF_FLOW,
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_A_QUEUE                                                                       
+                                          RM_CPPI_FFTC_A_FLOW, 
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_B_QUEUE                                                                       
+                                          RM_CPPI_FFTC_B_FLOW, 
+#endif                                                         
+#ifdef QMSS_MAX_PASS_QUEUE
+                                          RM_CPPI_PASS_FLOW, 
+#endif                                          
+                                          RM_CPPI_QMSS_FLOW,
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+                                          RM_CPPI_FFTC_C_FLOW,
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+                                          RM_CPPI_BCP_FLOW
+#endif       
+                                         };
+
+    /* QMSS Linking RAM Control */
+    rmGPermsObj.obj.qmssLinkRamControlPerms.initPerms = 0;
+    rmGPermsObj.obj.qmssLinkRamControlPerms.usePerms = 0;
+
+    /* QMSS QOS PDSP Timer */
+    rmGPermsObj.obj.qmssQosPdspTimerPerms.initPerms = 0;
+    rmGPermsObj.obj.qmssQosPdspTimerPerms.usePerms = 0;
+
+    /* PA Firmware */
+    rmGPermsObj.obj.paFirmwarePerms.initPerms = 0;
+    rmGPermsObj.obj.paFirmwarePerms.usePerms = 0;
+
+    /* Writeback the values that were initialized in the global object itself */
+    Rm_osalEndMemAccess ((void *) &rmGPermsObj, sizeof (Rm_GlobalPermissionsObj));
+
+    /* QMSS PDSP Firmware */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_FIRMWARE_PDSPS; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the qmssPdspFirmwarePerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssPdspFirmwarePerms, sizeof (Rm_Perms)*RM_QMSS_FIRMWARE_PDSPS);
+
+    /* QMSS queues */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_QUEUES; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssQueuePerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.qmssQueuePerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the qmssQueuePerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssQueuePerms, sizeof (Rm_Perms)*RM_QMSS_QUEUES);
+
+    /* QMSS memory regions */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_MEM_REGIONS; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssMemRegionPerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.qmssMemRegionPerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the qmssMemRegionPerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssMemRegionPerms, sizeof (Rm_Perms)*RM_QMSS_MEM_REGIONS);
+
+    /* QMSS Linking RAM */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_LINKING_RAM_RANGES; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].startIndex = RM_QMSS_LINKING_RAM_RANGE_INIT;
+        rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].endIndex = RM_QMSS_LINKING_RAM_RANGE_INIT;
+        rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].rangePerms.initPerms = 0;
+        rmGPermsObj.obj.qmssLinkRamPerms[resourceIndex].rangePerms.usePerms = 0;
+    }
+    /* Writeback the qmssLinkRamPerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssLinkRamPerms, sizeof (Rm_Perms)*RM_QMSS_LINKING_RAM_RANGES);
+
+    /* QMSS accumulator channels */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_ACCUM_CH; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssAccumChPerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.qmssAccumChPerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the qmssAccumChPerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssAccumChPerms, sizeof (Rm_Perms)*RM_QMSS_ACCUM_CH);
+
+    /* QMSS QOS Clusters */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_QOS_CLUSTER; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssQosClusterPerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.qmssQosClusterPerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the qmssQosClusterPerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssQosClusterPerms, sizeof (Rm_Perms)*RM_QMSS_QOS_CLUSTER);    
+
+    /* QMSS QOS Queues */
+    for (resourceIndex = 0; resourceIndex < RM_QMSS_QOS_QUEUES; resourceIndex++)
+    {
+        rmGPermsObj.obj.qmssQosQueuePerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.qmssQosQueuePerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the qmssQosQueuePerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.qmssQosQueuePerms, sizeof (Rm_Perms)*RM_QMSS_QOS_QUEUES);      
+
+    /* CPPI DMA transmit channels */
+    for (dmaNum = 0; dmaNum < RM_CPPI_MAX_DMAS; dmaNum++)
+    {
+        resArrayPtr = rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[dmaNum];
+        
+        for (resourceIndex = 0; resourceIndex < dmaTxCh[dmaNum]; resourceIndex++)
+        {
+            resArrayPtr[resourceIndex].initPerms = 0;
+            resArrayPtr[resourceIndex].usePerms = 0;
+        }
+
+        /* Writeback each of the transmit channel arrays  */
+        Rm_osalEndMemAccess ((void *) resArrayPtr, sizeof (Rm_Perms)*dmaTxCh[dmaNum]);
+    }
+
+    /* CPPI DMA receive channels */
+    for (dmaNum = 0; dmaNum < RM_CPPI_MAX_DMAS; dmaNum++)
+    {
+        resArrayPtr = rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[dmaNum];
+        
+        for (resourceIndex = 0; resourceIndex < dmaRxCh[dmaNum]; resourceIndex++)
+        {
+            resArrayPtr[resourceIndex].initPerms = 0;
+            resArrayPtr[resourceIndex].usePerms = 0;
+        }
+
+        /* Writeback each of the receive channel arrays */
+        Rm_osalEndMemAccess ((void *) resArrayPtr, sizeof (Rm_Perms)*dmaRxCh[dmaNum]);
+    }    
+
+    /* CPPI DMA flows */
+    for (dmaNum = 0; dmaNum < RM_CPPI_MAX_DMAS; dmaNum++)
+    {
+        resArrayPtr = rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[dmaNum];
+        
+        for (resourceIndex = 0; resourceIndex < dmaFlow[dmaNum]; resourceIndex++)
+        {
+            resArrayPtr[resourceIndex].initPerms = 0;
+            resArrayPtr[resourceIndex].usePerms = 0;
+        }
+
+        /* Writeback each of the flow arrays */
+        Rm_osalEndMemAccess ((void *) resArrayPtr, sizeof (Rm_Perms)*dmaFlow[dmaNum]);
+    }       
+
+    /* PA Lookup tables */
+    for (resourceIndex = 0; resourceIndex < RM_PA_LUT; resourceIndex++)
+    {
+        rmGPermsObj.obj.paLutPerms[resourceIndex].initPerms = 0;
+        rmGPermsObj.obj.paLutPerms[resourceIndex].usePerms = 0;
+    }
+    /* Writeback the paLutPerms array */
+    Rm_osalEndMemAccess ((void *) rmGPermsObj.obj.paLutPerms, sizeof (Rm_Perms)*RM_PA_LUT);
+    
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      Sets a list of entries in a permissions array to the specified permissions
+ *
+ *  @param[in]  resourceEntry
+ *      The resource entry from the application defined resource table containing
+ *      a range of resources and the permissions to assign to them.
+ *
+ *  @param[in]  rmPermsArray
+ *      The permissions array for the resource specified in the resourceEntry.
+ *     
+ *  @param[in]  len
+ *      Full length of permissions array for writeback after the permissions have been
+ *      transferred.
+ */
+void Rm_setTablePermissions (const Rm_Resource *resourceEntry, Rm_Perms *rmPermsArray, uint32_t len)
+{
+    uint32_t index;
+
+    /* Scan through the resource range filling in the specified permission */
+    for (index = resourceEntry->resourceStart; index < resourceEntry->resourceEnd + 1; index++)
+    {
+        rmPermsArray[index].initPerms = resourceEntry->resourceInitFlags;
+        rmPermsArray[index].usePerms  = resourceEntry->resourceUseFlags;
+    }
+
+    Rm_osalEndMemAccess ((void *)rmPermsArray, sizeof (Rm_Perms)* len);
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      Takes an application specified resource table as input and transfers all
+ *      resource permissions specified within into the internal resource
+ *      permission tables.  Upon completion of permission transfer a global
+ *      synchronization object is written to sync with slave cores.
+ *
+ *  @param[in]  rmResourceTable
+ *      Application defined resource table containing all resources that should
+ *      have permissions set for the DSPs
+ *
+ *  @retval
+ *      Success -   RM_OK
+ *  @retval
+ *      Failure -   RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED
+ */
+Rm_Result Rm_populatePermissionTable(const Rm_Resource *rmResourceTable)
+{
+    const Rm_Resource *resourceEntry;
+    uint16_t linkRamIndex;
+
+    /* Verify resource table can be read by verifying magic number is contained
+     * in first entry of the resource table */
+    resourceEntry = rmResourceTable;
+    
+    /* Invalidate the resource */
+    Rm_osalBeginMemAccess ((void *) resourceEntry, sizeof (Rm_Resource));
+    if (resourceEntry->resourceId != RM_RESOURCE_MAGIC_NUMBER)
+    {
+        return RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED;
+    }
+
+    /* Magic number is visible start parsing the resource table and transferring
+      * permissions to the internal permissions tables */
+
+    /* Parse resource table until last entry field is encountered */
+    while (resourceEntry->resourceId != RM_RESOURCE_FINAL_ENTRY)
+    {
+        /* Invalidate the resource */
+        Rm_osalBeginMemAccess ((void *) resourceEntry, sizeof (Rm_Resource));
+
+        /* Populate a permission table based on the resourceId */
+        switch (resourceEntry->resourceId)
+        {
+            case RM_RESOURCE_MAGIC_NUMBER:
+                break;     
+                
+            case RM_RESOURCE_QMSS_FIRMWARE_PDSP:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_FIRMWARE_PDSPS, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssPdspFirmwarePerms, RM_QMSS_FIRMWARE_PDSPS);
+                 break;
+
+            case RM_RESOURCE_QMSS_QUEUE:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_QUEUES, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssQueuePerms, RM_QMSS_QUEUES);
+                 break;
+
+            case RM_RESOURCE_QMSS_MEMORY_REGION:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_MEM_REGIONS, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssMemRegionPerms, RM_QMSS_MEM_REGIONS);
+                 break;
+                
+            case RM_RESOURCE_QMSS_LINKING_RAM_CONTROL:
+                rmGPermsObj.obj.qmssLinkRamControlPerms.initPerms = resourceEntry->resourceInitFlags;
+                rmGPermsObj.obj.qmssLinkRamControlPerms.usePerms  = resourceEntry->resourceUseFlags;
+                 break;
+                
+            case RM_RESOURCE_QMSS_LINKING_RAM:
+                /* Expect Linking RAM ranges to be presented in order */
+
+                /* Find next available unused Linking RAM permissions entry */
+                for (linkRamIndex = 0; linkRamIndex < RM_QMSS_LINKING_RAM_RANGES; linkRamIndex++)
+                {
+                    if ((rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].startIndex == RM_QMSS_LINKING_RAM_RANGE_INIT) &&
+                         (rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].endIndex == RM_QMSS_LINKING_RAM_RANGE_INIT))
+                    {
+                        RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_LINKING_RAM_RANGE_INIT, 
+                                        RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                        /* Populate the entry with the Linking RAM resource data */
+                        rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].startIndex = resourceEntry->resourceStart;
+                        rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].endIndex = resourceEntry->resourceEnd;
+                        rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].rangePerms.initPerms = resourceEntry->resourceInitFlags;
+                        rmGPermsObj.obj.qmssLinkRamPerms[linkRamIndex].rangePerms.usePerms  = resourceEntry->resourceUseFlags;
+
+                        Rm_osalEndMemAccess ((void *)&rmGPermsObj.obj.qmssLinkRamPerms[0], sizeof (Rm_Perms)* RM_QMSS_LINKING_RAM_RANGES);
+                        
+                        /* Leave search loop */
+                        break;
+                    }
+                }
+                 break;
+
+            case RM_RESOURCE_QMSS_ACCUMULATOR_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_ACCUM_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssAccumChPerms, RM_QMSS_ACCUM_CH);
+                 break;
+
+            case RM_RESOURCE_QMSS_QOS_PDSP_TIMER:
+                rmGPermsObj.obj.qmssQosPdspTimerPerms.initPerms = resourceEntry->resourceInitFlags;
+                rmGPermsObj.obj.qmssQosPdspTimerPerms.usePerms  = resourceEntry->resourceUseFlags;
+                 break;
+
+            case RM_RESOURCE_QMSS_QOS_CLUSTER:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_QOS_CLUSTER, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssQosClusterPerms, RM_QMSS_QOS_CLUSTER);
+                 break;             
+                
+            case RM_RESOURCE_QMSS_QOS_QUEUE:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_QMSS_QOS_QUEUES, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.qmssQosQueuePerms, RM_QMSS_QOS_QUEUES);
+                 break;                    
+
+            case RM_RESOURCE_CPPI_SRIO_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_SRIO_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_SRIO_DMA_ID], RM_CPPI_SRIO_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_SRIO_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_SRIO_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_SRIO_DMA_ID], RM_CPPI_SRIO_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_SRIO_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_SRIO_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_SRIO_DMA_ID], RM_CPPI_SRIO_FLOW);
+                 break;
+
+#ifdef QMSS_MAX_AIF_QUEUE
+            case RM_RESOURCE_CPPI_AIF_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_AIF_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_AIF_DMA_ID], RM_CPPI_AIF_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_AIF_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_AIF_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_AIF_DMA_ID], RM_CPPI_AIF_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_AIF_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_AIF_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_AIF_DMA_ID], RM_CPPI_AIF_FLOW);
+                 break;            
+#endif
+
+#ifdef QMSS_MAX_FFTC_A_QUEUE
+            case RM_RESOURCE_CPPI_FFTC_A_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_A_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_FFTC_A_DMA_ID], RM_CPPI_FFTC_A_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_FFTC_A_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_A_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_FFTC_A_DMA_ID], RM_CPPI_FFTC_A_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_FFTC_A_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_A_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_FFTC_A_DMA_ID], RM_CPPI_FFTC_A_FLOW);
+                 break;     
+#endif    
+
+#ifdef QMSS_MAX_FFTC_B_QUEUE
+            case RM_RESOURCE_CPPI_FFTC_B_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_B_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_FFTC_B_DMA_ID], RM_CPPI_FFTC_B_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_FFTC_B_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_B_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_FFTC_B_DMA_ID], RM_CPPI_FFTC_B_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_FFTC_B_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_B_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_FFTC_B_DMA_ID], RM_CPPI_FFTC_B_FLOW);
+                 break;       
+#endif                
+
+#ifdef QMSS_MAX_PASS_QUEUE
+            case RM_RESOURCE_CPPI_PASS_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_PASS_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_PASS_DMA_ID], RM_CPPI_PASS_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_PASS_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_PASS_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_PASS_DMA_ID], RM_CPPI_PASS_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_PASS_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_PASS_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_PASS_DMA_ID], RM_CPPI_PASS_FLOW);
+                 break;
+#endif                
+
+            case RM_RESOURCE_CPPI_QMSS_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_QMSS_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_QMSS_DMA_ID], RM_CPPI_QMSS_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_QMSS_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_QMSS_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_QMSS_DMA_ID], RM_CPPI_QMSS_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_QMSS_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_QMSS_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_QMSS_DMA_ID], RM_CPPI_QMSS_FLOW);
+                 break;
+
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+            case RM_RESOURCE_CPPI_FFTC_C_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_C_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_FFTC_C_DMA_ID], RM_CPPI_FFTC_C_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_FFTC_C_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_C_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_FFTC_C_DMA_ID], RM_CPPI_FFTC_C_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_FFTC_C_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_FFTC_C_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_FFTC_C_DMA_ID], RM_CPPI_FFTC_C_FLOW);
+                 break;          
+#endif
+
+#ifdef QMSS_MAX_BCP_QUEUE
+            case RM_RESOURCE_CPPI_BCP_TX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_BCP_TX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[RM_CPPI_BCP_DMA_ID], RM_CPPI_BCP_TX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_BCP_RX_CH:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_BCP_RX_CH, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[RM_CPPI_BCP_DMA_ID], RM_CPPI_BCP_RX_CH);
+                 break;
+
+            case RM_RESOURCE_CPPI_BCP_FLOW:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_CPPI_BCP_FLOW, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[RM_CPPI_BCP_DMA_ID], RM_CPPI_BCP_FLOW);
+                 break;      
+#endif                
+
+            case RM_RESOURCE_PA_FIRMWARE:
+                rmGPermsObj.obj.paFirmwarePerms.initPerms = resourceEntry->resourceInitFlags;
+                rmGPermsObj.obj.paFirmwarePerms.usePerms  = resourceEntry->resourceUseFlags;
+                 break;
+
+            case RM_RESOURCE_PA_LUT_ENTRY:
+                RM_RANGE_CHECK (resourceEntry->resourceStart, resourceEntry->resourceEnd, RM_PA_LUT, RM_ERROR_PERMISSION_TABLE_ENTRY_FAILURE);
+                Rm_setTablePermissions (resourceEntry, rmGPermsObj.obj.paLutPerms, RM_PA_LUT);
+                 break;
+
+            default:
+                return RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED;
+
+        }
+
+        resourceEntry++;
+    };
+
+    /* Write synchronization object so that slave cores know permissions table is
+      * populated and valid */
+    rmGSyncObj.obj.globalSyncObj = RM_PERMISSION_TABLE_VALID;
+    
+    /* Writeback Sync Object */
+    Rm_osalEndMemAccess ((void *) &rmGSyncObj, sizeof (Rm_Sync_Obj));
+
+    return RM_OK;
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function is called on slave DSPs after the master DSP has populated
+ *      the internal permission tables.  This function invalidates all internal
+ *      global permission tables so that no further invalidates are required
+ *      when LLDs perform resource permission checks
+ *
+ */
+void Rm_updatePermissionTables(void)
+{
+    uint16_t dmaIndex;
+    const uint16_t dmaTxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_TX_CH, 
+#ifdef QMSS_MAX_AIF_QUEUE      
+                                                RM_CPPI_AIF_TX_CH,
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_A_QUEUE                                                                       
+                                                RM_CPPI_FFTC_A_TX_CH, 
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_B_QUEUE                                                                       
+                                                RM_CPPI_FFTC_B_TX_CH, 
+#endif                                          
+#ifdef QMSS_MAX_PASS_QUEUE
+                                                RM_CPPI_PASS_TX_CH, 
+#endif                                                
+                                                RM_CPPI_QMSS_TX_CH,
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+                                                RM_CPPI_FFTC_C_TX_CH,
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+                                                RM_CPPI_BCP_TX_CH
+#endif                                                                       
+                                               };
+    const uint16_t dmaRxCh[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_RX_CH, 
+#ifdef QMSS_MAX_AIF_QUEUE      
+                                                RM_CPPI_AIF_RX_CH,
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_A_QUEUE                                                                       
+                                                RM_CPPI_FFTC_A_RX_CH, 
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_B_QUEUE                                                                       
+                                                RM_CPPI_FFTC_B_RX_CH, 
+#endif                                                       
+#ifdef QMSS_MAX_PASS_QUEUE
+                                                RM_CPPI_PASS_RX_CH, 
+#endif                                                
+                                                RM_CPPI_QMSS_RX_CH,
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+                                                RM_CPPI_FFTC_C_RX_CH,
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+                                                RM_CPPI_BCP_RX_CH
+#endif                                                                       
+                                               };
+    const uint16_t dmaFlow[RM_CPPI_MAX_DMAS] = {RM_CPPI_SRIO_FLOW, 
+#ifdef QMSS_MAX_AIF_QUEUE      
+                                                RM_CPPI_AIF_FLOW,
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_A_QUEUE                                                                       
+                                                RM_CPPI_FFTC_A_FLOW, 
+#endif                                                                       
+#ifdef QMSS_MAX_FFTC_B_QUEUE                                                                       
+                                                RM_CPPI_FFTC_B_FLOW, 
+#endif                                                                
+#ifdef QMSS_MAX_PASS_QUEUE
+                                                RM_CPPI_PASS_FLOW, 
+#endif                                                
+                                                RM_CPPI_QMSS_FLOW,
+#ifdef QMSS_MAX_FFTC_C_QUEUE
+                                                RM_CPPI_FFTC_C_FLOW,
+#endif
+#ifdef QMSS_MAX_BCP_QUEUE
+                                                RM_CPPI_BCP_FLOW
+#endif                                                                       
+                                               }; 
+    
+    /* Invalidate all permission tables so no further invalidates are required
+      * on slave cores */
+
+    /* Global permissions object */
+    Rm_osalBeginMemAccess ((void *) &rmGPermsObj, sizeof (Rm_GlobalPermissionsObj));
+    
+    /* QMSS Permission Tables */
+
+    /* QMSS PDSPs */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssPdspFirmwarePerms, sizeof (Rm_Perms) * RM_QMSS_FIRMWARE_PDSPS);
+    /* QMSS Queues */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssQueuePerms, sizeof (Rm_Perms) * RM_QMSS_QUEUES);
+    /* QMSS Memory Regions */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssMemRegionPerms, sizeof (Rm_Perms) * RM_QMSS_MEM_REGIONS);    
+    /* QMSS Linking RAM */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssLinkRamPerms, sizeof (Rm_qmssLinkingRamPerms) * RM_QMSS_LINKING_RAM_RANGES);
+    /* QMSS Accumulator Channels */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssAccumChPerms, sizeof (Rm_Perms) * RM_QMSS_ACCUM_CH);   
+    /* QMSS QOS Clusters */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssQosClusterPerms, sizeof (Rm_Perms) * RM_QMSS_QOS_CLUSTER);   
+    /* QMSS QOS Queues */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.qmssQosQueuePerms, sizeof (Rm_Perms) * RM_QMSS_QOS_QUEUES);       
+
+    /* CPPI Permission Tables */
+    
+    /* CPPI DMA Transmit Channels */
+    for (dmaIndex = 0; dmaIndex < RM_CPPI_MAX_DMAS; dmaIndex++)
+    {
+        Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[dmaIndex], sizeof (Rm_Perms)*dmaTxCh[dmaIndex]); 
+    }
+    /* CPPI DMA Receive Channels */
+    for (dmaIndex = 0; dmaIndex < RM_CPPI_MAX_DMAS; dmaIndex++)
+    {
+        Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[dmaIndex], sizeof (Rm_Perms)*dmaRxCh[dmaIndex]); 
+    }
+    /* CPPI DMA Receive Flows */
+    for (dmaIndex = 0; dmaIndex < RM_CPPI_MAX_DMAS; dmaIndex++)
+    {
+        Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[dmaIndex], sizeof (Rm_Perms)*dmaFlow[dmaIndex]); 
+    }
+
+    /* PA permission tables */
+
+    /* PA Firmware invalidated as part of global permissions object invalidate */
+    /* PA LUTs */
+    Rm_osalBeginMemAccess ((void *)rmGPermsObj.obj.paLutPerms, sizeof (Rm_Perms) * RM_PA_LUT);   
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function extracts the initialization permission for a DSP from a resource
+ *      permission element.
+ *
+ *  @param[in]  resourcePermissions
+ *      A permissions structure element to extract the per DSP initialization permission
+ *
+ *  @retval
+ *      Success -   RM_INIT_PERMISSION_APPROVED
+ *  @retval
+ *      Failure -   RM_INIT_PERMISSION_DENIED
+ */
+Rm_Result Rm_getInitPermissions (Rm_Perms *resourcePermissions)
+{
+    /* Check the init permissions for the calling DSP */
+    if (!(RM_GET_PERMISSIONS(resourcePermissions->initPerms)))
+    {
+        return RM_INIT_PERMISSION_DENIED;
+    }
+  
+    return RM_INIT_PERMISSION_APPROVED;
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function extracts the usage permission for a DSP from a resource
+ *      permission element.
+ *
+ *  @param[in]  resourcePermissions
+ *      A permissions structure element to extract the per DSP usage permission
+ *
+ *  @retval
+ *      Success -   RM_INIT_PERMISSION_APPROVED
+ *  @retval
+ *      Failure -   RM_INIT_PERMISSION_DENIED
+ */
+Rm_Result Rm_getUsePermissions (Rm_Perms *resourcePermissions)
+{
+    /* Check the use permissions for the calling DSP */
+    if (!(RM_GET_PERMISSIONS(resourcePermissions->usePerms)))
+    {
+        return RM_USE_PERMISSION_DENIED;
+    }
+  
+    return RM_USE_PERMISSION_APPROVED;
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function searches the list of linking RAM address ranges to find one that has
+ *      the requested linking RAM address within it.  If found the function returns the permissions
+ *      for this range.  Otherwise it returns denied.
+ *
+ *  @param[in]  isInitCheck
+ *      True - Permissions check is for initialization
+ *      False - Permissions check is for usage
+ *
+ *  @param[in]  linkRamPermArray
+ *      Internal array of linking RAM ranges and their permissions
+ *
+ *  @param[in]  linkRamResData
+ *      Linking RAM addresses to check for initialization or usage permissions
+ *
+ *  @retval
+ *      Success -   RM_INIT_PERMISSION_APPROVED
+ *  @retval
+ *      Failure -   RM_INIT_PERMISSION_DENIED
+ */
+Rm_Result Rm_getLinkRamPermissions (Bool isInitCheck, Rm_qmssLinkingRamPerms *linkRamPermArray, Rm_ResourceInfo *linkRamResData)
+{
+    Rm_Result retVal;
+    uint16_t linkRamIndex;
+
+    /* Initialize the return value based on type of check boolean */
+    if (isInitCheck)
+    {
+        retVal = RM_INIT_PERMISSION_DENIED;
+    }
+    else
+    {
+        retVal = RM_USE_PERMISSION_DENIED;
+    }
+    
+    for (linkRamIndex = 0; linkRamIndex < RM_QMSS_LINKING_RAM_RANGES; linkRamIndex++)
+    {
+        if ((linkRamResData->res_info.linkRamData.linkRamStartIndex >= linkRamPermArray[linkRamIndex].startIndex) &&
+             (linkRamResData->res_info.linkRamData.linkRamEndIndex <= linkRamPermArray[linkRamIndex].endIndex))
+        {
+            /* Check the use permissions for the calling DSP */
+            if (isInitCheck)
+            {
+                if (RM_GET_PERMISSIONS(linkRamPermArray[linkRamIndex].rangePerms.initPerms))
+                {
+                    retVal = RM_USE_PERMISSION_APPROVED;
+                }
+            }
+            else
+            {
+                if (RM_GET_PERMISSIONS(linkRamPermArray[linkRamIndex].rangePerms.usePerms))
+                {
+                    retVal = RM_USE_PERMISSION_APPROVED;
+                }
+            }
+            break;
+        }
+    }
+
+    return (retVal);
+}
+
+/**********************************************************************
+ **********APIs visible to other LLDs internally via call table *******************
+ **********************************************************************/
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function is used by LLDs to check initialization permissions for a resource
+ *
+ *  @param[in]  resourceData
+ *      Structure containing resource information such as resource type and the
+ *      resource value to be checked
+ *
+ *  @retval
+ *      Success -   RM_INIT_PERMISSION_APPROVED
+ *  @retval
+ *      Failure -   RM_INIT_PERMISSION_DENIED
+ */
+Rm_Result Rm_initPermissionChecker (Rm_ResourceInfo *resourceData)
+{
+    switch (resourceData->resourceType)
+    {
+        case Rm_resource_QMSS_FIRMWARE_PDSP:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceData->res_info.pdspNum]));
+            
+        case Rm_resource_QMSS_QUEUE:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQueuePerms[resourceData->res_info.queNum]));
+            
+        case Rm_resource_QMSS_MEMORY_REGION:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssMemRegionPerms[resourceData->res_info.memRegion]));
+
+        case Rm_resource_QMSS_LINKING_RAM_CONTROL:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssLinkRamControlPerms));   
+            
+        case Rm_resource_QMSS_LINKING_RAM:
+            return (Rm_getLinkRamPermissions (TRUE, &rmGPermsObj.obj.qmssLinkRamPerms[0], resourceData));
+            
+        case Rm_resource_QMSS_ACCUM_CH:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssAccumChPerms[resourceData->res_info.accumCh]));  
+
+        case Rm_resource_QMSS_QOS_TIMER:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQosPdspTimerPerms));   
+
+        case Rm_resource_QMSS_QOS_CLUSTER:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQosClusterPerms[resourceData->res_info.qosCluster]));           
+
+        case Rm_resource_QMSS_QOS_QUEUE:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.qmssQosQueuePerms[resourceData->res_info.qosQueue]));                
+            
+        case Rm_resource_CPPI_TX_CH:
+            {
+                Rm_Perms *txChPermsArray = rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
+                return (Rm_getInitPermissions(&txChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
+            }
+            
+        case Rm_resource_CPPI_RX_CH:
+            {
+                Rm_Perms *rxChPermsArray = rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
+                return (Rm_getInitPermissions(&rxChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
+            }
+            
+        case Rm_resource_CPPI_RX_FLOW:
+            {
+                Rm_Perms *flowPermsArray = rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
+                return (Rm_getInitPermissions(&flowPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));       
+            }
+            
+        case Rm_resource_PA_FIRMWARE:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.paFirmwarePerms));    
+            
+        case Rm_resource_PA_LUT:
+            return (Rm_getInitPermissions(&rmGPermsObj.obj.paLutPerms[resourceData->res_info.lutEntry]));   
+     
+        default:
+            return (RM_INIT_PERMISSION_DENIED);
+    }
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function is used by LLDs to check usage permissions for a resource
+ *
+ *  @param[in]  resourceData
+ *      Structure containing resource information such as resource type and the
+ *      resource value to be checked
+ *
+ *  @retval
+ *      Success -   RM_INIT_PERMISSION_APPROVED
+ *  @retval
+ *      Failure -   RM_INIT_PERMISSION_DENIED
+ */
+Rm_Result Rm_usePermissionChecker (Rm_ResourceInfo *resourceData)
+{
+    switch (resourceData->resourceType)
+    {
+        case Rm_resource_QMSS_FIRMWARE_PDSP:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssPdspFirmwarePerms[resourceData->res_info.pdspNum]));
+            
+        case Rm_resource_QMSS_QUEUE:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQueuePerms[resourceData->res_info.queNum]));
+            
+        case Rm_resource_QMSS_MEMORY_REGION:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssMemRegionPerms[resourceData->res_info.memRegion]));
+
+        case Rm_resource_QMSS_LINKING_RAM_CONTROL:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssLinkRamControlPerms));   
+            
+        case Rm_resource_QMSS_LINKING_RAM:
+            return (Rm_getLinkRamPermissions(FALSE, &rmGPermsObj.obj.qmssLinkRamPerms[0], resourceData));
+            
+        case Rm_resource_QMSS_ACCUM_CH:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssAccumChPerms[resourceData->res_info.accumCh]));     
+
+        case Rm_resource_QMSS_QOS_TIMER:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQosPdspTimerPerms));   
+
+        case Rm_resource_QMSS_QOS_CLUSTER:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQosClusterPerms[resourceData->res_info.qosCluster]));           
+
+        case Rm_resource_QMSS_QOS_QUEUE:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.qmssQosQueuePerms[resourceData->res_info.qosQueue]));                
+            
+        case Rm_resource_CPPI_TX_CH:
+            {
+                Rm_Perms *txChPermsArray = rmGPermsObj.obj.cppiTxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
+                return (Rm_getUsePermissions(&txChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
+            }
+            
+        case Rm_resource_CPPI_RX_CH:
+            {
+                Rm_Perms *rxChPermsArray = rmGPermsObj.obj.cppiRxChPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
+                return (Rm_getUsePermissions(&rxChPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));
+            }
+            
+        case Rm_resource_CPPI_RX_FLOW:
+            {
+                Rm_Perms *flowPermsArray = rmGPermsObj.obj.cppiFlowPerms.dmaPermPtrs[resourceData->res_info.cpDmaData.dmaNum];
+                return (Rm_getUsePermissions(&flowPermsArray[resourceData->res_info.cpDmaData.cppiChNumOrFlowId]));       
+            }
+            
+        case Rm_resource_PA_FIRMWARE:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.paFirmwarePerms));    
+            
+        case Rm_resource_PA_LUT:
+            return (Rm_getUsePermissions(&rmGPermsObj.obj.paLutPerms[resourceData->res_info.lutEntry]));  
+     
+        default:
+            return (RM_USE_PERMISSION_DENIED);
+    }
+}
+
+/*  */
+
+/**********************************************************************
+ *********************** Application visible APIs ***************************
+ **********************************************************************/
+
+/** @addtogroup RM_LLD_FUNCTION
+@{ 
+*/
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function initializes the Resource Manager low level driver
+ *      This function is called once in the system to setup the Resource Manager 
+ *      low level driver by mapping the application defined resource table to internal
+ *      permission tables.  After mapping is complete a global synchronization object
+ *      is written to sync with slave cores
+ *
+ *  @param[in]  rmResourceTable
+ *      Resource table defined by application.  Used to populate internal permission
+ *      tables.
+ *
+ *  @post  
+ *      RM LLD global permissions are set.
+ *
+ *  @retval
+ *      Success -   RM_OK
+ *  @retval
+ *      Failure -   RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED
+ */
+Rm_Result Rm_init (const Rm_Resource *rmResourceTable)
+{
+    void *key;
+    Rm_Result ret_val = RM_ERROR;
+
+    /* Check permission structure sizes to make sure they're evenly
+      * divisible into a cache line.  This generates no object code when
+      * optimizer is on.  If failes, assert will occur at compile time */
+    RM_COMPILE_TIME_SIZE_CHECK((RM_MAX_CACHE_ALIGN/sizeof(Rm_Perms)) * sizeof(Rm_Perms) == RM_MAX_CACHE_ALIGN);
+    RM_COMPILE_TIME_SIZE_CHECK((RM_MAX_CACHE_ALIGN/sizeof(Rm_qmssLinkingRamPerms)) * \
+                                                          sizeof(Rm_qmssLinkingRamPerms) == RM_MAX_CACHE_ALIGN);
+
+    /* Begin Critical Section before accessing shared resources. */
+    key = Rm_osalCsEnter ();
+    
+    /* Initialize the permissions table */
+    Rm_permissionTableInit();
+
+    if (!rmResourceTable)
+    {
+        /* End Critical Section */
+        Rm_osalCsExit (key);
+        return RM_ERROR_PERMISSION_TABLE_POPULATION_FAILED;
+    }
+
+    ret_val = Rm_populatePermissionTable(rmResourceTable);
+
+    /* End Critical Section */
+    Rm_osalCsExit (key);
+    return ret_val;
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function waits for the Resource Manager master to populate the 
+ *      global permissions table based on a global sync object.  Once the
+ *      global sync object has been written by the master core this function
+ *      will invalidate all permissions tables.  Since the permissions table are
+ *      static, and will not change through the system up-time, a single
+ *      invalidation at the start will suffice.
+ *      
+ *      This function can be called on all core besides that which called
+ *      Rm_init.  Calling this function on said cores will act as a blocking
+ *      synchronization point.
+ *
+ *  @retval
+ *      Success -   RM_OK
+ *  @retval
+ *      Failure -   RM_FAILURE
+ */
+Rm_Result Rm_start (void)
+{
+    /* Loop until the global sync object signals the permissions table has been
+      * populated and valid */
+    do
+    {
+        /* Invalidate the global sync object */
+        Rm_osalBeginMemAccess ((void *) &rmGSyncObj, sizeof (Rm_Sync_Obj));
+    } while (rmGSyncObj.obj.globalSyncObj != RM_PERMISSION_TABLE_VALID);
+
+    /* Master core finished populating the permission tables.  Must invalidate
+      * all tables to see latest permissions */
+    Rm_updatePermissionTables();
+
+    return RM_OK;
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      This function returns an RM handle to the application to provide
+ *      to LLDs that want to use the RM.
+ *
+ *  @retval
+ *      Success -   RM Handle.  Used an an input parameter for LLD startCfg functions.
+ *  @retval
+ *      Failure -   NULL
+ */
+Rm_Handle Rm_getHandle(void)
+{
+   return ((void *) &rmPermissionCheckers);
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      The function is used to get the version information of the RM LLD.
+ *
+ *  @retval
+ *      Version Information.
+ */
+uint32_t Rm_getVersion (void)
+{
+    return RM_LLD_VERSION_ID;
+}
+
+/**
+ *  @b Description
+ *  @n  
+ *      The function is used to get the version string for the RM LLD.
+ *
+ *  @retval
+ *      Version String.
+ */
+const char* Rm_getVersionStr (void)
+{
+    return rmLldVersionStr;
+}
+
+/**
+@}
+*/
diff --git a/test/Module.xs b/test/Module.xs
new file mode 100644 (file)
index 0000000..325c6cd
--- /dev/null
@@ -0,0 +1,48 @@
+/******************************************************************************
+ * FILE PURPOSE: RM LLD unit test files.
+ ******************************************************************************
+ * FILE NAME: module.xs
+ *
+ * DESCRIPTION: 
+ *  This file contains the module specification for RM LLD test files.
+ *
+ * Copyright (C) 2012, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Load the library utility. */
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");
+
+/**************************************************************************
+ * FUNCTION NAME : modBuild
+ **************************************************************************
+ * DESCRIPTION   :
+ *  The function is used to add all the source files in the test 
+ *  directory into the package.
+ **************************************************************************/
+function modBuild() 
+{
+    /* Add all the .c files to the release package. */
+    var testFiles = libUtility.listAllFiles (".c", "test", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+
+    /* Add all the .h files to the release package. */
+    var testFiles = libUtility.listAllFiles (".h", "test", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+
+    /* Add all the .cmd files to the release package. */
+    var testFiles = libUtility.listAllFiles (".cmd", "test", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+
+    /* Add all the .cfg files to the release package. */
+    var testFiles = libUtility.listAllFiles (".cfg", "test", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+
+    /* Add the .txt to the package */
+    var testFiles = libUtility.listAllFiles (".txt", "test", true);
+    for (var k = 0 ; k < testFiles.length; k++)
+        Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];
+}