c469b8a30a55e0ffd09d87ecd9cae745604ebce3
1 /*
2 *
3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
36 /*
37 * Check resource availability for this device and configure accordingly.
38 *
39 * On High Secure (HS) variants, some SA2UL resources are reserved for use by
40 * DMSC firmware. Only subset of resources are available for access by the unit
41 * testi framework, and all others must be masked out. Test which are not
42 * disabled may require additional firewall configuration to access the
43 * submodules of the SA2UL subsystem.
44 */
45 #include <stdint.h>
46 #include <stdbool.h>
48 #ifdef USE_BIOS
49 #include <xdc/std.h>
50 #endif
52 /* CSL includes */
53 #include <ti/csl/cslr.h>
54 #include <ti/csl/soc.h>
56 #include <ti/drv/sciclient/sciclient.h>
58 #include <unittest.h>
59 #include <saLog.h>
61 #if defined BUILD_MCU1_0
62 #define HOST_ID TISCI_HOST_ID_R5_0
63 #define PRIV_ID 0x60U
64 #define FWL_ID 1196U
65 #elif defined BUILD_MPU1_0
66 #define HOST_ID TISCI_HOST_ID_A72_2
67 #define PRIV_ID 0x1U
68 #define FWL_ID 2392U
69 #endif
71 uint32_t TF_SA2UL_PEER_RXCHAN0;
72 uint32_t TF_SA2UL_PEER_RXCHAN1;
73 uint32_t TF_SA2UL_PEER_TXCHAN;
74 uint32_t SA_UTEST_SA2_UL0_BASE;
76 /*
77 * Configure which SA2UL resources are used for this test. This checks device
78 * type (GP or HS) and silicon revision to determine which tests are available
79 * and which various SoC resources (e.g. PSIL threads) to use.
80 */
81 uint8_t configSaRes(void)
82 {
83 struct tisci_msg_fwl_change_owner_info_req chown_req;
84 struct tisci_msg_fwl_change_owner_info_resp chown_resp = {0};
85 struct tisci_msg_fwl_set_firewall_region_req set_reg_req;
86 struct tisci_msg_fwl_set_firewall_region_resp set_reg_resp = {0};
87 uint32_t SYS_STATUS;
88 uint32_t timeout = 0xFFFFFFFFU;
89 int32_t ret = CSL_EFAIL;
90 uint8_t isHsDevice = false, limitedAccess = false;
92 #if defined (BUILD_MCU)
93 uint32_t DEV_ID= CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE +
94 CSL_WKUP_CTRL_MMR_CFG0_JTAGID);
95 #endif
97 SYS_STATUS = CSL_REG32_RD(CSL_WKUP_DMSC0_SECMGR_BASE + 0x100);
99 switch (SYS_STATUS & 0xFU)
100 {
101 /* Device is GP */
102 case 0x3U:
103 {
104 break;
105 }
107 /* Device is HS */
108 case 0x9U:
109 case 0xAU:
110 default:
111 {
112 isHsDevice = true;
113 break;
114 }
115 }
117 #if defined (BUILD_MCU)
118 /* MCU SA2UL has limited access */
119 SA_UTEST_SA2_UL0_BASE = (CSL_SA2_UL0_BASE);
121 if (isHsDevice == false)
122 {
123 /* Use any threads to MCU SA2UL on GP device type */
124 TF_SA2UL_PEER_RXCHAN0 = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILS_THREAD_OFFSET + 0);
125 TF_SA2UL_PEER_RXCHAN1 = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILS_THREAD_OFFSET + 1);
126 TF_SA2UL_PEER_TXCHAN = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILD_THREAD_OFFSET + 0);
127 }
128 else
129 {
130 /* MCU SA2UL is limited in access by DMSC firmware */
131 limitedAccess = true;
133 /*
134 * Use PSIL threads which are available (egress thread 0/1 and ingress
135 * thread 0 are reserved on MCU SA2UL).
136 */
137 TF_SA2UL_PEER_RXCHAN0 = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILS_THREAD_OFFSET + 2);
138 TF_SA2UL_PEER_RXCHAN1 = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILS_THREAD_OFFSET + 3);
139 TF_SA2UL_PEER_TXCHAN = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILD_THREAD_OFFSET + 1);
141 /* PKA is not available in MCU SA2UL on HS devices; skip these tests */
142 testCommonSetTestStatus(saPkaTest, SA_TEST_SKIP_TEST);
143 testCommonSetTestStatus(saPkaTest2, SA_TEST_SKIP_TEST);
145 /*
146 * Claim firewall ownership for TRNG and configure permissions for host
147 * access.
148 */
149 chown_req.fwl_id = 1196U;
150 chown_req.region = 3U;
151 chown_req.owner_index = HOST_ID;
153 ret = Sciclient_firewallChangeOwnerInfo(&chown_req, &chown_resp, timeout);
154 if (ret == CSL_PASS)
155 {
156 set_reg_req.fwl_id = FWL_ID;
157 set_reg_req.region = 3U;
158 set_reg_req.n_permission_regs = 1U;
159 set_reg_req.control = 0xAU;
160 set_reg_req.permissions[0] = (PRIV_ID << 16) | 0xFFFF;
161 set_reg_req.start_address = 0x40910000;
162 set_reg_req.end_address = 0x40910FFF;
164 ret = Sciclient_firewallSetRegion(&set_reg_req, &set_reg_resp, timeout);
165 }
167 if (ret == CSL_EFAIL)
168 {
169 /* Could not access TRNG firewall control. Fail this test */
170 SALog("Failed to configure TRNG firewall for test\n");
171 testCommonSetTestStatus(saRngTest, SA_TEST_FAILED);
172 }
173 }
175 switch (DEV_ID)
176 {
177 /* SR 1.0 */
178 case 0x0BB6402F:
179 {
180 if (isHsDevice == true)
181 {
182 /*
183 * Unable to access any PSIL threads to SA2UL on this device
184 * revision.
185 */
186 testCommonSetTestStatus(saDataModeTest, SA_TEST_SKIP_TEST);
187 }
188 break;
189 }
191 default:
192 {
193 break;
194 }
195 }
196 #else
197 /* MAIN SA2UL is open for access on both GP and HS device types */
198 SA_UTEST_SA2_UL0_BASE = (CSL_SA2_UL0_BASE);
200 TF_SA2UL_PEER_RXCHAN0 = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILS_THREAD_OFFSET + 0);
201 TF_SA2UL_PEER_RXCHAN1 = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILS_THREAD_OFFSET + 1);
202 TF_SA2UL_PEER_TXCHAN = (CSL_PSILCFG_NAVSS_MAIN_SAUL0_PSILD_THREAD_OFFSET + 0);
204 if (isHsDevice == true)
205 {
206 /*
207 * Claim firewall ownership and set permissions for all SA2UL MMR
208 * banks. Use single region to span all MMR ranges.
209 */
210 chown_req.fwl_id = FWL_ID;
211 chown_req.region = 0U;
212 chown_req.owner_index = HOST_ID;
214 ret = Sciclient_firewallChangeOwnerInfo(&chown_req, &chown_resp, timeout);
215 if (ret == CSL_PASS)
216 {
217 set_reg_req.fwl_id = FWL_ID;
218 set_reg_req.region = 0U;
219 set_reg_req.n_permission_regs = 1U;
220 set_reg_req.control = 0xAU;
221 set_reg_req.permissions[0] = (PRIV_ID << 16) | 0xFFFF;
222 set_reg_req.start_address = 0x04E00000;
223 set_reg_req.end_address = 0x04E2FFFF;
225 ret = Sciclient_firewallSetRegion(&set_reg_req, &set_reg_resp, timeout);
226 }
228 if (ret == CSL_EFAIL)
229 {
230 /* Could not configure firewall. All tests will be unavailable */
231 SALog("Failed to configure firewall for all tests\n");
232 testCommonSetTestStatus(saDataModeTest, SA_TEST_FAILED);
233 testCommonSetTestStatus(saRngTest, SA_TEST_FAILED);
234 testCommonSetTestStatus(saPkaTest, SA_TEST_FAILED);
235 testCommonSetTestStatus(saPkaTest2, SA_TEST_FAILED);
236 }
237 }
238 #endif
240 return limitedAccess;
241 }