drv: sa: Add USE_DKEK flag support

[keystone-rtos/sa-lld.git] / salld.h

diff --git a/salld.h b/salld.h
index 4e5d90bd62c65dade2254f517eb6de3b98e082e8..ffe9022676c75e358d96fe14649a29ca932c9547 100644 (file)
--- a/salld.h
+++ b/salld.h
@@ -427,6 +427,12 @@ typedef int Sa_State_t;
  */
 #define sa_ERR_PKA_DOWNLOAD_FAIL        -30
 
+/**
+ *  @def  sa_ERR_ENGINE_STATE
+ *        The SA2UL engines are in an unexpected state
+ */
+#define sa_ERR_ENGINE_STATE             -31
+
 /**
  *  @def  sa_PKA_OP_IN_PROGRESS
  *        The current PKA operation is still in progress.
@@ -885,6 +891,19 @@ typedef struct {
  */
 #define sa_DM_CONFIG_USE_SECURE_CTX_FOR_NON_SECURE_CHANNEL  ((uint16_t) (0x0008U))
 
+/**
+ *  @def  sa_DM_CONFIG_USE_DKEK
+ *        Control Info -- 1: Set the USE_DKEK flag in the security context so
+ *                           that DKEK programmed by DMSC is loaded in-band
+ *                           instead of user-supplied key
+ *                        0: Do not set USE_DKEK flag. User supplies a key
+ *                           directly.
+ *
+ *  For devices that do not have SA2UL setting this bit would cause no action
+ *
+ */
+#define sa_DM_CONFIG_USE_DKEK  ((uint16_t) (0x0010U))
+
 
 /*@}*/
 /** @} */
@@ -1317,6 +1336,11 @@ typedef struct {
  *        Control Info -- Set: SALT available
  */
 #define sa_DATA_MODE_KEY_CTRL_SALT             0x0004 
+/**
+ *  @def  sa_DATA_MODE_KEY_USE_DKEK
+ *        Control Info -- Set: USE_DKEK field in security context
+ */
+#define sa_DATA_MODE_KEY_USE_DKEK              0x0008
 /*@}*/
 /** @} */
 
@@ -2309,6 +2333,28 @@ typedef void* Sa_Handle;
 
 #define  sa_CONFIG_CTRL_BITMAP_SET_SCPTR_RANGE                0x0004
 
+/**
+ *  @def  sa_CONFIG_CTRL_BITMAP_LIMIT_ACCESS
+ *        Control Info -- 0: All SA2UL registers may be accessed
+ *                        1: Limit access to SA2UL registers which are reserved
+ *                           for use by DMSC firmware
+ *
+ *  @note This control bit is applicable to SA2UL only (for other generations it is don't care).
+ *        It is furthermore only necessary on High Secure (HS) device variants
+ *        when an application wishes to share access to the SA2UL instance which
+ *        is owned by DMSC firmware. DMSC prohibits read/write access to MMRA
+ *        region on this instance, so this bit has the following effect:
+ *
+ *        * Bypasses programming ENGINE_ENABLE register. DMSC sets all engines
+ *          to enabled at device boot. The driver can confirm engine status
+ *          through the ENGINE_STATUS register.
+ *
+ *        * Ignores the SET_SCPTR_RANGE control flag and bypasses any attempt to
+ *          access the SCPTR promote registers
+ */
+
+#define  sa_CONFIG_CTRL_BITMAP_LIMIT_ACCESS                   0x0008
+
 
 
 /*@}*/