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raw | patch | inline | side by side (parent: b223542)
author | Aravind Batni <aravindbr@ti.com> | |
Tue, 31 Oct 2017 21:17:33 +0000 (17:17 -0400) | ||
committer | Aravind Batni <aravindbr@ti.com> | |
Tue, 31 Oct 2017 21:17:33 +0000 (17:17 -0400) |
Signed-off-by: Aravind Batni <aravindbr@ti.com>
docs/ReleaseNotes_SA_LLD.doc | patch | blob | history | |
docs/ReleaseNotes_SA_LLD.pdf | patch | blob | history | |
example/SaBasicExample/src/salldsim/salld_osal.c | patch | blob | history | |
example/SaMultiCoreExample/src/salldsim/salld_osal.c | patch | blob | history | |
package.xdc | patch | blob | history | |
saver.h | patch | blob | history | |
src/salldcom.c | [changed mode: 0755->0644] | patch | blob | history |
test/SaUnitTest/src/salldsim/salld_osal.c | patch | blob | history |
index c8eef87516ceb0b70e9f962bf9685af827158c3a..5b3f908644eddbc3ce99cb105411432e0c5c7751 100644 (file)
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index 71d6e20cad7c169b8ae11d24fe989d993f4f08f3..3b8279490712e50e68df79f28a858ecddf4f8fe5 100644 (file)
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diff --git a/example/SaBasicExample/src/salldsim/salld_osal.c b/example/SaBasicExample/src/salldsim/salld_osal.c
index 00016feeb79ab4e9fd20bbd525bab6c67d340777..fbb56017fb482612684094b9a56fa379d0779f42 100644 (file)
*/
int Osal_saGetSysEndianMode(void)
{
-#if defined( _BIG_ENDIAN )
- return((int)sa_SYS_ENDIAN_MODE_BIG);
-#else
- return((int)sa_SYS_ENDIAN_MODE_LITTLE);
-#endif
+ int endian;
+ uint32_t number = 0x1;
+ uint8_t *numPtr = (uint8_t*)&number;
+ if ((numPtr[0] == 1))
+ {
+ endian =((int)sa_SYS_ENDIAN_MODE_LITTLE);
+ }
+ else
+ {
+ endian =((int)sa_SYS_ENDIAN_MODE_BIG);
+ }
+ return (endian);
}
+
/**
* @b Description
* @n
diff --git a/example/SaMultiCoreExample/src/salldsim/salld_osal.c b/example/SaMultiCoreExample/src/salldsim/salld_osal.c
index 767fbd3de8089045f2077237b7d76964964971d6..9b2276b522f5989b2ecf3a3a48f89d6a6be80e5a 100644 (file)
*/
int Osal_saGetSysEndianMode(void)
{
-#if defined( _BIG_ENDIAN )
- return((int)sa_SYS_ENDIAN_MODE_BIG);
-#else
- return((int)sa_SYS_ENDIAN_MODE_LITTLE);
-#endif
+ int endian;
+ uint32_t number = 0x1;
+ uint8_t *numPtr = (uint8_t*)&number;
+ if ((numPtr[0] == 1))
+ {
+ endian =((int)sa_SYS_ENDIAN_MODE_LITTLE);
+ }
+ else
+ {
+ endian =((int)sa_SYS_ENDIAN_MODE_BIG);
+ }
+ return (endian);
}
+
/**
* @b Description
* @n
diff --git a/package.xdc b/package.xdc
index c3648effe8590dbe14ffcb75809c845785974498..86eb0002dfed9430cd2a57ef1a445c603be6c02f 100644 (file)
--- a/package.xdc
+++ b/package.xdc
* Copyright (C) 2011-2017, Texas Instruments, Inc.
*****************************************************************************/
-package ti.drv.sa[3,0,0,18] {
+package ti.drv.sa[3,0,0,19] {
module Settings;
}
index 3f7f2017bb977eba3fc96cba34d6b0864953aa86..200adde7f605de508852e9c33cd6f4b140e4ffb6 100644 (file)
--- a/saver.h
+++ b/saver.h
* format:
* 0xAABBCCDD -> Arch (AA); API Changes (BB); Major (CC); Minor (DD)
*/
-#define SA_LLD_VERSION_ID (0x03000012)
+#define SA_LLD_VERSION_ID (0x03000013)
/**
* @brief This is the version string which describes the SA LLD along with the
* date and build information.
*/
-#define SA_LLD_VERSION_STR "SA LLD Revision: 03.00.00.18"
+#define SA_LLD_VERSION_STR "SA LLD Revision: 03.00.00.19"
#ifdef __cplusplus
}
diff --git a/src/salldcom.c b/src/salldcom.c
--- a/src/salldcom.c
+++ b/src/salldcom.c
@@ -1179,6 +1179,7 @@ static void sa_collect_debug_info(int id, salldCoreDumpInfo_t *dbgInfo, int gen2
{
CSL_Cp_aceRegs* pSaRegs = (CSL_Cp_aceRegs*)salldLObj.baseAddr;
int i, offset;
+ uint32_t *src, *dst;
/* Derive the SRAM0 offset based on Gen2/Gen1 and PDSP id */
if (gen2)
@@ -1210,15 +1211,30 @@ static void sa_collect_debug_info(int id, salldCoreDumpInfo_t *dbgInfo, int gen2
pSaRegs->PDSP_CONTROL_STATUS[id].PDSP_CONTROL = 1;
/* Collect 32 debug registers */
- memcpy((void *) &dbgLevel1->dbgregs[0], (void *) &pSaRegs->PDSP_DEBUG[id].PDSP_IGP[0], SA_DBG_COLLECT_DBGREGS_SIZE);
+ src = (uint32_t *) &pSaRegs->PDSP_DEBUG[id].PDSP_IGP[0];
+ dst = (uint32_t *) &dbgLevel1->dbgregs[0];
+ for ( i = 0; i < (SA_DBG_COLLECT_DBGREGS_SIZE/4); i++)
+ {
+ dst[i] = src[i];
+ }
/* Collect Last command label and temporary buffers */
offset += SA_CMD_LABEL_TBUF_OFFSET;
- memcpy ((void*) &dbgLevel1->cmdLblTmpBuf[0], (void *) &pSaRegs->SRAM0[offset], SA_DBG_COLLECT_CMDLBL_TBUF_SIZE);
+ src = (uint32_t *) &pSaRegs->SRAM0[offset];
+ dst = (uint32_t *) &dbgLevel1->cmdLblTmpBuf[0];
+ for ( i = 0; i < (SA_DBG_COLLECT_DBGREGS_SIZE/4); i++)
+ {
+ dst[i] = src[i];
+ }
/* Collect Internal Buf area */
offset += SA_INT_BUF6_OFFSET;
- memcpy ((void*) &dbgLevel1->intBuf[0], (void *) &pSaRegs->SRAM0[offset], SA_DBG_COLLECT_INT_BUF_SIZE);
+ src = (uint32_t *) &pSaRegs->SRAM0[offset];
+ dst = (uint32_t *) &dbgLevel1->intBuf[0];
+ for ( i = 0; i < (SA_DBG_COLLECT_DBGREGS_SIZE/4); i++)
+ {
+ dst[i] = src[i];
+ }
return;
}
#ifndef NSS_LITE
salldObj_t *inst = (salldObj_t *)sa_CONV_OFFSET_TO_ADDR(salldLObj.instPoolBaseAddr, handle);
Sa_IpsecSysStats_t esp1, esp2, ah1, ah2;
+ uint32_t *src, *dst;
+ uint32_t i, len;
CSL_Cp_aceRegs* pSaRegs = (CSL_Cp_aceRegs*)salldLObj.baseAddr;
stats->err.errProto = pSaRegs->SRAM0[SA_SYS_ERR_PROTO_OFFSET] +
pSaRegs->SRAM0[SA_SYS_ERR_PROTO_OFFSET + SA_PHP_SRAM_SIZE_IN_UINT32] +
pSaRegs->SRAM0[SA_SYS_ERR_PROTO_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32];
- memcpy(&esp1, (void *)&pSaRegs->SRAM0[SA_SYS_ESP_OFFSET], sizeof(Sa_IpsecSysStats_t));
- memcpy(&ah1, (void *)&pSaRegs->SRAM0[SA_SYS_AH_OFFSET], sizeof(Sa_IpsecSysStats_t));
- memcpy(&esp2, (void *)&pSaRegs->SRAM0[SA_SYS_ESP_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32], sizeof(Sa_IpsecSysStats_t));
- memcpy(&ah2, (void *)&pSaRegs->SRAM0[SA_SYS_AH_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32], sizeof(Sa_IpsecSysStats_t));
- memcpy(&stats->srtp,(void *)&pSaRegs->SRAM0[SA_SYS_SRTP_OFFSET + SA_PHP_SRAM_SIZE_IN_UINT32], sizeof(Sa_SrtpSysStats_t));
- memcpy(&stats->ac, (void *)&pSaRegs->SRAM0[SA_SYS_AC_OFFSET + SA_PHP_SRAM_SIZE_IN_UINT32], sizeof(Sa_AcSysStats_t));
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_ESP_OFFSET];
+ dst = (uint32_t* ) &esp1;
+ len = (sizeof(Sa_IpsecSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_AH_OFFSET];
+ dst = (uint32_t* ) &ah1;
+ len = (sizeof(Sa_IpsecSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_ESP_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32];
+ dst = (uint32_t* ) &esp2;
+ len = (sizeof(Sa_IpsecSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_AH_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32];
+ dst = (uint32_t* ) &ah2;
+ len = (sizeof(Sa_IpsecSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_SRTP_OFFSET + SA_PHP_SRAM_SIZE_IN_UINT32];
+ dst = (uint32_t* ) &stats->srtp;
+ len = (sizeof(Sa_SrtpSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_AC_OFFSET + SA_PHP_SRAM_SIZE_IN_UINT32];
+ dst = (uint32_t* ) &stats->ac;
+ len = (sizeof(Sa_AcSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
sa_ipsec_stats_add(&stats->esp, &esp1, &esp2);
sa_ipsec_stats_add(&stats->ah, &ah1, &ah2);
pSaRegs->SRAM0[SA_SYS_ERR_ENGINE_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32];
stats->err.errProto = pSaRegs->SRAM0[SA_SYS_ERR_PROTO_OFFSET] +
pSaRegs->SRAM0[SA_SYS_ERR_PROTO_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32];
- memcpy(&stats->esp, (void *)&pSaRegs->SRAM0[SA_SYS_ESP_OFFSET], sizeof(Sa_IpsecSysStats_t));
- memcpy(&stats->ah, (void *)&pSaRegs->SRAM0[SA_SYS_AH_OFFSET], sizeof(Sa_IpsecSysStats_t));
- memcpy(&stats->srtp,(void *)&pSaRegs->SRAM0[SA_SYS_SRTP_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32], sizeof(Sa_SrtpSysStats_t));
- memcpy(&stats->ac, (void *)&pSaRegs->SRAM0[SA_SYS_AC_OFFSET + 2*SA_PHP_SRAM_SIZE_IN_UINT32], sizeof(Sa_AcSysStats_t));
+
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_ESP_OFFSET];
+ dst = (uint32_t* ) &stats->esp;
+ len = (sizeof(Sa_IpsecSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_AH_OFFSET];
+ dst = (uint32_t* ) &stats->ah;
+ len = (sizeof(Sa_IpsecSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_SRTP_OFFSET + (2*SA_PHP_SRAM_SIZE_IN_UINT32)];
+ dst = (uint32_t* ) &stats->srtp;
+ len = (sizeof(Sa_SrtpSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
+ src = (uint32_t *) &pSaRegs->SRAM0[SA_SYS_AC_OFFSET + (2*SA_PHP_SRAM_SIZE_IN_UINT32)];
+ dst = (uint32_t* ) &stats->ac;
+ len = (sizeof(Sa_AcSysStats_t)/4);
+ for (i = 0; i < len; i++)
+ {
+ dst[i] = src[i];
+ }
+
}
return(sa_ERR_OK);
@@ -1735,9 +1826,10 @@ int16_t Sa_downloadImage (Sa_Handle handle, int modId, void* image, int sizeByte
salldObj_t *inst = (salldObj_t *)sa_CONV_OFFSET_TO_ADDR(salldLObj.instPoolBaseAddr, handle);
CSL_Cp_aceRegs* pSaRegs = (CSL_Cp_aceRegs*)salldLObj.baseAddr;
int numPdsps = SALLD_TEST_SASS_GEN2(inst)?3:2;
-
+ volatile uint32_t *src;
uint32_t mtKey;
volatile uint32_t *iram;
+ uint32_t i;
/* Verify the specified PDSP is valid */
if ((modId < 0) || (modId >= numPdsps))
@@ -1780,8 +1872,11 @@ int16_t Sa_downloadImage (Sa_Handle handle, int modId, void* image, int sizeByte
return (sa_STATE_INVALID);
}
/* Copy the image */
- memcpy ((void *)iram, image, sizeBytes);
-
+ src = (uint32_t *) image;
+ for ( i = 0; i < (sizeBytes/4); i++)
+ {
+ iram[i] = src[i];
+ }
Sa_osalMtCsExit(mtKey);
return (sa_ERR_OK);
#else
salldCoreDumpInfo_t *dbgInfo;
int16_t ret = sa_ERR_OK;
int modId, numPdsps;
-
+ uint32_t *src, *dst;
+ uint32_t i;
/* Zero overhead check that Debug SIZE published is consistent */
SA_COMPILE_TIME_SIZE_CHECK (sa_CORE_DUMP_BUF_SIZE >= (sizeof(salldCoreDumpInfo_t) >> 2));
}
/* Collect the MMR dump */
- memcpy ((void *) &dbgInfo->mmr[0], (void *) &pSaRegs->MMR.PID, SA_DBG_COLLECT_MMR_SIZE);
+ src = (uint32_t *) &pSaRegs->MMR.PID;
+ dst = (uint32_t *) &dbgInfo->mmr[0];
+ for ( i = 0 ; i < (SA_DBG_COLLECT_MMR_SIZE/4); i++)
+ {
+ dst[i] = src[i];
+ }
/* Collect the debug information per valid PDSPs */
for ( modId = 0; modId < numPdsps; modId++)
index 94403fd11275d8240d346d3ff399243b5de0a9d0..9b31f38683f82e4b71fd1e19e850be5d383578b8 100644 (file)
*/
int Osal_saGetSysEndianMode(void)
{
-#if defined( _BIG_ENDIAN )
- return((int)sa_SYS_ENDIAN_MODE_BIG);
-#else
- return((int)sa_SYS_ENDIAN_MODE_LITTLE);
-#endif
-
+ int endian;
+ uint32_t number = 0x1;
+ uint8_t *numPtr = (uint8_t*)&number;
+ if ((numPtr[0] == 1))
+ {
+ endian =((int)sa_SYS_ENDIAN_MODE_LITTLE);
+ }
+ else
+ {
+ endian =((int)sa_SYS_ENDIAN_MODE_BIG);
+ }
+ return (endian);
}