]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - keystone-rtos/sbl.git/blobdiff - sbl_component.mk
NOTICE OF RELOCATION
[keystone-rtos/sbl.git] / sbl_component.mk
old mode 100644 (file)
new mode 100755 (executable)
index f74aedb..7678444
@@ -66,7 +66,7 @@
 #
 ifeq ($(sbl_component_make_include), )
 
-sbl_BOARDLIST = am65xx_evm am65xx_idk j721e_sim
+sbl_BOARDLIST = am65xx_evm am65xx_idk j721e_evm
 
 sbl_SOCLIST = am65xx j721e
 
@@ -78,12 +78,13 @@ j721e_smp_CORELIST := mcu1_0 mcu2_0 mcu3_0 mpu1_0
 sbl_j721e_CORELIST := mcu1_0 mcu1_1 mcu2_0 mcu2_1 mcu3_0 mcu3_1 mpu1_0 mpu1_1
 j721e_LASTCORE := $(word $(words $(sbl_j721e_CORELIST)), $(sbl_j721e_CORELIST))
 
+sbl_DISABLE_PARALLEL_MAKE = yes
 ############################
 # sbl package
 # List of components included under sbl
 # The components included here are built and will be part of sbl
 ############################
-sbl_LIB_LIST = sbl_lib_mmcsd sbl_lib_ospi sbl_lib_cust
+sbl_LIB_LIST = sbl_lib_mmcsd sbl_lib_ospi sbl_lib_uart sbl_lib_hyperflash sbl_lib_cust
 
 ############################
 # sbl example
@@ -99,7 +100,8 @@ sbl_EXAMPLE_LIST =
 
 # SBL MMCSD LIB
 sbl_lib_mmcsd_COMP_LIST = sbl_lib_mmcsd
-sbl_lib_mmcsd_RELPATH = ti/boot/sbl/mmcsd
+sbl_lib_mmcsd_RELPATH = ti/boot/sbl
+export sbl_lib_mmcsd_OBJPATH = ti/boot/sbl/mmcsd
 sbl_lib_mmcsd_PATH = $(PDK_SBL_COMP_PATH)
 sbl_lib_mmcsd_LIBNAME = sbl_lib_mmcsd
 sbl_lib_mmcsd_LIBPATH = $(PDK_SBL_COMP_PATH)/lib/mmcsd
@@ -125,6 +127,7 @@ export sbl_lib_mmcsd_$(SOC)_CORELIST
 # SBL OSPI LIB
 sbl_lib_ospi_COMP_LIST = sbl_lib_ospi
 sbl_lib_ospi_RELPATH = ti/boot/sbl/ospi
+export sbl_lib_ospi_OBJPATH = ti/boot/sbl/ospi
 sbl_lib_ospi_PATH = $(PDK_SBL_COMP_PATH)
 sbl_lib_ospi_LIBNAME = sbl_lib_ospi
 sbl_lib_ospi_LIBPATH = $(PDK_SBL_COMP_PATH)/lib/ospi
@@ -140,13 +143,65 @@ export sbl_lib_ospi_BOARD_DEPENDENCY
 export sbl_lib_ospi_CORE_DEPENDENCY
 sbl_lib_ospi_PKG_LIST = sbl_lib_ospi
 sbl_lib_ospi_INCLUDE = $(sbl_lib_ospi_PATH)
-sbl_lib_ospi_SOCLIST = am65xx
-sbl_lib_ospi_BOARDLIST = am65xx_evm am65xx_idk
+sbl_lib_ospi_SOCLIST = $(sbl_SOCLIST)
+sbl_lib_ospi_BOARDLIST = $(sbl_BOARDLIST)
 export sbl_lib_ospi_SOCLIST
 export sbl_lib_ospi_BOARDLIST
 sbl_lib_ospi_$(SOC)_CORELIST = mcu1_0
 export sbl_lib_ospi_$(SOC)_CORELIST
 
+# SBL HYPERFLASH LIB
+sbl_lib_hyperflash_COMP_LIST = sbl_lib_hyperflash
+sbl_lib_hyperflash_RELPATH = ti/boot/sbl/hyperflash
+export sbl_lib_hyperflash_OBJPATH = ti/boot/sbl/hyperflash
+sbl_lib_hyperflash_PATH = $(PDK_SBL_COMP_PATH)
+sbl_lib_hyperflash_LIBNAME = sbl_lib_hyperflash
+sbl_lib_hyperflash_LIBPATH = $(PDK_SBL_COMP_PATH)/lib/hyperflash
+sbl_lib_hyperflash_MAKEFILE = -f$(PDK_SBL_COMP_PATH)/build/sbl_lib.mk BOOTMODE=hyperflash
+export sbl_lib_hyperflash_MAKEFILE
+export sbl_lib_hyperflash_LIBNAME
+export sbl_lib_hyperflash_LIBPATH
+sbl_lib_hyperflash_BOARD_DEPENDENCY = yes
+sbl_lib_hyperflash_SOC_DEPENDENCY = yes
+sbl_lib_hyperflash_CORE_DEPENDENCY = no
+export sbl_lib_hyperflash_COMP_LIST
+export sbl_lib_hyperflash_BOARD_DEPENDENCY
+export sbl_lib_hyperflash_CORE_DEPENDENCY
+sbl_lib_hyperflash_PKG_LIST = sbl_lib_hyperflash
+sbl_lib_hyperflash_INCLUDE = $(sbl_lib_hyperflash_PATH)
+sbl_lib_hyperflash_SOCLIST = j721e
+sbl_lib_hyperflash_BOARDLIST = j721e_evm
+export sbl_lib_hyperflash_SOCLIST
+export sbl_lib_hyperflash_BOARDLIST
+sbl_lib_hyperflash_$(SOC)_CORELIST = mcu1_0
+export sbl_lib_hyperflash_$(SOC)_CORELIST
+
+# SBL UART LIB
+sbl_lib_uart_COMP_LIST = sbl_lib_uart
+sbl_lib_uart_RELPATH = ti/boot/sbl
+export sbl_lib_uart_OBJPATH = ti/boot/sbl/uart
+sbl_lib_uart_PATH = $(PDK_SBL_COMP_PATH)
+sbl_lib_uart_LIBNAME = sbl_lib_uart
+sbl_lib_uart_LIBPATH = $(PDK_SBL_COMP_PATH)/lib/uart
+sbl_lib_uart_MAKEFILE = -f$(PDK_SBL_COMP_PATH)/build/sbl_lib.mk BOOTMODE=uart
+export sbl_lib_uart_MAKEFILE
+export sbl_lib_uart_LIBNAME
+export sbl_lib_uart_LIBPATH
+sbl_lib_uart_BOARD_DEPENDENCY = yes
+sbl_lib_uart_SOC_DEPENDENCY = yes
+sbl_lib_uart_CORE_DEPENDENCY = no
+export sbl_lib_uart_COMP_LIST
+export sbl_lib_uart_BOARD_DEPENDENCY
+export sbl_lib_uart_CORE_DEPENDENCY
+sbl_lib_uart_PKG_LIST = sbl_lib_uart
+sbl_lib_uart_INCLUDE = $(sbl_lib_uart_PATH)
+sbl_lib_uart_SOCLIST = $(sbl_SOCLIST)
+sbl_lib_uart_BOARDLIST = $(sbl_BOARDLIST)
+export sbl_lib_uart_SOCLIST
+export sbl_lib_uart_BOARDLIST
+sbl_lib_uart_$(SOC)_CORELIST = mcu1_0
+export sbl_lib_uart_$(SOC)_CORELIST
+
 #
 # SBL Examples
 #
@@ -190,7 +245,7 @@ export sbl_ospi_img_SOC_DEPENDENCY
 export sbl_ospi_img_CORE_DEPENDENCY
 sbl_ospi_img_PKG_LIST = sbl
 sbl_ospi_img_INCLUDE = $(sbl_ospi_img_PATH)
-sbl_ospi_img_BOARDLIST = am65xx_evm am65xx_idk
+sbl_ospi_img_BOARDLIST = $(sbl_BOARDLIST)
 export sbl_ospi_img_BOARDLIST
 sbl_ospi_img_$(SOC)_CORELIST = mcu1_0
 export sbl_ospi_img_$(SOC)_CORELIST
@@ -198,6 +253,54 @@ sbl_EXAMPLE_LIST += sbl_ospi_img
 sbl_ospi_img_SBL_IMAGEGEN = yes
 export sbl_ospi_img_SBL_IMAGEGEN
 
+# SBL HYPERFLASH Image
+sbl_hyperflash_img_COMP_LIST = sbl_hyperflash_img
+sbl_hyperflash_img_RELPATH = ti/boot/sbl/board/k3
+sbl_hyperflash_img_CUSTOM_BINPATH = $(PDK_SBL_COMP_PATH)/binary/$(BOARD)/hyperflash/bin
+sbl_hyperflash_img_PATH = $(PDK_SBL_COMP_PATH)/board/k3
+sbl_hyperflash_img_MAKEFILE = -f$(PDK_SBL_COMP_PATH)/build/sbl_img.mk BOOTMODE=hyperflash
+export sbl_hyperflash_img_MAKEFILE
+sbl_hyperflash_img_BOARD_DEPENDENCY = yes
+bl_hyperflash_img_SOC_DEPENDENCY = yes
+sbl_hyperflash_img_CORE_DEPENDENCY = no
+export sbl_hyperflash_img_COMP_LIST
+export sbl_hyperflash_img_BOARD_DEPENDENCY
+export sbl_hyperflash_img_SOC_DEPENDENCY
+export sbl_hyperflash_img_CORE_DEPENDENCY
+sbl_hyperflash_img_PKG_LIST = sbl
+sbl_hyperflash_img_INCLUDE = $(sbl_hyperflash_img_PATH)
+sbl_hyperflash_img_BOARDLIST = j721e_evm
+export sbl_hyperflash_img_BOARDLIST
+sbl_hyperflash_img_$(SOC)_CORELIST = mcu1_0
+export sbl_hyperflash_img_$(SOC)_CORELIST
+sbl_EXAMPLE_LIST += sbl_hyperflash_img
+sbl_hyperflash_img_SBL_IMAGEGEN = yes
+export sbl_hyperflash_img_SBL_IMAGEGEN
+
+# SBL UART Image
+sbl_uart_img_COMP_LIST = sbl_uart_img
+sbl_uart_img_RELPATH = ti/boot/sbl/board/k3
+sbl_uart_img_CUSTOM_BINPATH = $(PDK_SBL_COMP_PATH)/binary/$(BOARD)/uart/bin
+sbl_uart_img_PATH = $(PDK_SBL_COMP_PATH)/board/k3
+sbl_uart_img_MAKEFILE = -f$(PDK_SBL_COMP_PATH)/build/sbl_img.mk BOOTMODE=uart
+export sbl_uart_img_MAKEFILE
+sbl_uart_img_BOARD_DEPENDENCY = yes
+sbl_uart_img_SOC_DEPENDENCY = yes
+sbl_uart_img_CORE_DEPENDENCY = no
+export sbl_uart_img_COMP_LIST
+export sbl_uart_img_BOARD_DEPENDENCY
+export sbl_uart_img_SOC_DEPENDENCY
+export sbl_uart_img_CORE_DEPENDENCY
+sbl_uart_img_PKG_LIST = sbl
+sbl_uart_img_INCLUDE = $(sbl_uart_img_PATH)
+sbl_uart_img_BOARDLIST = $(sbl_BOARDLIST)
+export sbl_uart_img_BOARDLIST
+sbl_uart_img_$(SOC)_CORELIST = mcu1_0
+export sbl_uart_img_$(SOC)_CORELIST
+sbl_EXAMPLE_LIST += sbl_uart_img
+sbl_uart_img_SBL_IMAGEGEN = yes
+export sbl_uart_img_SBL_IMAGEGEN
+
 # Individual Core Boot Test
 sbl_boot_test_COMP_LIST = sbl_boot_test
 sbl_boot_test_RELPATH = ti/boot/sbl/example/k3MulticoreApp
@@ -294,10 +397,6 @@ sbl_EXAMPLE_LIST += sbl_multicore_smp
 sbl_multicore_smp_SBL_APPIMAGEGEN = no
 export sbl_multicore_smp_SBL_APPIMAGEGEN
 
-# 0 - use cpu for reads (slower, no $ coherency ops needed), smaller SBL
-# 1 - use dma for data reads (faster, $ coherency ops needed), larger SBL
-SBL_CFLAGS = -DSBL_USE_DMA=1
-
 # R5 boot XIP Test
 sbl_boot_xip_test_COMP_LIST = sbl_boot_xip_test
 sbl_boot_xip_test_RELPATH = ti/boot/sbl/example/k3MulticoreApp
@@ -356,6 +455,10 @@ export sbl_boot_xip_entry_SBL_APPIMAGEGEN
 # debugging and tuning performace knobs
 #SBL_CFLAGS += -DSBL_DISPLAY_PROFILE_INFO
 
+# 0 - use cpu for reads (slower, no $ coherency ops needed), smaller SBL
+# 1 - use dma for data reads (faster, $ coherency ops needed), larger SBL
+SBL_CFLAGS += -DSBL_USE_DMA=1
+
 ###### Use boot_perf_benchmark example#######
 ###### to fine tune the perf knobs  #########
 
@@ -390,7 +493,7 @@ SBL_CFLAGS += -DSBL_ENABLE_DDR
 # make sure that SBL_SKIP_MCU_RESET is also
 # enabled, as resetting a core needs SYSFW
 # to be running.
-# SBL_CFLAGS += SBL_SKIP_SYSFW_INIT
+# SBL_CFLAGS += -DSBL_SKIP_SYSFW_INIT
 
 # If enabled, SBL will skip calling
 # Sciclient_boardCfg* API.  Enabling
@@ -398,29 +501,40 @@ SBL_CFLAGS += -DSBL_ENABLE_DDR
 # functionality. The app must call the
 # Sciclient_boardCfg* APIs that the SBL
 # skips. Like for eg, if SBL skips calling
-# Sciclient_boardCfgPm, the UART_printf will
-# get garbled, adn teh app must call
-# Sciclient_boardCfgPm to have UART_printf
-# workign again
-#to work again.
-#SBL_CFLAGS += SBL_SKIP_BRD_CFG_BOARD
-#SBL_CFLAGS += SBL_SKIP_BRD_CFG_BOARD_RM
-#SBL_CFLAGS += SBL_SKIP_BRD_CFG_BOARD_SEC
+# Sciclient_boardCfgPm, then Sciclient_boardCfgRm
+# and Sciclient_boardCfgSec must also
+# be skipped.
+#SBL_CFLAGS += -DSBL_SKIP_BRD_CFG_BOARD
+#SBL_CFLAGS += -DSBL_SKIP_BRD_CFG_RM
+#SBL_CFLAGS += -DSBL_SKIP_BRD_CFG_SEC
 #SBL_CFLAGS += -DSBL_SKIP_BRD_CFG_PM
 
+# If enabled, SBL will not enable all the
+# PLLs and Clocks, user can specify a
+# subset of PLLs and clocks in board
+# that is needed only for the application
+# startup. The rest can be initialized by the
+# app to save boot time or if the application
+# usecase demands it.
+#SBL_CFLAGS += -DSBL_ENABLE_CUST_PLLS
+#SBL_CFLAGS += -DSBL_ENABLE_CUST_CLOCKS
 ###########END BOOT PERF KNOBS#############
 
 # Example - Building Custom SBL Images
 # Build and SBl with custom flags to change
 # different build configurations
-CUST_SBL_TEST_SOCS = am65xx
-CUST_SBL_TEST_BOARDS = am65xx_evm
+CUST_SBL_TEST_SOCS = am65xx j721e
+CUST_SBL_TEST_BOARDS = am65xx_evm j721e_evm
+#CUST_SBL_TEST_FLAGS =" -DSBL_USE_DMA=1 -DSBL_LOG_LEVEL=0 -DSBL_SCRATCH_MEM_START=0x70100000 -DSBL_SCRATCH_MEM_SIZE=0xF0000 -DSBL_SKIP_MCU_RESET  -DBOOT_OSPI "
 #CUST_SBL_TEST_FLAGS =" -DSBL_USE_DMA=1 -DSBL_LOG_LEVEL=0 -DSBL_SCRATCH_MEM_START=0x70100000 -DSBL_SKIP_MCU_RESET -DSBL_SKIP_BRD_CFG_PM -DBOOT_OSPI "
-CUST_SBL_TEST_FLAGS =" -DSBL_USE_DMA=0 -DSBL_LOG_LEVEL=1 -DSBL_SCRATCH_MEM_START=0x70100000 -DSBL_SCRATCH_MEM_SIZE=0xF0000 -DSBL_ENABLE_PLL -DSBL_ENABLE_CLOCKS -DSBL_SKIP_MCU_RESET -DBOOT_OSPI"
+#CUST_SBL_TEST_FLAGS =" -DSBL_USE_DMA=0 -DSBL_LOG_LEVEL=0 -DSBL_SCRATCH_MEM_START=0x70100000 -DSBL_SCRATCH_MEM_SIZE=0xF0000 -DSBL_SKIP_SYSFW_INIT -DSBL_SKIP_MCU_RESET -DBOOT_OSPI"
+#CUST_SBL_TEST_FLAGS =" -DSBL_USE_DMA=1 -DSBL_LOG_LEVEL=1 -DSBL_SCRATCH_MEM_START=0xB8000000 -DSBL_SCRATCH_MEM_SIZE=0x4000000 -DSBL_ENABLE_PLL -DSBL_ENABLE_CLOCKS -DSBL_ENABLE_DDR -DSBL_SKIP_MCU_RESET -DBOOT_OSPI"
+CUST_SBL_TEST_FLAGS =" -DSBL_USE_DMA=0 -DSBL_LOG_LEVEL=1 -DSBL_SCRATCH_MEM_START=0x70100000 -DSBL_SCRATCH_MEM_SIZE=0xF0000 -DSBL_ENABLE_PLL -DSBL_ENABLE_CLOCKS -DSBL_ENABLE_CUST_PLLS -DSBL_ENABLE_CUST_CLOCKS -DSBL_SKIP_MCU_RESET -DBOOT_OSPI"
 
 # SBL Custom LIB
 sbl_lib_cust_COMP_LIST = sbl_lib_cust
-sbl_lib_cust_RELPATH = ti/boot/sbl/cust
+sbl_lib_cust_RELPATH = ti/boot/sbl
+export sbl_lib_cust_OBJPATH = ti/boot/sbl/cust
 sbl_lib_cust_PATH = $(PDK_SBL_COMP_PATH)
 sbl_lib_cust_LIBNAME = sbl_lib_cust
 sbl_lib_cust_LIBPATH = $(PDK_SBL_COMP_PATH)/lib/cust
@@ -495,6 +609,14 @@ sbl_EXAMPLE_LIST += sbl_boot_perf_test
 sbl_boot_perf_test_SBL_APPIMAGEGEN = yes
 export sbl_boot_perf_test_SBL_APPIMAGEGEN
 
+# SBL not supported for any profile
+# other than release
+ifneq ($(BUILD_PROFILE), release)
+sbl_LIB_LIST =
+sbl_EXAMPLE_LIST =
+SBL_CFLAGS =
+endif # ifneq ($(BUILD_PROFILE), release)
+
 export sbl_LIB_LIST
 export sbl_EXAMPLE_LIST
 export SBL_CFLAGS