PRSDK-6243: Adds support for AVS Class 0 to J721E SBL

[keystone-rtos/sbl.git] / soc / k3 / sbl_soc_cfg.h

diff --git a/soc/k3/sbl_soc_cfg.h b/soc/k3/sbl_soc_cfg.h
index 9d8ab181d2dcbad1a42a6f2ebb4c3315f70db2d0..6fc0fa33fa4e5da7d381f7d8325522abf7c61fb6 100755 (executable)
--- a/soc/k3/sbl_soc_cfg.h
+++ b/soc/k3/sbl_soc_cfg.h
@@ -38,6 +38,7 @@
 /*                             Include Files                                  */
 /* ========================================================================== */
 #include <ti/csl/soc.h>
+#include <ti/csl/cslr_vtm.h>
 #include <ti/drv/sciclient/sciclient.h>
 
 #if defined (SOC_J721E)
@@ -64,6 +65,26 @@ typedef struct
 
 extern sblRatCfgInfo_t* sblRatCfgList;
 
+/* Structure holding information about the Leo PMIC configuration*/
+typedef struct
+{
+    /* I2C slave address of the PMIC. */
+    uint8_t    slaveAddr;
+    /* ID of the power resource. */
+    uint8_t    powerResource;
+    /* Voltage associated with resource in millivolts. */
+    uint16_t    millivolts;
+
+}sblCfgPmic_t;
+
+extern uint16_t sblMapOtpVidToMilliVolts[256];
+
+#define SBL_MAX_VTM_VDS        (8U)
+#define SBL_OPP_LOW            (CSL_VTM_CFG1_OPPVID_OPP_LOW_DFLT_SHIFT)
+#define SBL_OPP_NOM            (CSL_VTM_CFG1_OPPVID_OPP_NOM_DFLT_SHIFT)
+#define SBL_OPP_ODR            (CSL_VTM_CFG1_OPPVID_OPP_ODR_DFLT_SHIFT)
+#define SBL_OPP_TRB            (CSL_VTM_CFG1_OPPVID_OPP_TRB_DFLT_SHIFT)
+
 #if defined (SOC_AM65XX)
 
 #define SBL_MCU_ATCM_BASE      (CSL_MCU_ATCM_BASE)