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raw | patch | inline | side by side (parent: 15aef4e)
raw | patch | inline | side by side (parent: 15aef4e)
author | Madan Srinivas <a0756974@ti.com> | |
Wed, 5 Dec 2018 16:23:45 +0000 (11:23 -0500) | ||
committer | Madan Srinivas <a0756974@ti.com> | |
Wed, 5 Dec 2018 16:26:04 +0000 (11:26 -0500) |
This patch also updates the SBL to load the SYSFW binary as a
separate binary. This change applies to all boot modes and was
needed as the SPI DMA and FAT libs increased the size of the SBL
beyond the ROM limit of 384Kbyes.
Cleanup: moves ospi specific code that was incorectly in sbl_soc.c
to common ospi specific source files
Signed-off-by: Madan Srinivas<madans@ti.com>
separate binary. This change applies to all boot modes and was
needed as the SPI DMA and FAT libs increased the size of the SBL
beyond the ROM limit of 384Kbyes.
Cleanup: moves ospi specific code that was incorectly in sbl_soc.c
to common ospi specific source files
Signed-off-by: Madan Srinivas<madans@ti.com>
build/sbl_img.mk | patch | blob | history | |
build/sbl_lib.mk | patch | blob | history | |
soc/k3/linker.cmd | patch | blob | history | |
soc/k3/sbl_sci_client.c | patch | blob | history | |
soc/k3/sbl_sci_client.h | patch | blob | history | |
soc/k3/sbl_soc.c | [deleted file] | patch | blob | history |
src/mmcsd/sbl_mmcsd.c | patch | blob | history | |
src/mmcsd/sbl_mmcsd.h | patch | blob | history | |
src/ospi/sbl_ospi.c | patch | blob | history | |
src/ospi/sbl_ospi.h | patch | blob | history |
diff --git a/build/sbl_img.mk b/build/sbl_img.mk
index 02811c99f09f81d85d96361a84497ad9fc3245d6..c3daa8590a2d30ae930f35f63347b8e41f97f07c 100644 (file)
--- a/build/sbl_img.mk
+++ b/build/sbl_img.mk
endif # ifeq ($(BOOTMODE), mmcsd)
ifeq ($(BOOTMODE), ospi)
- COMP_LIST_COMMON += spi
+ COMP_LIST_COMMON += spi_dma udma
endif # ifeq ($(BOOTMODE), ospi)
SRCS_COMMON += sbl_main.c
diff --git a/build/sbl_lib.mk b/build/sbl_lib.mk
index d621e3d4c390219ed9408cb6fc0a843fb17ce508..239fcc6c821f819df0c480905cc969ed44b0eef9 100644 (file)
--- a/build/sbl_lib.mk
+++ b/build/sbl_lib.mk
PACKAGE_SRCS_COMMON =
# Common source files and CFLAGS across all platforms and cores
-SRCS_COMMON = sbl_soc.c
-SRCS_COMMON += sbl_rprc.c
+SRCS_COMMON = sbl_rprc.c
SRCS_COMMON += sbl_slave_core_boot.c
SRCS_COMMON += UART_soc.c
SRCS_am65xx += sbl_sci_client.c
+SRCS_ASM_am65xx += sbl_misc.asm
# BOOTMODE specific CFLAGS
ifeq ($(BOOTMODE), mmcsd)
diff --git a/soc/k3/linker.cmd b/soc/k3/linker.cmd
index c879c9ff4909638aa489e803b23e4840a25bc095..8ce51e10d05ab01b979f518fae3471ed0302bfbc 100755 (executable)
--- a/soc/k3/linker.cmd
+++ b/soc/k3/linker.cmd
/* Reset Vectors base address(RESET_VECTORS) should be 64 bytes aligned */
RESET_VECTORS (X) : origin=0x41C00100 length=0x100
- /* MCU0 memory used for SYSFW. Fully available to app for use ~257KB */
- OCMRAM_SBL_SYSFW (RWIX) : origin=0x41C00200 length=0x40400
-
- /* MCU0 memory used for SBL. Available to app for dynamic use ~60KB */
- OCMRAM_SBL (RWIX) : origin=0x41C40600 length=0x57000 - 0x40600
-
+ /* MCU0 memory used for SBL. Available to app for dynamic use ~160KB */
/* RBL uses 0x41C58000 and beyond. SBL, at load cannot cross this */
- /* Used by SBL at runtime. Available to app for dynamic use ~36KB */
- OCMRAM_SBL_RUNTIME (RWIX) : origin=0x41C57000 length=0x60000 - 0x57000
+ OCMRAM_SBL (RWIX) : origin=0x41C00200 length=0x28000-0x200
+
+ /* Used by SBL at runtime to load SYSFW. Available to app for dynamic use */
+ OCMRAM_SBL_SYSFW (RWIX) : origin=0x41C28000 length=0x40000
} /* end of MEMORY */
.pinit : {} palign(8) > OCMRAM_SBL
.data : {} palign(128) > OCMRAM_SBL
.boardcfg_data : {} palign(128) > OCMRAM_SBL
- .bss : {} align(4) > OCMRAM_SBL_RUNTIME
- .sysmem : {} > OCMRAM_SBL_RUNTIME
- .stack : {} align(4) > OCMRAM_SBL_RUNTIME (HIGH)
- .irqStack : {. = . + __IRQ_STACK_SIZE;} align(4) > OCMRAM_SBL_RUNTIME (HIGH)
+ .bss : {} align(4) > OCMRAM_SBL
+ .sysmem : {} > OCMRAM_SBL
+ .stack : {} align(4) > OCMRAM_SBL (HIGH)
+ .irqStack : {. = . + __IRQ_STACK_SIZE;} align(4) > OCMRAM_SBL (HIGH)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
- .fiqStack : {. = . + __FIQ_STACK_SIZE;} align(4) > OCMRAM_SBL_RUNTIME (HIGH)
+ .fiqStack : {. = . + __FIQ_STACK_SIZE;} align(4) > OCMRAM_SBL (HIGH)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
- .abortStack : {. = . + __ABORT_STACK_SIZE;} align(4) > OCMRAM_SBL_RUNTIME (HIGH)
+ .abortStack : {. = . + __ABORT_STACK_SIZE;} align(4) > OCMRAM_SBL (HIGH)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
- .undStack : {. = . + __UND_STACK_SIZE;} align(4) > OCMRAM_SBL_RUNTIME (HIGH)
+ .undStack : {. = . + __UND_STACK_SIZE;} align(4) > OCMRAM_SBL (HIGH)
RUN_START(__UND_STACK_START)
RUN_END(__UND_STACK_END)
- .svcStac : {. = . + __SVC_STACK_SIZE;} align(4) > OCMRAM_SBL_RUNTIME (HIGH)
+ .svcStac : {. = . + __SVC_STACK_SIZE;} align(4) > OCMRAM_SBL (HIGH)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
-
-/* Additional sections settings */
-
.firmware : {} palign(8) > OCMRAM_SBL_SYSFW
} /* end of SECTIONS */
index 35cf3c7aefca062bd85a9946cbbb09a4ef0ac81d..08dc014e16be7b9694ed3dba9849d0090f8a7efd 100644 (file)
--- a/soc/k3/sbl_sci_client.c
+++ b/soc/k3/sbl_sci_client.c
#include <ti/drv/uart/UART_stdio.h>
#include <ti/board/board.h>
#include <sbl_soc.h>
+#include <sbl_err_trap.h>
#include <sbl_sci_client.h>
#pragma DATA_SECTION(gSciclient_firmware, ".firmware")
-static const uint32_t gSciclient_firmware[BINARY_FILE_SIZE_IN_BYTES / 4U] = SCICLIENT_FIRMWARE;
+uint32_t gSciclient_firmware[1];
static void SBL_UartLogDisable(void)
{
{
TISCI_MSG_VERSION,
TISCI_MSG_FLAG_AOP,
- NULL,
+ (uint8_t *)NULL,
0,
SCICLIENT_SERVICE_WAIT_FOREVER
};
{
0,
(uint8_t *) &response,
- sizeof (response)
+ (uint32_t)sizeof (response)
};
/* Prevent garbage from appearing on logs */
SBL_UartLogDisable();
+ status = SBL_ReadSysfwImage(gSciclient_firmware, BINARY_FILE_SIZE_IN_BYTES);
+ if (status != CSL_PASS)
+ {
+ SBL_log(SBL_LOG_ERR,"SYSFW read...FAILED \n");
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
status = Sciclient_loadFirmware(gSciclient_firmware);
- SBL_log(SBL_LOG_NONE, "Bug-fix delay.. \n");
if (status != CSL_PASS)
{
SBL_log(SBL_LOG_ERR,"SYSFW load...FAILED \n");
- for(;;);
+ SblErrLoop(__FILE__, __LINE__);
}
status = Sciclient_init(&config);
if (status != CSL_PASS)
{
SBL_log(SBL_LOG_ERR,"SYSFW init ...FAILED \n");
- for(;;);
+ SblErrLoop(__FILE__, __LINE__);
}
- status = Sciclient_boardCfg(NULL);
- status = Sciclient_boardCfgPm(NULL);
- status = Sciclient_boardCfgRm(NULL);
- status = Sciclient_boardCfgSec(NULL);
+ status = Sciclient_boardCfg((Sciclient_BoardCfgPrms_t *)NULL);
if (status != CSL_PASS)
{
SBL_log(SBL_LOG_ERR,"SYSFW board config ...FAILED \n");
- for(;;);
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
+ status = Sciclient_boardCfgPm((Sciclient_BoardCfgPrms_t *)NULL);
+ if (status != CSL_PASS)
+ {
+ SBL_log(SBL_LOG_ERR,"SYSFW board config pm...FAILED \n");
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
+ status = Sciclient_boardCfgRm((Sciclient_BoardCfgPrms_t *)NULL);
+ if (status != CSL_PASS)
+ {
+ SBL_log(SBL_LOG_ERR,"SYSFW board config rm...FAILED \n");
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
+ status = Sciclient_boardCfgSec((Sciclient_BoardCfgPrms_t *)NULL);
+ if (status != CSL_PASS)
+ {
+ SBL_log(SBL_LOG_ERR,"SYSFW board config sec...FAILED \n");
+ SblErrLoop(__FILE__, __LINE__);
}
status = Sciclient_service(&reqPrm, &respPrm);
if (CSL_PASS == status)
{
- if (respPrm.flags == TISCI_MSG_FLAG_ACK)
+ if (respPrm.flags == (uint32_t)TISCI_MSG_FLAG_ACK)
{
- status = CSL_PASS;
SBL_log(SBL_LOG_MIN,"SYSFW ver %s running\n", (char *) response.str);
}
else
{
SBL_log(SBL_LOG_ERR,"SYSFW Get Version failed \n");
- for(;;);
+ SblErrLoop(__FILE__, __LINE__);
}
}
index 7d60923354c5256865e1e67193fe561558b2ad25..9ee3eb855f945f91c531d80533ffc89814baf0f0 100644 (file)
--- a/soc/k3/sbl_sci_client.h
+++ b/soc/k3/sbl_sci_client.h
#ifndef SBL_SCI_CLIENT_H
#define SBL_SCI_CLIENT_H
+#include "sbl_log.h"
#include <ti/board/board.h>
#include <ti/drv/sciclient/sciclient.h>
*/
void SBL_SciClientInit(void);
+/**
+ * @brief - SBL_ReadSysfwImage() - function to do read DMSC firmware.
+ *
+ * @param pBuffer [IN] Pointer to buffer large enough for SYSFW
+ * @param num_bytes [IN] Size in bytes of system firmware bnary
+ *
+ * @return CSL_PASS on success, CSL_EFAIL failure
+ *
+ * Loops forever if error occurs
+ *
+ */
+int32_t SBL_ReadSysfwImage(void *pBuffer, uint32_t num_bytes);
+
#endif
diff --git a/soc/k3/sbl_soc.c b/soc/k3/sbl_soc.c
--- a/soc/k3/sbl_soc.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the
- * distribution.
- *
- * Neither the name of Texas Instruments Incorporated nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "sbl_soc.h"
-
-#include <ti/board/board_cfg.h>
-#include <ti/board/src/flash/include/board_flash.h>
-
-#include <ti/drv/spi/soc/SPI_soc.h>
-#include <ti/drv/spi/src/v0/OSPI_v0.h>
-
-#include <ti/csl/arch/r5/csl_arm_r5.h>
-#include <ti/csl/arch/r5/interrupt.h>
-
-#if defined (BOOT_OSPI)
-int32_t SBL_ospiInit(void *handle)
-{
- OSPI_v0_HwAttrs ospi_cfg;
-
- /* Get the default SPI init configurations */
- OSPI_socGetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);
-
- /* Modify the default SPI configurations if necessary */
- /* Turning off interrupts for baremetal mode. May be re-enabled by app */
- ospi_cfg.intrEnable = false;
-
- /* Set the default SPI init configurations */
- OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);
-
- *(Board_flashHandle *) handle = Board_flashOpen(BOARD_FLASH_ID_MT35XU512ABA1G12,
- BOARD_OSPI_NOR_INSTANCE, NULL);
-
- if (*(uint32_t *) handle == 0)
- {
- return -1;
- }
- return 0;
-}
-
-int32_t SBL_ospiFlashRead(void *handle, uint8_t *dst, uint32_t length,
- uint32_t offset)
-{
- Board_flashHandle h = *(Board_flashHandle *) handle;
-
- if (Board_flashRead(h, offset, dst, length, NULL))
- {
- return -1;
- }
-
- return 0;
-}
-
-int32_t SBL_ospiClose(void *handle)
-{
- Board_flashHandle h = *(Board_flashHandle *) handle;
- Board_flashClose(h);
- return 0;
-}
-#endif /* end of BOOT_OSPI definitions */
diff --git a/src/mmcsd/sbl_mmcsd.c b/src/mmcsd/sbl_mmcsd.c
index b6cc49b9a1497a474c594be711f6124edcf9f9f0..2e711522210513067297cd4d9cf4b1dc40e5d948 100644 (file)
--- a/src/mmcsd/sbl_mmcsd.c
+++ b/src/mmcsd/sbl_mmcsd.c
/* TI-RTOS Header files */
#include <ti/drv/uart/UART_stdio.h>
#include <ti/drv/mmcsd/MMCSD.h>
-#include <ti/drv/mmcsd/soc/MMCSD_v1.h>
+#include <ti/drv/mmcsd/soc/MMCSD_soc.h>
#include <ti/drv/mmcsd/src/MMCSD_osal.h>
/* FATFS header file */
/* SBL Header files. */
#include "sbl_rprc_parse.h"
+#include "sbl_mmcsd.h"
+
+/* K3 Header files */
+#ifdef BUILD_MCU
+#include <sbl_sci_client.h>
+#endif
#ifdef SECURE_BOOT
#include "sbl_sec.h"
/* ========================================================================== */
/* MMCSD function table for MMCSD implementation */
FATFS_DrvFxnTable FATFS_drvFxnTable = {
- MMCSD_close,
- MMCSD_control,
- MMCSD_init,
- MMCSD_open,
- MMCSD_write,
- MMCSD_read
+ &MMCSD_close,
+ &MMCSD_control,
+ &MMCSD_init,
+ &MMCSD_open,
+ &MMCSD_write,
+ &MMCSD_read
};
/* FATFS configuration structure */
/* FATFS objects */
FATFS_Object FATFS_objects[_VOLUMES];
+/* FATFS Handle */
+FATFS_Handle sbl_fatfsHandle = NULL;
+
/* FATFS configuration structure */
const FATFS_Config FATFS_config[_VOLUMES + 1] = {
{
extern SBL_incomingBootData_S sblInBootData;
#endif
+#ifdef BUILD_MCU
+int32_t SBL_ReadSysfwImage(void *pBuffer, uint32_t num_bytes)
+{
+ int32_t retVal = CSL_PASS;
+ const TCHAR *fileName = "/sysfw.bin";
+ FIL fp;
+ FRESULT fresult;
+ uint32_t bytes_read = 0;
+ MMCSD_v2_HwAttrs hwAttrsConfig;
+
+ if(MMCSD_socGetInitCfg(FATFS_initCfg[0].drvInst,&hwAttrsConfig)!=0) {
+ UART_printf("\nUnable to get config.Exiting. TEST FAILED.\r\n");
+ retVal = E_FAIL;
+ }
+
+ hwAttrsConfig.enableInterrupt = ((uint32_t)(0U));
+ hwAttrsConfig.configSocIntrPath=NULL;
+
+ if(MMCSD_socSetInitCfg(FATFS_initCfg[0].drvInst,&hwAttrsConfig)!=0) {
+ UART_printf("\nUnable to set config.Exiting. TEST FAILED.\r\n");
+ retVal = E_FAIL;
+ }
+
+ if (sbl_fatfsHandle)
+ {
+ }
+ else
+ {
+ /* Initialization of the driver. */
+ FATFS_init();
+
+ /* MMCSD FATFS initialization */
+ FATFS_open(0U, NULL, &sbl_fatfsHandle);
+ }
+
+ fresult = f_open(&fp, fileName, ((BYTE)FA_READ));
+ if (fresult != FR_OK)
+ {
+ UART_printf("\n SD Boot - sysfw File open fails \n");
+ retVal = E_FAIL;
+ }
+ fresult = f_read(&fp, pBuffer, num_bytes, &bytes_read);
+ if (fresult != FR_OK)
+ {
+ UART_printf("\n SD Boot - sysfw read fails \n");
+ retVal = E_FAIL;
+ }
+
+ f_close(&fp);
+
+ return retVal;
+}
+#endif
+
int32_t SBL_MMCBootImage(sblEntryPoint_t *pEntry)
{
- int32_t retVal;
- char *fileName = "/app";
+ int32_t retVal = E_PASS;
+ const TCHAR *fileName = "/app";
FIL fp;
FRESULT fresult;
- FATFS_Handle fatfsHandle = NULL;
+
#ifdef SECURE_BOOT
uint32_t authenticated = 0;
MMCSDInitCfg[1].cardType = MMCSD_CARD_SD;
#endif
- /* Initialization of the driver. */
- fresult = (FRESULT)FATFS_init();
-
- /* MMCSD FATFS initialization */
- fresult = (FRESULT)FATFS_open(0U, NULL, &fatfsHandle);
+ if (sbl_fatfsHandle)
+ {
+ }
+ else
+ {
+ /* Initialization of the driver. */
+ FATFS_init();
- fresult = f_open(&fp, fileName, (uint8_t) FA_READ);
+ /* MMCSD FATFS initialization */
+ FATFS_open(0U, NULL, &sbl_fatfsHandle);
+ }
+ fresult = f_open(&fp, fileName, ((BYTE)FA_READ));
if (fresult != FR_OK)
{
UART_printf("\n SD Boot - File open fails \n");
uint32_t size)
{
FIL *fp = (FIL *) (fileptr);
+ uint8_t *tmp_buff_ptr = (uint8_t *)buff;
uint32_t i = 0;
uint32_t bytes_read = 0;
uint32_t Max_read = 0x400U; /*setting a fatfs read size of 1k */
FRESULT fresult = FR_OK;
+ int32_t retVal = E_FAIL;
- for (i = 0; i < (size / Max_read); ++i)
+ for (i = ((uint32_t)0U); i < (size / Max_read); ++i)
{
- fresult = f_read(fp, buff, Max_read, &bytes_read);
- buff = (void *)((uint32_t)buff + bytes_read);
+ fresult = f_read(fp, (void *)tmp_buff_ptr, Max_read, &bytes_read);
+ tmp_buff_ptr = tmp_buff_ptr + bytes_read;
if (fresult != FR_OK)
{
break;
}
if (fresult == FR_OK)
{
- fresult = f_read(fp, buff, (uint16_t) (size % Max_read), &bytes_read);
+ fresult = f_read(fp, (void *)tmp_buff_ptr, (UINT) (size % Max_read), &bytes_read);
}
- return fresult;
+ if (fresult == FR_OK)
+ {
+ retVal = E_PASS;
+ }
+
+ return retVal;
}
void SBL_FileSeek(void *fileptr, uint32_t location)
diff --git a/src/mmcsd/sbl_mmcsd.h b/src/mmcsd/sbl_mmcsd.h
index d736477bf769a2741d0cac195cdadf06508f938c..e64958e2541fc39c6aec56efec44d3f2b809bf8d 100644 (file)
--- a/src/mmcsd/sbl_mmcsd.h
+++ b/src/mmcsd/sbl_mmcsd.h
*
*/
-#ifndef _SBL_MMCSD_H_
-#define _SBL_MMCSD_H_
+#ifndef SBL_MMCSD_H
+#define SBL_MMCSD_H
#ifdef __cplusplus
extern "C" {
diff --git a/src/ospi/sbl_ospi.c b/src/ospi/sbl_ospi.c
index c583dc39a639dc896c4fbd1a242791fd59922d09..e2fbee1929b53b60676e5d299119bd1d9af20b0e 100644 (file)
--- a/src/ospi/sbl_ospi.c
+++ b/src/ospi/sbl_ospi.c
#include <stdint.h>
#include "string.h"
+/* SBL Header files. */
+#include "sbl_soc.h"
+#include "sbl_rprc_parse.h"
+#include "sbl_err_trap.h"
+#include "sbl_sci_client.h"
+
/* TI-RTOS Header files */
#include <ti/drv/spi/SPI.h>
+#include <ti/drv/udma/udma.h>
#include <ti/drv/spi/src/SPI_osal.h>
#include <ti/drv/uart/UART_stdio.h>
-
-/* SBL Header files. */
-#include "sbl_rprc_parse.h"
-#include "sbl_soc.h"
+#include <ti/drv/spi/soc/SPI_soc.h>
+#include <ti/drv/spi/src/v0/OSPI_v0.h>
+#include <ti/drv/sciclient/sciclient.h>
+#include <ti/csl/cslr_device.h>
+#include <ti/csl/arch/csl_arch.h>
+#include <ti/csl/arch/r5/csl_arm_r5.h>
+#include <ti/csl/arch/r5/interrupt.h>
+#include <ti/board/board_cfg.h>
+#include <ti/board/src/flash/include/board_flash.h>
+#include "sbl_ospi.h"
#ifdef SECURE_BOOT
#include "sbl_sec.h"
#endif
-/* Macro representing the offset where the App Image has to be written/Read from
+/* Macro representing the offset where the App Image has to be written/Read from
the OSPI Flash.
*/
-#define OSPI_OFFSET_SI (0x80000)
+#define OSPI_OFFSET_SI (0x80000U)
+#define OSPI_OFFSET_SYSFW (0x28000U)
+
+/*
+ * Ring parameters
+ */
+/** \brief Number of ring entries - we can prime this much memcpy operations */
+#define UDMA_TEST_APP_RING_ENTRIES (1U)
+/** \brief Size (in bytes) of each ring entry (Size of pointer - 64-bit) */
+#define UDMA_TEST_APP_RING_ENTRY_SIZE (sizeof(uint64_t))
+/** \brief Total ring memory */
+#define UDMA_TEST_APP_RING_MEM_SIZE (UDMA_TEST_APP_RING_ENTRIES * \
+ UDMA_TEST_APP_RING_ENTRY_SIZE)
+/**
+ * \brief UDMA TR packet descriptor memory.
+ * This contains the CSL_UdmapCppi5TRPD + Padding to sizeof(CSL_UdmapTR15) +
+ * one Type_15 TR (CSL_UdmapTR15) + one TR response of 4 bytes.
+ * Since CSL_UdmapCppi5TRPD is less than CSL_UdmapTR15, size is just two times
+ * CSL_UdmapTR15 for alignment.
+ */
+#define UDMA_TEST_APP_TRPD_SIZE ((sizeof(CSL_UdmapTR15) * 2U) + 4U)
/* OSPI Flash Read Sector API. */
-int32_t SBL_OSPI_ReadSectors(void *dstAddr,
+static int32_t SBL_OSPI_ReadSectors(void *dstAddr,
void *srcOffsetAddr,
uint32_t length);
/* Initialize the OSPI driver and the controller. */
-void SBL_OSPI_Initialize();
+static void SBL_OSPI_Initialize(void);
+static int32_t Ospi_udma_deinit(void);
+static int32_t Ospi_udma_init(OSPI_v0_HwAttrs *cfg);
/* Sets the src address to the given offset address. */
-void SBL_OSPI_seek(void *srcAddr, uint32_t location);
+static void SBL_OSPI_seek(void *srcAddr, uint32_t location);
-int32_t SBL_OSPI_ReadSectors(void *dstAddr,
- void *srcOffsetAddr,
- uint32_t length);
+static void *boardHandle;
-void *boardHandle;
+/*
+ * UDMA driver objects
+ */
+struct Udma_DrvObj gUdmaDrvObj;
+struct Udma_ChObj gUdmaChObj;
+struct Udma_EventObj gUdmaCqEventObj;
+
+static Udma_DrvHandle gDrvHandle = NULL;
+/*
+ * UDMA Memories
+ */
+uint8_t gTxRingMem[UDMA_TEST_APP_RING_MEM_SIZE] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+uint8_t gTxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+uint8_t gUdmaTprdMem[UDMA_TEST_APP_TRPD_SIZE] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+OSPI_dmaInfo gUdmaInfo;
#ifdef SECURE_BOOT
extern SBL_incomingBootData_S sblInBootData;
int32_t SBL_loadOSPIBootData(void);
#endif
+static int32_t Ospi_udma_init(OSPI_v0_HwAttrs *cfg)
+{
+ int32_t retVal = UDMA_SOK;
+ Udma_InitPrms initPrms;
+ uint32_t instId;
+
+ if (gDrvHandle == (Udma_DrvHandle)uint32_to_void_ptr(0U))
+ {
+ /* UDMA driver init */
+ instId = UDMA_INST_ID_MCU_0;
+
+ UdmaInitPrms_init(instId, &initPrms);
+ retVal = Udma_init(&gUdmaDrvObj, &initPrms);
+ if(UDMA_SOK == retVal)
+ {
+ gDrvHandle = &gUdmaDrvObj;
+ }
+ }
+
+ if(gDrvHandle)
+ {
+ gUdmaInfo.drvHandle = (void *)gDrvHandle;
+ gUdmaInfo.chHandle = (void *)&gUdmaChObj;
+ gUdmaInfo.ringMem = (void *)&gTxRingMem[0];
+ gUdmaInfo.cqRingMem = (void *)&gTxCompRingMem[0];
+ gUdmaInfo.tprdMem = (void *)&gUdmaTprdMem[0];
+ gUdmaInfo.eventHandle = (void *)&gUdmaCqEventObj;
+ cfg->dmaInfo = &gUdmaInfo;
+ }
+
+ return (retVal);
+}
+
+static int32_t Ospi_udma_deinit(void)
+{
+ int32_t retVal = UDMA_SOK;
+
+ if (gDrvHandle)
+ {
+ retVal = Udma_deinit(gDrvHandle);
+ if(UDMA_SOK == retVal)
+ {
+ gDrvHandle = NULL;
+ }
+ }
+
+ return (retVal);
+}
+
+int32_t SBL_ReadSysfwImage(void *pBuffer, uint32_t num_bytes)
+{
+ Board_flashHandle handle;
+
+ /* Init SPI driver */
+ SPI_init();
+
+ handle = Board_flashOpen(BOARD_FLASH_ID_MT35XU512ABA1G12,
+ BOARD_OSPI_NOR_INSTANCE, NULL);
+
+ if (handle)
+ {
+ }
+ else
+ {
+ SBL_log(SBL_LOG_ERR, "Board_flashOpen failed!\n");
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
+ Board_flashRead(handle, (uint32_t)OSPI_OFFSET_SYSFW, (uint8_t *)pBuffer, num_bytes, NULL);
+#ifdef BUILD_MCU
+ CSL_armR5CacheWbInv((const void *)pBuffer, uint32_to_int32(num_bytes));
+#endif
+ Board_flashClose(handle);
+ return CSL_PASS;
+}
+
+int32_t SBL_ospiInit(void *handle)
+{
+ OSPI_v0_HwAttrs ospi_cfg;
+ Board_flashHandle h;
+ uint64_t ospi_rclk_freq;
+ uint32_t ospi_clk_id[] = {TISCI_DEV_MCU_FSS0_BUS_OSPI0_RCLK_CLK,
+ TISCI_DEV_MCU_FSS0_BUS_OSPI1_RCLK_CLK };
+ /* uint32_t ospi_clk_parent_id[] = {TISCI_DEV_MCU_FSS0_BUS_OSPI0_RCLK_CLK_PARENT_ADPLLM_HSDIV_WRAP_MCU_1_BUS_HSDIV_CLKOUT4_CLK, */
+ /* TISCI_DEV_MCU_FSS0_BUS_OSPI1_RCLK_CLK_PARENT_ADPLLM_HSDIV_WRAP_MCU_1_BUS_HSDIV_CLKOUT4_CLK }; */
+
+ /* Get the default SPI init configurations */
+ OSPI_socGetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);
+
+ /* Max clocks */
+ /* ospi_cfg.funcClk = OSPI_MODULE_CLK_166M; */
+ /* Sciclient_pmSetModuleClkParent(TISCI_DEV_MCU_FSS0, ospi_clk_id[BOARD_OSPI_NOR_INSTANCE], ospi_clk_parent_id[BOARD_OSPI_NOR_INSTANCE], SCICLIENT_SERVICE_WAIT_FOREVER); */
+
+ ospi_rclk_freq = (uint64_t)ospi_cfg.funcClk;
+ Sciclient_pmSetModuleClkFreq(TISCI_DEV_MCU_FSS0, ospi_clk_id[BOARD_OSPI_NOR_INSTANCE], ospi_rclk_freq, TISCI_MSG_FLAG_AOP, SCICLIENT_SERVICE_WAIT_FOREVER);
+ Sciclient_pmGetModuleClkFreq(TISCI_DEV_MCU_FSS0, ospi_clk_id[BOARD_OSPI_NOR_INSTANCE], &ospi_rclk_freq, SCICLIENT_SERVICE_WAIT_FOREVER);
+ SBL_log(SBL_LOG_MAX, "Detected OSPI_RCLK running @ %dHz\n", uint64_to_int32(ospi_rclk_freq));
+
+ /* Use DMA */
+ ospi_cfg.dmaEnable = true;
+ Ospi_udma_init(&ospi_cfg);
+
+ /* Set the default SPI init configurations */
+ OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);
+
+ h = Board_flashOpen(BOARD_FLASH_ID_MT35XU512ABA1G12,
+ BOARD_OSPI_NOR_INSTANCE, NULL);
+
+ if (h)
+ {
+ *(Board_flashHandle *) handle = h;
+ }
+ else
+ {
+ SBL_log(SBL_LOG_ERR, "Board_flashOpen failed!\n");
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
+ return 0;
+}
+
+int32_t SBL_ospiFlashRead(const void *handle, uint8_t *dst, uint32_t length,
+ uint32_t offset)
+{
+ Board_flashHandle h = *(const Board_flashHandle *) handle;
+
+#ifdef BUILD_MCU
+ CSL_armR5CacheWbInv((const void *)dst, uint32_to_int32(length));
+#endif
+
+ if (Board_flashRead(h, offset, dst, length, NULL))
+ {
+ SBL_log(SBL_LOG_ERR, "Board_flashRead failed!\n");
+ SblErrLoop(__FILE__, __LINE__);
+ }
+
+#ifdef BUILD_MCU
+ CSL_armR5CacheWbInv((const void *)dst, uint32_to_int32(length));
+#endif
+
+ return 0;
+}
+
+int32_t SBL_ospiClose(const void *handle)
+{
+ Board_flashHandle h = *(const Board_flashHandle *) handle;
+ Board_flashClose(h);
+ Ospi_udma_deinit();
+ return 0;
+}
+
int32_t SBL_OSPIBootImage(sblEntryPoint_t *pEntry)
{
int32_t retVal;
retVal = SBL_loadOSPIBootData();
if (retVal == E_PASS)
- {
+ {
/* authentiate it */
authenticated = SBL_authentication(sblInBootData.sbl_boot_buff);
if (authenticated == 0)
{
/* need to skip the TOC headers */
imgOffset = ((uint32_t*)sblInBootData.sbl_boot_buff)[0];
- srcAddr = (uint32_t)(sblInBootData.sbl_boot_buff) + imgOffset;
+ srcAddr = (uint32_t)(sblInBootData.sbl_boot_buff) + imgOffset;
retVal = SBL_MulticoreImageParse((void *)srcAddr, 0, pEntry);
}
}
return retVal;
}
-void SBL_OSPI_Initialize()
+static void SBL_OSPI_Initialize(void)
{
SBL_ospiInit(&boardHandle);
#ifndef SECURE_BOOT
-int32_t SBL_OSPI_ReadSectors(void *dstAddr,
+static int32_t SBL_OSPI_ReadSectors(void *dstAddr,
void *srcOffsetAddr,
uint32_t length)
{
int32_t ret;
- ret = SBL_ospiFlashRead(&boardHandle, (uint8_t *) dstAddr, length,
+ ret = SBL_ospiFlashRead(&boardHandle, (uint8_t *) dstAddr, length,
*((uint32_t *) srcOffsetAddr));
*((uint32_t *) srcOffsetAddr) += length;
return ret;
}
-void SBL_OSPI_seek(void *srcAddr, uint32_t location)
+static void SBL_OSPI_seek(void *srcAddr, uint32_t location)
{
*((uint32_t *) srcAddr) = location;
}
u8Ptr = sblInBootData.sbl_boot_buff;
/* first read a block to figure out the max size */
- retVal = SBL_ospiFlashRead(&boardHandle, sblInBootData.sbl_boot_buff,
+ retVal = SBL_ospiFlashRead(&boardHandle, sblInBootData.sbl_boot_buff,
READ_BUFF_SIZE, OSPI_OFFSET_SI);
if (retVal == E_PASS)
diff --git a/src/ospi/sbl_ospi.h b/src/ospi/sbl_ospi.h
index 4494e9128b8702bf8bd51f4224d5b34a85cca8a5..4519c4186d9d5768b135806ff86a7f5b469f429c 100644 (file)
--- a/src/ospi/sbl_ospi.h
+++ b/src/ospi/sbl_ospi.h
*
*/
-#ifndef _SBL_OSPI_H_
-#define _SBL_OSPI_H_
+#ifndef SBL_OSPI_H
+#define SBL_OSPI_H
#ifdef __cplusplus
extern "C" {
/* ========================================================================== */
/* Include Files */
/* ========================================================================== */
+#include <ti/board/board.h>
+#include "sbl_log.h"
+#include "sbl_typecast.h"
/*
* \brief SBL_OSPIBootImage function initializes the OSPI driver and copies
*/
int32_t SBL_OSPIBootImage(sblEntryPoint_t *pEntry);
+/**
+ * @brief - SBL_ospiInit() - function to do initialize QSPI
+ *
+ *
+ * @param
+ * handle = pointer to return QSPI handle
+ *
+ *
+ * @return - int32t
+ * 0 = Init completed successfully
+ * -1 = Error occurred
+ *
+ *
+ */
+int32_t SBL_ospiInit(void *handle);
+
+/**
+ * @brief - SBL_ospiFlashRead() - function to do flash QSPI
+ *
+ * @param
+ * handle = pointer to QSPI handle
+ * dst = byte pointer to destination
+ * length = size of source to copy
+ * offset = QSPI offset to flash into
+ *
+ * @return - int32t
+ * 0 = Init completed successfully
+ * <0 = Negative value indicate error occurred
+ *
+ */
+int32_t SBL_ospiFlashRead(const void *handle, uint8_t *dst, uint32_t length,
+ uint32_t offset);
+
+/**
+ *
+ * @brief - SBL_ospiClose() - function to do close QSPI handle
+ *
+ *
+ * @param
+ *
+ * handle = pointer to QSPI handle
+ *
+ *
+ * @return - int32t
+ * 0 = Init completed successfully
+ *
+ * -1 = Error occurred
+ *
+ *
+ */
+int32_t SBL_ospiClose(const void *handle);
+
#ifdef __cplusplus
}
#endif