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raw | patch | inline | side by side (parent: 0044ece)
raw | patch | inline | side by side (parent: 0044ece)
author | Madan Srinivas <a0756974@ti.com> | |
Fri, 12 Jul 2019 17:05:42 +0000 (13:05 -0400) | ||
committer | Madan Srinivas <a0756974@ti.com> | |
Fri, 12 Jul 2019 17:18:50 +0000 (13:18 -0400) |
By default, BIOS places the reset vectors in ATCM at address 0.
For ease of use, the SBL must support booting apps built with this
default configuration, even though the hardware defaults do not
support it.
This patch addsupport for bootin R5 applications whose reset
vector and entry point is 0x0
Signed-off-by: Madan Srinivas<madans@ti.com>
For ease of use, the SBL must support booting apps built with this
default configuration, even though the hardware defaults do not
support it.
This patch addsupport for bootin R5 applications whose reset
vector and entry point is 0x0
Signed-off-by: Madan Srinivas<madans@ti.com>
soc/k3/sbl_slave_core_boot.c | patch | blob | history |
index 4fc63da6c4eefecbbfb2fa76b033c2eb932cfb6c..22069bc928432488c56c53697297218edf1d1e90 100644 (file)
@@ -514,7 +514,9 @@ void SBL_SlaveCoreBoot(cpu_core_id_t core_id, uint32_t freqHz, sblEntryPoint_t *
SBL_ADD_PROFILE_POINT;
#if defined(SBL_SKIP_MCU_RESET) && (defined(SBL_SKIP_BRD_CFG_BOARD) || defined(SBL_SKIP_BRD_CFG_PM) || defined(SBL_SKIP_SYSFW_INIT))
+ /* Skip copy if R5 app entry point is already 0 */
if ((core_id == MCU1_CPU0_ID) &&
+ (pAppEntry->CpuEntryPoint[core_id]) &&
(pAppEntry->CpuEntryPoint[core_id] < SBL_INVALID_ENTRY_ADDR))
{
SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
@@ -587,8 +589,12 @@ void SBL_SlaveCoreBoot(cpu_core_id_t core_id, uint32_t freqHz, sblEntryPoint_t *
memset(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), 0xFF, 0x8000);
SBL_log(SBL_LOG_MAX, "& BTCM @0x%x\n", SblBtcmAddr[core_id - MCU1_CPU0_ID]);
memset(((void *)(SblBtcmAddr[core_id - MCU1_CPU0_ID])), 0xFF, 0x8000);
- SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
- memcpy(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), (void *)(pAppEntry->CpuEntryPoint[core_id]), 128);
+ /* Skip copy if R5 app entry point is already 0 */
+ if (pAppEntry->CpuEntryPoint[core_id])
+ {
+ SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
+ memcpy(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), (void *)(pAppEntry->CpuEntryPoint[core_id]), 128);
+ }
}
#ifdef SBL_SKIP_MCU_RESET
@@ -648,8 +654,12 @@ void SBL_SlaveCoreBoot(cpu_core_id_t core_id, uint32_t freqHz, sblEntryPoint_t *
break;
case MCU1_CPU0_ID:
- SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
- memcpy(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), (void *)(proc_set_config_req.bootvector_lo), 128);
+ /* Skip copy if R5 app entry point is already 0 */
+ if (pAppEntry->CpuEntryPoint[core_id])
+ {
+ SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
+ memcpy(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), (void *)(proc_set_config_req.bootvector_lo), 128);
+ }
SBL_log(SBL_LOG_MAX, "Sciclient_procBootReleaseProcessor, ProcId 0x%x...\n", sblSlaveCoreInfoPtr->tisci_proc_id);
status = Sciclient_procBootReleaseProcessor(sblSlaveCoreInfoPtr->tisci_proc_id, TISCI_MSG_FLAG_AOP, SCICLIENT_SERVICE_WAIT_FOREVER);
if (status != CSL_PASS)
@@ -664,8 +674,12 @@ void SBL_SlaveCoreBoot(cpu_core_id_t core_id, uint32_t freqHz, sblEntryPoint_t *
case MCU3_CPU1_ID:
if (pAppEntry->CpuEntryPoint[core_id] < SBL_INVALID_ENTRY_ADDR)
{
- SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
- memcpy(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), (void *)(proc_set_config_req.bootvector_lo), 128);
+ /* Skip copy if R5 app entry point is already 0 */
+ if (pAppEntry->CpuEntryPoint[core_id])
+ {
+ SBL_log(SBL_LOG_MAX, "Copying first 128 byptes from app to MCU ATCM @ 0x%x for core %d\n", SblAtcmAddr[core_id - MCU1_CPU0_ID], core_id);
+ memcpy(((void *)(SblAtcmAddr[core_id - MCU1_CPU0_ID])), (void *)(proc_set_config_req.bootvector_lo), 128);
+ }
SBL_log(SBL_LOG_MAX, "Sciclient_pmSetModuleState Off, DevId 0x%x... \n", sblSlaveCoreInfoPtr->tisci_dev_id);
Sciclient_pmSetModuleState(sblSlaveCoreInfoPtr->tisci_dev_id, TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF, TISCI_MSG_FLAG_AOP, SCICLIENT_SERVICE_WAIT_FOREVER);
SBL_log(SBL_LOG_MAX, "Clearing HALT for ProcId 0x%x...\n", sblSlaveCoreInfoPtr->tisci_proc_id);