PRSDK-4523: Move SBL entry point location

SBL entry point is currently 0x41c00000. This is where the
SBL vector table is loaded. However, in the toplevel makefile,
the vector table address is also defined as 0x41c00000

All application use this address, and this also has implications for
CCS loading. When such an application is laoded by the SBL, the SBLs
vector tables will be overwritten during the app load. Moving the
SBLs vector table so that it is not overwritten by the application.

Moving the vector address in the common linker command file will not work,
as it will cause IRQs to stop working when applications are loaded through CCS.

Signed-off-by: Madan Srinivas <madans@ti.com>

diff --git a/soc/am65xx/linker.cmd b/soc/am65xx/linker.cmd
index 806caf45340faa4f72423f4d76c431ac30519dea..5858fa9805625c2910dd3cddeb0f7cf4cda27ba3 100755 (executable)
--- a/soc/am65xx/linker.cmd
+++ b/soc/am65xx/linker.cmd
@@ -33,9 +33,9 @@ __SVC_STACK_SIZE = 0x1000;
 /* Memory Map                                                                 */
 MEMORY
 {
-       VECTORS (X)                     : origin=0x41C7F000 length=0x1000
+       VECTORS (X)                     : origin=0x41C5F000 length=0x1000
     /*  Reset Vectors base address(RESET_VECTORS) should be 64 bytes aligned  */
-       RESET_VECTORS (X)                       : origin=0x41C00000 length=0x100
+       RESET_VECTORS (X)                       : origin=0x41C00100 length=0x100
     /* MCU0_R5F_0 local view                                                                                             */
     MCU0_R5F_TCMA (X)          : origin=0x0                    length=0x8000
     MCU0_R5F_TCMB0 (RWIX)      : origin=0x41010000     length=0x8000
@@ -45,10 +45,10 @@ MEMORY
     MCU0_R5F1_BTCM (RWIX)      : origin=0x41410000 length=0x8000
 
     /* MCU0 share locations                                                                                                      */
-    OCMRAM_SBL         (RWIX)                  : origin=0x41C00100 length=0x60000 - 0x100           /* ~510KB */
+    OCMRAM_SBL         (RWIX)                  : origin=0x41C00200 length=0x60000 - 0x1200          /* ~510KB */
 
     /* MCU0 share locations                                                                                                      */
-    OCMRAM     (RWIX)                  : origin=0x41c60000 length=0x20000 - 0x1000          /* ~510KB */
+    OCMRAM     (RWIX)                  : origin=0x41c60000 length=0x20000                   /* ~510KB */
 
     /* Maxwell M4 locations                                                                                                      */
     MSMC3      (RWIX)                  : origin=0x70000000 length=0x200000                     /* 2MB */
@@ -74,7 +74,7 @@ SECTIONS
     .pinit     : {} palign(8)          > OCMRAM_SBL
     .bss       : {} align(4)           > OCMRAM_SBL
     .data      : {} palign(128)        > OCMRAM_SBL
-    .boardcfg_data     : {} palign(128)        > OCMRAM
+    .boardcfg_data     : {} palign(128)        > OCMRAM_SBL
        .sysmem         : {}                            > OCMRAM_SBL
        .stack          : {} align(4)           > OCMRAM_SBL  (HIGH)
        .irqStack       : {. = . + __IRQ_STACK_SIZE;} align(4)          > OCMRAM_SBL  (HIGH)