summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: c59b90b)
raw | patch | inline | side by side (parent: c59b90b)
author | Shyam Jagannathan <a0393891@ti.com> | |
Sat, 25 May 2019 02:32:14 +0000 (21:32 -0500) | ||
committer | Sivaraj R <sivaraj@ti.com> | |
Sat, 25 May 2019 05:44:14 +0000 (00:44 -0500) |
Signed-off-by: Shyam Jagannathan <a0393891@ti.com>
tools/ccsLoadDmsc/j721e/launch.js | patch | blob | history |
index 64741df2619e1961f53b3070e3a95396cbb80f17..4946240b1255534b7ffdd1a97c5da55e0a5f00bf 100755 (executable)
// Connect the MCU R5F
dsMCU1_0.target.connect();
-
+
print("Running the board configuration initialization from R5!");
// Load the board configuration init file.
dsMCU1_0.memory.loadProgram(ccs_init_elf_file);
dsMCU1_0.target.halt();
// Run Synchronously for the executable to finish
dsMCU1_0.target.run();
-
+
/* Run the DDR Configuration */
print("Running the DDR configuration... Wait till it completes!");
dsDMSC_0.target.halt();
- dsDMSC_0.expression.evaluate("J7ES_LPDDR4_2133MTs_Config_Late()");
+ dsDMSC_0.expression.evaluate("J7ES_LPDDR4_4266MTs_Config_Late()");
dsDMSC_0.target.runAsynch();
}
}
doEverything();
-