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raw | patch | inline | side by side (parent: e4d02ea)
raw | patch | inline | side by side (parent: e4d02ea)
author | Arun <auppuleti@ti.com> | |
Tue, 17 Feb 2015 00:28:52 +0000 (18:28 -0600) | ||
committer | Eric Ruei <e-ruei1@ti.com> | |
Tue, 17 Feb 2015 01:16:41 +0000 (20:16 -0500) |
Signed-off-by: Arun <auppuleti@ti.com>
device/k2h/src/device_srio_loopback.c | patch | blob | history | |
device/k2k/src/device_srio_loopback.c | patch | blob | history |
index 06f3a68183ab754fe1484c46b1bd26d821c41074..1d47adb56d27c744e028dae1c7b22a907d02940b 100644 (file)
/* QMSS Include */
#include <ti/drv/qmss/qmss_drv.h>
+#include <ti/csl/csl_serdes.h>
#include <ti/csl/csl_serdes_srio.h>
+#include "stdio.h"
+#include "string.h"
/**********************************************************************
************************* LOCAL Definitions **************************
**********************************************************************/
// Write 0 to Boot complete bit
CSL_SRIO_SetBootComplete(hSrio,0);
- uint32_t i;
- CSL_SERDES_RESULT csl_retval;
- CSL_SERDES_STATUS pllstat;
+ CSL_SERDES_RESULT status;
+ CSL_SERDES_LANE_ENABLE_STATUS lane_retval = CSL_SERDES_LANE_ENABLE_NO_ERR;
+ CSL_SERDES_LANE_ENABLE_PARAMS_T serdes_lane_enable_params;
CSL_SERDES_REF_CLOCK serdes_ref_clk;
CSL_SERDES_LINK_RATE serdes_link_rate;
CSL_SERDES_LANE_CTRL_RATE serdes_lane_ctrl_rate;
CSL_SERDES_LOOPBACK serdes_loopback;
+ uint32_t i;
- /* Disable PLL Before Configuring Serdes Reg */
- *(volatile uint32_t *)(srioSerdesVAddr + 0x1ff4) = 0x00000000;
+ memset(&serdes_lane_enable_params, 0, sizeof(serdes_lane_enable_params));
if (refClockMhz == srio_ref_clock_156p25Mhz)
serdes_ref_clk = CSL_SERDES_REF_CLOCK_156p25M;
{
serdes_link_rate = CSL_SERDES_LINK_RATE_5G;
serdes_lane_ctrl_rate = CSL_SERDES_LANE_FULL_RATE;
- }
+ }
if (linkRateGbps == srio_lane_rate_3p125Gbps)
{
serdes_link_rate = CSL_SERDES_LINK_RATE_6p25G;
serdes_lane_ctrl_rate = CSL_SERDES_LANE_HALF_RATE;
}
-
+
if (isLoopbackMode)
serdes_loopback = CSL_SERDES_LOOPBACK_ENABLED;
else
- serdes_loopback = CSL_SERDES_LOOPBACK_DISABLED;
-
- //SB CMU and COMLANE Setup
- csl_retval = CSL_SrioSerdesInit(srioSerdesVAddr, serdes_ref_clk, serdes_link_rate);
-
- if (csl_retval != 0)
- {
- /* Debug */
- while(1);
- }
-
- //SB Lane Setup
- for(i=0; i < 4; i++)
+ serdes_loopback = CSL_SERDES_LOOPBACK_DISABLED;
+
+ serdes_lane_enable_params.base_addr = srioSerdesVAddr;
+ serdes_lane_enable_params.ref_clock = serdes_ref_clk;
+ serdes_lane_enable_params.linkrate = serdes_link_rate;
+ serdes_lane_enable_params.num_lanes = 4;
+ serdes_lane_enable_params.phy_type = SERDES_SRIO;
+ for(i=0; i< serdes_lane_enable_params.num_lanes; i++)
+ {
+ serdes_lane_enable_params.loopback_mode[i] = serdes_loopback;
+ serdes_lane_enable_params.lane_ctrl_rate[i] = serdes_lane_ctrl_rate;
+ }
+ serdes_lane_enable_params.operating_mode = CSL_SERDES_FUNCTIONAL_MODE;
+ serdes_lane_enable_params.lane_mask = 0xF;
+
+ /* CM, C1, C2 are obtained through Serdes Diagnostic BER test */
+ serdes_lane_enable_params.tx_coeff.cm_coeff = 0;
+ serdes_lane_enable_params.tx_coeff.c1_coeff = 0;
+ serdes_lane_enable_params.tx_coeff.c2_coeff = 0;
+ serdes_lane_enable_params.tx_coeff.tx_att = 12;
+ serdes_lane_enable_params.tx_coeff.tx_vreg = 4;
+ /* When RX auto adaptation is on, these are the starting values used for att, boost adaptation */
+ serdes_lane_enable_params.att_start = 7;
+ serdes_lane_enable_params.boost_start = 5;
+ /* Att and Boost values are obtained through Serdes Diagnostic PRBS calibration test */
+ /* For higher speeds PHY-A, force attenuation and boost values */
+ serdes_lane_enable_params.forceattboost = CSL_SERDES_FORCE_ATT_BOOST_DISABLED;
+ serdes_lane_enable_params.force_att_val = 1;
+ serdes_lane_enable_params.force_boost_val = 1;
+
+ status = CSL_SrioSerdesInit(serdes_lane_enable_params.base_addr,
+ serdes_lane_enable_params.ref_clock,
+ serdes_lane_enable_params.linkrate);
+
+ if (status != 0)
{
- CSL_SrioSerdesLaneConfig(srioSerdesVAddr, serdes_ref_clk, serdes_link_rate, i);
+ printf ("Invalid Serdes Init Params\n");
}
- //SB CMU and COMLANE Enable
- CSL_SrioSerdesComEnable(srioSerdesVAddr);
-
//SB Lane Enable
- for(i=0; i < 4; i++)
- {
- CSL_SrioSerdesLaneEnable(srioSerdesVAddr, i, serdes_link_rate, serdes_loopback, serdes_lane_ctrl_rate);
- }
-
- //SB PLL Enable
- CSL_SrioSerdesPllEnable(srioSerdesVAddr);
+ lane_retval = CSL_SerdesLaneEnable(&serdes_lane_enable_params);
- //SB PLL Status Poll
- do
+ if (lane_retval != 0)
{
- pllstat = CSL_SrioSerdesGetStatus(srioSerdesVAddr, 4);
- }while(pllstat == CSL_SERDES_STATUS_PLL_NOT_LOCKED);
+ printf ("Invalid Serdes Lane Enable\n");
+ }
+ printf("Serdes Init Complete\n");
return 0;
}
index 26d58f6cc0c5b4c3dd9ede0b6861c9361475f017..f96a1b58c4664eb084379319c2f125593d9a2697 100644 (file)
/* QMSS Include */
#include <ti/drv/qmss/qmss_drv.h>
+#include <ti/csl/csl_serdes.h>
#include <ti/csl/csl_serdes_srio.h>
+#include "stdio.h"
+#include "string.h"
/**********************************************************************
************************* LOCAL Definitions **************************
**********************************************************************/
// Write 0 to Boot complete bit
CSL_SRIO_SetBootComplete(hSrio,0);
- uint32_t i;
- CSL_SERDES_RESULT csl_retval;
- CSL_SERDES_STATUS pllstat;
+ CSL_SERDES_RESULT status;
+ CSL_SERDES_LANE_ENABLE_STATUS lane_retval = CSL_SERDES_LANE_ENABLE_NO_ERR;
+ CSL_SERDES_LANE_ENABLE_PARAMS_T serdes_lane_enable_params;
CSL_SERDES_REF_CLOCK serdes_ref_clk;
CSL_SERDES_LINK_RATE serdes_link_rate;
CSL_SERDES_LANE_CTRL_RATE serdes_lane_ctrl_rate;
CSL_SERDES_LOOPBACK serdes_loopback;
+ uint32_t i;
- /* Disable PLL Before Configuring Serdes Reg */
- *(volatile uint32_t *)(srioSerdesVAddr + 0x1ff4) = 0x00000000;
+ memset(&serdes_lane_enable_params, 0, sizeof(serdes_lane_enable_params));
if (refClockMhz == srio_ref_clock_156p25Mhz)
serdes_ref_clk = CSL_SERDES_REF_CLOCK_156p25M;
{
serdes_link_rate = CSL_SERDES_LINK_RATE_5G;
serdes_lane_ctrl_rate = CSL_SERDES_LANE_FULL_RATE;
- }
+ }
if (linkRateGbps == srio_lane_rate_3p125Gbps)
{
serdes_link_rate = CSL_SERDES_LINK_RATE_6p25G;
serdes_lane_ctrl_rate = CSL_SERDES_LANE_HALF_RATE;
}
-
+
if (isLoopbackMode)
serdes_loopback = CSL_SERDES_LOOPBACK_ENABLED;
else
- serdes_loopback = CSL_SERDES_LOOPBACK_DISABLED;
-
- //SB CMU and COMLANE Setup
- csl_retval = CSL_SrioSerdesInit(srioSerdesVAddr, serdes_ref_clk, serdes_link_rate);
-
- if (csl_retval != 0)
- {
- /* Debug */
- while(1);
- }
-
- //SB Lane Setup
- for(i=0; i < 4; i++)
+ serdes_loopback = CSL_SERDES_LOOPBACK_DISABLED;
+
+ serdes_lane_enable_params.base_addr = srioSerdesVAddr;
+ serdes_lane_enable_params.ref_clock = serdes_ref_clk;
+ serdes_lane_enable_params.linkrate = serdes_link_rate;
+ serdes_lane_enable_params.num_lanes = 4;
+ serdes_lane_enable_params.phy_type = SERDES_SRIO;
+ for(i=0; i< serdes_lane_enable_params.num_lanes; i++)
+ {
+ serdes_lane_enable_params.loopback_mode[i] = serdes_loopback;
+ serdes_lane_enable_params.lane_ctrl_rate[i] = serdes_lane_ctrl_rate;
+ }
+ serdes_lane_enable_params.operating_mode = CSL_SERDES_FUNCTIONAL_MODE;
+ serdes_lane_enable_params.lane_mask = 0xF;
+
+ /* CM, C1, C2 are obtained through Serdes Diagnostic BER test */
+ serdes_lane_enable_params.tx_coeff.cm_coeff = 0;
+ serdes_lane_enable_params.tx_coeff.c1_coeff = 0;
+ serdes_lane_enable_params.tx_coeff.c2_coeff = 0;
+ serdes_lane_enable_params.tx_coeff.tx_att = 12;
+ serdes_lane_enable_params.tx_coeff.tx_vreg = 4;
+ /* When RX auto adaptation is on, these are the starting values used for att, boost adaptation */
+ serdes_lane_enable_params.att_start = 7;
+ serdes_lane_enable_params.boost_start = 5;
+ /* Att and Boost values are obtained through Serdes Diagnostic PRBS calibration test */
+ /* For higher speeds PHY-A, force attenuation and boost values */
+ serdes_lane_enable_params.forceattboost = CSL_SERDES_FORCE_ATT_BOOST_DISABLED;
+ serdes_lane_enable_params.force_att_val = 1;
+ serdes_lane_enable_params.force_boost_val = 1;
+
+ status = CSL_SrioSerdesInit(serdes_lane_enable_params.base_addr,
+ serdes_lane_enable_params.ref_clock,
+ serdes_lane_enable_params.linkrate);
+
+ if (status != 0)
{
- CSL_SrioSerdesLaneConfig(srioSerdesVAddr, serdes_ref_clk, serdes_link_rate, i);
+ printf ("Invalid Serdes Init Params\n");
}
- //SB CMU and COMLANE Enable
- CSL_SrioSerdesComEnable(srioSerdesVAddr);
-
//SB Lane Enable
- for(i=0; i < 4; i++)
- {
- CSL_SrioSerdesLaneEnable(srioSerdesVAddr, i, serdes_link_rate, serdes_loopback, serdes_lane_ctrl_rate);
- }
-
- //SB PLL Enable
- CSL_SrioSerdesPllEnable(srioSerdesVAddr);
+ lane_retval = CSL_SerdesLaneEnable(&serdes_lane_enable_params);
- //SB PLL Status Poll
- do
+ if (lane_retval != 0)
{
- pllstat = CSL_SrioSerdesGetStatus(srioSerdesVAddr, 4);
- }while(pllstat == CSL_SERDES_STATUS_PLL_NOT_LOCKED);
+ printf ("Invalid Serdes Lane Enable\n");
+ }
+ printf("Serdes Init Complete\n");
return 0;
}