1 /*\r
2 *\r
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
4 * \r
5 * \r
6 * Redistribution and use in source and binary forms, with or without \r
7 * modification, are permitted provided that the following conditions \r
8 * are met:\r
9 *\r
10 * Redistributions of source code must retain the above copyright \r
11 * notice, this list of conditions and the following disclaimer.\r
12 *\r
13 * Redistributions in binary form must reproduce the above copyright\r
14 * notice, this list of conditions and the following disclaimer in the \r
15 * documentation and/or other materials provided with the \r
16 * distribution.\r
17 *\r
18 * Neither the name of Texas Instruments Incorporated nor the names of\r
19 * its contributors may be used to endorse or promote products derived\r
20 * from this software without specific prior written permission.\r
21 *\r
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
33 *\r
34 */\r
35 \r
36 \r
37 \r
38 #include <stdio.h>\r
39 #include <time.h>\r
40 #include <string.h>\r
41 \r
42 /* XDC includes */\r
43 #include <xdc/runtime/IHeap.h>\r
44 \r
45 /* BIOS includes */\r
46 #include <ti/sysbios/knl/Task.h>\r
47 #include <ti/sysbios/BIOS.h>\r
48 #include <ti/sysbios/knl/Semaphore.h>\r
49 #include <ti/sysbios/family/c64p/Hwi.h>\r
50 #include <ti/sysbios/family/c64p/EventCombiner.h>\r
51 #include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
52 \r
53 /* IPC includes */ \r
54 #include <ti/ipc/GateMP.h>\r
55 #include <ti/ipc/Ipc.h>\r
56 #include <ti/ipc/ListMP.h>\r
57 #include <ti/ipc/SharedRegion.h>\r
58 #include <ti/ipc/MultiProc.h>\r
59 \r
60 /* CSL includes */\r
61 #include <ti/csl/soc.h>\r
62 #include <ti/csl/csl_chipAux.h>\r
63 #include <ti/csl/cslr_tpcc.h>\r
64 #include <ti/csl/cslr_tcp3d_cfg.h>\r
65 #include <ti/csl/cslr_tcp3d_dma.h>\r
66 #include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
67 #include <ti/csl/csl_tsc.h>\r
68 #include <ti/csl/csl_cacheAux.h>\r
69 #include <ti/csl/csl_xmcAux.h>\r
70 #include <ti/csl/csl_pscAux.h>\r
71 \r
72 #include "sample.h"\r
73 #include "tcp3d_drv_sample.h"\r
74 #include "tcp3d_main.h"\r
75 \r
76 /**********************************************************************\r
77 ************************** Test Compile Flags ************************\r
78 **********************************************************************/\r
79 #define DEBUG_VARS 0 // add debug variables at different places in the code \r
80 \r
81 #define DEBUG_PRINT 0\r
82 \r
83 #define MY_LOG_PRINT0(x) {\\r
84 if(DEBUG_PRINT)\\r
85 {\\r
86 System_printf(#x"\n");\\r
87 }\\r
88 }\r
89 \r
90 #define MY_LOG_PRINT1(x, val) {\\r
91 if(DEBUG_PRINT)\\r
92 {\\r
93 System_printf(#x" %d\n", val);\\r
94 }\\r
95 }\r
96 \r
97 #define MY_LOG_PRINT2(x, val1, y, val2) {\\r
98 if(DEBUG_PRINT)\\r
99 {\\r
100 System_printf(#x" %d, "#y" %d\n", val1, val2);\\r
101 }\\r
102 }\r
103 \r
104 /**\r
105 * This is used for plotting timing diagram using matlab by collecting the data\r
106 * points from running the code.\r
107 * \r
108 * Requirements:\r
109 * 1) it is required to enable the logging for TCP3D in the Simulator\r
110 * Configuration file. The decoding and reset times are collected from the\r
111 * log file (c:\\Tcp3dDebug.log) generated from running the simulator.\r
112 */\r
113 #define TEST_PROFILE_LOG 1 \r
114 \r
115 /**********************************************************************\r
116 ************************** Test Definitions **************************\r
117 **********************************************************************/\r
118 #define START_CMD_PERIOD 1\r
119 \r
120 /**********************************************************************\r
121 ************************** Test Variables ****************************\r
122 **********************************************************************/\r
123 /* Code Block Test Variables */\r
124 #pragma DATA_SECTION(codeBlockSet, ".main_mem")\r
125 cbTestDesc codeBlockSet;\r
126 \r
127 Char *strMode[4] = {"3GPP(0)","LTE(1)","WIMAX(2)","WCDMA Split(3)"};\r
128 Char *strDBuf[2] = {"Disable(0)","Enable(1)"};\r
129 Char *strInst[2] = {"TCP3D_0(0)","TCP3D_1(1)"};\r
130 \r
131 UInt32 keepTestVectMem = 0;\r
132 UInt32 firstTime = 1;\r
133 UInt32 testMaxCodeBlocks;\r
134 UInt32 dspCoreID;\r
135 \r
136 /* File Operation Variables */\r
137 UInt32 testCntr = 0;\r
138 UInt32 testErrCntr = 0;\r
139 UInt32 totErrCnt;\r
140 #ifdef USE_PDK_INSTALL_BASE\r
141 Char testvectFolderBase[] = "C:\\ti\\csl_lld_keystone2_1_0_0_2\\packages\\ti\\drv\\tcp3d\\example\\testvectors\\";\r
142 #else\r
143 Char testvectFolderBase[] = "..\\..\\testvectors\\";\r
144 #endif\r
145 Char folderName[1000] = "";\r
146 Char *testFolder[] = { "lte", "wcdma", "wimax", };\r
147 /* Number of test folders computed. Alternately can be set manually as length of *testFolder[] array */\r
148 UInt32 numTests = sizeof(testFolder)/sizeof(*testFolder);\r
149 \r
150 /* Throughput calculation variables */\r
151 clock_t total_clock_end, total_clock_start;\r
152 UInt32 test_cycles;\r
153 UInt32 TotalBitsDecoded;\r
154 Float ThroughPut;\r
155 \r
156 /* BIOS variables */\r
157 Semaphore_Handle semRcvDone, semSendBlock, semSendWait, semRcvStart;\r
158 IHeap_Handle dataHeap = NULL;\r
159 IHeap_Handle drvHeap = NULL;\r
160 \r
161 /* Driver configuration variables */\r
162 Tcp3d_Result tcp3dResultSend = TCP3D_DRV_NO_ERR;\r
163 Tcp3d_Instance *tcp3dDrvInst[2] = {NULL, NULL};\r
164 Tcp3d_Instance *inst;\r
165 Tcp3d_Ctrl drvCtrl;\r
166 Tcp3d_Sts drvStatus;\r
167 \r
168 Int32 sendBlockCnt;\r
169 Int32 rcvBlockCnt;\r
170 #if TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT\r
171 UInt32 tempICRegs[15]; /* to store 15 registers */\r
172 #endif\r
173 \r
174 /**\r
175 * EDMA3 LLD & TCP3D Driver Init/Deinit related variables\r
176 */\r
177 EDMA3_DRV_Handle hEdma;\r
178 UInt32 tpccNum;\r
179 UInt32 tpccRegionUsed;\r
180 EDMA_CONFIG edmaConfig[2];\r
181 UInt8 instNum;\r
182 /* Flags used in ISR functions */\r
183 UInt32 pingComplete, pongComplete;\r
184 UInt32 pauseIntr = 0, l2pIntr = 0;\r
185 UInt32 soldoutCntr = 0;\r
186 UInt32 tcp3dEventCntr = 0;\r
187 UInt32 tpccEvtCntr = 0;\r
188 UInt32 rcvStartFlag = 0;\r
189 UInt32 pauseIntFlag = 0;\r
190 UInt32 afterIntrSoldout = 0, afterIntrPause = 0;\r
191 UInt32 pendPauseCntr = 0;\r
192 \r
193 #if DEBUG_VARS\r
194 #include <ti/csl/src/intc/csl_intc.h>\r
195 #include <ti/csl/csl_cpIntcAux.h>\r
196 \r
197 /* To track the RCV task posting */\r
198 volatile Int semCnt;\r
199 \r
200 /* Register pointers */\r
201 CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMA2CC_REGS;\r
202 CSL_CPINTC_RegsOvly cpintc0Regs = (CSL_CPINTC_RegsOvly) CSL_CP_INTC_0_REGS;\r
203 CSL_IntcRegsOvly gemIntcRegs = (CSL_IntcRegsOvly)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS;\r
204 #endif\r
205 \r
206 /**********************************************************************\r
207 *********************** Test Local Functions *************************\r
208 **********************************************************************/\r
209 /**\r
210 * Task Functions\r
211 */\r
212 Void testerTaskFunc(Void);\r
213 Void tskHeartBeat(Void);\r
214 Void sndBlockTaskFunc(Void);\r
215 Void rcvBlockTaskFunc(Void);\r
216 \r
217 /**\r
218 * (De)Init Functions\r
219 */\r
220 Void allInit(Void);\r
221 Void allDeInit(Void);\r
222 Void getMemoryStats(Void);\r
223 \r
224 /**\r
225 * EDMA Channel ISR functions\r
226 */\r
227 Void revt0ChCallback(Void);\r
229 \r
230 /**\r
231 * Cache and other IP functions\r
232 */\r
233 #ifndef SIMULATOR_SUPPORT\r
234 static Int32 enable_ip_instance (UInt32 pwrDmnNum, UInt32 moduleNum);\r
235 #endif\r
236 static Int32 enable_tcp3d (void);\r
237 void tcp3dBeginMemAccess (void *ptr, uint32_t size);\r
238 void tcp3dEndMemAccess (void *ptr, uint32_t size);\r
239 \r
240 #if USE_LOCAL_CPINTC_DISPATCH\r
241 extern Void CpIntc_dispatchLoc(UInt hostInt);\r
242 #endif\r
243 \r
244 Void soldOutAction(Void)\r
245 {\r
246 /* clear flag */\r
247 pauseIntFlag = 0;\r
248 \r
249 #if SOLDOUT_USE_L2P_INTERRUPT\r
250 /**\r
251 * 1) enable L2P channel interrupt to get notified to try enqueue again\r
252 * 2) also enable REVT channel interrupt for PAUSE detection\r
253 */\r
254 /* Set interrupt flag on PAUSE channel */\r
255 drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
256 drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
257 Tcp3d_control(inst, &drvCtrl);\r
258 \r
259 /* Call TCP3D driver control to set interrupt on L2P channel */\r
260 drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
261 drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
262 Tcp3d_control(inst, &drvCtrl);\r
263 #else\r
264 /* keep trying until successful */\r
265 Semaphore_post(semSendBlock);\r
266 #endif\r
267 }\r
268 \r
269 Void soldOutActionClear (Void)\r
270 {\r
271 #if SOLDOUT_USE_L2P_INTERRUPT\r
272 if ( pauseIntFlag )\r
273 {\r
274 afterIntrSoldout++;\r
275 \r
276 /**\r
277 * 1) diable L2P channel interrupt to get notified to try enqueue again\r
278 * 2) also disable REVT channel interrupt for PAUSE detection\r
279 */\r
280 /* Call TCP3D driver control to set interrupt on L2P channel */\r
281 drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
282 drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
283 Tcp3d_control(inst, &drvCtrl);\r
284 \r
285 /* Set interrupt flag on PAUSE channel */\r
286 drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
287 drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
288 Tcp3d_control(inst, &drvCtrl);\r
289 }\r
290 #else\r
291 /* nothing to be done */\r
292 #endif\r
293 }\r
294 \r
295 /*******************************************************************************\r
296 TESTING METHOD 1: Copy test vector folder to workspace\r
297 --------------------------------------------------------------------------------\r
299 placed two levels higher than the unit example project .out file location.\r
300 For example, if the unit example project out file is located under\r
303 2. Ensure that the compile flag USE_PDK_INSTALL_BASE is undefined in\r
305 3. Build the project.\r
306 4. Launch the debug session to load and run the out file.\r
307 \r
308 TESTING METHOD 2: Use the test vector folder from the PDK installation\r
309 --------------------------------------------------------------------------------\r
310 1. In this method, ensure that the compile flag USE_PDK_INSTALL_BASE is defined\r
314 when the USE_PDK_INSTALL_BASE flag is defined.\r
315 3. Build the project.\r
316 4. Launch the debug session to load and run the out file.\r
317 \r
318 By default, example project is configured to test using "METHOD 1"\r
319 ******************************************************************************/\r
320 /*\r
321 * main()\r
322 */\r
323 Void main(Void)\r
324 {\r
325 Task_Params taskParams;\r
326 \r
327 /* Initialize the heap in shared memory. Using IPC module to do that */ \r
328 Ipc_start();\r
329 \r
330 /* Power on TCP3D peripheral before using it */\r
331 if (enable_tcp3d () < 0)\r
332 {\r
333 System_printf ("Error: TCP3D PSC Initialization Failed\n");\r
334 return;\r
335 }\r
336 \r
337 /* Enable time stamp counter */\r
338 CSL_tscEnable();\r
339 \r
340 /* Enable L1D cache. Disable L2 caching for our tests. */\r
341 CACHE_setL1DSize (CACHE_L1_MAXIM3); /* CACHE_L1_0KCACHE */\r
342 CACHE_setL2Size (CACHE_0KCACHE);\r
343 \r
344 /* Initialize the default Task parameters */\r
345 Task_Params_init(&taskParams);\r
346 \r
347 /* Crete the tester Task using default Task parameters */\r
348 Task_create((Task_FuncPtr)testerTaskFunc, &taskParams, NULL);\r
349 \r
350 BIOS_start();\r
351 }\r
352 \r
353 /*******************************************************************************\r
354 ******************************************************************************/\r
355 Void testerTaskFunc(Void)\r
356 {\r
357 Int i;\r
358 Task_Params taskParams;\r
359 Semaphore_Params semParams;\r
360 \r
361 /* Set the one-time global test variables */\r
362 testMaxCodeBlocks = 86; /* max possible used in init */\r
363 dspCoreID = CSL_chipReadDNUM();\r
364 \r
365 /******** Select the TCP3D Instance Number **********/\r
366 instNum = getTcp3dInstNum(dspCoreID);\r
367 \r
368 /* Initialize the default Task parameters */\r
369 Task_Params_init(&taskParams);\r
370 \r
371 /* Initialize the default Semaphore parameters */\r
372 Semaphore_Params_init(&semParams);\r
373 \r
374 /* Crete the Binary Semaphore */\r
375 semParams.mode = Semaphore_Mode_BINARY;\r
376 semRcvDone = Semaphore_create(0, &semParams, NULL);\r
377 \r
378 /* Get the Heap handles - used when ever memory allocations are needed */\r
379 //dataHeap = HeapMem_Handle_upCast(tcp3dDataHeap);\r
380 dataHeap = (IHeap_Handle) SharedRegion_getHeap(0);\r
381 drvHeap = HeapMem_Handle_upCast(tcp3dDrvHeap);\r
382 \r
383 while( testCntr < numTests )\r
384 {\r
385 \r
386 /**\r
387 * Create the Binary semaphores each time using the parameters set\r
388 * outside the tester while loop.\r
389 * \r
390 * It was observed that at times the receive semaphore count was\r
391 * non-zero after the first run and receive task was getting triggered\r
392 * before posting from the ISR callback. So, the semaphores are created\r
393 * for each test to work-around with the problem. \r
394 */\r
395 semSendBlock = Semaphore_create(0, &semParams, NULL);\r
396 semSendWait = Semaphore_create(0, &semParams, NULL);\r
397 semRcvStart = Semaphore_create(0, &semParams, NULL);\r
398 #if DEBUG_VARS\r
399 semCnt = Semaphore_getCount(semRcvStart);\r
400 #endif\r
401 \r
402 /**\r
403 * Create the send and receive tasks for each test using the default\r
404 * tak parameters.\r
405 * \r
406 * NOTE: No need to do the Task_delete() as these tasks have exits.\r
407 */\r
408 Task_create((Task_FuncPtr)sndBlockTaskFunc, &taskParams, NULL);\r
409 Task_create((Task_FuncPtr)rcvBlockTaskFunc, &taskParams, NULL);\r
410 \r
411 System_printf("\n******************************************************************\n");\r
412 System_printf("\n----- TEST #%d STARTED ------\n", testCntr);\r
413 \r
414 /**\r
415 * Prepare data for Code Blocks processing (reading test vector files).\r
416 * Allocates Memory as needed from the tcp3dDataHeap\r
417 */\r
418 if ( firstTime )\r
419 {\r
420 System_printf("\nReading test vector files started (including memory allocation)...\n");\r
421 strcpy(folderName, testvectFolderBase);\r
422 strcat(folderName, testFolder[testCntr]);\r
423 getTestSetCB(dataHeap, &codeBlockSet, folderName);\r
424 System_printf("Reading test vector files complete\n");\r
425 #if DEBUG_PRINT\r
426 System_printf("\tPrepared %d code blocks in %s mode\n", codeBlockSet.maxNumCB, strMode[codeBlockSet.mode]);\r
427 #endif\r
428 firstTime = 0;\r
429 }\r
430 else\r
431 {\r
432 System_printf("\nUsing the test vectors read before\n");\r
433 }\r
434 \r
435 System_printf("\n----- TEST INITIALIZATION STARTED -----\n\n");\r
436 allInit();\r
437 getMemoryStats(); /* Heap Stats */\r
438 System_printf("\n----- TEST INITIALIZATION COMPLETE -----\n\n");\r
439 \r
440 #if TEST_PREPARE_ONLY_BETASTATE\r
441 for (i = 0; i < codeBlockSet.maxNumCB ;i++)\r
442 {\r
443 /* Prepare fixed IC registers using the inCfgParams of first block*/\r
444 Tcp3d_prepFixedConfigRegs(codeBlockSet.cbData[i]->inCfgParams, codeBlockSet.cbData[i]->inCfg);\r
445 \r
446 /* Prepare block size dependent params */\r
447 prepareBlockSizeDepICParams(codeBlockSet.cbData[i]);\r
448 }\r
449 #elif TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT\r
450 /* Prepare fixed IC registers using the inCfgParams of first block*/\r
451 Tcp3d_prepFixedConfigRegs(codeBlockSet.cbData[0]->inCfgParams, tempICRegs);\r
452 #endif\r
453 \r
454 /* Start the Send task first */\r
455 Semaphore_post(semSendBlock);\r
456 \r
457 /* Wait for the Receive task to complete */\r
458 Semaphore_pend(semRcvDone, BIOS_WAIT_FOREVER);\r
459 \r
460 /**\r
461 * Test Profile Calculations\r
462 * \r
463 * (Total Bits)\r
464 * Throughput (Mbps) = -----------------------------\r
465 * (Total Time)*(10^-9)*(10^6)\r
466 * \r
467 */\r
468 TotalBitsDecoded = 0;\r
469 for (i = 0; i < codeBlockSet.maxNumCB; ++i)\r
470 {\r
471 TotalBitsDecoded += codeBlockSet.cbData[i]->blockSize;\r
472 }\r
473 \r
474 test_cycles = (total_clock_end - total_clock_start);\r
475 ThroughPut = TotalBitsDecoded*1.0;\r
476 ThroughPut = (ThroughPut/test_cycles)*1000;\r
477 \r
478 /******** Free code blocks ********/\r
479 if ( keepTestVectMem )\r
480 {\r
481 System_printf("\nNo freeing - Using the test vectors read before\n");\r
482 }\r
483 else\r
484 {\r
485 System_printf("\nTest vectors memory freeing started...\n");\r
486 freeTestSetCB(dataHeap, &codeBlockSet);\r
487 System_printf("Test vectors memory freeing complete\n");\r
488 #if DEBUG_PRINT\r
489 System_printf("\tFreed memory allocated for %d code blocks in %s mode\n", codeBlockSet.maxNumCB, strMode[codeBlockSet.mode]);\r
490 #endif\r
491 firstTime = 1;\r
492 }\r
493 \r
494 System_printf("\n----- TEST DE-INITIALIZATION STARTED -----\n\n");\r
495 allDeInit();\r
496 getMemoryStats(); /* Heap Stats */\r
497 System_printf("\n----- TEST DE-INITIALIZATION COMPLETE -----\n");\r
498 \r
499 if ( totErrCnt > 0 )\r
500 {\r
501 System_printf("\n----- TEST #%d FAILED -----\n", testCntr);\r
502 testErrCntr++;\r
503 }\r
504 else\r
505 {\r
506 System_printf("\n----- TEST #%d PASSED -----\n", testCntr);\r
507 }\r
508 System_printf("\n+++++++++++++++++++++++ TEST #%d SUMMARY +++++++++++++++++++++++++\n", testCntr);\r
509 System_printf("TCP3D Peripheral Configuration\n");\r
510 System_printf(" Instance : %s\n", strInst[instNum]);\r
511 System_printf(" Mode Tested : %s\n", strMode[codeBlockSet.mode]);\r
512 System_printf(" Double Buffer Mode : %s\n", strDBuf[codeBlockSet.doubleBuffer]);\r
513 System_printf("Max code blocks (Input Capacity) : %d\n", testMaxCodeBlocks);\r
514 System_printf("Code blocks sent for decoding : %d\n", codeBlockSet.maxNumCB);\r
515 System_printf("Call back counters : %d - interrupts\n", pauseIntr);\r
516 System_printf(" (%d-SOLDOUT, %d-PAUSE, %d-PENDPAUSE)\n", afterIntrSoldout, afterIntrPause, pendPauseCntr);\r
517 System_printf("Total Notification Interrupts : %d\n", tcp3dEventCntr);\r
518 System_printf("Throughput Calculations\n");\r
519 System_printf(" Total Bits Decoded : %d\n", TotalBitsDecoded);\r
520 System_printf(" Time Taken (in cycles) : %d\n", test_cycles);\r
521 System_printf(" Effective Throughput : %f Mbps\n", ThroughPut);\r
522 System_printf("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");\r
523 \r
524 System_printf("\n******************************************************************\n");\r
525 \r
526 /* Increment the test counter */\r
527 testCntr++;\r
528 \r
529 /**\r
530 * Delete the semaphores each time, so that there is no left over count.\r
531 * See the explanation at the beginning of this loop where the create\r
532 * semaphore calls are present. \r
533 */\r
534 #if DEBUG_VARS\r
535 semCnt = Semaphore_getCount(semRcvStart);\r
536 #endif\r
537 Semaphore_delete(&semSendWait);\r
538 Semaphore_delete(&semSendBlock);\r
539 Semaphore_delete(&semRcvStart);\r
540 }\r
541 \r
542 /* All test status print */\r
543 if(testErrCntr)\r
544 {\r
545 System_printf("!!! SOME TESTS FAILED !!!\n");\r
546 }\r
547 else\r
548 {\r
549 System_printf("!!! ALL TESTS PASSED !!!\n");\r
550 }\r
551 \r
552 /* Remove all creations - to make graceful system exit */\r
553 Semaphore_delete(&semRcvDone);\r
554 \r
555 System_exit(0);\r
556 }\r
557 \r
558 /*******************************************************************************\r
559 ******************************************************************************/\r
560 Void sndBlockTaskFunc(Void)\r
561 {\r
562 UInt8 notifyFlag;\r
563 cbDataDesc *cbPtr;\r
564 static UInt32 cookie = 0;\r
565 \r
566 sendBlockCnt = 0;\r
567 \r
568 #if DEBUG_VARS\r
569 semCnt = Semaphore_getCount(semSendBlock);\r
570 #endif\r
571 \r
572 total_clock_start = TSCL;\r
573 \r
574 while(1)\r
575 {\r
576 /* Pending on Semaphore to run the loop */\r
577 Semaphore_pend(semSendBlock, BIOS_WAIT_FOREVER);\r
578 \r
579 /* set TCP3D instance to use */\r
580 inst = tcp3dDrvInst[instNum];\r
581 \r
582 /* Get pointer to the code block data structure */\r
583 cbPtr = codeBlockSet.cbData[sendBlockCnt];\r
584 \r
585 /* Interrupt flag, used in Tcp3d_enqueueCodeBlock function */\r
586 notifyFlag = 0;\r
587 if ( sendBlockCnt >= (codeBlockSet.maxNumCB-2) )\r
588 {\r
589 notifyFlag = 1; /* Set for the last CB in each path (PING & PONG) */\r
590 }\r
591 \r
592 /**\r
593 * Prepare input configuration (IC) registers.\r
594 */\r
595 if ( TCP3D_DRV_INPUT_LIST_FULL == tcp3dResultSend )\r
596 {\r
597 /* IC prepare not required. Just clear soldout actions. */\r
598 soldOutActionClear();\r
599 }\r
600 else\r
601 {\r
602 /* Prepare Input Config Registers */\r
603 #if TEST_PREPARE_ONLY_BETASTATE\r
604 /* Prepare only beta state registers */\r
605 prepareBetaStateICParams(cbPtr, cbPtr->mode);\r
606 #elif TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT \r
607 /* Prepare only registers depend on code block configuration\r
608 * (tempICRegs has the fixed registers prepare outside send loop) */\r
609 prepareIC(cbPtr, tempICRegs, 1);\r
610 #else\r
611 /* Prepare all registers */\r
612 prepareIC(cbPtr, NULL, NULL);\r
613 #endif\r
614 }\r
615 \r
616 checkBetaValues (cbPtr->inCfg);\r
617 \r
618 /* Disabling the global interrupts */\r
619 cookie = Hwi_disable();\r
620 \r
621 tcp3dEndMemAccess(cbPtr->inCfg, cbPtr->sizeCFG);\r
622 tcp3dEndMemAccess(cbPtr->inLLR, cbPtr->sizeLLR);\r
623 \r
624 tcp3dBeginMemAccess(cbPtr->outHD, cbPtr->sizeHD);\r
625 if (cbPtr->sdFlag)\r
626 tcp3dBeginMemAccess(cbPtr->outSD, cbPtr->sizeSD);\r
627 if (cbPtr->stsFlag)\r
628 tcp3dBeginMemAccess(cbPtr->outSts, cbPtr->sizeSTS);\r
629 \r
630 /* Restore interrupts */\r
631 Hwi_restore(cookie);\r
632 \r
633 /**\r
634 * WORKAROUND CODE:\r
635 * This code works in line with the code in the second while loop\r
636 * in the send task where check for completion is done.\r
637 * Here we are setting the last byte in the outHD with some value when\r
638 * the refHD has 0x00. This avoids any false completion of send task.\r
639 */\r
640 if ( sendBlockCnt >= (codeBlockSet.maxNumCB-2) )\r
641 {\r
642 /* Fill the last byte in outHD when refHD last byte is ZERO */\r
643 uint8_t *bytePtr1, *bytePtr2;\r
644 uint32_t byteSize;\r
645 \r
646 bytePtr1 = (UInt8 *) cbPtr->refHD;\r
647 bytePtr2 = (UInt8 *) cbPtr->outHD;\r
648 byteSize = (cbPtr->blockSize>>3);\r
649 \r
650 if ( bytePtr1[byteSize-1] == 0 )\r
651 {\r
652 bytePtr2[byteSize-1] = 0xde;\r
653 }\r
654 }\r
655 \r
656 \r
657 /* Enqueue the Code block */\r
658 tcp3dResultSend = Tcp3d_enqueueCodeBlock ( inst,\r
659 cbPtr->blockSize,\r
660 (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->inCfg),\r
661 (Int8 *)L2GLBMAP(dspCoreID, cbPtr->inLLR),\r
662 cbPtr->llrOffset,\r
663 (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->outHD),\r
664 (Int8 *)L2GLBMAP(dspCoreID, cbPtr->outSD), \r
665 cbPtr->sdOffset,\r
666 (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->outSts),\r
667 notifyFlag); // 1 - GEN EVENT, 0 - NO EVENT\r
668 \r
669 \r
670 /* Check for soldout case */\r
671 if ( TCP3D_DRV_INPUT_LIST_FULL != tcp3dResultSend )\r
672 {\r
673 /* increment the block count */\r
674 sendBlockCnt++;\r
675 \r
676 /* goto next block */\r
677 Semaphore_post(semSendBlock);\r
678 }\r
679 else\r
680 {\r
681 /* increment soldout count */\r
682 soldoutCntr++;\r
683 \r
684 soldOutAction(); /* take action */\r
685 }\r
686 \r
687 /* Start the driver after START_CMD_PERIOD blocks */\r
688 if ( sendBlockCnt == START_CMD_PERIOD )\r
689 {\r
690 if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
691 {\r
692 System_printf("Tcp3d_start function returned error (AUTO)\n");\r
693 System_exit(0);\r
694 }\r
695 }\r
696 \r
697 /* Check for end of task and exit */\r
698 if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
699 {\r
700 /* set flags first */\r
701 pauseIntFlag = 0;\r
702 l2pIntr = pauseIntr;\r
703 pendPauseCntr = 0;\r
704 \r
705 #if SOLDOUT_USE_L2P_INTERRUPT\r
706 if ( soldoutCntr )\r
707 {\r
708 /* Call TCP3D driver control to set interrupt on L2P channel */\r
709 drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
710 drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
711 Tcp3d_control(inst, &drvCtrl);\r
712 }\r
713 #endif\r
714 \r
715 /* Set interrupt flag PAUSE channel */\r
716 drvCtrl.cmd = TCP3D_DRV_CLR_REVT_INT;\r
717 Tcp3d_control(inst, &drvCtrl);\r
718 \r
719 /* Check to see if restart needed before exit */\r
720 if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
721 {\r
722 System_printf("Tcp3d_start function returned error (AUTO)\n");\r
723 System_exit(0);\r
724 }\r
725 \r
726 /* Set interrupt flag PAUSE channel */\r
727 drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
728 drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
729 Tcp3d_control(inst, &drvCtrl);\r
730 \r
731 /* out of enqueue loop */\r
732 break;\r
733 }\r
734 } /* end of - while(1) */\r
735 \r
736 #if DEBUG_VARS\r
737 semCnt = Semaphore_getCount(semSendWait);\r
738 #endif\r
739 \r
740 /**\r
741 * Check for pending Pauses and waiting for the last block to be decoded \r
742 */\r
743 while ( 1 )\r
744 {\r
745 /* Pending on Semaphore to run the loop */\r
746 Semaphore_pend(semSendWait, BIOS_WAIT_FOREVER);\r
747 \r
748 /* Received both the completion events, so exit send task */\r
749 if ( tcp3dEventCntr >= 2 )\r
750 {\r
751 break;\r
752 } else if ( tcp3dEventCntr == 1 )\r
753 {\r
754 /* one code block test case */\r
755 if ( codeBlockSet.maxNumCB == 1 )\r
756 {\r
757 break;\r
758 }\r
759 else if ( codeBlockSet.mode == TEST_MODE_SPLIT )\r
760 { /* missing one notificatin event - possible in split mode */\r
761 /**\r
762 * WORKAROUND CODE:\r
763 * This is possibility in case of SPLIT mode, that one event is\r
764 * lost when both ping and pong channels try to generate system\r
765 * events at close proximity.\r
766 * In this test bench we have enabled notification events for\r
767 * the last two blocks, so checking the outHD & refHD last bytes\r
768 * to confirm the decoding of these blocks are completed.\r
769 */\r
770 \r
771 /* cbPtr for last two code blocks */\r
772 cbDataDesc *cbPtr1 = codeBlockSet.cbData[codeBlockSet.maxNumCB-2];\r
773 cbDataDesc *cbPtr2 = codeBlockSet.cbData[codeBlockSet.maxNumCB-1];\r
774 uint8_t *bytePtr11, *bytePtr12, *bytePtr21, *bytePtr22;\r
775 uint32_t size1, size2;\r
776 \r
777 bytePtr11 = (UInt8 *) cbPtr1->refHD;\r
778 bytePtr12 = (UInt8 *) cbPtr1->outHD;\r
779 bytePtr21 = (UInt8 *) cbPtr2->refHD;\r
780 bytePtr22 = (UInt8 *) cbPtr2->outHD;\r
781 size1 = (cbPtr1->blockSize>>3); /* in bytes */\r
782 size2 = (cbPtr2->blockSize>>3); /* in bytes */\r
783 \r
784 /* check if last HD byte of last two blocks are completed */\r
785 if ((bytePtr11[size1-1] == bytePtr12[size1-1]) &&\r
786 (bytePtr21[size2-1] == bytePtr22[size2-1]) ) \r
787 {\r
788 System_printf("Notification event missed (Race Condition)\n");\r
789 System_printf("Since the last two block decoding completed, completing send task\n");\r
790 System_printf("Block : %d\n", codeBlockSet.maxNumCB-2);\r
791 System_printf("\trefHD[%d] = 0x%x\t outHD[%d] = 0x%x\n", size1-1, bytePtr11[size1-1], size1-1, bytePtr12[size1-1]);\r
792 System_printf("Block : %d\n", codeBlockSet.maxNumCB-1);\r
793 System_printf("\trefHD[%d] = 0x%x\t outHD[%d] = 0x%x\n", size2-1, bytePtr21[size2-1], size2-1, bytePtr22[size2-1]);\r
794 break;\r
795 }\r
796 }\r
797 }\r
798 \r
799 if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
800 {\r
801 System_printf("Tcp3d_start function returned error\n");\r
802 System_exit(0);\r
803 }\r
804 \r
805 /* keep trying until finding two end events */\r
806 Semaphore_post(semSendWait);\r
807 \r
808 pendPauseCntr++;\r
809 }\r
810 \r
811 /* Last code block decoded - Start the receive task */\r
812 total_clock_end = TSCL;\r
813 Semaphore_post(semRcvStart);\r
814 }\r
815 \r
816 /*******************************************************************************\r
817 ******************************************************************************/\r
818 Void rcvBlockTaskFunc(Void)\r
819 {\r
820 Int32 errCnt;\r
821 \r
822 cbDataDesc *cbPtr;\r
823 Int idx, loopCnt;\r
824 Int fail = 0;\r
825 UInt8 *ptr1, *ptr2;\r
826 \r
827 rcvBlockCnt = 0;\r
828 totErrCnt = 0;\r
829 \r
830 while(1)\r
831 {\r
832 Semaphore_pend(semRcvStart, BIOS_WAIT_FOREVER);\r
833 \r
834 /* prints for send task are done here */\r
835 if ( tcp3dResultSend == TCP3D_DRV_NO_ERR )\r
836 {\r
837 #if DEBUG_PRINT\r
838 for ( loopCnt = 0; loopCnt < sendBlockCnt; loopCnt++ )\r
839 {\r
840 cbPtr = codeBlockSet.cbData[loopCnt];\r
841 System_printf("Send Task: Enqueued Block %d (Size: %d, SW0: %d)\n",\r
842 loopCnt, cbPtr->blockSize,\r
843 cbPtr->sw0LengthUsed);\r
844 }\r
845 #endif\r
846 System_printf("Send Task: Enqueued %d Blocks\n\n", sendBlockCnt);\r
847 }\r
848 else\r
849 {\r
850 System_printf("Send Task: Enqueued Blocks failed (tcp3dResultSend : %d)\n\n", tcp3dResultSend);\r
851 System_exit(0);\r
852 }\r
853 \r
854 MY_LOG_PRINT0(Rcv Task: SEM RECEIVED);\r
855 \r
856 while( rcvBlockCnt < codeBlockSet.maxNumCB )\r
857 {\r
858 /* Get the pointer to the Code Block Set */\r
859 cbPtr = codeBlockSet.cbData[rcvBlockCnt];\r
860 \r
861 /* Step 2: Verify All the outputs */\r
862 fail = 0;\r
863 /* Step 2.1: Hard Decisions Verification */\r
864 ptr1 = (UInt8 *) cbPtr->refHD;\r
865 ptr2 = (UInt8 *) cbPtr->outHD;\r
866 \r
867 /* Invalidate out HD */\r
868 CACHE_invL1d (cbPtr->outHD, cbPtr->blockSize>>3, CACHE_WAIT);\r
869 \r
870 errCnt = 0; \r
871 for (idx = 0; idx < (cbPtr->blockSize>>3); ++idx)\r
872 {\r
873 if ( ptr1[idx] != ptr2[idx] )\r
874 {\r
875 errCnt++;\r
876 System_printf("\tBlock Count %d, HD mismatch byte %d\n", rcvBlockCnt, idx);\r
877 }\r
878 }\r
879 \r
880 if (errCnt)\r
881 {\r
882 MY_LOG_PRINT2(Rcv task: HD FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
883 fail++;\r
884 }\r
885 else\r
886 {\r
887 MY_LOG_PRINT1(Rcv task: HD PASSED, rcvBlockCnt);\r
888 }\r
889 \r
890 /* Step 2.2: Soft Decisions Verification */\r
891 if (cbPtr->sdFlag)\r
892 {\r
893 if ( codeBlockSet.mode == TEST_MODE_SPLIT ) /* SPLIT MODE */\r
894 loopCnt = cbPtr->blockSize;\r
895 else\r
896 loopCnt = (3*cbPtr->blockSize);\r
897 \r
898 /* Invalidate out SD */\r
899 CACHE_invL1d (cbPtr->outSD, loopCnt, CACHE_WAIT);\r
900 \r
901 /* NOTE: Assumed that the Soft Decisions are in a single array */\r
902 errCnt = 0;\r
903 for (idx = 0; idx < loopCnt; ++idx)\r
904 {\r
905 if ( cbPtr->refSD[idx] != cbPtr->outSD[idx] )\r
906 {\r
907 errCnt += 1;\r
908 System_printf("\tBlock Count %d, SD mismatch byte %d\n", rcvBlockCnt, idx);\r
909 }\r
910 }\r
911 \r
912 if (errCnt)\r
913 {\r
914 MY_LOG_PRINT2(Rcv task: SD FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
915 fail++;\r
916 }\r
917 else\r
918 {\r
919 MY_LOG_PRINT1(Rcv task: SD PASSED, rcvBlockCnt);\r
920 }\r
921 } /* if (cbPtr->sdFlag) */\r
922 \r
923 /* Step 2.3: errCnt Registers Verification */\r
924 if (cbPtr->stsFlag)\r
925 {\r
926 /* Invalidate out Sts */\r
927 CACHE_invL1d (cbPtr->outSts, 12, CACHE_WAIT);\r
928 \r
929 errCnt = 0;\r
930 for (idx = 0; idx < 3; ++idx)\r
931 {\r
932 if ( cbPtr->refSts[idx] != cbPtr->outSts[idx] )\r
933 {\r
934 errCnt += 1;\r
935 System_printf("\tBlock Count %d, STS mismatch word %d\n", rcvBlockCnt, idx);\r
936 }\r
937 }\r
938 if (errCnt)\r
939 {\r
940 MY_LOG_PRINT2(Rcv task: STS FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
941 fail++;\r
942 }\r
943 else\r
944 {\r
945 MY_LOG_PRINT1(Rcv task: STS PASSED, rcvBlockCnt);\r
946 }\r
947 } /* if (cbPtr->stsFlag) */\r
948 if (fail)\r
949 {\r
950 System_printf("Rcv task: Block %d FAILED\n", rcvBlockCnt);\r
951 totErrCnt++;\r
952 }\r
953 #if DEBUG_PRINT\r
954 else\r
955 {\r
956 System_printf("Rcv task: Block %d PASSED\n", rcvBlockCnt);\r
957 }\r
958 #endif\r
959 rcvBlockCnt++;\r
960 }\r
961 if(rcvBlockCnt >= codeBlockSet.maxNumCB)\r
962 {\r
963 break;\r
964 } \r
965 }\r
966 \r
967 System_printf("Rcv Task: COMPLETE - verified %d blocks\n", rcvBlockCnt);\r
968 \r
969 /* Prepare for next test, set by "tester task" */\r
970 Semaphore_post(semRcvDone);\r
971 }\r
972 \r
973 /*******************************************************************************\r
974 ******************************************************************************/\r
975 Void revt0ChCallback(Void)\r
976 {\r
977 /* Increment the ISR counter */\r
978 pauseIntr++;\r
979 \r
980 pauseIntFlag = 1;\r
981 \r
982 if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
983 Semaphore_post(semSendWait);\r
984 else\r
985 Semaphore_post(semSendBlock);\r
986 }\r
987 \r
988 /*******************************************************************************\r
989 ******************************************************************************/\r
990 Void revt1ChCallback(Void)\r
991 {\r
992 /* Increment the ISR counter */\r
993 pauseIntr++;\r
994 \r
995 pauseIntFlag = 2;\r
996 \r
997 if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
998 Semaphore_post(semSendWait);\r
999 else\r
1000 Semaphore_post(semSendBlock);\r
1001 }\r
1002 \r
1003 /*******************************************************************************\r
1004 ******************************************************************************/\r
1005 Void tskHeartBeat(Void)\r
1006 {\r
1007 static unsigned int counter = 0u;\r
1008 \r
1009 while (counter < 0x1000000u)\r
1010 {\r
1011 Task_sleep (1000u);\r
1012 System_printf("\n!!! EDMA3 LLD HrtBt %x\n", counter);\r
1013 counter++;\r
1014 }\r
1015 }\r
1016 \r
1017 /*******************************************************************************\r
1018 ******************************************************************************/\r
1019 Void getMemoryStats(Void)\r
1020 {\r
1021 Memory_Stats memStats;\r
1022 \r
1023 Memory_getStats(drvHeap, &memStats);\r
1024 System_printf("\nHeap Usage/Status\n");\r
1025 System_printf(" tcp3dDrvHeap : %d of %d free\n", memStats.totalFreeSize, memStats.totalSize);\r
1026 \r
1027 Memory_getStats(dataHeap, &memStats);\r
1028 System_printf(" tcp3dDataHeap : %d of %d free\n", memStats.totalFreeSize, memStats.totalSize);\r
1029 }\r
1030 \r
1031 /*******************************************************************************\r
1032 ******************************************************************************/\r
1033 Void tcp3dEventISR(UInt32 testEvtNum)\r
1034 {\r
1035 tcp3dEventCntr++;\r
1036 tpccEvtCntr++;\r
1037 \r
1038 if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
1039 Semaphore_post(semSendWait);\r
1040 else\r
1041 Semaphore_post(semSendBlock);\r
1042 }\r
1043 \r
1044 /*******************************************************************************\r
1045 ******************************************************************************/\r
1046 Void registerTcp3dEvent(Void)\r
1047 {\r
1048 static UInt32 cookie = 0;\r
1049 Int eventId = 0; /* GEM event id */\r
1050 static UInt32 mapDone = 0;\r
1051 UInt32 testEvt = getNotifyEventNum(instNum);\r
1052 UInt32 hostIntr = getHostIntrNum(dspCoreID);\r
1053 \r
1054 /* Disabling the global interrupts */\r
1055 cookie = Hwi_disable();\r
1056 \r
1057 /* Completion ISR Registration */\r
1058 CpIntc_dispatchPlug(testEvt, tcp3dEventISR, hostIntr, TRUE);\r
1059 if (!mapDone)\r
1060 CpIntc_mapSysIntToHostInt(0, testEvt, hostIntr);\r
1061 CpIntc_enableHostInt(0, hostIntr);\r
1062 eventId = CpIntc_getEventId(hostIntr);\r
1063 EventCombiner_dispatchPlug (eventId,\r
1064 #if USE_LOCAL_CPINTC_DISPATCH\r
1065 CpIntc_dispatchLoc,\r
1066 #else\r
1067 CpIntc_dispatch,\r
1068 #endif\r
1069 hostIntr,\r
1070 TRUE);\r
1071 #if DEBUG_PRINT\r
1072 System_printf("\t\t testEvt : %d \n", testEvt);\r
1073 System_printf("\t\t hostIntr : %d \n", hostIntr);\r
1074 System_printf("\t\t eventId : %d \n", eventId);\r
1075 #endif\r
1076 \r
1077 /* enable the 'global' switch */\r
1078 CpIntc_enableAllHostInts(0);\r
1079 \r
1080 mapDone = 1;\r
1081 \r
1082 /* Restore interrupts */\r
1083 Hwi_restore(cookie);\r
1084 }\r
1085 \r
1086 /*******************************************************************************\r
1087 ******************************************************************************/\r
1088 Void unregisterTcp3dEvent(Void)\r
1089 {\r
1090 static UInt32 cookie = 0;\r
1091 Int eventId = 0; /* GEM event id */\r
1092 UInt32 hostIntr = getHostIntrNum(dspCoreID);\r
1093 \r
1094 /* Disabling the global interrupts */\r
1095 cookie = Hwi_disable();\r
1096 \r
1097 /* Driver Completion ISR */\r
1098 CpIntc_disableHostInt(0, hostIntr);\r
1099 eventId = CpIntc_getEventId(hostIntr);\r
1100 EventCombiner_disableEvent(eventId);\r
1101 \r
1102 /* Restore interrupts */\r
1103 Hwi_restore(cookie);\r
1104 }\r
1105 \r
1106 /*******************************************************************************\r
1107 ******************************************************************************/\r
1108 Void allInit(Void)\r
1109 {\r
1110 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
1111 EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;\r
1112 \r
1113 /* Initialize EDMA3 first */\r
1114 hEdma = NULL;\r
1115 tpccNum = 2;\r
1116 tpccRegionUsed = 3;\r
1117 hEdma = edma3init ( tpccNum,\r
1118 &edmaResult,\r
1119 dspCoreID,\r
1120 tpccRegionUsed);\r
1121 if (edmaResult != EDMA3_DRV_SOK)\r
1122 {\r
1123 System_printf("edma3init() FAILED, error code: %d\n", edmaResult);\r
1124 }\r
1125 else\r
1126 {\r
1127 System_printf("EDMA3 LLD Initialization complete (TPCC #%d, Region #%d)\n", tpccNum, tpccRegionUsed);\r
1128 }\r
1129 \r
1130 /* Allocate all EDMA channels required for TCP3D Driver */\r
1131 System_printf("EDMA3 Channels opening started...\n");\r
1132 \r
1133 /* Open channels for one instance */\r
1134 openEdmaChannels (hEdma, instNum, &edmaConfig[instNum]);\r
1135 \r
1136 /* Register call backs */\r
1137 EDMA3_DRV_registerTccCb(hEdma, edmaConfig[instNum].pingChRes[0].chNo, (EDMA3_RM_TccCallback)&revt0ChCallback, NULL);\r
1138 EDMA3_DRV_registerTccCb(hEdma, edmaConfig[instNum].pongChRes[0].chNo, (EDMA3_RM_TccCallback)&revt1ChCallback, NULL);\r
1139 \r
1140 #if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
1141 /* Fill call back details */\r
1142 edmaConfig[instNum].pingChRes[0].cbFunc = (EDMA3_RM_TccCallback)&revt0ChCallback;\r
1143 edmaConfig[instNum].pingChRes[0].cbData = NULL;\r
1144 edmaConfig[instNum].pongChRes[0].cbFunc = (EDMA3_RM_TccCallback)&revt1ChCallback;\r
1145 edmaConfig[instNum].pongChRes[0].cbData = NULL;\r
1146 \r
1147 /**\r
1148 * Update the information to use with local EDMA ISR \r
1149 * (NOTE: This function must be called after the channels are opened)\r
1150 */\r
1151 updateAllocatedTccsLoc(&edmaConfig[instNum]);\r
1152 #endif\r
1153 \r
1154 System_printf("EDMA3 Channels opening complete\n");\r
1155 \r
1156 System_printf("TCP3 Decoder Driver Initialization sequence started...\n");\r
1157 \r
1158 /* Initialize the TCP3D first */\r
1159 tcp3dDrvInst[instNum] = tcp3dSampleInit (drvHeap,\r
1160 instNum,\r
1161 testMaxCodeBlocks,\r
1162 codeBlockSet.mode,\r
1163 codeBlockSet.doubleBuffer,\r
1164 codeBlockSet.lteCrcSel,\r
1165 dspCoreID,\r
1166 hEdma,\r
1167 tpccRegionUsed,\r
1168 &edmaConfig[instNum],\r
1169 &tcp3dResult);\r
1170 \r
1171 System_printf("TCP3 Decoder Driver Initialization sequence complete\n");\r
1172 \r
1173 /* Register the Notification Event for TCP3D */\r
1174 registerTcp3dEvent();\r
1175 \r
1176 /* Set the global flags to default values */\r
1177 pingComplete = 0;\r
1178 pongComplete = 0;\r
1179 pauseIntr = 0;\r
1180 l2pIntr = 0;\r
1181 tcp3dEventCntr = 0;\r
1182 pauseIntFlag = 0;\r
1183 rcvStartFlag = 0;\r
1184 soldoutCntr = 0;\r
1185 afterIntrSoldout = 0;\r
1186 afterIntrPause = 0;\r
1187 pendPauseCntr = 0;\r
1188 }\r
1189 \r
1190 /*******************************************************************************\r
1191 ******************************************************************************/\r
1192 Void allDeInit(Void)\r
1193 {\r
1194 EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;\r
1195 \r
1196 /* Un-register the Notification Event for TCP3D */\r
1197 unregisterTcp3dEvent();\r
1198 \r
1199 /* Close all EDMA channels allocated for the test */\r
1200 System_printf("EDMA3 Channels freeing started...\n");\r
1201 \r
1202 /* Register call backs */\r
1203 EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pingChRes[0].chNo);\r
1204 EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pingChRes[1].chNo);\r
1205 EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pongChRes[0].chNo);\r
1206 EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pongChRes[1].chNo);\r
1207 \r
1208 /* Close channels */\r
1209 closeEdmaChannels(hEdma, instNum, &edmaConfig[instNum]);\r
1210 \r
1211 System_printf("EDMA3 Channels freeing complete\n");\r
1212 \r
1213 /* Deinit for TCP3D driver */\r
1214 System_printf("TCP3 Decoder Driver De-Initialization sequence started...\n");\r
1215 \r
1216 tcp3dSampleDeinit(drvHeap, instNum, tcp3dDrvInst[instNum]);\r
1217 \r
1218 System_printf("TCP3 Decoder Driver De-Initialization sequence complete\n");\r
1219 \r
1220 /* De-init EDMA3 */\r
1221 edmaResult = edma3deinit(tpccNum, hEdma);\r
1222 if (edmaResult != EDMA3_DRV_SOK)\r
1223 {\r
1224 System_printf("edma3deinit() FAILED, error code: %d\n", edmaResult);\r
1225 }\r
1226 else\r
1227 {\r
1228 System_printf("EDMA3 LLD De-Initialization complete\n");\r
1229 }\r
1230 }\r
1231 \r
1232 #ifndef SIMULATOR_SUPPORT\r
1233 /**\r
1234 * @b Description\r
1235 * @n \r
1236 * This function enables the power/clock domains for the \r
1237 * specified power domain and module. \r
1238 *\r
1239 * @retval\r
1240 * 0 for enabling power domain, -1 for failure\r
1241 */\r
1242 static Int32 enable_ip_instance (UInt32 pwrDmnNum, UInt32 moduleNum)\r
1243 {\r
1244 /* Power domains are turned OFF by default for many IP blocks. It\r
1245 * needs to be turned on before doing any device\r
1246 * register access.\r
1247 */\r
1248 /* Set IP block Power domain to ON */ \r
1249 CSL_PSC_enablePowerDomain (pwrDmnNum);\r
1250 \r
1251 /* Enable the clocks too for the IP block */\r
1252 CSL_PSC_setModuleNextState (moduleNum, PSC_MODSTATE_ENABLE);\r
1253 \r
1254 /* Start the state transition */\r
1255 CSL_PSC_startStateTransition (pwrDmnNum);\r
1256 \r
1257 /* Wait until the state transition process is completed. */\r
1258 while (!CSL_PSC_isStateTransitionDone (pwrDmnNum));\r
1259 \r
1260 /* Return IP block PSC status */\r
1261 if ((CSL_PSC_getPowerDomainState(pwrDmnNum) == PSC_PDSTATE_ON) &&\r
1262 (CSL_PSC_getModuleState (moduleNum) == PSC_MODSTATE_ENABLE))\r
1263 {\r
1264 /* IP block ON. Ready for use */ \r
1265 return 0;\r
1266 }\r
1267 else\r
1268 {\r
1269 /* IP block power on failed. Return error */ \r
1270 return -1; \r
1271 }\r
1272 }\r
1273 #endif\r
1274 \r
1275 /**\r
1276 * @b Description\r
1277 * @n \r
1278 * This function enables the power/clock domains for TCP3D. \r
1279 *\r
1280 * @retval\r
1281 * Not Applicable.\r
1282 */\r
1283 static Int32 enable_tcp3d (void)\r
1284 {\r
1285 #ifndef SIMULATOR_SUPPORT\r
1286 Int32 result;\r
1287 UInt32 coreID = CSL_chipReadDNUM();\r
1288 \r
1289 /* TCP3D power domain is turned OFF by default.\r
1290 * It needs to be turned on before doing any TCP3D device register access.\r
1291 * This is not required for the simulator. \r
1292 */\r
1293 #if (CSL_TCP3D_PER_CNT > 1)\r
1294 \r
1295 if (coreID == 0)\r
1296 {\r
1297 result = enable_ip_instance (TEST_CSL_PSC_PD_TCP3D_0, \r
1298 TEST_CSL_PSC_LPSC_TCP3D_0);\r
1299 }\r
1300 else \r
1301 {\r
1302 result = enable_ip_instance (TEST_CSL_PSC_PD_TCP3D_1, \r
1303 TEST_CSL_PSC_LPSC_TCP3D_1);\r
1304 } \r
1305 #else\r
1306 \r
1307 result = enable_ip_instance (TEST_CSL_PSC_PD_TCP3D_0, \r
1308 TEST_CSL_PSC_LPSC_TCP3D_0);\r
1309 \r
1310 #endif /* CSL_TCP3D_PER_CNT > 1 */\r
1311 \r
1312 return (result); \r
1313 #else\r
1314 /* PSC is not supported on simulator. Return success always */\r
1315 return 0;\r
1316 #endif\r
1317 }\r
1318 \r
1319 /**\r
1320 * @b Description\r
1321 * @n \r
1322 * The function is used to indicate that a block of memory is \r
1323 * about to be accessed. If the memory block is cached then this \r
1324 * indicates that the application would need to ensure that the \r
1325 * cache is updated with the data from the actual memory.\r
1326 *\r
1327 * @param[in] ptr\r
1328 * Address of memory block\r
1329 *\r
1330 * @param[in] size\r
1331 * Size of memory block\r
1332 *\r
1333 * @retval\r
1334 * Not Applicable\r
1335 */\r
1336 void tcp3dBeginMemAccess (void *ptr, uint32_t size)\r
1337 {\r
1338 /* Invalidate L1D cache and wait until operation is complete. \r
1339 * Use this approach if L2 cache is not enabled */ \r
1340 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);\r
1341 \r
1342 /* Cleanup the prefectch buffer also. */\r
1343 CSL_XMC_invalidatePrefetchBuffer(); \r
1344 \r
1345 return;\r
1346 }\r
1347 \r
1348 /**\r
1349 * @b Description\r
1350 * @n \r
1351 * The function is used to indicate that the block of memory has \r
1352 * finished being accessed. If the memory block is cached then the \r
1353 * application would need to ensure that the contents of the cache \r
1354 * are updated immediately to the actual memory. \r
1355 *\r
1356 * @param[in] ptr\r
1357 * Address of memory block\r
1358 * @param[in] size\r
1359 * Size of memory block\r
1360 *\r
1361 * @retval\r
1362 * Not Applicable\r
1363 */\r
1364 void tcp3dEndMemAccess (void *ptr, uint32_t size)\r
1365 {\r
1366 /* Writeback L1D cache and wait until operation is complete. \r
1367 * Use this approach if L2 cache is not enabled */ \r
1368 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT); \r
1369 \r
1370 return;\r
1371 }\r
1372 \r
1373 /* end of file */\r