1 /**\r
2 * \file tcp3d_drv.c\r
3 *\r
4 * \brief TCP3D Driver functions.\r
5 *\r
6 * Copyright (C) Texas Instruments Incorporated 2009\r
7 * \r
8 * Redistribution and use in source and binary forms, with or without \r
9 * modification, are permitted provided that the following conditions \r
10 * are met:\r
11 *\r
12 * Redistributions of source code must retain the above copyright \r
13 * notice, this list of conditions and the following disclaimer.\r
14 *\r
15 * Redistributions in binary form must reproduce the above copyright\r
16 * notice, this list of conditions and the following disclaimer in the \r
17 * documentation and/or other materials provided with the \r
18 * distribution.\r
19 *\r
20 * Neither the name of Texas Instruments Incorporated nor the names of\r
21 * its contributors may be used to endorse or promote products derived\r
22 * from this software without specific prior written permission.\r
23 *\r
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
25 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
27 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
28 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
30 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
35 *\r
36 */\r
37 \r
38 /**\r
39 * Include Files\r
40 */\r
41 /* TCP3D driver includes */\r
42 #include <ti/drv/tcp3d/tcp3d_drv.h>\r
43 #include <ti/drv/tcp3d/src/tcp3d_drv_priv.h>\r
44 \r
45 /* TCP3D Types and OSAL defintions: These files can be overriden by customers\r
46 * to point to their copies. Because of this the files have not been explicitly \r
47 * specified to include the driver path.*/\r
48 #include <tcp3d_drv_types.h>\r
49 #include <tcp3d_osal.h>\r
50 \r
51 #define TWO_PATHS 0\r
52 \r
53 #define TPCC_REVT_REGS 0\r
54 #define TPCC_L2P_REGS 1\r
55 \r
56 #define PING_INDEX 0\r
57 #define PONG_INDEX 1\r
58 \r
59 /** @brief Global Variable which describes the TCP3D Driver Version Information */\r
60 const char Tcp3dDrvVersionStr[] = TCP3D_DRV_VERSION_STR ":" __DATE__ ":" __TIME__;\r
61 \r
62 /****************************************************************************\r
63 * TCP3D Driver Functions *\r
64 ****************************************************************************/\r
65 /*******************************************************************************\r
66 * Enables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
67 * in the TPCC_IESR/TPCC_IESRH.\r
68 ******************************************************************************/\r
69 static void Tcp3d_enableEdmaL2pIntr(Tcp3d_Instance *inst)\r
70 {\r
71 #if UNTESTED_CODE\r
72 *inst->intEnSetReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong);\r
73 #ifdef SIM_WORKAROUND\r
74 /**\r
75 * WORKAROUND: Current Simulator does not generate interrupt\r
76 * when there is a pending IPR bit and we enable the IER in the\r
77 * EDMA register space. So, We are forcing the EDMA to generate\r
78 * the interrupt if the IPR has valid bits. \r
79 */\r
80 if ( inst->intPendReg[TPCC_L2P_REGS] &&\r
81 (inst->l2pChMaskPing | inst->l2pChMaskPong) )\r
82 {\r
83 inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
84 }\r
85 #endif\r
86 #else\r
87 /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
88 inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
89 inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
90 inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
91 inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
92 #endif\r
93 inst->pingL2pEnCntr++;\r
94 }\r
95 \r
96 /*******************************************************************************\r
97 * Disables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
98 * in the TPCC_IECR/TPCC_IECRH.\r
99 ******************************************************************************/\r
100 static void Tcp3d_disableEdmaL2pIntr(Tcp3d_Instance *inst)\r
101 {\r
102 #if UNTESTED_CODE\r
103 *inst->intEnClrReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong); \r
104 #else\r
105 /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
106 inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
107 inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
108 inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
109 inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
110 #endif\r
111 inst->pingL2pEnCntr--;\r
112 }\r
113 \r
114 /*******************************************************************************\r
115 * Clears pending interrupt generated by EDMA CC. Sets two bits of L2P channels \r
116 * in the TPCC_ICR/TPCC_ICRH.\r
117 ******************************************************************************/\r
118 static void Tcp3d_clearEdmaL2pIntr(Tcp3d_Instance *inst)\r
119 {\r
120 #if UNTESTED_CODE\r
121 *inst->clrIntPendReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong); \r
122 #endif\r
123 inst->pingL2pEnCntr=0;\r
124 }\r
125 \r
126 /*******************************************************************************\r
127 * Enables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
128 * in the TPCC_IESR/TPCC_IESRH.\r
129 ******************************************************************************/\r
130 static void Tcp3d_enableEdmaPauseIntr(Tcp3d_Instance *inst)\r
131 {\r
132 *inst->intEnSetReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong);\r
133 #ifdef SIM_WORKAROUND\r
134 /**\r
135 * WORKAROUND: Current Simulator does not generate interrupt\r
136 * when there is a pending IPR bit and we enable the IER in the\r
137 * EDMA register space. So, We are forcing the EDMA to generate\r
138 * the interrupt if the IPR has valid bits. \r
139 */\r
140 if ( inst->intPendReg[TPCC_REVT_REGS] &&\r
141 (inst->pauseChMaskPing | inst->pauseChMaskPong) )\r
142 {\r
143 inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
144 }\r
145 #endif\r
146 inst->pingPauseEnCntr++;\r
147 }\r
148 \r
149 /*******************************************************************************\r
150 * Disables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
151 * in the TPCC_IECR/TPCC_IECRH.\r
152 ******************************************************************************/\r
153 static void Tcp3d_disableEdmaPauseIntr(Tcp3d_Instance *inst)\r
154 {\r
155 *inst->intEnClrReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong); \r
156 inst->pingPauseEnCntr--;\r
157 }\r
158 \r
159 /*******************************************************************************\r
160 * Clears pending interrupt generated by EDMA CC. Sets two bits of REVT channels \r
161 * in the TPCC_ICR/TPCC_ICRH.\r
162 ******************************************************************************/\r
163 static void Tcp3d_clearEdmaPauseIntr(Tcp3d_Instance *inst)\r
164 {\r
165 *inst->clrIntPendReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong); \r
166 inst->pingPauseEnCntr=0;\r
167 }\r
168 \r
169 /**\r
170 * @brief TCP3D Driver function for providing the number of buffers\r
171 * required.\r
172 */\r
173 Tcp3d_Result Tcp3d_getNumBuf (IN Tcp3d_SizeCfg *cfg,\r
174 OUT int16_t *nbufs)\r
175 {\r
176 *nbufs = TCP3D_DRV_NUM_BUF;\r
177 \r
178 return ( TCP3D_DRV_NO_ERR );\r
179 }\r
180 \r
181 /**\r
182 * @brief TCP3D Driver function for providing the attributes of all the\r
183 * number of buffers requested through the structure of type\r
184 * Tcp3d_MemBuffer provided.\r
185 */\r
186 Tcp3d_Result Tcp3d_getBufDesc ( IN Tcp3d_SizeCfg *cfg,\r
187 OUT Tcp3d_MemBuffer bufs[])\r
188 {\r
189 bufs[TCP3D_DRV_INST_BUFN].size = sizeof(Tcp3d_Instance);\r
190 bufs[TCP3D_DRV_INST_BUFN].log2align = 2;\r
191 bufs[TCP3D_DRV_INST_BUFN].mclass = Tcp3d_BufClass_L2RAM;\r
192 bufs[TCP3D_DRV_INST_BUFN].volat = TRUE;\r
193 \r
194 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].size = (cfg->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
195 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].log2align = 2;\r
196 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].mclass = Tcp3d_BufClass_L2RAM;\r
197 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].volat = TRUE;\r
198 \r
199 return ( TCP3D_DRV_NO_ERR );\r
200 }\r
201 \r
202 /**\r
203 * @brief TCP3D Driver Initialization function which must be called only\r
204 * once to initialize the driver instance and other required\r
205 * resources needed for the driver functionality.\r
206 */\r
207 Tcp3d_Result Tcp3d_init( IN Tcp3d_MemBuffer bufs[],\r
208 IN Tcp3d_InitParams *drvInitParams)\r
209 {\r
210 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
211 Tcp3d_Instance *tcp3dInst;\r
212 uint32_t modeReg = 0, endReg = 0, exeRegP0 = 0, exeRegP1 =0;\r
213 int32_t idx, locBufSize[TCP3D_DRV_NUM_BUF];\r
214 CSL_Tcp3d_cfgRegs *tcp3dCfgRegs;\r
215 \r
216 /* Check for valid instance number */\r
217 if ( drvInitParams->instNum > TCP3D_DRV_MAX_NUM_INSTANCES )\r
218 {\r
219 /* Return error */\r
220 tcp3dResult = TCP3D_DRV_INVALID_INSTANCE_NUMBER;\r
221 \r
222 return ( tcp3dResult );\r
223 }\r
224 \r
225 /* compute the buffer sizes table */\r
226 locBufSize[TCP3D_DRV_INST_BUFN] = sizeof(Tcp3d_Instance);\r
227 locBufSize[TCP3D_DRV_PSEUDO_PARAM_BUFN] = (drvInitParams->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
228 \r
229 /* Check if all buffers have valid addresses and sizes */\r
230 for ( idx = 0; idx < TCP3D_DRV_NUM_BUF; idx++)\r
231 {\r
232 if ( bufs[idx].base == NULL || bufs[idx].size < locBufSize[idx] )\r
233 tcp3dResult = TCP3D_DRV_INVALID_BUFF;\r
234 }\r
235 \r
236 /* Initialize the instance if the buffer addresses are not NULL */\r
237 if ( tcp3dResult == TCP3D_DRV_NO_ERR )\r
238 {\r
239 /* Initialize the driver Instance */\r
240 tcp3dInst = (Tcp3d_Instance *) bufs[TCP3D_DRV_INST_BUFN].base;\r
241 \r
242 /* Initialize the pseudo PaRAM array pointer */\r
243 tcp3dInst->pseudoParamBufPtr = (EDMA3_DRV_PaRAMRegs *) bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].base;\r
244 }\r
245 else\r
246 {\r
247 /* Return the error */\r
248 return ( tcp3dResult );\r
249 }\r
250 \r
251 /* Get the address of TCP3D configuration registers base address */\r
252 tcp3dCfgRegs = drvInitParams->tcp3dCfgRegs;\r
253 \r
254 /* Update the instace with the input parameters */\r
255 tcp3dInst->mode = drvInitParams->ctrlParams.mode;\r
256 tcp3dInst->doubleBuffer = drvInitParams->ctrlParams.doubleBuf;\r
257 tcp3dInst->edmaHnd = drvInitParams->edmaHnd;\r
258 tcp3dInst->edmaRegionId = drvInitParams->edmaRegionId;\r
259 tcp3dInst->maxCodeBlocks = drvInitParams->maxCodeBlocks;\r
260 tcp3dInst->notificationEventNum = drvInitParams->notificationEventNum;\r
261 tcp3dInst->cpIntc0RegsBase = drvInitParams->cpIntc0RegsBase;\r
262 tcp3dInst->tpccShadowRegs = drvInitParams->edma3ShadowRegsBase;\r
263 tcp3dInst->instNum = drvInitParams->instNum;\r
264 tcp3dInst->coreId = drvInitParams->coreID;\r
265 \r
266 /* Verify the REVT channels */\r
267 if ( ( drvInitParams->pingCh[0] != drvInitParams->pingConfig.revtCh ) ||\r
268 ( drvInitParams->pongCh[0] != drvInitParams->pongConfig.revtCh ) )\r
269 {\r
270 /* Return error */\r
271 tcp3dResult = TCP3D_DRV_INVALID_EDMA_CH;\r
272 \r
273 return ( tcp3dResult );\r
274 }\r
275 \r
276 for ( idx = 0; idx < TCP3D_DRV_MAX_CH_PER_PATH; idx++ )\r
277 {\r
278 /* Copy PING Channels */\r
279 tcp3dInst->pingCh[idx] = drvInitParams->pingCh[idx];\r
280 \r
281 /* Copy PONG Channels */\r
282 tcp3dInst->pongCh[idx] = drvInitParams->pongCh[idx];\r
283 }\r
284 \r
285 for ( idx = 0; idx < (TCP3D_DRV_MAX_LINK_CH>>1); idx++ )\r
286 {\r
287 /* Copy PING Channels */\r
288 tcp3dInst->pingLinkCh[idx] = drvInitParams->linkCh[idx];\r
289 \r
290 /* Copy PONG Channels */\r
291 tcp3dInst->pongLinkCh[idx] = drvInitParams->linkCh[idx+(TCP3D_DRV_MAX_LINK_CH>>1)];\r
292 }\r
293 \r
294 /* Set the Driver variables to defaults */\r
295 tcp3dInst->constantOne = 1;\r
296 tcp3dInst->pauseState = TCP3D_DRV_STATE_PAUSE;\r
297 \r
298 /* Initialize the driver variables */\r
299 tcp3dInst->maxPingCbCnt = (tcp3dInst->maxCodeBlocks >> 1);\r
300 tcp3dInst->maxPongCbCnt = (tcp3dInst->maxCodeBlocks >> 1);\r
301 tcp3dInst->maxPingCbIdx = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
302 tcp3dInst->maxPongCbIdx = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
303 \r
304 /* Reset run-time variables */\r
305 Tcp3d_resetRuntimeVariables(tcp3dInst);\r
306 \r
307 /* EDMA3 - get PaRAM addresses of all physical channels */\r
308 if ( EDMA3_DRV_SOK != Tcp3d_getEdmaChParamAddr(tcp3dInst) )\r
309 {\r
310 tcp3dResult = TCP3D_DRV_FAIL_EDMA_GET_PARAM_ADDR;\r
311 \r
312 return ( tcp3dResult );\r
313 }\r
314 \r
315 /* Initialize the EDMA PaRAM memory for the physical channels */\r
316 if ( EDMA3_DRV_SOK != Tcp3d_initEdmaChParam(tcp3dInst) )\r
317 {\r
318 tcp3dResult = TCP3D_DRV_FAIL_EDMA_PARAM_INIT;\r
319 \r
320 return ( tcp3dResult );\r
321 }\r
322 \r
323 /* EDMA3 - Enable the EVENT triggered channels */\r
324 if ( EDMA3_DRV_SOK != Tcp3d_enableEdmaChannels(tcp3dInst) )\r
325 {\r
326 tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
327 \r
328 return ( tcp3dResult );\r
329 }\r
330 \r
331 /* Initialize the pseudo PaRAM memory */\r
332 Tcp3d_initPseudoParam ( tcp3dInst,\r
333 tcp3dInst->maxCodeBlocks,\r
334 &drvInitParams->pingConfig,\r
335 &drvInitParams->pongConfig);\r
336 \r
337 /* Prepare the control registers for both P0 and P1 processes */\r
338 Tcp3d_prepControlRegs ( &drvInitParams->ctrlParams,\r
339 &modeReg,\r
340 &endReg,\r
341 &exeRegP0,\r
342 &exeRegP1);\r
343 \r
344 /* \r
345 * Soft Reset the TCP3D.\r
346 * Insert NOPs b/w the reset calls in HW to work properly.\r
347 */\r
348 tcp3dCfgRegs->TCP3_SOFT_RESET = 1;\r
349 tcp3dCfgRegs->TCP3_SOFT_RESET = 0;\r
350 \r
351 /**\r
352 * Write to the Control registers with the prepared values to start\r
353 * the TCP3D state machine.\r
354 */\r
355 tcp3dCfgRegs->TCP3_MODE = modeReg;\r
356 tcp3dCfgRegs->TCP3_END = endReg;\r
357 tcp3dCfgRegs->TCP3_EXE_P0 = exeRegP0;\r
358 if ( tcp3dInst->doubleBuffer != CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
359 tcp3dCfgRegs->TCP3_EXE_P1 = exeRegP1;\r
360 \r
361 /* Set Local Variables used in the runtime APIs */\r
362 Tcp3d_setLocalVariables(tcp3dInst);\r
363 \r
364 /* Disable the interrupts */\r
365 Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
366 Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
367 \r
368 /* Clear pending interrupts */\r
369 Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
370 Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
371 \r
372 /* Reset the EDMA Channels */\r
373 Tcp3d_resetEdmaChParam (tcp3dInst,\r
374 tcp3dInst->maxPingCbCnt,\r
375 tcp3dInst->maxPongCbCnt);\r
376 \r
377 /* Change the state */\r
378 tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
379 \r
380 return ( tcp3dResult );\r
381 \r
382 } /* end of - Tcp3d_init() function */\r
383 \r
384 /**\r
385 * @brief TCP3D Driver Deinitialization function.\r
386 */\r
387 Tcp3d_Result Tcp3d_deInit ( IN Tcp3d_Instance *inst )\r
388 {\r
389 /* Disable interrupts */\r
390 Tcp3d_disableEdmaL2pIntr(inst); \r
391 Tcp3d_disableEdmaPauseIntr(inst); \r
392 \r
393 /* Clear pending interrupts */\r
394 Tcp3d_clearEdmaL2pIntr(inst);\r
395 Tcp3d_clearEdmaPauseIntr(inst);\r
396 \r
397 return ( TCP3D_DRV_NO_ERR );\r
398 }\r
399 \r
400 /**\r
401 * @brief TCP3D Driver function called to reset the driver at sub-frame\r
402 * boundary. This function does the following:\r
403 * 1) Set the instance with the passed values - for example number\r
404 * of blocks for decoding in this subframe which is needed to\r
405 * for checking the boundary and a new status array pointer\r
406 * where the status register values for each code block are\r
407 * trasferred.\r
408 * 2) Initialize all the run-time instance variables to default.\r
409 * 3) Initialize the pseudo PaRAM memory with all the defaults\r
410 * based on mode.\r
411 * 4) Reset the EDMA channels with default values. \r
412 */\r
413 Tcp3d_Result Tcp3d_reset ( IN Tcp3d_Instance *tcp3dInst,\r
414 IN uint32_t codeBlocks)\r
415 {\r
416 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
417 \r
418 /* First check for valid statte */\r
419 if ( ( tcp3dInst->pingStop != 1 ) && ( tcp3dInst->pongStop != 1) )\r
420 tcp3dResult = TCP3D_DRV_INVALID_STATE;\r
421 \r
422 /* Check if the codeblocks value is valid */\r
423 if ( ( codeBlocks > tcp3dInst->maxCodeBlocks ) || ( codeBlocks < 2 ) )\r
424 tcp3dResult = TCP3D_DRV_INVALID_PARAMETER;\r
425 \r
426 /* Return if any error found */\r
427 if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
428 return ( tcp3dResult );\r
429 \r
430 /* update the maxCodeBlocks and dependent variables, if needed */\r
431 if ( codeBlocks != NULL )\r
432 {\r
433 tcp3dInst->maxCodeBlocks = codeBlocks;\r
434 tcp3dInst->maxPingCbCnt = (codeBlocks >> 1);\r
435 tcp3dInst->maxPongCbCnt = (codeBlocks >> 1);\r
436 /* max position index in pseudo Param Buffer */\r
437 tcp3dInst->maxPingCbIdx = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
438 tcp3dInst->maxPongCbIdx = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
439 }\r
440 \r
441 /* Reset run-time variables */\r
442 Tcp3d_resetRuntimeVariables(tcp3dInst);\r
443 \r
444 /* Reset the pseudo PaRAM memory */\r
445 Tcp3d_resetPseudoParam(tcp3dInst, tcp3dInst->maxCodeBlocks);\r
446 \r
447 /* Reset the EDMA Channels */\r
448 Tcp3d_resetEdmaChParam (tcp3dInst,\r
449 tcp3dInst->maxPingCbCnt,\r
450 tcp3dInst->maxPongCbCnt);\r
451 \r
452 /* Disable the interrupts */\r
453 Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
454 Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
455 \r
456 /* Clear pending interrupts */\r
457 Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
458 Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
459 \r
460 /* Change the state */\r
461 tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
462 \r
463 return ( tcp3dResult );\r
464 } /* end of - Tcp3d_reset() function */\r
465 \r
466 /**\r
467 * @brief TCP3D Driver function for enqueuing the code blocks to the input\r
468 * list. Here the input list is a pseudo PaRAM list consisting of\r
469 * actual PaRAM entries for INCFG, LLR, HD, SD & STS transfers.\r
470 */\r
471 Tcp3d_Result Tcp3d_enqueueCodeBlock(IN Tcp3d_Instance *tcp3dInst,\r
472 IN uint32_t blockLength,\r
473 IN uint32_t *inputConfigPtr,\r
474 IN int8_t *llrPtr,\r
475 IN uint32_t llrOffset,\r
476 IN uint32_t *hdPtr,\r
477 IN int8_t *sdPtr,\r
478 IN uint32_t sdOffset,\r
479 IN uint32_t *statusPtr,\r
480 IN uint8_t ntfEventFlag)\r
481 {\r
482 EDMA3_DRV_PaRAMRegs *lastOutPrm;\r
483 int32_t blockIndex;\r
484 int32_t pathFlag;\r
485 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
486 Tcp3d_Result tcp3dResult2 = TCP3D_DRV_NO_ERR;\r
487 EDMA3_DRV_PaRAMRegs *prmCfg;\r
488 EDMA3_DRV_PaRAMRegs *prmLlr;\r
489 EDMA3_DRV_PaRAMRegs *prmHd;\r
490 EDMA3_DRV_PaRAMRegs *prmSts;\r
491 EDMA3_DRV_PaRAMRegs *prmSd;\r
492 EDMA3_DRV_PaRAMRegs *prevLastPrmPtr;\r
493 EDMA3_DRV_PaRAMRegs *prmWrap;\r
494 uint32_t l2pCh[2];\r
495 uint16_t revtLink[2];\r
496 uint16_t ntfdLink[2];\r
497 uint16_t ntfLink[2];\r
498 uint16_t stsLink[2];\r
499 uint16_t sdLink[2];\r
500 uint32_t wrapLink[2];\r
501 \r
502 l2pCh[PING_INDEX] = tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P];\r
503 l2pCh[PONG_INDEX] = tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P];\r
504 revtLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT];\r
505 revtLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT];\r
506 ntfdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTFD];\r
507 ntfdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTFD];\r
508 ntfLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTF];\r
509 ntfLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTF];\r
510 stsLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_STS];\r
511 stsLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_STS];\r
512 sdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_SD];\r
513 sdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_SD];\r
514 wrapLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_WRAP];\r
515 wrapLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_WRAP];\r
516 \r
517 #if TWO_PATHS\r
518 /* get next available path index */\r
519 pathFlag = tcp3dInst->nextCodeBlockIndex;\r
520 if ( pathFlag )\r
521 {\r
522 if ( tcp3dInst->pongFreeCnt )\r
523 {\r
524 blockIndex = tcp3dInst->nextPongInIdx;\r
525 }\r
526 else if ( tcp3dInst->pingFreeCnt )\r
527 {\r
528 blockIndex = tcp3dInst->nextPingInIdx;\r
529 pathFlag = 0;\r
530 }\r
531 }\r
532 else\r
533 {\r
534 if ( tcp3dInst->pingFreeCnt )\r
535 {\r
536 blockIndex = tcp3dInst->nextPingInIdx;\r
537 }\r
538 else if ( tcp3dInst->pongFreeCnt )\r
539 {\r
540 blockIndex = tcp3dInst->nextPongInIdx;\r
541 pathFlag = 1;\r
542 }\r
543 }\r
544 \r
545 /* update the next path flag */\r
546 if ( pathFlag )\r
547 tcp3dInst->nextCodeBlockIndex = 0;\r
548 else\r
549 tcp3dInst->nextCodeBlockIndex = 1;\r
550 \r
551 /* add new block to the list until available capacity */\r
552 if ( tcp3dInst->pingFreeCnt || tcp3dInst->pongFreeCnt )\r
553 #else\r
554 /* path flag from the blockIndex value */\r
555 blockIndex = tcp3dInst->nextCodeBlockIndex;\r
556 pathFlag = (blockIndex & 1);\r
557 \r
558 /* add new block to the list until available capacity */\r
559 if ( ( ( pathFlag == 0 ) && tcp3dInst->pingFreeCnt ) ||\r
560 ( ( pathFlag == 1 ) && tcp3dInst->pongFreeCnt ) )\r
561 #endif\r
562 {\r
563 /* Update the pointers */\r
564 prmCfg = &tcp3dInst->pseudoParamBufPtr[blockIndex*TCP3D_DRV_LINK_CB];\r
565 prmLlr = prmCfg + LINK_CH_IDX_LLR;\r
566 prmHd = prmCfg + LINK_CH_IDX_HD;\r
567 prmSts = prmCfg + LINK_CH_IDX_STS;\r
568 prmSd = prmCfg + LINK_CH_IDX_SD;\r
569 \r
570 /**\r
571 * Update addresses first\r
572 */\r
573 prmCfg->srcAddr = (uint32_t) inputConfigPtr;\r
574 prmLlr->srcAddr = (uint32_t) llrPtr;\r
575 prmHd->destAddr = (uint32_t) hdPtr;\r
576 prmSts->destAddr = (uint32_t) statusPtr;\r
577 prmSd->destAddr = (uint32_t) sdPtr;\r
578 /**\r
579 * Update counts for needed\r
580 */\r
581 prmSd->aCnt = blockLength;\r
582 if ( ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
583 ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
584 {\r
585 prmLlr->aCnt = (blockLength>>1);\r
586 prmLlr->srcBIdx = (blockLength>>1);\r
587 prmLlr->srcCIdx = llrOffset;\r
588 prmHd->aCnt = (blockLength>>3);\r
589 prmSd->destBIdx = sdOffset;\r
590 }\r
591 else\r
592 {\r
593 prmLlr->aCnt = COMPUTE_KOUT(blockLength);\r
594 prmLlr->srcBIdx = llrOffset;\r
595 prmHd->aCnt = COMPUTE_HD_BYTE_SIZE(blockLength);\r
596 }\r
597 \r
598 /**\r
599 * Link Status & Soft decisions if avaiable.\r
600 * NOTE: For wrap-around case, load OPT & LINK fields with reset values\r
601 */\r
602 /* load HD OPT reset value */\r
603 prmHd->opt = tcp3dInst->resetHdOpt[pathFlag];\r
604 /* Check if STS is available */\r
605 if ( statusPtr != NULL )\r
606 {\r
607 /* update HD link */\r
608 prmHd->linkAddr = stsLink[pathFlag];\r
609 /* load STS OPT reset value */\r
610 prmSts->opt = tcp3dInst->resetStsOpt[pathFlag];\r
611 /* Check if SD is available */\r
612 if ( sdPtr != NULL )\r
613 {\r
614 /* load SD OPT reset value */\r
615 prmSd->opt = tcp3dInst->resetSdOpt[pathFlag];\r
616 /* update Status link */\r
617 prmSts->linkAddr = sdLink[pathFlag];\r
618 /* load SD link reset value */\r
619 prmSd->linkAddr = tcp3dInst->resetSdLink[pathFlag];\r
620 /* last param pointer */\r
621 lastOutPrm = prmSd;\r
622 }\r
623 else\r
624 {\r
625 /* link reset value */\r
626 prmSts->linkAddr = tcp3dInst->resetStsLink[pathFlag];\r
627 /* last param pointer */\r
628 lastOutPrm = prmSts;\r
629 }\r
630 }\r
631 else if ( sdPtr != NULL )\r
632 {\r
633 /* update HD link */\r
634 prmHd->linkAddr = sdLink[pathFlag];\r
635 /* load SD OPT reset value */\r
636 prmSd->opt = tcp3dInst->resetSdOpt[pathFlag];\r
637 /* load SD link reset value */\r
638 prmSd->linkAddr = tcp3dInst->resetSdLink[pathFlag];\r
639 /* last param pointer */\r
640 lastOutPrm = prmSd;\r
641 }\r
642 else\r
643 {\r
644 /* load HD link reset value */\r
645 prmHd->linkAddr = tcp3dInst->resetHdLink[pathFlag];\r
646 /* last param pointer */\r
647 lastOutPrm = prmHd;\r
648 }\r
649 \r
650 /* Add the WRAP param at the end of the output PaRAM */\r
651 if ( blockIndex >= (tcp3dInst->maxCodeBlocks-2) )\r
652 {\r
653 /* get the pointer for the wrap param for the appropriate path */\r
654 prmWrap = (EDMA3_DRV_PaRAMRegs *) wrapLink[pathFlag];\r
655 /* link with last out param */\r
656 lastOutPrm->linkAddr = 0xFFFF & wrapLink[pathFlag];\r
657 /* change the last param pointer */\r
658 lastOutPrm = prmWrap;\r
659 }\r
660 \r
661 /**\r
662 * If Interrupt nofication is requested, change the default link \r
663 * to LINK_CH_IDX_NTF for the last PaRAM.\r
664 */\r
665 if ( ntfEventFlag )\r
666 {\r
667 lastOutPrm->linkAddr = ntfLink[pathFlag];\r
668 }\r
669 \r
670 /**\r
671 * Chain the block to previous one in each path. This is done for blocks\r
672 * starting from the second one in each path.\r
673 * \r
674 * Since the blockIndex is tracking linearly the pseudo param buffer\r
675 * and ping & pong lists are used as interleaved lists, chaining is\r
676 * done starting from index 2 onwards till max.\r
677 */\r
678 if ( blockIndex > 1 )\r
679 {\r
680 /* Get the previous last output PaRAM, used in chaining */\r
681 prevLastPrmPtr = tcp3dInst->lastParam[pathFlag];\r
682 \r
683 /* Change the TCC to L2P */\r
684 CSL_FINS(prevLastPrmPtr->opt, TPCC_PARAM_OPT_TCC, l2pCh[pathFlag]);\r
685 \r
686 /**\r
687 * If previous block has notification, change the previous param\r
688 * link to NTFD, otherwise change to dummy REVT link PaRAM.\r
689 */\r
690 if ( tcp3dInst->prevNtfFlag[pathFlag] )\r
691 {\r
692 /* Change the LINK to interrupt Notify PaRAM */\r
693 prevLastPrmPtr->linkAddr = ntfdLink[pathFlag];\r
694 }\r
695 else\r
696 {\r
697 /* Change the LINK to dummy REVT PaRAM */\r
698 prevLastPrmPtr->linkAddr = revtLink[pathFlag];\r
699 }\r
700 }\r
701 \r
702 /* Store ntfEventFlag, used in chaining next block */\r
703 tcp3dInst->prevNtfFlag[pathFlag] = ntfEventFlag;\r
704 \r
705 /* Store the last output PaRAM, used in chaining next block */\r
706 tcp3dInst->lastParam[pathFlag] = lastOutPrm;\r
707 \r
708 /* Increment the ping/pong load counter */\r
709 if ( pathFlag )\r
710 {\r
711 tcp3dInst->pongLoadCnt++;\r
712 tcp3dInst->pongFreeCnt--;\r
713 tcp3dInst->nextPongInIdx += 2;\r
714 }\r
715 else\r
716 {\r
717 tcp3dInst->pingLoadCnt++;\r
718 tcp3dInst->pingFreeCnt--;\r
719 tcp3dInst->nextPingInIdx += 2;\r
720 }\r
721 \r
722 /* Reset index when reached maximum */\r
723 if ( tcp3dInst->nextPingInIdx > tcp3dInst->maxPingCbIdx )\r
724 {\r
725 tcp3dInst->nextPingInIdx = 0;\r
726 }\r
727 if ( tcp3dInst->nextPongInIdx > tcp3dInst->maxPongCbIdx )\r
728 {\r
729 tcp3dInst->nextPongInIdx = 1;\r
730 }\r
731 \r
732 #if !TWO_PATHS\r
733 /* Increment the index value until reaching the last block */\r
734 tcp3dInst->nextCodeBlockIndex++;\r
735 \r
736 /* Reset index when reached maximum */\r
737 if ( tcp3dInst->nextCodeBlockIndex >= tcp3dInst->maxCodeBlocks )\r
738 {\r
739 tcp3dInst->nextCodeBlockIndex = 0;\r
740 }\r
741 #endif\r
742 } /* if enqueue possible */\r
743 else\r
744 {\r
745 tcp3dResult = TCP3D_DRV_INPUT_LIST_FULL;\r
746 } /* if enqueue not possible */\r
747 \r
748 /* Call Start function as needed */\r
749 if ( ( tcp3dInst->startFlag ) &&\r
750 ( (tcp3dInst->pingStop) || (tcp3dInst->pongStop) ) )\r
751 {\r
752 tcp3dResult2 = Tcp3d_start(tcp3dInst, TCP3D_DRV_START_AUTO);\r
753 \r
754 /* If start returned an error, generate an error message. */\r
755 if ( TCP3D_DRV_NO_ERR != tcp3dResult2 )\r
756 {\r
757 Tcp3d_osalLog("Enqueue: Tcp3d_start function returned error with value : %d\n", tcp3dResult2);\r
758 }\r
759 }\r
760 \r
761 return ( tcp3dResult );\r
762 } /* end of - Tcp3d_enqueueCodeBlock() function */\r
763 \r
764 /**\r
765 * @brief This API could be used for starting the driver to start doing\r
766 * EDMA transfers to TCP3 decoder for decoding from the pseudo\r
767 * PaRAM list.\r
768 *\r
769 * This function is executed at the application task thread for\r
770 * starting either the PING or PONG path execution.\r
771 */\r
772 Tcp3d_Result Tcp3d_start ( INOUT Tcp3d_Instance *inst,\r
773 IN uint8_t startMode)\r
774 {\r
775 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
776 EDMA3_DRV_PaRAMRegs *currPrmPtr1, *currPrmPtr2;\r
777 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
778 uint16_t startNeeded = 0; /* 0 - not started, 1 - started */ \r
779 int32_t pingOutIdx, pongOutIdx;\r
780 \r
781 /* Set startFlag if first call to the function is made with AUTO mode */\r
782 if ( ( startMode == TCP3D_DRV_START_AUTO) && ( !inst->startFlag ) )\r
783 {\r
784 inst->startFlag = startMode;\r
785 }\r
786 \r
787 /**\r
788 * Return immediately, if both stop flags are not set.\r
789 * This is possible in two scenarios\r
790 * 1) After the init and before calling start with AUTO mode.\r
791 * 2) In steady state when both ping and pong decoders are busy. \r
792 */\r
793 if ( ( ( inst->pingStop == NULL ) && ( inst->pongStop == NULL ) ) ||\r
794 ( !inst->startFlag ) )\r
795 {\r
796 return ( tcp3dResult );\r
797 }\r
798 \r
799 /**\r
800 * Check startMode parameter to see if start needed\r
801 */\r
802 if ( startMode == TCP3D_DRV_START_AUTO )\r
803 {\r
804 /**\r
805 * Read the source address of L2P Channel PaRAM to get the current\r
806 * pseudo PaRAM pointer for PING/PONG paths. Then compare with the start\r
807 * pointer to get the out indexes.\r
808 */\r
809 currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
810 currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
811 pingOutIdx = GET_CB_IDX(currPrmPtr1 - inst->startPrmPtr);\r
812 pongOutIdx = GET_CB_IDX(currPrmPtr2 - inst->startPrmPtr);\r
813 \r
814 /* Update the counters and indexes using the current out indexes */\r
815 Tcp3d_updateListVariables( inst, pingOutIdx, pongOutIdx );\r
816 \r
817 /**\r
818 * Start is needed in the following cases.\r
819 * - if the current out index is less than next in index\r
820 * - if not, in the wrap case when blocks are loaded from beginning\r
821 * of the list where out index could be greater than next in index.\r
822 * Here check for the load count.\r
823 * \r
824 * Two LSB bits of the variable startNeeded are used for indicating the\r
825 * need to do start. LSB0 is used for PING and LSB1 is used for PONG. \r
826 */\r
827 /* PING STOP */\r
828 if ( inst->pingStop )\r
829 {\r
830 if ( pingOutIdx < inst->nextPingInIdx )\r
831 {\r
832 startNeeded |= 1;\r
833 }\r
834 else if ( inst->pingLoadCnt > 0 )\r
835 {\r
836 startNeeded |= 1;\r
837 }\r
838 }\r
839 \r
840 /* PING STOP */\r
841 if ( inst->pongStop )\r
842 {\r
843 if ( pongOutIdx < inst->nextPongInIdx )\r
844 {\r
845 startNeeded |= 2;\r
846 }\r
847 else if ( inst->pongLoadCnt > 0 )\r
848 {\r
849 startNeeded |= 2;\r
850 }\r
851 }\r
852 }\r
853 else if ( ( startMode == TCP3D_DRV_START_PING ) && ( inst->pingStop ) )\r
854 {\r
855 startNeeded |= 1;\r
856 }\r
857 else if ( ( startMode == TCP3D_DRV_START_PONG ) && ( inst->pongStop ) )\r
858 {\r
859 startNeeded |= 2;\r
860 }\r
861 \r
862 /* If LSB0 is set, start PING */\r
863 if ( startNeeded & 0x1 )\r
864 {\r
865 /**\r
866 * Clear the wrap adjust flags,\r
867 * when the last block decoding in the ping list is detected.\r
868 */\r
869 if (inst->pingLastOutFlag)\r
870 {\r
871 inst->pingLastOutFlag = 0;\r
872 inst->pingWrapCheck = 1;\r
873 }\r
874 \r
875 /* increment counter */\r
876 inst->pingStartCntr++;\r
877 /* Clear the stop flag */\r
878 inst->pingStop = 0;\r
879 /* Enable L2P channel in the PING path */\r
880 result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
881 inst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
882 EDMA3_DRV_TRIG_MODE_MANUAL);\r
883 }\r
884 \r
885 /* If LSB1 is set, start PONG */\r
886 if ( startNeeded & 0x2 )\r
887 {\r
888 /**\r
889 * Clear the wrap adjust flags,\r
890 * when the last block decoding in the pong list is detected.\r
891 */\r
892 if (inst->pongLastOutFlag)\r
893 {\r
894 inst->pongLastOutFlag = 0;\r
895 inst->pongWrapCheck = 1;\r
896 }\r
897 \r
898 /* increment counter */\r
899 inst->pongStartCntr++;\r
900 /* Clear the stop flag */\r
901 inst->pongStop = 0;\r
902 \r
903 /* Enable L2P channel in the PONG path */\r
904 result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
905 inst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
906 EDMA3_DRV_TRIG_MODE_MANUAL);\r
907 }\r
908 \r
909 /* Update the return status, if any EDMA starts fail */\r
910 if ( result != EDMA3_DRV_SOK )\r
911 {\r
912 tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
913 }\r
914 \r
915 /* Change the state to RUNNING, if start successful */\r
916 if ( ( startNeeded ) && ( result == EDMA3_DRV_SOK ) )\r
917 {\r
918 inst->state = TCP3D_DRV_STATE_RUNNING;\r
919 }\r
920 \r
921 return ( tcp3dResult );\r
922 \r
923 } /* end of - Tcp3d_start() function */\r
924 \r
925 /**\r
926 * @brief This API could be used for querying the TCP3D driver to get\r
927 * updates or take appropriate actions.\r
928 * \r
929 * \note This API is not fully scoped currently and the possible query\r
930 * commands and their actions are open as of now.\r
931 */\r
932 Tcp3d_Result Tcp3d_status ( IN Tcp3d_Instance *inst,\r
933 INOUT Tcp3d_Sts *drvStatus )\r
934 {\r
935 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
936 EDMA3_DRV_PaRAMRegs *currPrmPtr1, *currPrmPtr2;\r
937 \r
938 /* Check the control command */\r
939 switch ( drvStatus->cmd )\r
940 {\r
941 case TCP3D_DRV_GET_STATE :\r
942 /* Read state value from driver instance */\r
943 drvStatus->state = inst->state;\r
944 break;\r
945 \r
946 case TCP3D_DRV_GET_MIN_OUT_IDX:\r
947 /**\r
948 * Get the L2P Channel PaRAM address and then read the source\r
949 * address from the PaRAM to get the index to the pseudo PaRAM\r
950 * current read pointer.\r
951 * \r
952 * Compute the minimum index by comparing the current indexes with\r
953 * the pseudo PaRAM start pointer.\r
954 */\r
955 currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
956 currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
957 drvStatus->prmOutIdx = (MIN(currPrmPtr1, currPrmPtr2) - inst->startPrmPtr)>>2;\r
958 break;\r
959 \r
960 case TCP3D_DRV_GET_PING_OUT_IDX:\r
961 /**\r
962 * Read the source address of L2P Channel PaRAM to get the current\r
963 * pseudo PaRAM pointer for PING path. Then compare with the start\r
964 * pointer for the index.\r
965 */\r
966 currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
967 drvStatus->prmOutIdx = (currPrmPtr1 - inst->startPrmPtr)>>2;\r
968 break;\r
969 \r
970 case TCP3D_DRV_GET_PONG_OUT_IDX:\r
971 /**\r
972 * Read the source address of L2P Channel PaRAM to get the current\r
973 * pseudo PaRAM pointer for PONG path. Then compare with the start\r
974 * pointer for the index.\r
975 */\r
976 currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
977 drvStatus->prmOutIdx = (currPrmPtr2 - inst->startPrmPtr)>>2;\r
978 break;\r
979 \r
980 default:\r
981 /* If invalid command passed, flag error */\r
982 tcp3dResult = TCP3D_DRV_FAIL;\r
983 break;\r
984 }\r
985 \r
986 return (tcp3dResult);\r
987 \r
988 } /* end of - Tcp3d_status() function */\r
989 \r
990 /**\r
991 * \brief This API could be used for change or update the TCP3D driver\r
992 * instance values which are set during the init time.\r
993 * \r
994 * Currently, there are few commands supported with some the\r
995 * limitation that they are allowed only when the driver is in\r
996 * IDLE state.\r
997 * \r
998 * \note -# This API is not fully scoped currently and the possible\r
999 * control commands and their actions are open as of now.\r
1000 * -# We may need to protect the instance value updations, once\r
1001 * they are allowed to change in any state.\r
1002 */\r
1003 Tcp3d_Result Tcp3d_control (IN Tcp3d_Instance *inst,\r
1004 IN Tcp3d_Ctrl *drvCtrl)\r
1005 {\r
1006 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
1007 \r
1008 /* Check the control command */\r
1009 switch ( drvCtrl->cmd )\r
1010 {\r
1011 case TCP3D_DRV_SET_L2P_INT :\r
1012 if ( drvCtrl->intrFlag )\r
1013 {\r
1014 Tcp3d_enableEdmaL2pIntr(inst);\r
1015 }\r
1016 else\r
1017 { \r
1018 Tcp3d_disableEdmaL2pIntr(inst);\r
1019 }\r
1020 break;\r
1021 case TCP3D_DRV_SET_REVT_INT :\r
1022 if ( drvCtrl->intrFlag )\r
1023 {\r
1024 Tcp3d_enableEdmaPauseIntr(inst);\r
1025 }\r
1026 else\r
1027 { \r
1028 Tcp3d_disableEdmaPauseIntr(inst);\r
1029 }\r
1030 break;\r
1031 \r
1032 case TCP3D_DRV_CLR_REVT_INT :\r
1033 Tcp3d_clearEdmaPauseIntr(inst);\r
1034 break;\r
1035 \r
1036 case TCP3D_DRV_SET_PING_L2P_INT :\r
1037 case TCP3D_DRV_SET_PONG_L2P_INT :\r
1038 case TCP3D_DRV_SET_PING_PAUSE_INT :\r
1039 case TCP3D_DRV_SET_PONG_PAUSE_INT :\r
1040 default:\r
1041 /* If invalid command passed, flag error */\r
1042 tcp3dResult = TCP3D_DRV_FAIL;\r
1043 break;\r
1044 }\r
1045 \r
1046 return (tcp3dResult);\r
1047 \r
1048 } /* end of - Tcp3d_control() function */\r
1049 \r
1050 /*******************************************************************************\r
1051 ******************************************************************************/\r
1052 static void Tcp3d_setLocalVariables (IN Tcp3d_Instance *tcp3dInst)\r
1053 {\r
1054 // NOTE: Removed after the shadow registers base is set during init\r
1055 // CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMACC_2_REGS;\r
1056 EDMA3_DRV_PaRAMRegs *prm;\r
1057 \r
1058 /* Set EDMA PaRAM pointers */\r
1059 tcp3dInst->startPrmPtr = (EDMA3_DRV_PaRAMRegs *) L2GLBMAP(tcp3dInst->coreId, \\r
1060 tcp3dInst->pseudoParamBufPtr);\r
1061 tcp3dInst->pingPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pingChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
1062 tcp3dInst->pongPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pongChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
1063 \r
1064 /* Store pointers for the end of list (PING starts first in the list)*/\r
1065 prm = &tcp3dInst->pseudoParamBufPtr[(tcp3dInst->maxCodeBlocks-2)*TCP3D_DRV_LINK_CB];\r
1066 if ( tcp3dInst->maxCodeBlocks % 1 )\r
1067 { /* even */\r
1068 tcp3dInst->endListParam[PING_INDEX] = prm;\r
1069 tcp3dInst->endListParam[PONG_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
1070 }\r
1071 else\r
1072 { /* odd */\r
1073 tcp3dInst->endListParam[PING_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
1074 tcp3dInst->endListParam[PONG_INDEX] = prm;\r
1075 }\r
1076 \r
1077 /**\r
1078 * Set interrupt enable/disable mask for channels using the shadow region\r
1079 * registers.\r
1080 */\r
1081 /* Get EDMA Controller shadow registers pointer */\r
1082 // NOTE: Removed after the value is set through init sequence\r
1083 // tcp3dInst->tpccShadowRegs = &tpcc2Regs->SHADOW[tcp3dInst->edmaRegionId];\r
1084 \r
1085 /* REVT channel mask and registers (for PAUSE interrupt) */\r
1086 tcp3dInst->pauseChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
1087 tcp3dInst->pauseChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
1088 if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] < 32 )\r
1089 {\r
1090 tcp3dInst->intEnClrReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
1091 tcp3dInst->intEnSetReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
1092 tcp3dInst->clrIntPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
1093 tcp3dInst->intPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
1094 }\r
1095 else\r
1096 {\r
1097 tcp3dInst->intEnClrReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
1098 tcp3dInst->intEnSetReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
1099 tcp3dInst->clrIntPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
1100 tcp3dInst->intPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
1101 }\r
1102 /* L2P channel mask and registers (for L2P interrupt) */\r
1103 tcp3dInst->l2pChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
1104 tcp3dInst->l2pChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
1105 if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] < 32 )\r
1106 {\r
1107 tcp3dInst->intEnClrReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
1108 tcp3dInst->intEnSetReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
1109 tcp3dInst->clrIntPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
1110 tcp3dInst->intPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
1111 }\r
1112 else\r
1113 {\r
1114 tcp3dInst->intEnClrReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
1115 tcp3dInst->intEnSetReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
1116 tcp3dInst->clrIntPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
1117 tcp3dInst->intPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
1118 }\r
1119 \r
1120 /* Clear countes */\r
1121 tcp3dInst->pingStartCntr = 0;\r
1122 tcp3dInst->pongStartCntr = 0;\r
1123 tcp3dInst->pingPauseEnCntr = 0;\r
1124 tcp3dInst->pingL2pEnCntr = 0;\r
1125 tcp3dInst->pingIntr = 0;\r
1126 tcp3dInst->pongIntr = 0;\r
1127 }\r
1128 \r
1129 static void Tcp3d_resetRuntimeVariables (IN Tcp3d_Instance *tcp3dInst)\r
1130 {\r
1131 /* Initialize the driver instace run-time variables */\r
1132 tcp3dInst->nextCodeBlockIndex = 0;\r
1133 tcp3dInst->pingStop = 1;\r
1134 tcp3dInst->pongStop = 1;\r
1135 tcp3dInst->startFlag = 0;\r
1136 tcp3dInst->prevNtfFlag[PING_INDEX] = 0;\r
1137 tcp3dInst->prevNtfFlag[PONG_INDEX] = 0;\r
1138 tcp3dInst->pingLoadCnt = 0;\r
1139 tcp3dInst->pongLoadCnt = 0;\r
1140 tcp3dInst->prevPingOutIdx = 0;\r
1141 tcp3dInst->prevPongOutIdx = 1;\r
1142 tcp3dInst->nextPingInIdx = 0;\r
1143 tcp3dInst->nextPongInIdx = 1;\r
1144 tcp3dInst->pingWrapCheck = 1;\r
1145 tcp3dInst->pongWrapCheck = 1;\r
1146 tcp3dInst->pingLastOutFlag = 0;\r
1147 tcp3dInst->pongLastOutFlag = 0;\r
1148 tcp3dInst->pingFreeCnt = tcp3dInst->maxPingCbCnt;\r
1149 tcp3dInst->pongFreeCnt = tcp3dInst->maxPongCbCnt;\r
1150 }\r
1151 \r
1152 static void Tcp3d_updateListVariables ( INOUT Tcp3d_Instance *inst,\r
1153 IN int32_t pingOutIdx,\r
1154 IN int32_t pongOutIdx )\r
1155 {\r
1156 int32_t indexDiff1, indexDiff2;\r
1157 \r
1158 /**\r
1159 * Load count adjustment is done following the steps described below.\r
1160 * \r
1161 * step1 : get index difference between current and previous indexes\r
1162 * step2 : convert the index difference to count\r
1163 * step3 : reduce the load count by index difference. It is possible that\r
1164 * the diffrence could be negative, which gets corrected after\r
1165 * step4 is completed.\r
1166 * step4 : wrap is detected, reduce the load count by maximum one time.\r
1167 * The wrap detection is done either of the cases.\r
1168 * 1) when index difference is negative\r
1169 * 2) the last block decoding is detected\r
1170 * \r
1171 * NOTES:\r
1172 * - At reset/init, checking for wrap is enabled.\r
1173 * - Once the adjustment is done, checking is disabled until the last\r
1174 * block decoding is done.\r
1175 */\r
1176 \r
1177 /* Adjust the loaded count - PING */\r
1178 /* step1 */\r
1179 indexDiff1 = ( pingOutIdx - inst->prevPingOutIdx );\r
1180 /* step2, step3 */\r
1181 inst->pingLoadCnt -= (indexDiff1>>1);\r
1182 /* step4 */\r
1183 if ( ( (indexDiff1 < 0) || (inst->pingLastOutFlag) ) && (inst->pingWrapCheck) )\r
1184 {\r
1185 inst->pingLoadCnt -= inst->maxPingCbCnt;\r
1186 inst->pingWrapCheck = 0;\r
1187 }\r
1188 \r
1189 /* Adjust the loaded count - PING */\r
1190 /* step1 */\r
1191 indexDiff2 = ( pongOutIdx - inst->prevPongOutIdx );\r
1192 /* step2, step3 */\r
1193 inst->pongLoadCnt -= (indexDiff2>>1);\r
1194 /* step4 */\r
1195 if ( ( (indexDiff2 < 0) || (inst->pongLastOutFlag) ) && (inst->pongWrapCheck) )\r
1196 {\r
1197 inst->pongLoadCnt -= inst->maxPongCbCnt;\r
1198 inst->pongWrapCheck = 0;\r
1199 }\r
1200 \r
1201 /* update free counts - can be negative */\r
1202 inst->pingFreeCnt = ( inst->maxPingCbCnt - inst->pingLoadCnt );\r
1203 inst->pongFreeCnt = ( inst->maxPongCbCnt - inst->pongLoadCnt );\r
1204 \r
1205 /* update previous out index */\r
1206 inst->prevPingOutIdx = pingOutIdx;\r
1207 inst->prevPongOutIdx = pongOutIdx;\r
1208 }\r
1209 \r
1210 /**\r
1211 * @brief Function to get the physical addresses of all the EDMA3 channels\r
1212 * used in TCP3D driver. \r
1213 */\r
1214 static EDMA3_DRV_Result Tcp3d_getEdmaChParamAddr(IN Tcp3d_Instance *tcp3dInst)\r
1215 { \r
1216 EDMA3_DRV_Result result = EDMA3_DRV_SOK; \r
1217 int32_t cnt;\r
1218 \r
1219 for ( cnt = 0; cnt < TCP3D_DRV_MAX_CH_PER_PATH; cnt++ )\r
1220 {\r
1221 /* Get PaRAM address for PING physical channel */ \r
1222 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1223 tcp3dInst->pingCh[cnt],\r
1224 &tcp3dInst->pingChParamAddr[cnt]);\r
1225 \r
1226 /* Get PaRAM address for PONG physical channel */ \r
1227 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1228 tcp3dInst->pongCh[cnt],\r
1229 &tcp3dInst->pongChParamAddr[cnt]);\r
1230 }\r
1231 \r
1232 for ( cnt = 0; cnt < (TCP3D_DRV_MAX_LINK_CH>>1); cnt++ )\r
1233 {\r
1234 /* Get PaRAM address for PING Link channel */ \r
1235 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1236 tcp3dInst->pingLinkCh[cnt],\r
1237 &tcp3dInst->pingLinkChParamAddr[cnt]);\r
1238 \r
1239 /* Get PaRAM address for PONG link channel */ \r
1240 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1241 tcp3dInst->pongLinkCh[cnt],\r
1242 &tcp3dInst->pongLinkChParamAddr[cnt]);\r
1243 }\r
1244 \r
1245 return ( result );\r
1246 \r
1247 } /* end of - Tcp3d_getEdmaChParamAddr() function */\r
1248 \r
1249 /**\r
1250 * @brief Enabling the Event triggered EDMA3 channels \r
1251 */\r
1252 static EDMA3_DRV_Result Tcp3d_enableEdmaChannels(Tcp3d_Instance *tcp3dInst)\r
1253 {\r
1254 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1255 \r
1256 /* Enable PING channels */\r
1257 result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
1258 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1259 EDMA3_DRV_TRIG_MODE_EVENT);\r
1260 \r
1261 /* Enable PoNG channels */\r
1262 result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
1263 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1264 EDMA3_DRV_TRIG_MODE_EVENT);\r
1265 \r
1266 return ( result );\r
1267 } /* end of - Tcp3d_enableEdmaChannels() function */ \r
1268 \r
1269 /**\r
1270 * @brief Initialize the EDMA channels PaRAM memory with default values\r
1271 */\r
1272 static EDMA3_DRV_Result Tcp3d_initEdmaChParam (IN Tcp3d_Instance *tcp3dInst)\r
1273 {\r
1274 EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0,0};\r
1275 EDMA3_DRV_PaRAMRegs *prm = ¶mSet;\r
1276 EDMA3_DRV_Result status = EDMA3_DRV_SOK;\r
1277 CSL_CPINTC_RegsOvly cpintc0Regs = (CSL_CPINTC_RegsOvly) tcp3dInst->cpIntc0RegsBase;\r
1278 \r
1279 /* Channel - REVT 0 (dummy PaRAM) */\r
1280 /* chain to REVT 0\r
1281 link to ping link cfg channel \r
1282 A-sync\r
1283 ACNT = 1\r
1284 BCNT = 0\r
1285 CCNT = 0\r
1286 scrBIDX = 0\r
1287 desBIDX = 0\r
1288 scrCIDX = 0\r
1289 desCIDX = 0 */\r
1290 /* Fill the PaRAM Set with transfer specific information */\r
1291 /* First set OPT field with appropriate values */\r
1292 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1293 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1294 CSL_EDMA3_TCCH_EN,\r
1295 CSL_EDMA3_ITCINT_DIS,\r
1296 CSL_EDMA3_TCINT_DIS,\r
1297 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1298 CSL_EDMA3_TCC_EARLY,\r
1299 CSL_EDMA3_FIFOWIDTH_NONE,\r
1300 CSL_EDMA3_STATIC_DIS,\r
1301 CSL_EDMA3_SYNC_A,\r
1302 CSL_EDMA3_ADDRMODE_INCR,\r
1303 CSL_EDMA3_ADDRMODE_INCR );\r
1304 #else\r
1305 prm->opt = 0;\r
1306 /* Enable Final transfer completion chain */\r
1307 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1308 /* Program the TCC */\r
1309 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1310 /* Early Trasfer Completion */\r
1311 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1312 /* A Sync Transfer Mode */\r
1313 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1314 /* Src & Dest are in INCR modes */\r
1315 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1316 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1317 #endif\r
1318 prm->srcAddr = NULL;\r
1319 prm->destAddr = NULL;\r
1320 prm->aCnt = 1;\r
1321 prm->bCnt = 0;\r
1322 prm->cCnt = 0;\r
1323 prm->bCntReload = 0;\r
1324 prm->srcBIdx = 0;\r
1325 prm->destBIdx = 0;\r
1326 prm->srcCIdx = 0;\r
1327 prm->destCIdx = 0;\r
1328 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1329 \r
1330 /* Now, write the PaRAM Set. */\r
1331 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1332 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1333 prm);\r
1334 \r
1335 /* Link Channel - set the reload Link PaRAM */\r
1336 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1337 tcp3dInst->pingLinkCh[LINK_CH_IDX_REVT],\r
1338 prm);\r
1339 \r
1340 /* Copy to use in reset function */\r
1341 Tcp3d_memcpy(&tcp3dInst->revtPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1342 \r
1343 /* Channel - REVT 1 (dummy PaRAM) */\r
1344 /* chain to REVT 1\r
1345 link to ping link cfg channel \r
1346 A-sync\r
1347 ACNT = 1\r
1348 BCNT = 1\r
1349 CCNT = 1\r
1350 scrBIDX = 0\r
1351 desBIDX = 0\r
1352 scrCIDX = 0\r
1353 desCIDX = 0 */\r
1354 /* Fill the PaRAM Set with transfer specific information */\r
1355 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1356 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1357 \r
1358 /* Now, write the PaRAM Set. */\r
1359 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1360 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1361 prm);\r
1362 \r
1363 /* Link Channel - set the reload Link PaRAM */\r
1364 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1365 tcp3dInst->pongLinkCh[LINK_CH_IDX_REVT],\r
1366 prm);\r
1367 \r
1368 /* Copy to use in reset */\r
1369 Tcp3d_memcpy(&tcp3dInst->revtPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1370 \r
1371 /* Channel - L2P 0 */\r
1372 /* chain to REVT 0\r
1373 link to ping link l2p channel \r
1374 AB-sync\r
1375 ACNT = 32\r
1376 BCNT = 4\r
1377 CCNT = pingNumCBs\r
1378 scrBIDX = 32\r
1379 desBIDX = 32\r
1380 scrCIDX = 32*4*2\r
1381 desCIDX = 0 */\r
1382 /* Fill the PaRAM Set with transfer specific information */\r
1383 /* Set OPT field with appropriate values */\r
1384 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1385 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_EN,\r
1386 CSL_EDMA3_TCCH_EN,\r
1387 CSL_EDMA3_ITCINT_DIS,\r
1388 CSL_EDMA3_TCINT_DIS,\r
1389 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1390 CSL_EDMA3_TCC_NORMAL,\r
1391 CSL_EDMA3_FIFOWIDTH_NONE,\r
1392 CSL_EDMA3_STATIC_DIS,\r
1393 CSL_EDMA3_SYNC_AB,\r
1394 CSL_EDMA3_ADDRMODE_INCR,\r
1395 CSL_EDMA3_ADDRMODE_INCR );\r
1396 #else\r
1397 prm->opt = 0;\r
1398 /* Enable Intermediate & Final transfer completion chain */\r
1399 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1400 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1401 /* Program the TCC */\r
1402 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1403 /* AB Sync Transfer Mode */\r
1404 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1405 /* Src & Dest are in INCR modes */\r
1406 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1407 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1408 #endif\r
1409 prm->srcAddr = NULL;\r
1410 prm->destAddr = (uint32_t)(tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1411 prm->aCnt = 32;\r
1412 prm->bCnt = TCP3D_DRV_LINK_CB;\r
1413 prm->cCnt = NULL;\r
1414 prm->bCntReload = TCP3D_DRV_LINK_CB;\r
1415 prm->srcBIdx = 32;\r
1416 prm->destBIdx = 32;\r
1417 prm->srcCIdx = (32<<1)*TCP3D_DRV_LINK_CB;\r
1418 prm->destCIdx = 0;\r
1419 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_L2P]);\r
1420 \r
1421 /* Now, write the PaRAM Set. */\r
1422 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1423 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1424 prm);\r
1425 \r
1426 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1427 tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
1428 prm);\r
1429 \r
1430 /* Copy to use in reset function */\r
1431 Tcp3d_memcpy(&tcp3dInst->l2pPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1432 \r
1433 /* Channel - L2P 1 */\r
1434 /* chain to REVT 1\r
1435 link to ping link l2p channel \r
1436 AB-sync\r
1437 ACNT = 32\r
1438 BCNT = 4\r
1439 CCNT = pingNumCBs\r
1440 scrBIDX = 32\r
1441 desBIDX = 32\r
1442 scrCIDX = 32*4*2\r
1443 desCIDX = 0 */\r
1444 /* Fill the PaRAM Set with transfer specific information */\r
1445 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1446 prm->destAddr = (uint32_t)(tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1447 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_L2P]);\r
1448 \r
1449 /* Now, write the PaRAM Set. */\r
1450 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1451 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
1452 prm);\r
1453 \r
1454 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1455 tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
1456 prm);\r
1457 \r
1458 /* Copy to use in reset function */\r
1459 Tcp3d_memcpy(&tcp3dInst->l2pPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1460 \r
1461 /* Link Channel - pause 0 */\r
1462 /* chain to REVT 0\r
1463 link to ping link revt channel \r
1464 AB-sync\r
1465 ACNT = 1\r
1466 BCNT = 2\r
1467 CCNT = 1 \r
1468 scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
1469 scrCIDX = 0\r
1470 desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
1471 desCIDX = 0 */\r
1472 /* Fill the PaRAM Set with transfer specific information */\r
1473 /* Set OPT field with appropriate values */\r
1474 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1475 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1476 CSL_EDMA3_TCCH_DIS,\r
1477 CSL_EDMA3_ITCINT_DIS,\r
1478 CSL_EDMA3_TCINT_EN,\r
1479 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1480 CSL_EDMA3_TCC_NORMAL,\r
1481 CSL_EDMA3_FIFOWIDTH_NONE,\r
1482 CSL_EDMA3_STATIC_DIS,\r
1483 CSL_EDMA3_SYNC_AB,\r
1484 CSL_EDMA3_ADDRMODE_INCR,\r
1485 CSL_EDMA3_ADDRMODE_INCR );\r
1486 #else\r
1487 prm->opt = 0;\r
1488 /* Enable Intermediate & Final transfer completion interrupt */\r
1489 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
1490 /* Program the TCC */\r
1491 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1492 /* AB Sync Transfer Mode */\r
1493 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1494 /* Src & Dest are in INCR modes */\r
1495 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1496 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1497 #endif\r
1498 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->constantOne);\r
1499 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingStop);\r
1500 prm->aCnt = 1;\r
1501 prm->bCnt = 2;\r
1502 prm->cCnt = 1;\r
1503 prm->bCntReload = 0;\r
1504 prm->srcBIdx = ((uint8_t *)&tcp3dInst->pauseState - &tcp3dInst->constantOne);\r
1505 prm->destBIdx = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pingStop);\r
1506 prm->srcCIdx = 0;\r
1507 prm->destCIdx = 0;\r
1508 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1509 \r
1510 /* Now, write the PaRAM Set. */\r
1511 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1512 tcp3dInst->pingLinkCh[LINK_CH_IDX_PAUSE],\r
1513 prm);\r
1514 \r
1515 /* Link Channel - pause 1 */\r
1516 /* chain to REVT 1\r
1517 link to ping link revt channel \r
1518 AB-sync\r
1519 ACNT = 1\r
1520 BCNT = 2\r
1521 CCNT = 1 \r
1522 scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
1523 scrCIDX = 0\r
1524 desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
1525 desCIDX = 0 */\r
1526 /* Fill the PaRAM Set with transfer specific information */\r
1527 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1528 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongStop);\r
1529 prm->destBIdx = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pongStop);\r
1530 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1531 \r
1532 /* Now, write the PaRAM Set. */\r
1533 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1534 tcp3dInst->pongLinkCh[LINK_CH_IDX_PAUSE],\r
1535 prm);\r
1536 \r
1537 /* Link Channel - INT 0 (notification PaRAM) */\r
1538 /* chain to REVT 0\r
1539 link to ping link cfg channel \r
1540 A-sync\r
1541 ACNT = 4\r
1542 BCNT = 1\r
1543 CCNT = 1\r
1544 scrBIDX = 0\r
1545 desBIDX = 0\r
1546 scrCIDX = 0\r
1547 desCIDX = 0 */\r
1548 /* Fill the PaRAM Set with transfer specific information */\r
1549 /* First set OPT field with appropriate values */\r
1550 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1551 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1552 CSL_EDMA3_TCCH_EN,\r
1553 CSL_EDMA3_ITCINT_DIS,\r
1554 CSL_EDMA3_TCINT_DIS,\r
1555 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1556 CSL_EDMA3_TCC_EARLY,\r
1557 CSL_EDMA3_FIFOWIDTH_NONE,\r
1558 CSL_EDMA3_STATIC_DIS,\r
1559 CSL_EDMA3_SYNC_A,\r
1560 CSL_EDMA3_ADDRMODE_INCR,\r
1561 CSL_EDMA3_ADDRMODE_INCR );\r
1562 #else\r
1563 prm->opt = 0;\r
1564 /* Enable Final transfer completion chain */\r
1565 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1566 /* Program the TCC */\r
1567 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1568 /* Early Trasfer Completion */\r
1569 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1570 /* A Sync Transfer Mode */\r
1571 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1572 /* Src & Dest are in INCR modes */\r
1573 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1574 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1575 #endif\r
1576 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->notificationEventNum);\r
1577 prm->destAddr = (uint32_t)(&cpintc0Regs->STATUS_SET_INDEX_REG);\r
1578 prm->aCnt = 4;\r
1579 prm->bCnt = 1;\r
1580 prm->cCnt = 1;\r
1581 prm->bCntReload = 0;\r
1582 prm->srcBIdx = 0;\r
1583 prm->destBIdx = 0;\r
1584 prm->srcCIdx = 0;\r
1585 prm->destCIdx = 0;\r
1586 prm->linkAddr = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
1587 \r
1588 /* Now, write the PaRAM Set. */\r
1589 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1590 tcp3dInst->pingLinkCh[LINK_CH_IDX_NTF],\r
1591 prm);\r
1592 \r
1593 prm->linkAddr = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG];\r
1594 /* Now, write the PaRAM Set. */\r
1595 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1596 tcp3dInst->pingLinkCh[LINK_CH_IDX_NTFD],\r
1597 prm);\r
1598 \r
1599 /* Link Channel - INT 1 (notification PaRAM) */\r
1600 /* chain to REVT 1\r
1601 link to ping link cfg channel \r
1602 A-sync\r
1603 ACNT = 4\r
1604 BCNT = 1\r
1605 CCNT = 1\r
1606 scrBIDX = 0\r
1607 desBIDX = 0\r
1608 scrCIDX = 0\r
1609 desCIDX = 0 */\r
1610 /* Fill the PaRAM Set with transfer specific information */\r
1611 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1612 prm->linkAddr = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
1613 \r
1614 /* Now, write the PaRAM Set. */\r
1615 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1616 tcp3dInst->pongLinkCh[LINK_CH_IDX_NTF],\r
1617 prm);\r
1618 \r
1619 /* Now, write the PaRAM Set. */\r
1620 prm->linkAddr = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG];\r
1621 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1622 tcp3dInst->pongLinkCh[LINK_CH_IDX_NTFD],\r
1623 prm);\r
1624 \r
1625 /* Link Channel - Wrap 0 */\r
1626 /* chain to REVT 0\r
1627 link to ping link l2p channel \r
1628 A-sync\r
1629 ACNT = 4\r
1630 BCNT = 1\r
1631 CCNT = 1 \r
1632 scrBIDX = 0\r
1633 scrCIDX = 0\r
1634 desBIDX = 0\r
1635 desCIDX = 0 */\r
1636 /* Fill the PaRAM Set with transfer specific information */\r
1637 /* Set OPT field with appropriate values */\r
1638 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1639 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1640 CSL_EDMA3_TCCH_EN,\r
1641 CSL_EDMA3_ITCINT_DIS,\r
1642 CSL_EDMA3_TCINT_DIS,\r
1643 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1644 CSL_EDMA3_TCC_NORMAL,\r
1645 CSL_EDMA3_FIFOWIDTH_NONE,\r
1646 CSL_EDMA3_STATIC_DIS,\r
1647 CSL_EDMA3_SYNC_A,\r
1648 CSL_EDMA3_ADDRMODE_INCR,\r
1649 CSL_EDMA3_ADDRMODE_INCR );\r
1650 #else\r
1651 prm->opt = 0;\r
1652 /* Enable Final transfer completion chain */\r
1653 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1654 /* Program the TCC */\r
1655 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1656 /* A Sync Transfer Mode */\r
1657 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1658 /* Src & Dest are in INCR modes */\r
1659 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1660 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1661 #endif\r
1662 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPingCbCnt);\r
1663 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingLastOutFlag);\r
1664 prm->aCnt = 4;\r
1665 prm->bCnt = 1;\r
1666 prm->cCnt = 1;\r
1667 prm->bCntReload = 0;\r
1668 prm->srcBIdx = 0;\r
1669 prm->destBIdx = 0;\r
1670 prm->srcCIdx = 0;\r
1671 prm->destCIdx = 0;\r
1672 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1673 \r
1674 /* Now, write the PaRAM Set. */\r
1675 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1676 tcp3dInst->pingLinkCh[LINK_CH_IDX_WRAP],\r
1677 prm);\r
1678 \r
1679 /* Link Channel - Wrap 1 */\r
1680 /* chain to REVT 1\r
1681 link to ping link l2p channel \r
1682 A-sync\r
1683 ACNT = 4\r
1684 BCNT = 1\r
1685 CCNT = 1 \r
1686 scrBIDX = 0\r
1687 scrCIDX = 0\r
1688 desBIDX = 0\r
1689 desCIDX = 0 */\r
1690 /* Fill the PaRAM Set with transfer specific information */\r
1691 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1692 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPongCbCnt);\r
1693 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongLastOutFlag);\r
1694 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1695 \r
1696 /* Now, write the PaRAM Set. */\r
1697 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1698 tcp3dInst->pongLinkCh[LINK_CH_IDX_WRAP],\r
1699 prm);\r
1700 \r
1701 return ( status );\r
1702 \r
1703 } /* end of - Tcp3d_initEdmaChParam() function */\r
1704 \r
1705 /**\r
1706 * @brief Resets the the EDMA channels PaRAM memory with default values\r
1707 */\r
1708 static EDMA3_DRV_Result Tcp3d_resetEdmaChParam( IN Tcp3d_Instance *tcp3dInst,\r
1709 IN uint32_t pingNumCBs,\r
1710 IN uint32_t pongNumCBs)\r
1711 {\r
1712 EDMA3_DRV_Result status = EDMA3_DRV_SOK;\r
1713 EDMA3_DRV_PaRAMRegs *prm;\r
1714 \r
1715 /* L2P 0 */\r
1716 prm = &tcp3dInst->l2pPrm[PING_INDEX];\r
1717 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[0]);\r
1718 prm->cCnt = pingNumCBs;\r
1719 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1720 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1721 prm);\r
1722 \r
1723 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1724 tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
1725 prm);\r
1726 \r
1727 /* L2P 1 */\r
1728 prm = &tcp3dInst->l2pPrm[PONG_INDEX];\r
1729 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[TCP3D_DRV_LINK_CB]);\r
1730 prm->cCnt = pongNumCBs;\r
1731 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1732 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
1733 prm);\r
1734 \r
1735 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1736 tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
1737 prm);\r
1738 \r
1739 /* REVT 0 */\r
1740 prm = &tcp3dInst->revtPrm[PING_INDEX];\r
1741 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1742 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1743 prm);\r
1744 \r
1745 /* REVT 1 */\r
1746 prm = &tcp3dInst->revtPrm[PONG_INDEX];\r
1747 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1748 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1749 prm);\r
1750 \r
1751 return ( status );\r
1752 \r
1753 } /* end of - Tcp3d_resetEdmaChParam() function */\r
1754 \r
1755 /**\r
1756 * @brief Initialize the Pseudo PaRAM memory with default values\r
1757 */\r
1758 static void Tcp3d_initPseudoParam ( IN Tcp3d_Instance *tcp3dInst,\r
1759 IN uint32_t codeBlocks,\r
1760 IN Tcp3d_Config *pingConfig,\r
1761 IN Tcp3d_Config *pongConfig)\r
1762 {\r
1763 int32_t cnt, flag;\r
1764 EDMA3_DRV_PaRAMRegs prmSet[TCP3D_DRV_LINK_CB];\r
1765 EDMA3_DRV_PaRAMRegs *prm;\r
1766 uint8_t mode = tcp3dInst->mode;\r
1767 uint32_t incfgOpt[2];\r
1768 uint32_t incfgLink[2];\r
1769 uint32_t incfgStartAddress[2];\r
1770 uint32_t stsOpt[2];\r
1771 uint32_t stsLink[2];\r
1772 uint32_t stsStartAddress[2];\r
1773 uint32_t hdOpt[2];\r
1774 uint32_t hdLink[2];\r
1775 uint32_t hdStartAddress[2];\r
1776 uint32_t llrOpt[2];\r
1777 uint32_t llrLink[2];\r
1778 uint32_t llrStartAddress[2];\r
1779 uint32_t sdOpt[2];\r
1780 uint32_t sdLink[2];\r
1781 uint32_t sdStartAddress[2];\r
1782 \r
1783 incfgStartAddress[PING_INDEX] = pingConfig->inCfgStart;\r
1784 incfgStartAddress[PONG_INDEX] = pongConfig->inCfgStart;\r
1785 \r
1786 incfgLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_LLR]);\r
1787 incfgLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_LLR]);\r
1788 \r
1789 llrStartAddress[PING_INDEX] = pingConfig->llrStart;\r
1790 llrStartAddress[PONG_INDEX] = pongConfig->llrStart;\r
1791 \r
1792 llrLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_HD]);\r
1793 llrLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_HD]);\r
1794 \r
1795 hdStartAddress[PING_INDEX] = pingConfig->hdStart;\r
1796 hdStartAddress[PONG_INDEX] = pongConfig->hdStart;\r
1797 \r
1798 hdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1799 hdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1800 \r
1801 stsStartAddress[PING_INDEX] = pingConfig->stsStart;\r
1802 stsStartAddress[PONG_INDEX] = pongConfig->stsStart;\r
1803 \r
1804 stsLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1805 stsLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1806 \r
1807 sdStartAddress[PING_INDEX] = pingConfig->sdStart;\r
1808 sdStartAddress[PONG_INDEX] = pongConfig->sdStart;\r
1809 \r
1810 sdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1811 sdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1812 \r
1813 /**\r
1814 * INCFG Ping & Pong - fill all the initial values\r
1815 */\r
1816 /* chain to REVT\r
1817 link to link llr channel \r
1818 A-sync\r
1819 ACNT = 60\r
1820 BCNT = 1\r
1821 CCNT = 1\r
1822 scrBIDX = 0\r
1823 desBIDX = 0\r
1824 scrCIDX = 0\r
1825 desCIDX = 0 */\r
1826 /* Set OPT field with appropriate values */\r
1827 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1828 incfgOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1829 CSL_EDMA3_TCCH_EN,\r
1830 CSL_EDMA3_ITCINT_DIS,\r
1831 CSL_EDMA3_TCINT_DIS,\r
1832 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1833 CSL_EDMA3_TCC_NORMAL,\r
1834 CSL_EDMA3_FIFOWIDTH_NONE,\r
1835 CSL_EDMA3_STATIC_DIS,\r
1836 CSL_EDMA3_SYNC_A,\r
1837 CSL_EDMA3_ADDRMODE_INCR,\r
1838 CSL_EDMA3_ADDRMODE_INCR );\r
1839 \r
1840 incfgOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1841 CSL_EDMA3_TCCH_EN,\r
1842 CSL_EDMA3_ITCINT_DIS,\r
1843 CSL_EDMA3_TCINT_DIS,\r
1844 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1845 CSL_EDMA3_TCC_NORMAL,\r
1846 CSL_EDMA3_FIFOWIDTH_NONE,\r
1847 CSL_EDMA3_STATIC_DIS,\r
1848 CSL_EDMA3_SYNC_A,\r
1849 CSL_EDMA3_ADDRMODE_INCR,\r
1850 CSL_EDMA3_ADDRMODE_INCR );\r
1851 #else\r
1852 incfgOpt[PING_INDEX] = 0;\r
1853 /* Src & Dest are in INCR modes */\r
1854 incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1855 incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1856 /* Program the TCC */\r
1857 CSL_FINS(incfgOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1858 /* Enable Final transfer completion chain */\r
1859 incfgOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1860 /* A Sync Transfer Mode */\r
1861 incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1862 \r
1863 incfgOpt[PONG_INDEX] = 0;\r
1864 /* Src & Dest are in INCR modes */\r
1865 incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1866 incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1867 /* Program the TCC */\r
1868 CSL_FINS(incfgOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1869 /* Enable Final transfer completion chain */\r
1870 incfgOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1871 /* AB Sync Transfer Mode */\r
1872 incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1873 #endif\r
1874 prm = &prmSet[LINK_CH_IDX_INCFG];\r
1875 prm->srcAddr = NULL;\r
1876 prm->aCnt = 60;\r
1877 prm->bCnt = 1;\r
1878 prm->cCnt = 1;\r
1879 prm->bCntReload = 0;\r
1880 prm->srcBIdx = 0;\r
1881 prm->destBIdx = 0;\r
1882 prm->srcCIdx = 0;\r
1883 prm->destCIdx = 0;\r
1884 \r
1885 /**\r
1886 * LLR Ping & Pong - fill all the initial values\r
1887 */\r
1888 /* chain to REVT\r
1889 link to link hd channel \r
1890 AB-sync\r
1891 ACNT = NULL (updated during enque operation)\r
1892 BCNT = NULL (updated during enque operation)\r
1893 CCNT = NULL (updated during enque operation)\r
1894 scrBIDX = 0\r
1895 desBIDX = 0\r
1896 scrCIDX = 0\r
1897 desCIDX = 0 */\r
1898 /* Set OPT field with appropriate values */\r
1899 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1900 llrOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1901 CSL_EDMA3_TCCH_DIS,\r
1902 CSL_EDMA3_ITCINT_DIS,\r
1903 CSL_EDMA3_TCINT_DIS,\r
1904 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1905 CSL_EDMA3_TCC_NORMAL,\r
1906 CSL_EDMA3_FIFOWIDTH_NONE,\r
1907 CSL_EDMA3_STATIC_DIS,\r
1908 CSL_EDMA3_SYNC_AB,\r
1909 CSL_EDMA3_ADDRMODE_INCR,\r
1910 CSL_EDMA3_ADDRMODE_INCR );\r
1911 \r
1912 llrOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1913 CSL_EDMA3_TCCH_DIS,\r
1914 CSL_EDMA3_ITCINT_DIS,\r
1915 CSL_EDMA3_TCINT_DIS,\r
1916 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1917 CSL_EDMA3_TCC_NORMAL,\r
1918 CSL_EDMA3_FIFOWIDTH_NONE,\r
1919 CSL_EDMA3_STATIC_DIS,\r
1920 CSL_EDMA3_SYNC_AB,\r
1921 CSL_EDMA3_ADDRMODE_INCR,\r
1922 CSL_EDMA3_ADDRMODE_INCR );\r
1923 #else\r
1924 llrOpt[PING_INDEX] = 0;\r
1925 /* Src & Dest are in INCR modes */\r
1926 llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1927 llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1928 /* Program the TCC */\r
1929 CSL_FINS(llrOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1930 /* Enable Intermediate & Final transfer completion chain */\r
1931 llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1932 /* AB Sync Transfer Mode */\r
1933 llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1934 \r
1935 llrOpt[PONG_INDEX] = 0;\r
1936 /* Src & Dest are in INCR modes */\r
1937 llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1938 llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1939 /* Program the TCC */\r
1940 CSL_FINS(llrOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1941 /* Enable Intermediate & Final transfer completion chain */\r
1942 llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1943 /* AB Sync Transfer Mode */\r
1944 llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1945 #endif\r
1946 prm = &prmSet[LINK_CH_IDX_LLR];\r
1947 prm->srcAddr = NULL;\r
1948 prm->aCnt = NULL;\r
1949 prm->bCntReload = 0;\r
1950 if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
1951 ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
1952 {\r
1953 prm->bCnt = 2;\r
1954 prm->cCnt = 3;\r
1955 prm->srcBIdx = NULL;\r
1956 prm->destBIdx = 0x1000;\r
1957 prm->srcCIdx = NULL;\r
1958 prm->destCIdx = 0x2000;\r
1959 }\r
1960 else\r
1961 {\r
1962 prm->bCnt = 3;\r
1963 prm->cCnt = 1;\r
1964 prm->srcBIdx = NULL;\r
1965 prm->destBIdx = 0x2000;\r
1966 prm->srcCIdx = 0;\r
1967 prm->destCIdx = 0;\r
1968 llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1969 llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1970 }\r
1971 \r
1972 /**\r
1973 * HD Ping & Pong - fill all the initial values\r
1974 */\r
1975 /* chain to REVT\r
1976 link to link pause channel \r
1977 A-sync\r
1978 ACNT = NULL (updated during enque operation)\r
1979 BCNT = 1\r
1980 CCNT = 1\r
1981 scrBIDX = 0\r
1982 desBIDX = 0\r
1983 scrCIDX = 0\r
1984 desCIDX = 0 */\r
1985 /* Set OPT field with appropriate values */\r
1986 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1987 hdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1988 CSL_EDMA3_TCCH_EN,\r
1989 CSL_EDMA3_ITCINT_DIS,\r
1990 CSL_EDMA3_TCINT_DIS,\r
1991 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1992 CSL_EDMA3_TCC_NORMAL,\r
1993 CSL_EDMA3_FIFOWIDTH_NONE,\r
1994 CSL_EDMA3_STATIC_DIS,\r
1995 CSL_EDMA3_SYNC_A,\r
1996 CSL_EDMA3_ADDRMODE_INCR,\r
1997 CSL_EDMA3_ADDRMODE_INCR );\r
1998 \r
1999 hdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2000 CSL_EDMA3_TCCH_EN,\r
2001 CSL_EDMA3_ITCINT_DIS,\r
2002 CSL_EDMA3_TCINT_DIS,\r
2003 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2004 CSL_EDMA3_TCC_NORMAL,\r
2005 CSL_EDMA3_FIFOWIDTH_NONE,\r
2006 CSL_EDMA3_STATIC_DIS,\r
2007 CSL_EDMA3_SYNC_A,\r
2008 CSL_EDMA3_ADDRMODE_INCR,\r
2009 CSL_EDMA3_ADDRMODE_INCR );\r
2010 #else\r
2011 hdOpt[PING_INDEX] = 0;\r
2012 /* Src & Dest are in INCR modes */\r
2013 hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2014 hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2015 /* Program the TCC */\r
2016 CSL_FINS(hdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2017 /* Enable Intermediate & Final transfer completion chain */\r
2018 hdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2019 /* A Sync Transfer Mode */\r
2020 hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2021 \r
2022 hdOpt[PONG_INDEX] = 0;\r
2023 /* Src & Dest are in INCR modes */\r
2024 hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2025 hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2026 /* Program the TCC */\r
2027 CSL_FINS(hdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2028 /* Enable Intermediate & Final transfer completion chain */\r
2029 hdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2030 /* A Sync Transfer Mode */\r
2031 hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2032 #endif\r
2033 prm = &prmSet[LINK_CH_IDX_HD];\r
2034 prm->destAddr = NULL;\r
2035 prm->aCnt = NULL;\r
2036 prm->bCnt = 1;\r
2037 prm->cCnt = 1;\r
2038 prm->bCntReload = 0;\r
2039 prm->srcBIdx = 0;\r
2040 prm->destBIdx = 0;\r
2041 prm->srcCIdx = 0;\r
2042 prm->destCIdx = 0;\r
2043 \r
2044 /**\r
2045 * STS Ping & Pong - fill all the initial values\r
2046 */\r
2047 /* chain to REVT\r
2048 link to link sd channel \r
2049 A-sync\r
2050 ACNT = 12\r
2051 BCNT = 1\r
2052 CCNT = 1\r
2053 scrBIDX = 0\r
2054 desBIDX = 0\r
2055 scrCIDX = 0\r
2056 desCIDX = 0 */\r
2057 /* Set OPT field with appropriate values */\r
2058 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2059 stsOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2060 CSL_EDMA3_TCCH_EN,\r
2061 CSL_EDMA3_ITCINT_DIS,\r
2062 CSL_EDMA3_TCINT_DIS,\r
2063 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2064 CSL_EDMA3_TCC_NORMAL,\r
2065 CSL_EDMA3_FIFOWIDTH_NONE,\r
2066 CSL_EDMA3_STATIC_DIS,\r
2067 CSL_EDMA3_SYNC_A,\r
2068 CSL_EDMA3_ADDRMODE_INCR,\r
2069 CSL_EDMA3_ADDRMODE_INCR );\r
2070 \r
2071 stsOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2072 CSL_EDMA3_TCCH_EN,\r
2073 CSL_EDMA3_ITCINT_DIS,\r
2074 CSL_EDMA3_TCINT_DIS,\r
2075 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2076 CSL_EDMA3_TCC_NORMAL,\r
2077 CSL_EDMA3_FIFOWIDTH_NONE,\r
2078 CSL_EDMA3_STATIC_DIS,\r
2079 CSL_EDMA3_SYNC_A,\r
2080 CSL_EDMA3_ADDRMODE_INCR,\r
2081 CSL_EDMA3_ADDRMODE_INCR );\r
2082 #else\r
2083 stsOpt[PING_INDEX] = 0;\r
2084 /* Src & Dest are in INCR modes */\r
2085 stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2086 stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2087 /* Program the TCC */\r
2088 CSL_FINS(stsOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2089 /* Enable Final transfer completion chain */\r
2090 stsOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2091 /* A Sync Transfer Mode */\r
2092 stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2093 \r
2094 stsOpt[PONG_INDEX] = 0;\r
2095 /* Src & Dest are in INCR modes */\r
2096 stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2097 stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2098 /* Program the TCC */\r
2099 CSL_FINS(stsOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2100 /* Enable Final transfer completion chain */\r
2101 stsOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2102 /* A Sync Transfer Mode */\r
2103 stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2104 #endif\r
2105 prm = &prmSet[LINK_CH_IDX_STS];\r
2106 prm->destAddr = NULL;\r
2107 prm->aCnt = 12;\r
2108 prm->bCnt = 1;\r
2109 prm->cCnt = 1;\r
2110 prm->bCntReload = 0;\r
2111 prm->srcBIdx = 0;\r
2112 prm->destBIdx = 0;\r
2113 prm->srcCIdx = 0;\r
2114 prm->destCIdx = 0;\r
2115 \r
2116 /**\r
2117 * SD Ping & Pong - fill all the initial values\r
2118 */\r
2119 /* chain to REVT\r
2120 link to link pause channel \r
2121 A-sync / AB-sync based on mode\r
2122 ACNT = NULL (updated during enque operation)\r
2123 BCNT = 1/3 based on mode \r
2124 CCNT = 1\r
2125 scrBIDX = 0\r
2126 desBIDX = 0\r
2127 scrCIDX = 0\r
2128 desCIDX = 0 */\r
2129 /* Set OPT field with appropriate values */\r
2130 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2131 sdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2132 CSL_EDMA3_TCCH_EN,\r
2133 CSL_EDMA3_ITCINT_DIS,\r
2134 CSL_EDMA3_TCINT_DIS,\r
2135 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2136 CSL_EDMA3_TCC_NORMAL,\r
2137 CSL_EDMA3_FIFOWIDTH_NONE,\r
2138 CSL_EDMA3_STATIC_DIS,\r
2139 CSL_EDMA3_SYNC_A,\r
2140 CSL_EDMA3_ADDRMODE_INCR,\r
2141 CSL_EDMA3_ADDRMODE_INCR );\r
2142 \r
2143 sdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2144 CSL_EDMA3_TCCH_EN,\r
2145 CSL_EDMA3_ITCINT_DIS,\r
2146 CSL_EDMA3_TCINT_DIS,\r
2147 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2148 CSL_EDMA3_TCC_NORMAL,\r
2149 CSL_EDMA3_FIFOWIDTH_NONE,\r
2150 CSL_EDMA3_STATIC_DIS,\r
2151 CSL_EDMA3_SYNC_A,\r
2152 CSL_EDMA3_ADDRMODE_INCR,\r
2153 CSL_EDMA3_ADDRMODE_INCR );\r
2154 #else\r
2155 sdOpt[PING_INDEX] = 0;\r
2156 /* Src & Dest are in INCR modes */\r
2157 sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2158 sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2159 /* Program the TCC */\r
2160 CSL_FINS(sdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2161 /* Enable Intermediate & Final transfer completion chain */\r
2162 sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2163 /* A Sync Transfer Mode */\r
2164 sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2165 \r
2166 sdOpt[PONG_INDEX] = 0;\r
2167 /* Src & Dest are in INCR modes */\r
2168 sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2169 sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2170 /* Program the TCC */\r
2171 CSL_FINS(sdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2172 /* Enable Intermediate & Final transfer completion chain */\r
2173 sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2174 /* A Sync Transfer Mode */\r
2175 sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2176 #endif\r
2177 prm = &prmSet[LINK_CH_IDX_SD];\r
2178 prm->destAddr = NULL;\r
2179 prm->aCnt = NULL;\r
2180 prm->cCnt = 1;\r
2181 prm->bCntReload = 0;\r
2182 prm->srcCIdx = 0;\r
2183 prm->destCIdx = 0;\r
2184 if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
2185 ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
2186 {\r
2187 prm->bCnt = 3;\r
2188 prm->srcBIdx = 0x2000;\r
2189 prm->destBIdx = NULL;\r
2190 sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2191 sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2192 }\r
2193 else\r
2194 {\r
2195 prm->bCnt = 1;\r
2196 prm->srcBIdx = 0;\r
2197 prm->destBIdx = 0;\r
2198 }\r
2199 \r
2200 for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
2201 {\r
2202 flag = cnt & 1;\r
2203 \r
2204 prm = &prmSet[LINK_CH_IDX_INCFG];\r
2205 prm->opt = incfgOpt[flag];\r
2206 prm->destAddr = incfgStartAddress[flag];\r
2207 prm->linkAddr = incfgLink[flag];\r
2208 \r
2209 prm = &prmSet[LINK_CH_IDX_LLR];\r
2210 prm->opt = llrOpt[flag];\r
2211 prm->destAddr = llrStartAddress[flag];\r
2212 prm->linkAddr = llrLink[flag];\r
2213 \r
2214 prm = &prmSet[LINK_CH_IDX_STS];\r
2215 prm->opt = stsOpt[flag];\r
2216 prm->srcAddr = stsStartAddress[flag];\r
2217 prm->linkAddr = stsLink[flag];\r
2218 \r
2219 prm = &prmSet[LINK_CH_IDX_HD];\r
2220 prm->opt = hdOpt[flag];\r
2221 prm->srcAddr = hdStartAddress[flag];\r
2222 prm->linkAddr = hdLink[flag];\r
2223 \r
2224 prm = &prmSet[LINK_CH_IDX_SD];\r
2225 prm->opt = sdOpt[flag];\r
2226 prm->srcAddr = sdStartAddress[flag];\r
2227 prm->linkAddr = sdLink[flag];\r
2228 \r
2229 Tcp3d_memcpy(&tcp3dInst->pseudoParamBufPtr[cnt*TCP3D_DRV_LINK_CB], &prmSet[0], 32*TCP3D_DRV_LINK_CB);\r
2230 \r
2231 } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
2232 \r
2233 /* Store the lastOpt & lastLink values for use in enque function */\r
2234 tcp3dInst->resetHdOpt[PING_INDEX] = hdOpt[PING_INDEX];\r
2235 tcp3dInst->resetHdOpt[PONG_INDEX] = hdOpt[PONG_INDEX];\r
2236 tcp3dInst->resetHdLink[PING_INDEX] = hdLink[PING_INDEX];\r
2237 tcp3dInst->resetHdLink[PONG_INDEX] = hdLink[PONG_INDEX];\r
2238 \r
2239 tcp3dInst->resetStsOpt[PING_INDEX] = stsOpt[PING_INDEX];\r
2240 tcp3dInst->resetStsOpt[PONG_INDEX] = stsOpt[PONG_INDEX];\r
2241 tcp3dInst->resetStsLink[PING_INDEX] = stsLink[PING_INDEX];\r
2242 tcp3dInst->resetStsLink[PONG_INDEX] = stsLink[PONG_INDEX];\r
2243 \r
2244 tcp3dInst->resetSdOpt[PING_INDEX] = sdOpt[PING_INDEX];\r
2245 tcp3dInst->resetSdOpt[PONG_INDEX] = sdOpt[PONG_INDEX];\r
2246 tcp3dInst->resetSdLink[PING_INDEX] = sdLink[PING_INDEX];\r
2247 tcp3dInst->resetSdLink[PONG_INDEX] = sdLink[PONG_INDEX];\r
2248 } /* end of - Tcp3d_initPseudoParam() function */\r
2249 \r
2250 /**\r
2251 * @brief Resets Pseudo PaRAM memory with default values\r
2252 */\r
2253 static void Tcp3d_resetPseudoParam (IN Tcp3d_Instance *tcp3dInst,\r
2254 IN uint32_t codeBlocks)\r
2255 {\r
2256 int32_t cnt;\r
2257 EDMA3_DRV_PaRAMRegs *prm1 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_HD];\r
2258 EDMA3_DRV_PaRAMRegs *prm2 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_STS];\r
2259 EDMA3_DRV_PaRAMRegs *prm3 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_SD];\r
2260 \r
2261 for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
2262 {\r
2263 prm1->opt = tcp3dInst->resetHdOpt[cnt & 1];\r
2264 prm1->linkAddr = tcp3dInst->resetHdLink[cnt & 1];\r
2265 prm2->opt = tcp3dInst->resetStsOpt[cnt & 1];\r
2266 prm2->linkAddr = tcp3dInst->resetStsLink[cnt & 1];\r
2267 prm3->opt = tcp3dInst->resetSdOpt[cnt & 1];\r
2268 prm3->linkAddr = tcp3dInst->resetSdLink[cnt & 1];\r
2269 \r
2270 prm1 +=TCP3D_DRV_LINK_CB;\r
2271 prm2 +=TCP3D_DRV_LINK_CB;\r
2272 prm3 +=TCP3D_DRV_LINK_CB;\r
2273 } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
2274 } /* end of - Tcp3d_resetPseudoParam() function */\r
2275 \r
2276 /**\r
2277 * @b Description\r
2278 * @n \r
2279 * The function is used to get the version information of the TCP3D Driver.\r
2280 *\r
2281 * @retval\r
2282 * Version Information.\r
2283 */\r
2284 uint32_t Tcp3d_getVersion (void)\r
2285 {\r
2286 return TCP3D_DRV_VERSION_ID;\r
2287 }\r
2288 \r
2289 /**\r
2290 * @b Description\r
2291 * @n \r
2292 * The function is used to get the version string for the TCP3D Driver.\r
2293 *\r
2294 * @retval\r
2295 * Version String.\r
2296 */\r
2297 const char* Tcp3d_getVersionStr (void)\r
2298 {\r
2299 return Tcp3dDrvVersionStr;\r
2300 }\r
2301 \r
2302 /* end of file */\r