src/tcp3d_drv.c

   1 /**\r
   2  *  \file   tcp3d_drv.c\r
   3  *\r
   4  *  \brief  TCP3D Driver functions.\r
   5  *\r
   6  *  Copyright (C) Texas Instruments Incorporated 2009, 2014\r
   7  * \r
   8  *  Redistribution and use in source and binary forms, with or without \r
   9  *  modification, are permitted provided that the following conditions \r
  10  *  are met:\r
  11  *\r
  12  *    Redistributions of source code must retain the above copyright \r
  13  *    notice, this list of conditions and the following disclaimer.\r
  14  *\r
  15  *    Redistributions in binary form must reproduce the above copyright\r
  16  *    notice, this list of conditions and the following disclaimer in the \r
  17  *    documentation and/or other materials provided with the   \r
  18  *    distribution.\r
  19  *\r
  20  *    Neither the name of Texas Instruments Incorporated nor the names of\r
  21  *    its contributors may be used to endorse or promote products derived\r
  22  *    from this software without specific prior written permission.\r
  23  *\r
  24  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
  25  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
  26  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
  27  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
  28  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
  29  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
  30  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
  31  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
  32  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
  33  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
  34  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
  35  *\r
  36 */\r
  37 \r
  38 /**\r
  39  *  Include Files\r
  40  */\r
  41 /* TCP3D driver includes */\r
  42 #include <ti/drv/tcp3d/tcp3d_drv.h>\r
  43 #include <ti/drv/tcp3d/src/tcp3d_drv_priv.h>\r
  44 \r
  45 /* TCP3D Types and OSAL defintions: These files can be overriden by customers\r
  46  * to point to their copies. Because of this the files have not been explicitly \r
  47  * specified to include the driver path.*/\r
  48 #include <tcp3d_drv_types.h>\r
  49 #include <tcp3d_osal.h>\r
  50 \r
  51 #define TWO_PATHS           0\r
  52 \r
  53 #define TPCC_REVT_REGS      0\r
  54 #define TPCC_L2P_REGS       1\r
  55 \r
  56 #define PING_INDEX          0\r
  57 #define PONG_INDEX          1\r
  58 \r
  59 /** @brief Global Variable which describes the TCP3D Driver Version Information */\r
  60 const char   Tcp3dDrvVersionStr[] = TCP3D_DRV_VERSION_STR ":" __DATE__  ":" __TIME__;\r
  61 \r
  62 /****************************************************************************\r
  63  *              TCP3D Driver Functions                                      *\r
  64  ****************************************************************************/\r
  65 /*******************************************************************************\r
  66  * Enables interrupt generation by EDMA CC. Sets two bits of L2P channels  \r
  67  * in the TPCC_IESR/TPCC_IESRH.\r
  68  ******************************************************************************/\r
  69 static void Tcp3d_enableEdmaL2pIntr(Tcp3d_Instance *inst)\r
  70 {\r
  71 #if UNTESTED_CODE\r
  72     *inst->intEnSetReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong);\r
  73 #ifdef SIM_WORKAROUND\r
  74     /**\r
  75      * WORKAROUND: Current Simulator does not generate interrupt\r
  76      * when there is a pending IPR bit and we enable the IER in the\r
  77      * EDMA register space. So, We are forcing the EDMA to generate\r
  78      * the interrupt if the IPR has valid bits. \r
  79      */\r
  80     if ( inst->intPendReg[TPCC_L2P_REGS] &&\r
  81          (inst->l2pChMaskPing | inst->l2pChMaskPong) )\r
  82     {\r
  83         inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
  84     }\r
  85 #endif\r
  86 #else\r
  87     /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
  88     inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
  89     inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
  90     inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
  91     inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
  92 #endif\r
  93     inst->pingL2pEnCntr++;\r
  94 }\r
  95 \r
  96 /*******************************************************************************\r
  97  * Disables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
  98  * in the TPCC_IECR/TPCC_IECRH.\r
  99  ******************************************************************************/\r
 100 static void Tcp3d_disableEdmaL2pIntr(Tcp3d_Instance *inst)\r
 101 {\r
 102 #if UNTESTED_CODE\r
 103     *inst->intEnClrReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong);      \r
 104 #else\r
 105     /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
 106     inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
 107     inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
 108     inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
 109     inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
 110 #endif\r
 111     inst->pingL2pEnCntr--;\r
 112 }\r
 113 \r
 114 /*******************************************************************************\r
 115  * Clears pending interrupt generated by EDMA CC. Sets two bits of L2P channels \r
 116  * in the TPCC_ICR/TPCC_ICRH.\r
 117  ******************************************************************************/\r
 118 static void Tcp3d_clearEdmaL2pIntr(Tcp3d_Instance *inst)\r
 119 {\r
 120 #if UNTESTED_CODE\r
 121     *inst->clrIntPendReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong);      \r
 122 #endif\r
 123     inst->pingL2pEnCntr=0;\r
 124 }\r
 125 \r
 126 /*******************************************************************************\r
 127  * Enables interrupt generation by EDMA CC. Sets two bits of REVT channels  \r
 128  * in the TPCC_IESR/TPCC_IESRH.\r
 129  ******************************************************************************/\r
 130 static void Tcp3d_enableEdmaPauseIntr(Tcp3d_Instance *inst)\r
 131 {\r
 132     *inst->intEnSetReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong);\r
 133 #ifdef SIM_WORKAROUND\r
 134     /**\r
 135      * WORKAROUND: Current Simulator does not generate interrupt\r
 136      * when there is a pending IPR bit and we enable the IER in the\r
 137      * EDMA register space. So, We are forcing the EDMA to generate\r
 138      * the interrupt if the IPR has valid bits. \r
 139      */\r
 140     if ( inst->intPendReg[TPCC_REVT_REGS] &&\r
 141          (inst->pauseChMaskPing | inst->pauseChMaskPong) )\r
 142     {\r
 143         inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
 144     }\r
 145 #endif\r
 146     inst->pingPauseEnCntr++;\r
 147 }\r
 148 \r
 149 /*******************************************************************************\r
 150  * Disables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
 151  * in the TPCC_IECR/TPCC_IECRH.\r
 152  ******************************************************************************/\r
 153 static void Tcp3d_disableEdmaPauseIntr(Tcp3d_Instance *inst)\r
 154 {\r
 155     *inst->intEnClrReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong);      \r
 156     inst->pingPauseEnCntr--;\r
 157 }\r
 158 \r
 159 /*******************************************************************************\r
 160  * Clears pending interrupt generated by EDMA CC. Sets two bits of REVT channels \r
 161  * in the TPCC_ICR/TPCC_ICRH.\r
 162  ******************************************************************************/\r
 163 static void Tcp3d_clearEdmaPauseIntr(Tcp3d_Instance *inst)\r
 164 {\r
 165     *inst->clrIntPendReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong);      \r
 166     inst->pingPauseEnCntr=0;\r
 167 }\r
 168 \r
 169 /**\r
 170  *  @brief      TCP3D Driver function for providing the number of buffers\r
 171  *              required.\r
 172  */\r
 173 Tcp3d_Result Tcp3d_getNumBuf (IN Tcp3d_SizeCfg  *cfg,\r
 174                               OUT int16_t         *nbufs)\r
 175 {\r
 176     *nbufs = TCP3D_DRV_NUM_BUF;\r
 177 \r
 178     return ( TCP3D_DRV_NO_ERR );\r
 179 }\r
 180 \r
 181 /**\r
 182  *  @brief      TCP3D Driver function for providing the attributes of all the\r
 183  *              number of buffers requested through the structure of type\r
 184  *              Tcp3d_MemBuffer provided.\r
 185  */\r
 186 Tcp3d_Result Tcp3d_getBufDesc ( IN Tcp3d_SizeCfg    *cfg,\r
 187                                 OUT Tcp3d_MemBuffer bufs[])\r
 188 {\r
 189     bufs[TCP3D_DRV_INST_BUFN].size       = sizeof(Tcp3d_Instance);\r
 190     bufs[TCP3D_DRV_INST_BUFN].log2align  = 2;\r
 191     bufs[TCP3D_DRV_INST_BUFN].mclass     = Tcp3d_BufClass_L2RAM;\r
 192     bufs[TCP3D_DRV_INST_BUFN].volat      = TRUE;\r
 193 \r
 194     bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].size       = (cfg->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
 195     bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].log2align  = 2;\r
 196     bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].mclass     = Tcp3d_BufClass_L2RAM;\r
 197     bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].volat      = TRUE;\r
 198 \r
 199     return ( TCP3D_DRV_NO_ERR );\r
 200 }\r
 201 \r
 202 /**\r
 203  *  @brief      TCP3D Driver Initialization function which must be called only\r
 204  *              once to initialize the driver instance and other required\r
 205  *              resources needed for the driver functionality.\r
 206  */\r
 207 Tcp3d_Result Tcp3d_init( IN  Tcp3d_MemBuffer     bufs[],\r
 208                          IN  Tcp3d_InitParams    *drvInitParams)\r
 209 {\r
 210     Tcp3d_Result            tcp3dResult = TCP3D_DRV_NO_ERR;\r
 211     Tcp3d_Instance          *tcp3dInst;\r
 212     uint32_t                modeReg = 0, endReg = 0, exeRegP0 = 0, exeRegP1 =0;\r
 213     int32_t                 idx, locBufSize[TCP3D_DRV_NUM_BUF];\r
 214     CSL_Tcp3d_cfgRegs       *tcp3dCfgRegs;\r
 215 \r
 216     /* Check for valid instance number */\r
 217     if ( drvInitParams->instNum >= TCP3D_DRV_MAX_NUM_INSTANCES )\r
 218     {\r
 219         /* Return error */\r
 220         tcp3dResult = TCP3D_DRV_INVALID_INSTANCE_NUMBER;\r
 221 \r
 222         return ( tcp3dResult );\r
 223     }\r
 224 \r
 225     /* compute the buffer sizes table */\r
 226     locBufSize[TCP3D_DRV_INST_BUFN] = sizeof(Tcp3d_Instance);\r
 227     locBufSize[TCP3D_DRV_PSEUDO_PARAM_BUFN] = (drvInitParams->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
 228 \r
 229     /* Check if all buffers have valid addresses and sizes */\r
 230     for ( idx = 0; idx < TCP3D_DRV_NUM_BUF; idx++)\r
 231     {\r
 232         if ( bufs[idx].base == NULL || bufs[idx].size < locBufSize[idx] )\r
 233             tcp3dResult = TCP3D_DRV_INVALID_BUFF;\r
 234     }\r
 235 \r
 236     /* Initialize the instance if the buffer addresses are not NULL */\r
 237     if ( tcp3dResult == TCP3D_DRV_NO_ERR )\r
 238     {\r
 239         /* Initialize the driver Instance */\r
 240         tcp3dInst = (Tcp3d_Instance *) bufs[TCP3D_DRV_INST_BUFN].base;\r
 241 \r
 242         /* Initialize the pseudo PaRAM array pointer */\r
 243         tcp3dInst->pseudoParamBufPtr = (EDMA3_DRV_PaRAMRegs *) bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].base;\r
 244     }\r
 245     else\r
 246     {\r
 247         /* Return the error */\r
 248         return ( tcp3dResult );\r
 249     }\r
 250 \r
 251     /* Get the address of TCP3D configuration registers base address */\r
 252     tcp3dCfgRegs                    = drvInitParams->tcp3dCfgRegs;\r
 253 \r
 254     /* Update the instace with the input parameters */\r
 255     tcp3dInst->mode                 = drvInitParams->ctrlParams.mode;\r
 256     tcp3dInst->doubleBuffer         = drvInitParams->ctrlParams.doubleBuf;\r
 257     tcp3dInst->edmaHnd              = drvInitParams->edmaHnd;\r
 258     tcp3dInst->edmaRegionId         = drvInitParams->edmaRegionId;\r
 259     tcp3dInst->maxCodeBlocks        = drvInitParams->maxCodeBlocks;\r
 260     tcp3dInst->notificationEventNum = drvInitParams->notificationEventNum;\r
 261     tcp3dInst->cpIntc0RegsBase      = drvInitParams->cpIntc0RegsBase;\r
 262     tcp3dInst->tpccShadowRegs       = drvInitParams->edma3ShadowRegsBase;\r
 263     tcp3dInst->instNum              = drvInitParams->instNum;\r
 264     tcp3dInst->coreId               = drvInitParams->coreID;\r
 265 \r
 266     /* Verify the REVT channels */\r
 267     if ( ( drvInitParams->pingCh[0] != drvInitParams->pingConfig.revtCh ) ||\r
 268          ( drvInitParams->pongCh[0] != drvInitParams->pongConfig.revtCh ) )\r
 269     {\r
 270         /* Return error */\r
 271         tcp3dResult = TCP3D_DRV_INVALID_EDMA_CH;\r
 272 \r
 273         return ( tcp3dResult );\r
 274     }\r
 275 \r
 276     for ( idx = 0; idx < TCP3D_DRV_MAX_CH_PER_PATH; idx++ )\r
 277     {\r
 278         /* Copy PING Channels */\r
 279         tcp3dInst->pingCh[idx]    = drvInitParams->pingCh[idx];\r
 280 \r
 281         /* Copy PONG Channels */\r
 282         tcp3dInst->pongCh[idx]    = drvInitParams->pongCh[idx];\r
 283     }\r
 284 \r
 285     for ( idx = 0; idx < (TCP3D_DRV_MAX_LINK_CH>>1); idx++ )\r
 286     {\r
 287         /* Copy PING Channels */\r
 288         tcp3dInst->pingLinkCh[idx]  = drvInitParams->linkCh[idx];\r
 289 \r
 290         /* Copy PONG Channels */\r
 291         tcp3dInst->pongLinkCh[idx]  = drvInitParams->linkCh[idx+(TCP3D_DRV_MAX_LINK_CH>>1)];\r
 292     }\r
 293 \r
 294     /* Set the Driver variables to defaults */\r
 295     tcp3dInst->constantOne          = 1;\r
 296     tcp3dInst->pauseState           = TCP3D_DRV_STATE_PAUSE;\r
 297 \r
 298     /* Initialize the driver variables */\r
 299     tcp3dInst->maxPingCbCnt         = (tcp3dInst->maxCodeBlocks >> 1);\r
 300     tcp3dInst->maxPongCbCnt         = (tcp3dInst->maxCodeBlocks >> 1);\r
 301     tcp3dInst->maxPingCbIdx         = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
 302     tcp3dInst->maxPongCbIdx         = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
 303 \r
 304     /* Reset run-time variables */\r
 305     Tcp3d_resetRuntimeVariables(tcp3dInst);\r
 306 \r
 307     /* EDMA3 - get PaRAM addresses of all physical channels */\r
 308     if ( EDMA3_DRV_SOK != Tcp3d_getEdmaChParamAddr(tcp3dInst) )\r
 309     {\r
 310         tcp3dResult = TCP3D_DRV_FAIL_EDMA_GET_PARAM_ADDR;\r
 311 \r
 312         return ( tcp3dResult );\r
 313     }\r
 314 \r
 315     /* Initialize the EDMA PaRAM memory for the physical channels */\r
 316     if ( EDMA3_DRV_SOK != Tcp3d_initEdmaChParam(tcp3dInst) )\r
 317     {\r
 318         tcp3dResult = TCP3D_DRV_FAIL_EDMA_PARAM_INIT;\r
 319 \r
 320         return ( tcp3dResult );\r
 321     }\r
 322 \r
 323     /* EDMA3 - Enable the EVENT triggered channels */\r
 324     if ( EDMA3_DRV_SOK != Tcp3d_enableEdmaChannels(tcp3dInst) )\r
 325     {\r
 326         tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
 327 \r
 328         return ( tcp3dResult );\r
 329     }\r
 330 \r
 331     /* Initialize the pseudo PaRAM memory */\r
 332     Tcp3d_initPseudoParam ( tcp3dInst,\r
 333                             tcp3dInst->maxCodeBlocks,\r
 334                             &drvInitParams->pingConfig,\r
 335                             &drvInitParams->pongConfig);\r
 336 \r
 337     /* Prepare the control registers for both P0 and P1 processes */\r
 338     Tcp3d_prepControlRegs ( &drvInitParams->ctrlParams,\r
 339                                 &modeReg,\r
 340                                 &endReg,\r
 341                                 &exeRegP0,\r
 342                                 &exeRegP1);\r
 343 \r
 344     /* \r
 345      * Soft Reset the TCP3D.\r
 346      * Insert NOPs b/w the reset calls in HW to work properly.\r
 347      */\r
 348     tcp3dCfgRegs->TCP3_SOFT_RESET = 1;\r
 349     tcp3dCfgRegs->TCP3_SOFT_RESET = 0;\r
 350 \r
 351     /**\r
 352      * Write to the Control registers with the prepared values to start\r
 353      * the TCP3D state machine.\r
 354      */\r
 355     tcp3dCfgRegs->TCP3_MODE     = modeReg;\r
 356     tcp3dCfgRegs->TCP3_END      = endReg;\r
 357     tcp3dCfgRegs->TCP3_EXE_P0   = exeRegP0;\r
 358     if ( tcp3dInst->doubleBuffer != CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
 359         tcp3dCfgRegs->TCP3_EXE_P1   = exeRegP1;\r
 360 \r
 361     /* Set Local Variables used in the runtime APIs */\r
 362     Tcp3d_setLocalVariables(tcp3dInst);\r
 363 \r
 364     /* Disable the interrupts */\r
 365     Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
 366     Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
 367 \r
 368     /* Clear pending interrupts */\r
 369     Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
 370     Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
 371 \r
 372     /* Reset the EDMA Channels */\r
 373     Tcp3d_resetEdmaChParam (tcp3dInst,\r
 374                             tcp3dInst->maxPingCbCnt,\r
 375                             tcp3dInst->maxPongCbCnt);\r
 376 \r
 377     /* Change the state */\r
 378     tcp3dInst->state    = TCP3D_DRV_STATE_INIT;\r
 379 \r
 380     return ( tcp3dResult );\r
 381 \r
 382 } /* end of - Tcp3d_init() function */\r
 383 \r
 384 /**\r
 385  * @brief      TCP3D Driver Deinitialization function.\r
 386  */\r
 387 Tcp3d_Result Tcp3d_deInit ( IN Tcp3d_Instance *inst )\r
 388 {\r
 389     /* Disable interrupts */\r
 390     Tcp3d_disableEdmaL2pIntr(inst);        \r
 391     Tcp3d_disableEdmaPauseIntr(inst);        \r
 392 \r
 393     /* Clear pending interrupts */\r
 394     Tcp3d_clearEdmaL2pIntr(inst);\r
 395     Tcp3d_clearEdmaPauseIntr(inst);\r
 396 \r
 397     return ( TCP3D_DRV_NO_ERR );\r
 398 }\r
 399 \r
 400 /**\r
 401  *  @brief      TCP3D Driver function called to reset the driver at sub-frame\r
 402  *              boundary. This function does the following:\r
 403  *              1) Set the instance with the passed values - for example number\r
 404  *                  of blocks for decoding in this subframe which is needed to\r
 405  *                  for checking the boundary and a new status array pointer\r
 406  *                  where the status register values for each code block are\r
 407  *                  trasferred.\r
 408  *              2) Initialize all the run-time instance variables to default.\r
 409  *              3) Initialize the pseudo PaRAM memory with all the defaults\r
 410  *                  based on mode.\r
 411  *              4) Reset the EDMA channels with default values. \r
 412  */\r
 413 Tcp3d_Result Tcp3d_reset (  IN Tcp3d_Instance  *tcp3dInst,\r
 414                             IN uint32_t        codeBlocks)\r
 415 {\r
 416     Tcp3d_Result            tcp3dResult = TCP3D_DRV_NO_ERR;\r
 417 \r
 418     /* First check for valid statte */\r
 419     if ( ( tcp3dInst->pingStop != 1 ) && ( tcp3dInst->pongStop != 1) )\r
 420         tcp3dResult = TCP3D_DRV_INVALID_STATE;\r
 421 \r
 422     /* Check if the codeblocks value is valid */\r
 423     if ( ( codeBlocks > tcp3dInst->maxCodeBlocks ) || ( codeBlocks < 2 ) )\r
 424         tcp3dResult = TCP3D_DRV_INVALID_PARAMETER;\r
 425 \r
 426     /* Return if any error found */\r
 427     if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
 428         return ( tcp3dResult );\r
 429 \r
 430     /* update the maxCodeBlocks and dependent variables, if needed */\r
 431     if ( codeBlocks != NULL )\r
 432     {\r
 433         tcp3dInst->maxCodeBlocks    = codeBlocks;\r
 434         tcp3dInst->maxPingCbCnt     = (codeBlocks >> 1);\r
 435         tcp3dInst->maxPongCbCnt     = (codeBlocks >> 1);\r
 436         /* max position index in pseudo Param Buffer */\r
 437         tcp3dInst->maxPingCbIdx     = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
 438         tcp3dInst->maxPongCbIdx     = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
 439     }\r
 440 \r
 441     /* Reset run-time variables */\r
 442     Tcp3d_resetRuntimeVariables(tcp3dInst);\r
 443 \r
 444     /* Reset the pseudo PaRAM memory */\r
 445     Tcp3d_resetPseudoParam(tcp3dInst, tcp3dInst->maxCodeBlocks);\r
 446 \r
 447     /* Reset the EDMA Channels */\r
 448     Tcp3d_resetEdmaChParam (tcp3dInst,\r
 449                             tcp3dInst->maxPingCbCnt,\r
 450                             tcp3dInst->maxPongCbCnt);\r
 451 \r
 452     /* Disable the interrupts */\r
 453     Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
 454     Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
 455 \r
 456     /* Clear pending interrupts */\r
 457     Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
 458     Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
 459 \r
 460     /* Change the state */\r
 461     tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
 462 \r
 463     return ( tcp3dResult );\r
 464 } /* end of - Tcp3d_reset() function */\r
 465 \r
 466 /**\r
 467  *  @brief      TCP3D Driver function for enqueuing the code blocks to the input\r
 468  *              list. Here the input list is a pseudo PaRAM list consisting of\r
 469  *              actual PaRAM entries for INCFG, LLR, HD, SD & STS transfers.\r
 470  */\r
 471 Tcp3d_Result Tcp3d_enqueueCodeBlock(IN  Tcp3d_Instance  *tcp3dInst,\r
 472                                     IN  uint32_t          blockLength,\r
 473                                     IN  uint32_t          *inputConfigPtr,\r
 474                                     IN  int8_t            *llrPtr,\r
 475                                     IN  uint32_t          llrOffset,\r
 476                                     IN  uint32_t          *hdPtr,\r
 477                                     IN  int8_t            *sdPtr,\r
 478                                     IN  uint32_t          sdOffset,\r
 479                                     IN  uint32_t          *statusPtr,\r
 480                                     IN  uint8_t           ntfEventFlag)\r
 481 {\r
 482     EDMA3_DRV_PaRAMRegs     *lastOutPrm;\r
 483     int32_t                 blockIndex;\r
 484     int32_t                 pathFlag;\r
 485     Tcp3d_Result            tcp3dResult = TCP3D_DRV_NO_ERR;\r
 486     Tcp3d_Result            tcp3dResult2 = TCP3D_DRV_NO_ERR;\r
 487     EDMA3_DRV_PaRAMRegs     *prmCfg;\r
 488     EDMA3_DRV_PaRAMRegs     *prmLlr;\r
 489     EDMA3_DRV_PaRAMRegs     *prmHd;\r
 490     EDMA3_DRV_PaRAMRegs     *prmSts;\r
 491     EDMA3_DRV_PaRAMRegs     *prmSd;\r
 492     EDMA3_DRV_PaRAMRegs     *prevLastPrmPtr;\r
 493     EDMA3_DRV_PaRAMRegs     *prmWrap;\r
 494 \r
 495     uint16_t                ntfLink[2];\r
 496     uint16_t                stsLink[2];\r
 497     uint16_t                sdLink[2];\r
 498     uint32_t                wrapLink[2];\r
 499     uint16_t                chainToNextCbDummyLink[2];\r
 500     uint16_t                chainToNextCbNtfdLink[2];\r
 501 \r
 502     ntfLink[PING_INDEX]  = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTF];\r
 503     ntfLink[PONG_INDEX]  = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTF];\r
 504     stsLink[PING_INDEX]  = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_STS];\r
 505     stsLink[PONG_INDEX]  = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_STS];\r
 506     sdLink[PING_INDEX]   = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_SD];\r
 507     sdLink[PONG_INDEX]   = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_SD];\r
 508     wrapLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_WRAP];\r
 509     wrapLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_WRAP];\r
 510     chainToNextCbDummyLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NEXTCB_DUMMY];\r
 511     chainToNextCbDummyLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NEXTCB_DUMMY];\r
 512     chainToNextCbNtfdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NEXTCB_NTFD];\r
 513     chainToNextCbNtfdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NEXTCB_NTFD];\r
 514 \r
 515 #if TWO_PATHS\r
 516     /* get next available path index */\r
 517     pathFlag = tcp3dInst->nextCodeBlockIndex;\r
 518     if ( pathFlag )\r
 519     {\r
 520         if ( tcp3dInst->pongFreeCnt )\r
 521         {\r
 522             blockIndex = tcp3dInst->nextPongInIdx;\r
 523         }\r
 524         else if ( tcp3dInst->pingFreeCnt )\r
 525         {\r
 526             blockIndex = tcp3dInst->nextPingInIdx;\r
 527             pathFlag = 0;\r
 528         }\r
 529     }\r
 530     else\r
 531     {\r
 532         if ( tcp3dInst->pingFreeCnt )\r
 533         {\r
 534             blockIndex = tcp3dInst->nextPingInIdx;\r
 535         }\r
 536         else if ( tcp3dInst->pongFreeCnt )\r
 537         {\r
 538             blockIndex = tcp3dInst->nextPongInIdx;\r
 539             pathFlag = 1;\r
 540         }\r
 541     }\r
 542 \r
 543     /* update the next path flag */\r
 544     if ( pathFlag )\r
 545         tcp3dInst->nextCodeBlockIndex = 0;\r
 546     else\r
 547         tcp3dInst->nextCodeBlockIndex = 1;\r
 548 \r
 549     /* add new block to the list until available capacity */\r
 550     if ( tcp3dInst->pingFreeCnt || tcp3dInst->pongFreeCnt )\r
 551 #else\r
 552     /* path flag from the blockIndex value */\r
 553     blockIndex  = tcp3dInst->nextCodeBlockIndex;\r
 554     pathFlag    = (blockIndex & 1);\r
 555 \r
 556     /* add new block to the list until available capacity */\r
 557     if ( ( ( pathFlag == 0 ) && tcp3dInst->pingFreeCnt ) ||\r
 558          ( ( pathFlag == 1 ) && tcp3dInst->pongFreeCnt ) )\r
 559 #endif\r
 560     {\r
 561         /* Update the pointers */\r
 562         prmCfg  = &tcp3dInst->pseudoParamBufPtr[blockIndex*TCP3D_DRV_LINK_CB];\r
 563         prmLlr  = prmCfg + LINK_CH_IDX_LLR;\r
 564         prmHd   = prmCfg + LINK_CH_IDX_HD;\r
 565         prmSts  = prmCfg + LINK_CH_IDX_STS;\r
 566         prmSd   = prmCfg + LINK_CH_IDX_SD;\r
 567     \r
 568         /**\r
 569          * Update addresses first\r
 570          */\r
 571         prmCfg->srcAddr     = (uint32_t) inputConfigPtr;\r
 572         prmLlr->srcAddr     = (uint32_t) llrPtr;\r
 573         prmHd->destAddr     = (uint32_t) hdPtr;\r
 574         prmSts->destAddr    = (uint32_t) statusPtr;\r
 575         prmSd->destAddr     = (uint32_t) sdPtr;\r
 576         /**\r
 577          * Update counts for needed\r
 578          */\r
 579         prmSd->aCnt         = blockLength;\r
 580         if ( ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
 581              ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
 582         {\r
 583             prmLlr->aCnt        = (blockLength>>1);\r
 584             prmLlr->srcBIdx     = (blockLength>>1);\r
 585             prmLlr->srcCIdx     = llrOffset;\r
 586             prmHd->aCnt         = (blockLength>>3);\r
 587             prmSd->destBIdx     = sdOffset;\r
 588         }\r
 589         else\r
 590         {\r
 591             prmLlr->aCnt        = COMPUTE_KOUT(blockLength);\r
 592             prmLlr->srcBIdx     = llrOffset;\r
 593             prmHd->aCnt         = COMPUTE_HD_BYTE_SIZE(blockLength);\r
 594         }\r
 595 \r
 596         /**\r
 597          * Link Status & Soft decisions if avaiable.\r
 598          * NOTE: For wrap-around case, load OPT & LINK fields with reset values\r
 599          */\r
 600         /* load HD OPT reset value */\r
 601         prmHd->opt          = tcp3dInst->resetHdOpt[pathFlag];\r
 602         /* Check if STS is available */\r
 603         if ( statusPtr != NULL )\r
 604         {\r
 605             /* update HD link */\r
 606             prmHd->linkAddr     = stsLink[pathFlag];\r
 607             /* load STS OPT reset value */\r
 608             prmSts->opt         = tcp3dInst->resetStsOpt[pathFlag];\r
 609             /* Check if SD is available */\r
 610             if ( sdPtr != NULL )\r
 611             {\r
 612                 /* load SD OPT reset value */\r
 613                 prmSd->opt          = tcp3dInst->resetSdOpt[pathFlag];\r
 614                 /* update Status link */\r
 615                 prmSts->linkAddr    = sdLink[pathFlag];\r
 616                 /* load SD link reset value */\r
 617                 prmSd->linkAddr     = tcp3dInst->resetSdLink[pathFlag];\r
 618                 /* last param pointer */\r
 619                 lastOutPrm = prmSd;\r
 620             }\r
 621             else\r
 622             {\r
 623                 /* link reset value */\r
 624                 prmSts->linkAddr    = tcp3dInst->resetStsLink[pathFlag];\r
 625                 /* last param pointer */\r
 626                 lastOutPrm = prmSts;\r
 627             }\r
 628         }\r
 629         else if ( sdPtr != NULL )\r
 630         {\r
 631             /* update HD link */\r
 632             prmHd->linkAddr     = sdLink[pathFlag];\r
 633             /* load SD OPT reset value */\r
 634             prmSd->opt          = tcp3dInst->resetSdOpt[pathFlag];\r
 635             /* load SD link reset value */\r
 636             prmSd->linkAddr     = tcp3dInst->resetSdLink[pathFlag];\r
 637             /* last param pointer */\r
 638             lastOutPrm = prmSd;\r
 639         }\r
 640         else\r
 641         {\r
 642             /* load HD link reset value */\r
 643             prmHd->linkAddr     = tcp3dInst->resetHdLink[pathFlag];\r
 644             /* last param pointer */\r
 645             lastOutPrm = prmHd;\r
 646         }\r
 647 \r
 648         /* Add the WRAP param at the end of the output PaRAM */\r
 649         if ( blockIndex >= (tcp3dInst->maxCodeBlocks-2) )\r
 650         {\r
 651             /* get the pointer for the wrap param for the appropriate path */\r
 652             prmWrap = (EDMA3_DRV_PaRAMRegs *) wrapLink[pathFlag];\r
 653             /* link with last out param */\r
 654             lastOutPrm->linkAddr   = 0xFFFF & wrapLink[pathFlag];\r
 655             /* change the last param pointer */\r
 656             lastOutPrm = prmWrap;\r
 657         }\r
 658 \r
 659         /**\r
 660          * If Interrupt nofication is requested, change the default link \r
 661          * to LINK_CH_IDX_NTF for the last PaRAM.\r
 662          */\r
 663         if ( ntfEventFlag )\r
 664         {\r
 665             lastOutPrm->linkAddr = ntfLink[pathFlag];\r
 666         }\r
 667 \r
 668         /**\r
 669          * Chain the block to previous one in each path. This is done for blocks\r
 670          * starting from the second one in each path.\r
 671          * \r
 672          * Since the blockIndex is tracking linearly the pseudo param buffer\r
 673          * and ping & pong lists are used as interleaved lists, chaining is\r
 674          * done starting from index 2 onwards till max.\r
 675          */\r
 676         if ( blockIndex > 1 )\r
 677         {\r
 678             /* Get the previous last output PaRAM, used in chaining */\r
 679             prevLastPrmPtr  = tcp3dInst->lastParam[pathFlag];\r
 680     \r
 681             /**\r
 682              * If previous block has notification, change the previous param\r
 683              * link to NTFD, otherwise change to dummy REVT link PaRAM.\r
 684              */\r
 685             if ( tcp3dInst->prevNtfFlag[pathFlag] )\r
 686             {\r
 687                 /* Change the LINK to interrupt Notify PaRAM */\r
 688                 prevLastPrmPtr->linkAddr = chainToNextCbNtfdLink[pathFlag];\r
 689             }\r
 690             else\r
 691             {\r
 692                 /* Change the LINK to dummy REVT PaRAM */\r
 693                 prevLastPrmPtr->linkAddr = chainToNextCbDummyLink[pathFlag];\r
 694             }\r
 695         }\r
 696 \r
 697         /* Store ntfEventFlag, used in chaining next block */\r
 698         tcp3dInst->prevNtfFlag[pathFlag] = ntfEventFlag;\r
 699 \r
 700         /* Store the last output PaRAM, used in chaining next block */\r
 701         tcp3dInst->lastParam[pathFlag] = lastOutPrm;\r
 702 \r
 703         /* Increment the ping/pong load counter */\r
 704         if ( pathFlag )\r
 705         {\r
 706             tcp3dInst->pongLoadCnt++;\r
 707             tcp3dInst->pongFreeCnt--;\r
 708             tcp3dInst->nextPongInIdx += 2;\r
 709         }\r
 710         else\r
 711         {\r
 712             tcp3dInst->pingLoadCnt++;\r
 713             tcp3dInst->pingFreeCnt--;\r
 714             tcp3dInst->nextPingInIdx += 2;\r
 715         }\r
 716 \r
 717         /* Reset index when reached maximum */\r
 718         if ( tcp3dInst->nextPingInIdx > tcp3dInst->maxPingCbIdx )\r
 719         {\r
 720             tcp3dInst->nextPingInIdx = 0;\r
 721         }\r
 722         if ( tcp3dInst->nextPongInIdx > tcp3dInst->maxPongCbIdx )\r
 723         {\r
 724             tcp3dInst->nextPongInIdx = 1;\r
 725         }\r
 726 \r
 727 #if !TWO_PATHS\r
 728         /* Increment the index value until reaching the last block */\r
 729         tcp3dInst->nextCodeBlockIndex++;\r
 730 \r
 731         /* Reset index when reached maximum */\r
 732         if ( tcp3dInst->nextCodeBlockIndex >= tcp3dInst->maxCodeBlocks )\r
 733         {\r
 734             tcp3dInst->nextCodeBlockIndex = 0;\r
 735         }\r
 736 #endif\r
 737     } /* if enqueue possible */\r
 738     else\r
 739     {\r
 740         tcp3dResult = TCP3D_DRV_INPUT_LIST_FULL;\r
 741     } /* if enqueue not possible */\r
 742 \r
 743     /* Call Start function as needed */\r
 744     if ( ( tcp3dInst->startFlag ) &&\r
 745          ( (tcp3dInst->pingStop) || (tcp3dInst->pongStop) ) )\r
 746     {\r
 747         tcp3dResult2 = Tcp3d_start(tcp3dInst, TCP3D_DRV_START_AUTO);\r
 748 \r
 749         /* If start returned an error, generate an error message. */\r
 750         if ( TCP3D_DRV_NO_ERR != tcp3dResult2 )\r
 751         {\r
 752             Tcp3d_osalLog("Enqueue: Tcp3d_start function returned error with value : %d\n", tcp3dResult2);\r
 753         }\r
 754     }\r
 755 \r
 756     return ( tcp3dResult );\r
 757 } /* end of - Tcp3d_enqueueCodeBlock() function */\r
 758 \r
 759 /**\r
 760  *  @brief      This API could be used for starting the driver to start doing\r
 761  *              EDMA transfers to TCP3 decoder for decoding from the pseudo\r
 762  *              PaRAM list.\r
 763  *\r
 764  *              This function is executed at the application task thread for\r
 765  *              starting either the PING or PONG path execution.\r
 766  */\r
 767 Tcp3d_Result Tcp3d_start (  INOUT Tcp3d_Instance    *inst,\r
 768                             IN    uint8_t           startMode)\r
 769 {\r
 770     EDMA3_DRV_Result        result = EDMA3_DRV_SOK;\r
 771     EDMA3_DRV_PaRAMRegs     *currPrmPtr1, *currPrmPtr2;\r
 772     Tcp3d_Result            tcp3dResult = TCP3D_DRV_NO_ERR;\r
 773     uint16_t                startNeeded = 0; /* 0 - not started, 1 - started */  \r
 774     int32_t                 pingOutIdx, pongOutIdx;\r
 775 \r
 776     /* Set startFlag if first call to the function is made with AUTO mode */\r
 777     if ( ( startMode == TCP3D_DRV_START_AUTO) && ( !inst->startFlag ) )\r
 778     {\r
 779         inst->startFlag = startMode;\r
 780     }\r
 781 \r
 782     /**\r
 783      * Return immediately, if both stop flags are not set.\r
 784      * This is possible in two scenarios\r
 785      *  1) After the init and before calling start with AUTO mode.\r
 786      *  2) In steady state when both ping and pong decoders are busy. \r
 787      */\r
 788     if ( ( ( inst->pingStop == NULL ) && ( inst->pongStop == NULL ) ) ||\r
 789          ( !inst->startFlag ) )\r
 790     {\r
 791         return ( tcp3dResult );\r
 792     }\r
 793 \r
 794     /**\r
 795      * Check startMode parameter to see if start needed\r
 796      */\r
 797     if ( startMode == TCP3D_DRV_START_AUTO )\r
 798     {\r
 799         /**\r
 800          * Start is needed in the following cases.\r
 801          *  - if the current out index is less than next in index\r
 802          *  - if not, in the wrap case when blocks are loaded from beginning\r
 803          *      of the list where out index could be greater than next in index.\r
 804          *      Here check for the load count.\r
 805          * \r
 806          * Two LSB bits of the variable startNeeded are used for indicating the\r
 807          * need to do start. LSB0 is used for PING and LSB1 is used for PONG. \r
 808          */\r
 809         /* PING STOP */\r
 810         if ( inst->pingStop )\r
 811         {\r
 812             /**\r
 813              * Only update the list variables if the driver is stopped \r
 814              * for the ping side.\r
 815              */\r
 816             /**\r
 817              * Read the source address of L2P Channel PaRAM to get the current\r
 818              * pseudo PaRAM pointer for PING paths. Then compare with the \r
 819              * start pointer to get the out index. \r
 820              */\r
 821             currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
 822             pingOutIdx  = GET_CB_IDX(currPrmPtr1 - inst->startPrmPtr);\r
 823 \r
 824             /* Update the counters and indexes using the current out indexes */\r
 825             Tcp3d_updatePingListVariables( inst, pingOutIdx );\r
 826 \r
 827             if ( pingOutIdx < inst->nextPingInIdx )\r
 828             {\r
 829                 startNeeded |= 1;\r
 830             }\r
 831             else if ( inst->pingLoadCnt > 0 )\r
 832             {\r
 833                 startNeeded |= 1;\r
 834             }\r
 835         }\r
 836 \r
 837         /* PONG STOP */\r
 838         if ( inst->pongStop )\r
 839         {\r
 840             /**\r
 841              * Only update the list variables if the driver is stopped \r
 842              * for the pong side.\r
 843              */\r
 844             /**\r
 845              * Read the source address of L2P Channel PaRAM to get the current\r
 846              * pseudo PaRAM pointer for PONG paths. Then compare with the \r
 847              * start pointer to get the out index. \r
 848              */\r
 849             currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
 850             pongOutIdx  = GET_CB_IDX(currPrmPtr2 - inst->startPrmPtr);\r
 851 \r
 852             /* Update the counters and indexes using the current out indexes */\r
 853             Tcp3d_updatePongListVariables( inst, pongOutIdx );\r
 854 \r
 855             if ( pongOutIdx < inst->nextPongInIdx )\r
 856             {\r
 857                 startNeeded |= 2;\r
 858             }\r
 859             else if ( inst->pongLoadCnt > 0 )\r
 860             {\r
 861                 startNeeded |= 2;\r
 862             }\r
 863         }\r
 864     }\r
 865     else if ( ( startMode == TCP3D_DRV_START_PING ) && ( inst->pingStop ) )\r
 866     {\r
 867         startNeeded |= 1;\r
 868     }\r
 869     else if ( ( startMode == TCP3D_DRV_START_PONG ) && ( inst->pongStop ) )\r
 870     {\r
 871         startNeeded |= 2;\r
 872     }\r
 873 \r
 874     /* If LSB0 is set, start PING */\r
 875     if ( startNeeded & 0x1 )\r
 876     {\r
 877         /**\r
 878          *  Clear the wrap adjust flags,\r
 879          *  when the last block decoding in the ping list is detected.\r
 880          */\r
 881         if (inst->pingLastOutFlag)\r
 882         {\r
 883             inst->pingLastOutFlag = 0;\r
 884             inst->pingWrapCheck = 1;\r
 885         }\r
 886 \r
 887         /* increment counter */\r
 888         inst->pingStartCntr++;\r
 889         /* Clear the stop flag */\r
 890         inst->pingStop = 0;\r
 891         /* Enable L2P channel in the PING path */\r
 892         result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
 893                                             inst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
 894                                             EDMA3_DRV_TRIG_MODE_MANUAL);\r
 895     }\r
 896 \r
 897     /* If LSB1 is set, start PONG */\r
 898     if ( startNeeded & 0x2 )\r
 899     {\r
 900         /**\r
 901          *  Clear the wrap adjust flags,\r
 902          *  when the last block decoding in the pong list is detected.\r
 903          */\r
 904         if (inst->pongLastOutFlag)\r
 905         {\r
 906             inst->pongLastOutFlag = 0;\r
 907             inst->pongWrapCheck = 1;\r
 908         }\r
 909 \r
 910         /* increment counter */\r
 911         inst->pongStartCntr++;\r
 912         /* Clear the stop flag */\r
 913         inst->pongStop = 0;\r
 914 \r
 915         /* Enable L2P channel in the PONG path */\r
 916         result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
 917                                             inst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
 918                                             EDMA3_DRV_TRIG_MODE_MANUAL);\r
 919     }\r
 920 \r
 921     /* Update the return status, if any EDMA starts fail */\r
 922     if ( result != EDMA3_DRV_SOK )\r
 923     {\r
 924         tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
 925     }\r
 926 \r
 927     /* Change the state to RUNNING, if start successful */\r
 928     if ( ( startNeeded ) && ( result == EDMA3_DRV_SOK ) )\r
 929     {\r
 930         inst->state = TCP3D_DRV_STATE_RUNNING;\r
 931     }\r
 932 \r
 933     return ( tcp3dResult );\r
 934 \r
 935 } /* end of - Tcp3d_start() function */\r
 936 \r
 937 /**\r
 938  *  @brief      This API could be used for querying the TCP3D driver to get\r
 939  *              updates or take appropriate actions.\r
 940  * \r
 941  *  \note       This API is not fully scoped currently and the possible query\r
 942  *              commands and their actions are open as of now.\r
 943  */\r
 944 Tcp3d_Result Tcp3d_status ( IN    Tcp3d_Instance    *inst,\r
 945                             INOUT Tcp3d_Sts         *drvStatus )\r
 946 {\r
 947     Tcp3d_Result            tcp3dResult = TCP3D_DRV_NO_ERR;\r
 948     EDMA3_DRV_PaRAMRegs     *currPrmPtr1, *currPrmPtr2;\r
 949 \r
 950     /* Check the control command */\r
 951     switch ( drvStatus->cmd )\r
 952     {\r
 953         case TCP3D_DRV_GET_STATE :\r
 954             /* Read state value from driver instance */\r
 955             drvStatus->state = inst->state;\r
 956             break;\r
 957 \r
 958         case TCP3D_DRV_GET_MIN_OUT_IDX:\r
 959             /**\r
 960              * Get the L2P Channel PaRAM address and then read the source\r
 961              * address from the PaRAM to get the index to the pseudo PaRAM\r
 962              * current read pointer.\r
 963              * \r
 964              * Compute the minimum index by comparing the current indexes with\r
 965              * the pseudo PaRAM start pointer.\r
 966              */\r
 967             currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
 968             currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
 969             drvStatus->prmOutIdx = (MIN(currPrmPtr1, currPrmPtr2) - inst->startPrmPtr)>>2;\r
 970             break;\r
 971 \r
 972         case TCP3D_DRV_GET_PING_OUT_IDX:\r
 973             /**\r
 974              * Read the source address of L2P Channel PaRAM to get the current\r
 975              * pseudo PaRAM pointer for PING path. Then compare with the start\r
 976              * pointer for the index.\r
 977              */\r
 978             currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
 979             drvStatus->prmOutIdx = (currPrmPtr1 - inst->startPrmPtr)>>2;\r
 980             break;\r
 981 \r
 982         case TCP3D_DRV_GET_PONG_OUT_IDX:\r
 983             /**\r
 984              * Read the source address of L2P Channel PaRAM to get the current\r
 985              * pseudo PaRAM pointer for PONG path. Then compare with the start\r
 986              * pointer for the index.\r
 987              */\r
 988             currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
 989             drvStatus->prmOutIdx = (currPrmPtr2 - inst->startPrmPtr)>>2;\r
 990             break;\r
 991 \r
 992         default:\r
 993             /* If invalid command passed, flag error */\r
 994             tcp3dResult = TCP3D_DRV_FAIL;\r
 995             break;\r
 996     }\r
 997 \r
 998     return (tcp3dResult);\r
 999 \r
1000 } /* end of - Tcp3d_status() function */\r
1001 \r
1002 /**\r
1003  *  \brief      This API could be used for change or update the TCP3D driver\r
1004  *              instance values which are set during the init time.\r
1005  *  \r
1006  *              Currently, there are few commands supported with some the\r
1007  *              limitation that they are allowed only when the driver is in\r
1008  *              IDLE state.\r
1009  * \r
1010  *  \note       -# This API is not fully scoped currently and the possible\r
1011  *              control commands and their actions are open as of now.\r
1012  *              -# We may need to protect the instance value updations, once\r
1013  *              they are allowed to change in any state.\r
1014  */\r
1015 Tcp3d_Result Tcp3d_control (IN Tcp3d_Instance   *inst,\r
1016                             IN Tcp3d_Ctrl       *drvCtrl)\r
1017 {\r
1018     Tcp3d_Result            tcp3dResult = TCP3D_DRV_NO_ERR;\r
1019 \r
1020     /* Check the control command */\r
1021     switch ( drvCtrl->cmd )\r
1022     {\r
1023         case TCP3D_DRV_SET_L2P_INT :\r
1024             if ( drvCtrl->intrFlag )\r
1025             {\r
1026                 Tcp3d_enableEdmaL2pIntr(inst);\r
1027             }\r
1028             else\r
1029             { \r
1030                 Tcp3d_disableEdmaL2pIntr(inst);\r
1031             }\r
1032             break;\r
1033         case TCP3D_DRV_SET_REVT_INT :\r
1034             if ( drvCtrl->intrFlag )\r
1035             {\r
1036                 Tcp3d_enableEdmaPauseIntr(inst);\r
1037             }\r
1038             else\r
1039             { \r
1040                 Tcp3d_disableEdmaPauseIntr(inst);\r
1041             }\r
1042             break;\r
1043 \r
1044         case TCP3D_DRV_CLR_REVT_INT :\r
1045             Tcp3d_clearEdmaPauseIntr(inst);\r
1046             break;\r
1047 \r
1048         case TCP3D_DRV_SET_PING_L2P_INT :\r
1049         case TCP3D_DRV_SET_PONG_L2P_INT :\r
1050         case TCP3D_DRV_SET_PING_PAUSE_INT :\r
1051         case TCP3D_DRV_SET_PONG_PAUSE_INT :\r
1052         default:\r
1053             /* If invalid command passed, flag error */\r
1054             tcp3dResult = TCP3D_DRV_FAIL;\r
1055             break;\r
1056     }\r
1057 \r
1058     return (tcp3dResult);\r
1059 \r
1060 } /* end of - Tcp3d_control() function */\r
1061 \r
1062 /*******************************************************************************\r
1063  ******************************************************************************/\r
1064 static void Tcp3d_setLocalVariables (IN Tcp3d_Instance   *tcp3dInst)\r
1065 {\r
1066     // NOTE: Removed after the shadow registers base is set during init\r
1067     // CSL_TpccRegs            *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMACC_2_REGS;\r
1068     EDMA3_DRV_PaRAMRegs     *prm;\r
1069 \r
1070     /* Set EDMA PaRAM pointers */\r
1071     tcp3dInst->startPrmPtr = (EDMA3_DRV_PaRAMRegs *) L2GLBMAP(tcp3dInst->coreId, \\r
1072                                                 tcp3dInst->pseudoParamBufPtr);\r
1073     tcp3dInst->pingPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pingChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
1074     tcp3dInst->pongPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pongChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
1075 \r
1076     /* Store pointers for the end of list (PING starts first in the list)*/\r
1077     prm = &tcp3dInst->pseudoParamBufPtr[(tcp3dInst->maxCodeBlocks-2)*TCP3D_DRV_LINK_CB];\r
1078     if ( tcp3dInst->maxCodeBlocks & 1 )\r
1079     {  \r
1080         tcp3dInst->endListParam[PING_INDEX] = prm;\r
1081         tcp3dInst->endListParam[PONG_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
1082     }\r
1083     else\r
1084     { \r
1085         tcp3dInst->endListParam[PING_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
1086         tcp3dInst->endListParam[PONG_INDEX] = prm;\r
1087     }\r
1088 \r
1089     /**\r
1090      * Set interrupt enable/disable mask for channels using the shadow region\r
1091      * registers.\r
1092      */\r
1093     /* Get EDMA Controller shadow registers pointer */\r
1094     // NOTE: Removed after the value is set through init sequence\r
1095     // tcp3dInst->tpccShadowRegs = &tpcc2Regs->SHADOW[tcp3dInst->edmaRegionId];\r
1096 \r
1097     /* REVT channel mask and registers (for PAUSE interrupt) */\r
1098     tcp3dInst->pauseChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
1099     tcp3dInst->pauseChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
1100     if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] < 32 )\r
1101     {\r
1102         tcp3dInst->intEnClrReg[TPCC_REVT_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
1103         tcp3dInst->intEnSetReg[TPCC_REVT_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
1104         tcp3dInst->clrIntPendReg[TPCC_REVT_REGS]    = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
1105         tcp3dInst->intPendReg[TPCC_REVT_REGS]       = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
1106     }\r
1107     else\r
1108     {\r
1109         tcp3dInst->intEnClrReg[TPCC_REVT_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
1110         tcp3dInst->intEnSetReg[TPCC_REVT_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
1111         tcp3dInst->clrIntPendReg[TPCC_REVT_REGS]    = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
1112         tcp3dInst->intPendReg[TPCC_REVT_REGS]       = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
1113     }\r
1114     /* L2P channel mask and registers (for L2P interrupt) */\r
1115     tcp3dInst->l2pChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
1116     tcp3dInst->l2pChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
1117     if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] < 32 )\r
1118     {\r
1119         tcp3dInst->intEnClrReg[TPCC_L2P_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
1120         tcp3dInst->intEnSetReg[TPCC_L2P_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
1121         tcp3dInst->clrIntPendReg[TPCC_L2P_REGS]    = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
1122         tcp3dInst->intPendReg[TPCC_L2P_REGS]       = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
1123     }\r
1124     else\r
1125     {\r
1126         tcp3dInst->intEnClrReg[TPCC_L2P_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
1127         tcp3dInst->intEnSetReg[TPCC_L2P_REGS]      = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
1128         tcp3dInst->clrIntPendReg[TPCC_L2P_REGS]    = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
1129         tcp3dInst->intPendReg[TPCC_L2P_REGS]       = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
1130     }\r
1131 \r
1132     /* Clear countes */\r
1133     tcp3dInst->pingStartCntr = 0;\r
1134     tcp3dInst->pongStartCntr = 0;\r
1135     tcp3dInst->pingPauseEnCntr = 0;\r
1136     tcp3dInst->pingL2pEnCntr = 0;\r
1137     tcp3dInst->pingIntr = 0;\r
1138     tcp3dInst->pongIntr = 0;\r
1139 }\r
1140 \r
1141 static void Tcp3d_resetRuntimeVariables (IN Tcp3d_Instance   *tcp3dInst)\r
1142 {\r
1143     /* Initialize the driver instace run-time variables */\r
1144     tcp3dInst->nextCodeBlockIndex       = 0;\r
1145     tcp3dInst->pingStop                 = 1;\r
1146     tcp3dInst->pongStop                 = 1;\r
1147     tcp3dInst->startFlag                = 0;\r
1148     tcp3dInst->prevNtfFlag[PING_INDEX]  = 0;\r
1149     tcp3dInst->prevNtfFlag[PONG_INDEX]  = 0;\r
1150     tcp3dInst->pingLoadCnt              = 0;\r
1151     tcp3dInst->pongLoadCnt              = 0;\r
1152     tcp3dInst->prevPingOutIdx           = 0;\r
1153     tcp3dInst->prevPongOutIdx           = 1;\r
1154     tcp3dInst->nextPingInIdx            = 0;\r
1155     tcp3dInst->nextPongInIdx            = 1;\r
1156     tcp3dInst->pingWrapCheck            = 1;\r
1157     tcp3dInst->pongWrapCheck            = 1;\r
1158     tcp3dInst->pingLastOutFlag          = 0;\r
1159     tcp3dInst->pongLastOutFlag          = 0;\r
1160     tcp3dInst->pingFreeCnt              = tcp3dInst->maxPingCbCnt;\r
1161     tcp3dInst->pongFreeCnt              = tcp3dInst->maxPongCbCnt;\r
1162 }\r
1163 \r
1164 static void Tcp3d_updatePingListVariables ( INOUT  Tcp3d_Instance *inst,\r
1165                                             IN     int32_t        pingOutIdx )\r
1166 {\r
1167     int32_t                 indexDiff1;\r
1168 \r
1169     /**\r
1170      * Load count adjustment is done following the steps described below.\r
1171      * \r
1172      * step1 : get index difference between current and previous indexes\r
1173      * step2 : convert the index difference to count\r
1174      * step3 : reduce the load count by index difference. It is possible that\r
1175      *          the diffrence could be negative, which gets corrected after\r
1176      *          step4 is completed.\r
1177      * step4 : wrap is detected, reduce the load count by maximum one time.\r
1178      *          The wrap detection is done either of the cases.\r
1179      *              1) when index difference is negative\r
1180      *              2) the last block decoding is detected\r
1181      * \r
1182      * NOTES:\r
1183      *  - At reset/init, checking for wrap is enabled.\r
1184      *  - Once the adjustment is done, checking is disabled until the last\r
1185      *      block decoding is done.\r
1186      */\r
1187 \r
1188     /* Adjust the loaded count - PING */\r
1189     /* step1 */\r
1190     indexDiff1 = ( pingOutIdx - inst->prevPingOutIdx );\r
1191     /* step2, step3 */\r
1192     inst->pingLoadCnt -= (indexDiff1>>1);\r
1193     /* step4 */\r
1194     if ( ( (indexDiff1 < 0) || (inst->pingLastOutFlag) ) && \r
1195                     (inst->pingWrapCheck) )\r
1196     {\r
1197         inst->pingLoadCnt   -= inst->maxPingCbCnt;\r
1198         inst->pingWrapCheck  = 0;\r
1199     }\r
1200 \r
1201     /* update free counts - can be negative */\r
1202     inst->pingFreeCnt       = ( inst->maxPingCbCnt - inst->pingLoadCnt );\r
1203 \r
1204     /* update previous out index */\r
1205     inst->prevPingOutIdx    = pingOutIdx;\r
1206 }\r
1207 \r
1208 static void Tcp3d_updatePongListVariables ( INOUT  Tcp3d_Instance *inst,\r
1209                                             IN     int32_t        pongOutIdx )\r
1210 {\r
1211     int32_t                 indexDiff2;\r
1212 \r
1213     /**\r
1214      * Load count adjustment is done following the steps described below.\r
1215      * \r
1216      * step1 : get index difference between current and previous indexes\r
1217      * step2 : convert the index difference to count\r
1218      * step3 : reduce the load count by index difference. It is possible that\r
1219      *          the diffrence could be negative, which gets corrected after\r
1220      *          step4 is completed.\r
1221      * step4 : wrap is detected, reduce the load count by maximum one time.\r
1222      *          The wrap detection is done either of the cases.\r
1223      *              1) when index difference is negative\r
1224      *              2) the last block decoding is detected\r
1225      * \r
1226      * NOTES:\r
1227      *  - At reset/init, checking for wrap is enabled.\r
1228      *  - Once the adjustment is done, checking is disabled until the last\r
1229      *      block decoding is done.\r
1230      */\r
1231 \r
1232 \r
1233     /* Adjust the loaded count - PONG */\r
1234     /* step1 */\r
1235     indexDiff2 = ( pongOutIdx - inst->prevPongOutIdx );\r
1236     /* step2, step3 */\r
1237     inst->pongLoadCnt -= (indexDiff2>>1);\r
1238     /* step4 */\r
1239     if ( ( (indexDiff2 < 0) || (inst->pongLastOutFlag) ) && \r
1240                     (inst->pongWrapCheck) )\r
1241     {\r
1242         inst->pongLoadCnt   -= inst->maxPongCbCnt;\r
1243         inst->pongWrapCheck  = 0;\r
1244     }\r
1245 \r
1246     /* update free counts - can be negative */\r
1247     inst->pongFreeCnt       = ( inst->maxPongCbCnt - inst->pongLoadCnt );\r
1248 \r
1249     /* update previous out index */\r
1250     inst->prevPongOutIdx    = pongOutIdx;\r
1251 }\r
1252 \r
1253 /**\r
1254  * @brief   Function to get the physical addresses of all the EDMA3 channels\r
1255  *          used in TCP3D driver. \r
1256  */\r
1257 static EDMA3_DRV_Result Tcp3d_getEdmaChParamAddr(IN Tcp3d_Instance *tcp3dInst)\r
1258 { \r
1259     EDMA3_DRV_Result    result = EDMA3_DRV_SOK;    \r
1260     int32_t               cnt;\r
1261 \r
1262     for ( cnt = 0; cnt < TCP3D_DRV_MAX_CH_PER_PATH; cnt++ )\r
1263     {\r
1264         /* Get PaRAM address for PING physical channel */ \r
1265         result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1266                                             tcp3dInst->pingCh[cnt],\r
1267                                             &tcp3dInst->pingChParamAddr[cnt]);\r
1268                 \r
1269         /* Get PaRAM address for PONG physical channel */ \r
1270         result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1271                                             tcp3dInst->pongCh[cnt],\r
1272                                             &tcp3dInst->pongChParamAddr[cnt]);\r
1273     }\r
1274 \r
1275     for ( cnt = 0; cnt < (TCP3D_DRV_MAX_LINK_CH>>1); cnt++ )\r
1276     {\r
1277         /* Get PaRAM address for PING Link channel */ \r
1278         result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1279                                             tcp3dInst->pingLinkCh[cnt],\r
1280                                             &tcp3dInst->pingLinkChParamAddr[cnt]);\r
1281                 \r
1282         /* Get PaRAM address for PONG link channel */ \r
1283         result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1284                                             tcp3dInst->pongLinkCh[cnt],\r
1285                                             &tcp3dInst->pongLinkChParamAddr[cnt]);\r
1286     }\r
1287 \r
1288     return ( result );\r
1289 \r
1290 } /* end of - Tcp3d_getEdmaChParamAddr() function */\r
1291 \r
1292 /**\r
1293  * @brief   Enabling the Event triggered EDMA3 channels \r
1294  */\r
1295 static EDMA3_DRV_Result Tcp3d_enableEdmaChannels(Tcp3d_Instance *tcp3dInst)\r
1296 {\r
1297     EDMA3_DRV_Result    result = EDMA3_DRV_SOK;\r
1298     \r
1299     /* Enable PING channels */\r
1300     result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
1301                                         tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1302                                         EDMA3_DRV_TRIG_MODE_EVENT);\r
1303 \r
1304     /* Enable PoNG channels */\r
1305     result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
1306                                         tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1307                                         EDMA3_DRV_TRIG_MODE_EVENT);\r
1308 \r
1309     return ( result );\r
1310 } /* end of - Tcp3d_enableEdmaChannels() function */ \r
1311 \r
1312 /**\r
1313  * @brief   Initialize the EDMA channels PaRAM memory with default values\r
1314  */\r
1315 static EDMA3_DRV_Result Tcp3d_initEdmaChParam (IN Tcp3d_Instance  *tcp3dInst)\r
1316 {\r
1317     EDMA3_DRV_PaRAMRegs     paramSet = {0,0,0,0,0,0,0,0,0,0,0,0,0};\r
1318     EDMA3_DRV_PaRAMRegs     *prm = &paramSet;\r
1319     EDMA3_DRV_Result        status = EDMA3_DRV_SOK;\r
1320     CSL_CPINTC_RegsOvly     cpintc0Regs = (CSL_CPINTC_RegsOvly) tcp3dInst->cpIntc0RegsBase;\r
1321 \r
1322     /* Channel - REVT 0 (dummy PaRAM) */\r
1323     /* chain to REVT 0\r
1324        link to ping link cfg channel \r
1325        A-sync\r
1326        ACNT = 1\r
1327        BCNT = 0\r
1328        CCNT = 0\r
1329        scrBIDX = 0\r
1330        desBIDX = 0\r
1331        scrCIDX = 0\r
1332        desCIDX = 0 */\r
1333     /* Fill the PaRAM Set with transfer specific information */\r
1334     /* First set OPT field with appropriate values */\r
1335 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1336     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1337                                     CSL_EDMA3_TCCH_EN,\r
1338                                     CSL_EDMA3_ITCINT_DIS,\r
1339                                     CSL_EDMA3_TCINT_DIS,\r
1340                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1341                                     CSL_EDMA3_TCC_EARLY,\r
1342                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1343                                     CSL_EDMA3_STATIC_DIS,\r
1344                                     CSL_EDMA3_SYNC_A,\r
1345                                     CSL_EDMA3_ADDRMODE_INCR,\r
1346                                     CSL_EDMA3_ADDRMODE_INCR );\r
1347 #else\r
1348     prm->opt = 0;\r
1349     /* Enable Final transfer completion chain */\r
1350     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1351     /* Program the TCC */\r
1352     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1353     /* Early Trasfer Completion */\r
1354     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1355     /* A Sync Transfer Mode */\r
1356     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1357     /* Src & Dest are in INCR modes */\r
1358     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1359     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1360 #endif\r
1361     prm->srcAddr    = NULL;\r
1362     prm->destAddr   = NULL;\r
1363     prm->aCnt       = 1;\r
1364     prm->bCnt       = 0;\r
1365     prm->cCnt       = 0;\r
1366     prm->bCntReload = 0;\r
1367     prm->srcBIdx    = 0;\r
1368     prm->destBIdx   = 0;\r
1369     prm->srcCIdx    = 0;\r
1370     prm->destCIdx   = 0;\r
1371     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1372 \r
1373     /* Now, write the PaRAM Set. */\r
1374     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1375                                 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1376                                 prm);\r
1377 \r
1378     /* Link Channel - set the reload Link PaRAM */\r
1379     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1380                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_REVT],\r
1381                                 prm);\r
1382 \r
1383     /* Copy to use in reset function */\r
1384     Tcp3d_memcpy(&tcp3dInst->revtPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1385 \r
1386     /* Channel - REVT 1 (dummy PaRAM) */\r
1387     /* chain to REVT 1\r
1388        link to ping link cfg channel \r
1389        A-sync\r
1390        ACNT = 1\r
1391        BCNT = 1\r
1392        CCNT = 1\r
1393        scrBIDX = 0\r
1394        desBIDX = 0\r
1395        scrCIDX = 0\r
1396        desCIDX = 0 */\r
1397     /* Fill the PaRAM Set with transfer specific information */\r
1398     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1399     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1400 \r
1401     /* Now, write the PaRAM Set. */\r
1402     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1403                                 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1404                                 prm);\r
1405 \r
1406     /* Link Channel - set the reload Link PaRAM */\r
1407     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1408                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_REVT],\r
1409                                 prm);\r
1410 \r
1411     /* Copy to use in reset */\r
1412     Tcp3d_memcpy(&tcp3dInst->revtPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1413 \r
1414     /* Channel - L2P 0 */\r
1415     /* chain to REVT 0\r
1416        link to ping link l2p channel \r
1417        AB-sync\r
1418        ACNT = 32\r
1419        BCNT = 4\r
1420        CCNT = pingNumCBs\r
1421        scrBIDX = 32\r
1422        desBIDX = 32\r
1423        scrCIDX = 32*4*2\r
1424        desCIDX = 0 */\r
1425     /* Fill the PaRAM Set with transfer specific information */\r
1426     /* Set OPT field with appropriate values */\r
1427 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1428     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_EN,\r
1429                                     CSL_EDMA3_TCCH_EN,\r
1430                                     CSL_EDMA3_ITCINT_DIS,\r
1431                                     CSL_EDMA3_TCINT_DIS,\r
1432                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1433                                     CSL_EDMA3_TCC_NORMAL,\r
1434                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1435                                     CSL_EDMA3_STATIC_DIS,\r
1436                                     CSL_EDMA3_SYNC_AB,\r
1437                                     CSL_EDMA3_ADDRMODE_INCR,\r
1438                                     CSL_EDMA3_ADDRMODE_INCR );\r
1439 #else\r
1440     prm->opt = 0;\r
1441     /* Enable Intermediate & Final transfer completion chain */\r
1442     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1443     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1444     /* Program the TCC */\r
1445     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1446     /* AB Sync Transfer Mode */\r
1447     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1448     /* Src & Dest are in INCR modes */\r
1449     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1450     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1451 #endif\r
1452     prm->srcAddr    = NULL;\r
1453     prm->destAddr   = (uint32_t)(tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1454     prm->aCnt       = 32;\r
1455     prm->bCnt       = TCP3D_DRV_LINK_CB;\r
1456     prm->cCnt       = NULL;\r
1457     prm->bCntReload = TCP3D_DRV_LINK_CB;\r
1458     prm->srcBIdx    = 32;\r
1459     prm->destBIdx   = 32;\r
1460     prm->srcCIdx    = (32<<1)*TCP3D_DRV_LINK_CB;\r
1461     prm->destCIdx   = 0;\r
1462     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_L2P]);\r
1463 \r
1464     /* Now, write the PaRAM Set. */\r
1465     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1466                                 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1467                                 prm);\r
1468 \r
1469     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1470                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
1471                                 prm);\r
1472 \r
1473     /* Copy to use in reset function */\r
1474     Tcp3d_memcpy(&tcp3dInst->l2pPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1475 \r
1476     /* Channel - L2P 1 */\r
1477     /* chain to REVT 1\r
1478        link to ping link l2p channel \r
1479        AB-sync\r
1480        ACNT = 32\r
1481        BCNT = 4\r
1482        CCNT = pingNumCBs\r
1483        scrBIDX = 32\r
1484        desBIDX = 32\r
1485        scrCIDX = 32*4*2\r
1486        desCIDX = 0 */\r
1487     /* Fill the PaRAM Set with transfer specific information */\r
1488     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1489     prm->destAddr   = (uint32_t)(tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1490     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_L2P]);\r
1491 \r
1492     /* Now, write the PaRAM Set. */\r
1493     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1494                                 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
1495                                 prm);\r
1496 \r
1497     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1498                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
1499                                 prm);\r
1500 \r
1501     /* Copy to use in reset function */\r
1502     Tcp3d_memcpy(&tcp3dInst->l2pPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1503 \r
1504     /* Link Channel - pause 0 */\r
1505     /* chain to REVT 0\r
1506        link to ping link revt channel \r
1507        AB-sync\r
1508        ACNT = 1\r
1509        BCNT = 2\r
1510        CCNT = 1  \r
1511        scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
1512        scrCIDX = 0\r
1513        desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
1514        desCIDX = 0 */\r
1515     /* Fill the PaRAM Set with transfer specific information */\r
1516     /* Set OPT field with appropriate values */\r
1517 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1518     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1519                                     CSL_EDMA3_TCCH_DIS,\r
1520                                     CSL_EDMA3_ITCINT_DIS,\r
1521                                     CSL_EDMA3_TCINT_EN,\r
1522                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1523                                     CSL_EDMA3_TCC_NORMAL,\r
1524                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1525                                     CSL_EDMA3_STATIC_DIS,\r
1526                                     CSL_EDMA3_SYNC_AB,\r
1527                                     CSL_EDMA3_ADDRMODE_INCR,\r
1528                                     CSL_EDMA3_ADDRMODE_INCR );\r
1529 #else\r
1530     prm->opt = 0;\r
1531     /* Enable Intermediate & Final transfer completion interrupt */\r
1532     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
1533     /* Program the TCC */\r
1534     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1535     /* AB Sync Transfer Mode */\r
1536     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1537     /* Src & Dest are in INCR modes */\r
1538     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1539     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1540 #endif\r
1541     prm->srcAddr    = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->constantOne);\r
1542     prm->destAddr   = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingStop);\r
1543     prm->aCnt       = 1;\r
1544     prm->bCnt       = 2;\r
1545     prm->cCnt       = 1;\r
1546     prm->bCntReload = 0;\r
1547     prm->srcBIdx    = ((uint8_t *)&tcp3dInst->pauseState - &tcp3dInst->constantOne);\r
1548     prm->destBIdx   = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pingStop);\r
1549     prm->srcCIdx    = 0;\r
1550     prm->destCIdx   = 0;\r
1551     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1552 \r
1553     /* Now, write the PaRAM Set. */\r
1554     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1555                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_PAUSE],\r
1556                                 prm);\r
1557 \r
1558     /* Link Channel - pause 1 */\r
1559     /* chain to REVT 1\r
1560        link to ping link revt channel \r
1561        AB-sync\r
1562        ACNT = 1\r
1563        BCNT = 2\r
1564        CCNT = 1  \r
1565        scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
1566        scrCIDX = 0\r
1567        desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
1568        desCIDX = 0 */\r
1569     /* Fill the PaRAM Set with transfer specific information */\r
1570     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1571     prm->destAddr   = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongStop);\r
1572     prm->destBIdx   = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pongStop);\r
1573     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1574 \r
1575     /* Now, write the PaRAM Set. */\r
1576     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1577                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_PAUSE],\r
1578                                 prm);\r
1579 \r
1580     /* Link Channel - INT 0 (notification PaRAM) */\r
1581     /* chain to REVT 0\r
1582        link to ping link cfg channel \r
1583        A-sync\r
1584        ACNT = 4\r
1585        BCNT = 1\r
1586        CCNT = 1\r
1587        scrBIDX = 0\r
1588        desBIDX = 0\r
1589        scrCIDX = 0\r
1590        desCIDX = 0 */\r
1591     /* Fill the PaRAM Set with transfer specific information */\r
1592     /* First set OPT field with appropriate values */\r
1593 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1594     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1595                                     CSL_EDMA3_TCCH_EN,\r
1596                                     CSL_EDMA3_ITCINT_DIS,\r
1597                                     CSL_EDMA3_TCINT_DIS,\r
1598                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1599                                     CSL_EDMA3_TCC_EARLY,\r
1600                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1601                                     CSL_EDMA3_STATIC_DIS,\r
1602                                     CSL_EDMA3_SYNC_A,\r
1603                                     CSL_EDMA3_ADDRMODE_INCR,\r
1604                                     CSL_EDMA3_ADDRMODE_INCR );\r
1605 #else\r
1606     prm->opt = 0;\r
1607     /* Enable Final transfer completion chain */\r
1608     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1609     /* Program the TCC */\r
1610     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1611     /* Early Trasfer Completion */\r
1612     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1613     /* A Sync Transfer Mode */\r
1614     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1615     /* Src & Dest are in INCR modes */\r
1616     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1617     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1618 #endif\r
1619     prm->srcAddr    = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->notificationEventNum);\r
1620     prm->destAddr   = (uint32_t)(&cpintc0Regs->STATUS_SET_INDEX_REG);\r
1621     prm->aCnt       = 4;\r
1622     prm->bCnt       = 1;\r
1623     prm->cCnt       = 1;\r
1624     prm->bCntReload = 0;\r
1625     prm->srcBIdx    = 0;\r
1626     prm->destBIdx   = 0;\r
1627     prm->srcCIdx    = 0;\r
1628     prm->destCIdx   = 0;\r
1629     prm->linkAddr   = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
1630 \r
1631     /* Now, write the PaRAM Set. */\r
1632     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1633                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_NTF],\r
1634                                 prm);\r
1635 \r
1636     prm->linkAddr   = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG];\r
1637     /* Now, write the PaRAM Set. */\r
1638     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1639                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_NTFD],\r
1640                                 prm);\r
1641 \r
1642     /* Link Channel - INT 1 (notification PaRAM) */\r
1643     /* chain to REVT 1\r
1644        link to ping link cfg channel \r
1645        A-sync\r
1646        ACNT = 4\r
1647        BCNT = 1\r
1648        CCNT = 1\r
1649        scrBIDX = 0\r
1650        desBIDX = 0\r
1651        scrCIDX = 0\r
1652        desCIDX = 0 */\r
1653     /* Fill the PaRAM Set with transfer specific information */\r
1654     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1655     prm->linkAddr   = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
1656 \r
1657     /* Now, write the PaRAM Set. */\r
1658     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1659                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_NTF],\r
1660                                 prm);\r
1661 \r
1662     /* Now, write the PaRAM Set. */\r
1663     prm->linkAddr   = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG];\r
1664     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1665                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_NTFD],\r
1666                                 prm);\r
1667 \r
1668     /* Link Channel - Wrap 0 */\r
1669     /* chain to REVT 0\r
1670        link to ping link l2p channel \r
1671        A-sync\r
1672        ACNT = 4\r
1673        BCNT = 1\r
1674        CCNT = 1  \r
1675        scrBIDX = 0\r
1676        scrCIDX = 0\r
1677        desBIDX = 0\r
1678        desCIDX = 0 */\r
1679     /* Fill the PaRAM Set with transfer specific information */\r
1680     /* Set OPT field with appropriate values */\r
1681 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1682     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1683                                     CSL_EDMA3_TCCH_EN,\r
1684                                     CSL_EDMA3_ITCINT_DIS,\r
1685                                     CSL_EDMA3_TCINT_DIS,\r
1686                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1687                                     CSL_EDMA3_TCC_NORMAL,\r
1688                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1689                                     CSL_EDMA3_STATIC_DIS,\r
1690                                     CSL_EDMA3_SYNC_A,\r
1691                                     CSL_EDMA3_ADDRMODE_INCR,\r
1692                                     CSL_EDMA3_ADDRMODE_INCR );\r
1693 #else\r
1694     prm->opt = 0;\r
1695     /* Enable Final transfer completion chain */\r
1696     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1697     /* Program the TCC */\r
1698     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1699     /* A Sync Transfer Mode */\r
1700     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1701     /* Src & Dest are in INCR modes */\r
1702     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1703     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1704 #endif\r
1705     prm->srcAddr    = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPingCbCnt);\r
1706     prm->destAddr   = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingLastOutFlag);\r
1707     prm->aCnt       = 4;\r
1708     prm->bCnt       = 1;\r
1709     prm->cCnt       = 1;\r
1710     prm->bCntReload = 0;\r
1711     prm->srcBIdx    = 0;\r
1712     prm->destBIdx   = 0;\r
1713     prm->srcCIdx    = 0;\r
1714     prm->destCIdx   = 0;\r
1715     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1716 \r
1717     /* Now, write the PaRAM Set. */\r
1718     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1719                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_WRAP],\r
1720                                 prm);\r
1721 \r
1722     /* Link Channel - Wrap 1 */\r
1723     /* chain to REVT 1\r
1724        link to ping link l2p channel \r
1725        A-sync\r
1726        ACNT = 4\r
1727        BCNT = 1\r
1728        CCNT = 1  \r
1729        scrBIDX = 0\r
1730        scrCIDX = 0\r
1731        desBIDX = 0\r
1732        desCIDX = 0 */\r
1733     /* Fill the PaRAM Set with transfer specific information */\r
1734     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1735     prm->srcAddr    = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPongCbCnt);\r
1736     prm->destAddr   = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongLastOutFlag);\r
1737     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1738 \r
1739     /* Now, write the PaRAM Set. */\r
1740     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1741                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_WRAP],\r
1742                                 prm);\r
1743 \r
1744                                 \r
1745     /* Link Channel - NEXTCB Dummy 0 (LINK_CH_IDX_NEXTCB_DUMMY PaRAM) */\r
1746     /* chain to L2P\r
1747        link to ping dummy REVT channel \r
1748        A-sync\r
1749        ACNT = 1\r
1750        BCNT = 0\r
1751        CCNT = 0\r
1752        scrBIDX = 0\r
1753        desBIDX = 0\r
1754        scrCIDX = 0\r
1755        desCIDX = 0 */\r
1756     /* Fill the PaRAM Set with transfer specific information */\r
1757     /* First set OPT field with appropriate values */\r
1758 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1759     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1760                                     CSL_EDMA3_TCCH_EN,\r
1761                                     CSL_EDMA3_ITCINT_DIS,\r
1762                                     CSL_EDMA3_TCINT_DIS,\r
1763                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1764                                     CSL_EDMA3_TCC_EARLY,\r
1765                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1766                                     CSL_EDMA3_STATIC_DIS,\r
1767                                     CSL_EDMA3_SYNC_A,\r
1768                                     CSL_EDMA3_ADDRMODE_INCR,\r
1769                                     CSL_EDMA3_ADDRMODE_INCR );\r
1770 #else\r
1771     prm->opt = 0;\r
1772     /* Enable Final transfer completion chain */\r
1773     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1774     /* Program the TCC */\r
1775     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P]);\r
1776     /* Early Trasfer Completion */\r
1777     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1778     /* A Sync Transfer Mode */\r
1779     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1780     /* Src & Dest are in INCR modes */\r
1781     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1782     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1783 #endif\r
1784     prm->srcAddr    = NULL;\r
1785     prm->destAddr   = NULL;\r
1786     prm->aCnt       = 1;\r
1787     prm->bCnt       = 0;\r
1788     prm->cCnt       = 0;\r
1789     prm->bCntReload = 0;\r
1790     prm->srcBIdx    = 0;\r
1791     prm->destBIdx   = 0;\r
1792     prm->srcCIdx    = 0;\r
1793     prm->destCIdx   = 0;\r
1794     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1795 \r
1796     /* Now, write the PaRAM Set. */\r
1797     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1798                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_NEXTCB_DUMMY],\r
1799                                 prm);\r
1800 \r
1801                                 \r
1802     /* Link Channel - NEXTCB 1 (LINK_CH_IDX_NEXTCB_DUMMY PaRAM) */\r
1803     /* chain to L2P\r
1804        link to pong dummy REVT channel\r
1805        A-sync\r
1806        ACNT = 1\r
1807        BCNT = 1\r
1808        CCNT = 1\r
1809        scrBIDX = 0\r
1810        desBIDX = 0\r
1811        scrCIDX = 0\r
1812        desCIDX = 0 */\r
1813     /* Fill the PaRAM Set with transfer specific information */\r
1814     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P]);\r
1815     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1816 \r
1817     /* Now, write the PaRAM Set. */\r
1818     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1819                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_NEXTCB_DUMMY],\r
1820                                 prm);\r
1821                                 \r
1822 \r
1823     /* Link Channel - NEXTCB Notify Dummy 0 (LINK_CH_IDX_NEXTCB_NTFD PaRAM) */\r
1824     /* chain to L2P\r
1825        link to NotifyD channel \r
1826        A-sync\r
1827        ACNT = 1\r
1828        BCNT = 0\r
1829        CCNT = 0\r
1830        scrBIDX = 0\r
1831        desBIDX = 0\r
1832        scrCIDX = 0\r
1833        desCIDX = 0 */\r
1834     /* Fill the PaRAM Set with transfer specific information */\r
1835     /* First set OPT field with appropriate values */\r
1836 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1837     prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1838                                     CSL_EDMA3_TCCH_EN,\r
1839                                     CSL_EDMA3_ITCINT_DIS,\r
1840                                     CSL_EDMA3_TCINT_DIS,\r
1841                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1842                                     CSL_EDMA3_TCC_EARLY,\r
1843                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
1844                                     CSL_EDMA3_STATIC_DIS,\r
1845                                     CSL_EDMA3_SYNC_A,\r
1846                                     CSL_EDMA3_ADDRMODE_INCR,\r
1847                                     CSL_EDMA3_ADDRMODE_INCR );\r
1848 #else\r
1849     prm->opt = 0;\r
1850     /* Enable Final transfer completion chain */\r
1851     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1852     /* Program the TCC */\r
1853     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P]);\r
1854     /* Early Trasfer Completion */\r
1855     prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1856     /* A Sync Transfer Mode */\r
1857     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1858     /* Src & Dest are in INCR modes */\r
1859     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1860     prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1861 #endif\r
1862     prm->srcAddr    = NULL;\r
1863     prm->destAddr   = NULL;\r
1864     prm->aCnt       = 1;\r
1865     prm->bCnt       = 0;\r
1866     prm->cCnt       = 0;\r
1867     prm->bCntReload = 0;\r
1868     prm->srcBIdx    = 0;\r
1869     prm->destBIdx   = 0;\r
1870     prm->srcCIdx    = 0;\r
1871     prm->destCIdx   = 0;\r
1872     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTFD]);\r
1873 \r
1874     /* Now, write the PaRAM Set. */\r
1875     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1876                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_NEXTCB_NTFD],\r
1877                                 prm);\r
1878 \r
1879                                 \r
1880     /* Link Channel - NEXTCB Notify Dummy 1 (LINK_CH_IDX_NEXTCB_NTFD PaRAM) */\r
1881     /* chain to L2P\r
1882        link to NotifyD channel\r
1883        A-sync\r
1884        ACNT = 1\r
1885        BCNT = 1\r
1886        CCNT = 1\r
1887        scrBIDX = 0\r
1888        desBIDX = 0\r
1889        scrCIDX = 0\r
1890        desCIDX = 0 */\r
1891     /* Fill the PaRAM Set with transfer specific information */\r
1892     CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P]);\r
1893     prm->linkAddr   = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTFD]);\r
1894 \r
1895     /* Now, write the PaRAM Set. */\r
1896     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1897                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_NEXTCB_NTFD],\r
1898                                 prm);                                                                                                                                                                                                                                                                                                                                                                                   \r
1899 \r
1900     return ( status );\r
1901 \r
1902 } /* end of - Tcp3d_initEdmaChParam() function */\r
1903 \r
1904 /**\r
1905  * @brief   Resets the the EDMA channels PaRAM memory with default values\r
1906  */\r
1907 static EDMA3_DRV_Result Tcp3d_resetEdmaChParam( IN Tcp3d_Instance  *tcp3dInst,\r
1908                                                 IN uint32_t          pingNumCBs,\r
1909                                                 IN uint32_t          pongNumCBs)\r
1910 {\r
1911     EDMA3_DRV_Result        status = EDMA3_DRV_SOK;\r
1912     EDMA3_DRV_PaRAMRegs     *prm;\r
1913 \r
1914     /* L2P 0 */\r
1915     prm = &tcp3dInst->l2pPrm[PING_INDEX];\r
1916     prm->srcAddr    = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[0]);\r
1917     prm->cCnt       = pingNumCBs;\r
1918     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1919                                 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1920                                 prm);\r
1921 \r
1922     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1923                                 tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
1924                                 prm);\r
1925 \r
1926     /* L2P 1 */\r
1927     prm = &tcp3dInst->l2pPrm[PONG_INDEX];\r
1928     prm->srcAddr    = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[TCP3D_DRV_LINK_CB]);\r
1929     prm->cCnt       = pongNumCBs;\r
1930     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1931                                 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
1932                                 prm);\r
1933 \r
1934     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1935                                 tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
1936                                 prm);\r
1937 \r
1938     /* REVT 0 */\r
1939     prm = &tcp3dInst->revtPrm[PING_INDEX];\r
1940     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1941                                 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1942                                 prm);\r
1943 \r
1944     /* REVT 1 */\r
1945     prm = &tcp3dInst->revtPrm[PONG_INDEX];\r
1946     status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1947                                 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1948                                 prm);\r
1949 \r
1950     return ( status );\r
1951 \r
1952 } /* end of - Tcp3d_resetEdmaChParam() function */\r
1953 \r
1954 /**\r
1955  * @brief   Initialize the Pseudo PaRAM memory with default values\r
1956  */\r
1957 static void Tcp3d_initPseudoParam ( IN  Tcp3d_Instance  *tcp3dInst,\r
1958                                     IN  uint32_t          codeBlocks,\r
1959                                     IN  Tcp3d_Config    *pingConfig,\r
1960                                     IN  Tcp3d_Config    *pongConfig)\r
1961 {\r
1962     int32_t                   cnt, flag;\r
1963     EDMA3_DRV_PaRAMRegs     prmSet[TCP3D_DRV_LINK_CB];\r
1964     EDMA3_DRV_PaRAMRegs     *prm;\r
1965     uint8_t                   mode = tcp3dInst->mode;\r
1966     uint32_t                  incfgOpt[2];\r
1967     uint32_t                  incfgLink[2];\r
1968     uint32_t                  incfgStartAddress[2];\r
1969     uint32_t                  stsOpt[2];\r
1970     uint32_t                  stsLink[2];\r
1971     uint32_t                  stsStartAddress[2];\r
1972     uint32_t                  hdOpt[2];\r
1973     uint32_t                  hdLink[2];\r
1974     uint32_t                  hdStartAddress[2];\r
1975     uint32_t                  llrOpt[2];\r
1976     uint32_t                  llrLink[2];\r
1977     uint32_t                  llrStartAddress[2];\r
1978     uint32_t                  sdOpt[2];\r
1979     uint32_t                  sdLink[2];\r
1980     uint32_t                  sdStartAddress[2];\r
1981 \r
1982     incfgStartAddress[PING_INDEX] = pingConfig->inCfgStart;\r
1983     incfgStartAddress[PONG_INDEX] = pongConfig->inCfgStart;\r
1984 \r
1985     incfgLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_LLR]);\r
1986     incfgLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_LLR]);\r
1987 \r
1988     llrStartAddress[PING_INDEX] = pingConfig->llrStart;\r
1989     llrStartAddress[PONG_INDEX] = pongConfig->llrStart;\r
1990 \r
1991     llrLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_HD]);\r
1992     llrLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_HD]);\r
1993 \r
1994     hdStartAddress[PING_INDEX] = pingConfig->hdStart;\r
1995     hdStartAddress[PONG_INDEX] = pongConfig->hdStart;\r
1996 \r
1997     hdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1998     hdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1999 \r
2000     stsStartAddress[PING_INDEX] = pingConfig->stsStart;\r
2001     stsStartAddress[PONG_INDEX] = pongConfig->stsStart;\r
2002 \r
2003     stsLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
2004     stsLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
2005 \r
2006     sdStartAddress[PING_INDEX] = pingConfig->sdStart;\r
2007     sdStartAddress[PONG_INDEX] = pongConfig->sdStart;\r
2008 \r
2009     sdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
2010     sdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
2011 \r
2012     /**\r
2013      * INCFG Ping & Pong - fill all the initial values\r
2014      */\r
2015     /* chain to REVT\r
2016        link to link llr channel \r
2017        A-sync\r
2018        ACNT = 60\r
2019        BCNT = 1\r
2020        CCNT = 1\r
2021        scrBIDX = 0\r
2022        desBIDX = 0\r
2023        scrCIDX = 0\r
2024        desCIDX = 0 */\r
2025     /* Set OPT field with appropriate values */\r
2026 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2027     incfgOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2028                                     CSL_EDMA3_TCCH_EN,\r
2029                                     CSL_EDMA3_ITCINT_DIS,\r
2030                                     CSL_EDMA3_TCINT_DIS,\r
2031                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2032                                     CSL_EDMA3_TCC_NORMAL,\r
2033                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2034                                     CSL_EDMA3_STATIC_DIS,\r
2035                                     CSL_EDMA3_SYNC_A,\r
2036                                     CSL_EDMA3_ADDRMODE_INCR,\r
2037                                     CSL_EDMA3_ADDRMODE_INCR );\r
2038 \r
2039     incfgOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2040                                     CSL_EDMA3_TCCH_EN,\r
2041                                     CSL_EDMA3_ITCINT_DIS,\r
2042                                     CSL_EDMA3_TCINT_DIS,\r
2043                                     tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2044                                     CSL_EDMA3_TCC_NORMAL,\r
2045                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2046                                     CSL_EDMA3_STATIC_DIS,\r
2047                                     CSL_EDMA3_SYNC_A,\r
2048                                     CSL_EDMA3_ADDRMODE_INCR,\r
2049                                     CSL_EDMA3_ADDRMODE_INCR );\r
2050 #else\r
2051     incfgOpt[PING_INDEX] = 0;\r
2052     /* Src & Dest are in INCR modes */\r
2053     incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2054     incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2055     /* Program the TCC */\r
2056     CSL_FINS(incfgOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2057     /* Enable Final transfer completion chain */\r
2058     incfgOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2059     /* A Sync Transfer Mode */\r
2060     incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2061 \r
2062     incfgOpt[PONG_INDEX] = 0;\r
2063     /* Src & Dest are in INCR modes */\r
2064     incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2065     incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2066     /* Program the TCC */\r
2067     CSL_FINS(incfgOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2068     /* Enable Final transfer completion chain */\r
2069     incfgOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2070     /* AB Sync Transfer Mode */\r
2071     incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2072 #endif\r
2073     prm = &prmSet[LINK_CH_IDX_INCFG];\r
2074     prm->srcAddr    = NULL;\r
2075     prm->aCnt       = 60;\r
2076     prm->bCnt       = 1;\r
2077     prm->cCnt       = 1;\r
2078     prm->bCntReload = 0;\r
2079     prm->srcBIdx    = 0;\r
2080     prm->destBIdx   = 0;\r
2081     prm->srcCIdx    = 0;\r
2082     prm->destCIdx   = 0;\r
2083 \r
2084     /**\r
2085      * LLR Ping & Pong - fill all the initial values\r
2086      */\r
2087     /* chain to REVT\r
2088        link to link hd channel \r
2089        AB-sync\r
2090        ACNT = NULL (updated during enque operation)\r
2091        BCNT = NULL (updated during enque operation)\r
2092        CCNT = NULL (updated during enque operation)\r
2093        scrBIDX = 0\r
2094        desBIDX = 0\r
2095        scrCIDX = 0\r
2096        desCIDX = 0 */\r
2097     /* Set OPT field with appropriate values */\r
2098 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2099     llrOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2100                                     CSL_EDMA3_TCCH_DIS,\r
2101                                     CSL_EDMA3_ITCINT_DIS,\r
2102                                     CSL_EDMA3_TCINT_DIS,\r
2103                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2104                                     CSL_EDMA3_TCC_NORMAL,\r
2105                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2106                                     CSL_EDMA3_STATIC_DIS,\r
2107                                     CSL_EDMA3_SYNC_AB,\r
2108                                     CSL_EDMA3_ADDRMODE_INCR,\r
2109                                     CSL_EDMA3_ADDRMODE_INCR );\r
2110 \r
2111     llrOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2112                                     CSL_EDMA3_TCCH_DIS,\r
2113                                     CSL_EDMA3_ITCINT_DIS,\r
2114                                     CSL_EDMA3_TCINT_DIS,\r
2115                                     tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2116                                     CSL_EDMA3_TCC_NORMAL,\r
2117                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2118                                     CSL_EDMA3_STATIC_DIS,\r
2119                                     CSL_EDMA3_SYNC_AB,\r
2120                                     CSL_EDMA3_ADDRMODE_INCR,\r
2121                                     CSL_EDMA3_ADDRMODE_INCR );\r
2122 #else\r
2123     llrOpt[PING_INDEX] = 0;\r
2124     /* Src & Dest are in INCR modes */\r
2125     llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2126     llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2127     /* Program the TCC */\r
2128     CSL_FINS(llrOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2129     /* Enable Intermediate & Final transfer completion chain */\r
2130     llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
2131     /* AB Sync Transfer Mode */\r
2132     llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2133 \r
2134     llrOpt[PONG_INDEX] = 0;\r
2135     /* Src & Dest are in INCR modes */\r
2136     llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2137     llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2138     /* Program the TCC */\r
2139     CSL_FINS(llrOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2140     /* Enable Intermediate & Final transfer completion chain */\r
2141     llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
2142     /* AB Sync Transfer Mode */\r
2143     llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2144 #endif\r
2145     prm = &prmSet[LINK_CH_IDX_LLR];\r
2146     prm->srcAddr    = NULL;\r
2147     prm->aCnt       = NULL;\r
2148     prm->bCntReload = 0;\r
2149     if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
2150          ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
2151     {\r
2152         prm->bCnt       = 2;\r
2153         prm->cCnt       = 3;\r
2154         prm->srcBIdx    = NULL;\r
2155         prm->destBIdx   = 0x1000;\r
2156         prm->srcCIdx    = NULL;\r
2157         prm->destCIdx   = 0x2000;\r
2158     }\r
2159     else\r
2160     {\r
2161         prm->bCnt       = 3;\r
2162         prm->cCnt       = 1;\r
2163         prm->srcBIdx    = NULL;\r
2164         prm->destBIdx   = 0x2000;\r
2165         prm->srcCIdx    = 0;\r
2166         prm->destCIdx   = 0;\r
2167         llrOpt[PING_INDEX]      &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
2168         llrOpt[PONG_INDEX]      &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
2169     }\r
2170 \r
2171     /**\r
2172      * HD Ping & Pong - fill all the initial values\r
2173      */\r
2174     /* chain to REVT\r
2175        link to link pause channel \r
2176        A-sync\r
2177        ACNT = NULL (updated during enque operation)\r
2178        BCNT = 1\r
2179        CCNT = 1\r
2180        scrBIDX = 0\r
2181        desBIDX = 0\r
2182        scrCIDX = 0\r
2183        desCIDX = 0 */\r
2184     /* Set OPT field with appropriate values */\r
2185 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2186     hdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2187                                     CSL_EDMA3_TCCH_EN,\r
2188                                     CSL_EDMA3_ITCINT_DIS,\r
2189                                     CSL_EDMA3_TCINT_DIS,\r
2190                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2191                                     CSL_EDMA3_TCC_NORMAL,\r
2192                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2193                                     CSL_EDMA3_STATIC_DIS,\r
2194                                     CSL_EDMA3_SYNC_A,\r
2195                                     CSL_EDMA3_ADDRMODE_INCR,\r
2196                                     CSL_EDMA3_ADDRMODE_INCR );\r
2197 \r
2198     hdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2199                                     CSL_EDMA3_TCCH_EN,\r
2200                                     CSL_EDMA3_ITCINT_DIS,\r
2201                                     CSL_EDMA3_TCINT_DIS,\r
2202                                     tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2203                                     CSL_EDMA3_TCC_NORMAL,\r
2204                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2205                                     CSL_EDMA3_STATIC_DIS,\r
2206                                     CSL_EDMA3_SYNC_A,\r
2207                                     CSL_EDMA3_ADDRMODE_INCR,\r
2208                                     CSL_EDMA3_ADDRMODE_INCR );\r
2209 #else\r
2210     hdOpt[PING_INDEX] = 0;\r
2211     /* Src & Dest are in INCR modes */\r
2212     hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2213     hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2214     /* Program the TCC */\r
2215     CSL_FINS(hdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2216     /* Enable Intermediate & Final transfer completion chain */\r
2217     hdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2218     /* A Sync Transfer Mode */\r
2219     hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2220 \r
2221     hdOpt[PONG_INDEX] = 0;\r
2222     /* Src & Dest are in INCR modes */\r
2223     hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2224     hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2225     /* Program the TCC */\r
2226     CSL_FINS(hdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2227     /* Enable Intermediate & Final transfer completion chain */\r
2228     hdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2229     /* A Sync Transfer Mode */\r
2230     hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2231 #endif\r
2232     prm = &prmSet[LINK_CH_IDX_HD];\r
2233     prm->destAddr   = NULL;\r
2234     prm->aCnt       = NULL;\r
2235     prm->bCnt       = 1;\r
2236     prm->cCnt       = 1;\r
2237     prm->bCntReload = 0;\r
2238     prm->srcBIdx    = 0;\r
2239     prm->destBIdx   = 0;\r
2240     prm->srcCIdx    = 0;\r
2241     prm->destCIdx   = 0;\r
2242 \r
2243     /**\r
2244      * STS Ping & Pong - fill all the initial values\r
2245      */\r
2246     /* chain to REVT\r
2247        link to link sd channel \r
2248        A-sync\r
2249        ACNT = 12\r
2250        BCNT = 1\r
2251        CCNT = 1\r
2252        scrBIDX = 0\r
2253        desBIDX = 0\r
2254        scrCIDX = 0\r
2255        desCIDX = 0 */\r
2256     /* Set OPT field with appropriate values */\r
2257 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2258     stsOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2259                                     CSL_EDMA3_TCCH_EN,\r
2260                                     CSL_EDMA3_ITCINT_DIS,\r
2261                                     CSL_EDMA3_TCINT_DIS,\r
2262                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2263                                     CSL_EDMA3_TCC_NORMAL,\r
2264                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2265                                     CSL_EDMA3_STATIC_DIS,\r
2266                                     CSL_EDMA3_SYNC_A,\r
2267                                     CSL_EDMA3_ADDRMODE_INCR,\r
2268                                     CSL_EDMA3_ADDRMODE_INCR );\r
2269 \r
2270     stsOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2271                                     CSL_EDMA3_TCCH_EN,\r
2272                                     CSL_EDMA3_ITCINT_DIS,\r
2273                                     CSL_EDMA3_TCINT_DIS,\r
2274                                     tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2275                                     CSL_EDMA3_TCC_NORMAL,\r
2276                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2277                                     CSL_EDMA3_STATIC_DIS,\r
2278                                     CSL_EDMA3_SYNC_A,\r
2279                                     CSL_EDMA3_ADDRMODE_INCR,\r
2280                                     CSL_EDMA3_ADDRMODE_INCR );\r
2281 #else\r
2282     stsOpt[PING_INDEX] = 0;\r
2283     /* Src & Dest are in INCR modes */\r
2284     stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2285     stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2286     /* Program the TCC */\r
2287     CSL_FINS(stsOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2288     /* Enable Final transfer completion chain */\r
2289     stsOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2290     /* A Sync Transfer Mode */\r
2291     stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2292 \r
2293     stsOpt[PONG_INDEX] = 0;\r
2294     /* Src & Dest are in INCR modes */\r
2295     stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2296     stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2297     /* Program the TCC */\r
2298     CSL_FINS(stsOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2299     /* Enable Final transfer completion chain */\r
2300     stsOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2301     /* A Sync Transfer Mode */\r
2302     stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2303 #endif\r
2304     prm = &prmSet[LINK_CH_IDX_STS];\r
2305     prm->destAddr   = NULL;\r
2306     prm->aCnt       = 12;\r
2307     prm->bCnt       = 1;\r
2308     prm->cCnt       = 1;\r
2309     prm->bCntReload = 0;\r
2310     prm->srcBIdx    = 0;\r
2311     prm->destBIdx   = 0;\r
2312     prm->srcCIdx    = 0;\r
2313     prm->destCIdx   = 0;\r
2314 \r
2315     /**\r
2316      * SD Ping & Pong - fill all the initial values\r
2317      */\r
2318     /* chain to REVT\r
2319        link to link pause channel \r
2320        A-sync / AB-sync based on mode\r
2321        ACNT = NULL (updated during enque operation)\r
2322        BCNT = 1/3 based on mode \r
2323        CCNT = 1\r
2324        scrBIDX = 0\r
2325        desBIDX = 0\r
2326        scrCIDX = 0\r
2327        desCIDX = 0 */\r
2328     /* Set OPT field with appropriate values */\r
2329 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2330     sdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2331                                     CSL_EDMA3_TCCH_EN,\r
2332                                     CSL_EDMA3_ITCINT_DIS,\r
2333                                     CSL_EDMA3_TCINT_DIS,\r
2334                                     tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2335                                     CSL_EDMA3_TCC_NORMAL,\r
2336                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2337                                     CSL_EDMA3_STATIC_DIS,\r
2338                                     CSL_EDMA3_SYNC_A,\r
2339                                     CSL_EDMA3_ADDRMODE_INCR,\r
2340                                     CSL_EDMA3_ADDRMODE_INCR );\r
2341 \r
2342     sdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2343                                     CSL_EDMA3_TCCH_EN,\r
2344                                     CSL_EDMA3_ITCINT_DIS,\r
2345                                     CSL_EDMA3_TCINT_DIS,\r
2346                                     tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2347                                     CSL_EDMA3_TCC_NORMAL,\r
2348                                     CSL_EDMA3_FIFOWIDTH_NONE,\r
2349                                     CSL_EDMA3_STATIC_DIS,\r
2350                                     CSL_EDMA3_SYNC_A,\r
2351                                     CSL_EDMA3_ADDRMODE_INCR,\r
2352                                     CSL_EDMA3_ADDRMODE_INCR );\r
2353 #else\r
2354     sdOpt[PING_INDEX] = 0;\r
2355     /* Src & Dest are in INCR modes */\r
2356     sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2357     sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2358     /* Program the TCC */\r
2359     CSL_FINS(sdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2360     /* Enable Intermediate & Final transfer completion chain */\r
2361     sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2362     /* A Sync Transfer Mode */\r
2363     sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2364 \r
2365     sdOpt[PONG_INDEX] = 0;\r
2366     /* Src & Dest are in INCR modes */\r
2367     sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2368     sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2369     /* Program the TCC */\r
2370     CSL_FINS(sdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2371     /* Enable Intermediate & Final transfer completion chain */\r
2372     sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2373     /* A Sync Transfer Mode */\r
2374     sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2375 #endif\r
2376     prm = &prmSet[LINK_CH_IDX_SD];\r
2377     prm->destAddr   = NULL;\r
2378     prm->aCnt       = NULL;\r
2379     prm->cCnt       = 1;\r
2380     prm->bCntReload = 0;\r
2381     prm->srcCIdx    = 0;\r
2382     prm->destCIdx   = 0;\r
2383     if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
2384          ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
2385     {\r
2386         prm->bCnt       = 3;\r
2387         prm->srcBIdx    = 0x2000;\r
2388         prm->destBIdx   = NULL;\r
2389         sdOpt[PING_INDEX]       |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2390         sdOpt[PONG_INDEX]       |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2391     }\r
2392     else\r
2393     {\r
2394         prm->bCnt       = 1;\r
2395         prm->srcBIdx    = 0;\r
2396         prm->destBIdx   = 0;\r
2397     }\r
2398 \r
2399     for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
2400     {\r
2401         flag = cnt & 1;\r
2402 \r
2403         prm = &prmSet[LINK_CH_IDX_INCFG];\r
2404         prm->opt        = incfgOpt[flag];\r
2405         prm->destAddr   = incfgStartAddress[flag];\r
2406         prm->linkAddr   = incfgLink[flag];\r
2407 \r
2408         prm = &prmSet[LINK_CH_IDX_LLR];\r
2409         prm->opt        = llrOpt[flag];\r
2410         prm->destAddr   = llrStartAddress[flag];\r
2411         prm->linkAddr   = llrLink[flag];\r
2412 \r
2413         prm = &prmSet[LINK_CH_IDX_STS];\r
2414         prm->opt        = stsOpt[flag];\r
2415         prm->srcAddr    = stsStartAddress[flag];\r
2416         prm->linkAddr   = stsLink[flag];\r
2417 \r
2418         prm = &prmSet[LINK_CH_IDX_HD];\r
2419         prm->opt        = hdOpt[flag];\r
2420         prm->srcAddr    = hdStartAddress[flag];\r
2421         prm->linkAddr   = hdLink[flag];\r
2422     \r
2423         prm = &prmSet[LINK_CH_IDX_SD];\r
2424         prm->opt        = sdOpt[flag];\r
2425         prm->srcAddr    = sdStartAddress[flag];\r
2426         prm->linkAddr   = sdLink[flag];\r
2427 \r
2428         Tcp3d_memcpy(&tcp3dInst->pseudoParamBufPtr[cnt*TCP3D_DRV_LINK_CB], &prmSet[0], 32*TCP3D_DRV_LINK_CB);\r
2429 \r
2430     } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
2431 \r
2432     /* Store the lastOpt & lastLink values for use in enque function */\r
2433     tcp3dInst->resetHdOpt[PING_INDEX]    = hdOpt[PING_INDEX];\r
2434     tcp3dInst->resetHdOpt[PONG_INDEX]    = hdOpt[PONG_INDEX];\r
2435     tcp3dInst->resetHdLink[PING_INDEX]   = hdLink[PING_INDEX];\r
2436     tcp3dInst->resetHdLink[PONG_INDEX]   = hdLink[PONG_INDEX];\r
2437 \r
2438     tcp3dInst->resetStsOpt[PING_INDEX]    = stsOpt[PING_INDEX];\r
2439     tcp3dInst->resetStsOpt[PONG_INDEX]    = stsOpt[PONG_INDEX];\r
2440     tcp3dInst->resetStsLink[PING_INDEX]   = stsLink[PING_INDEX];\r
2441     tcp3dInst->resetStsLink[PONG_INDEX]   = stsLink[PONG_INDEX];\r
2442 \r
2443     tcp3dInst->resetSdOpt[PING_INDEX]    = sdOpt[PING_INDEX];\r
2444     tcp3dInst->resetSdOpt[PONG_INDEX]    = sdOpt[PONG_INDEX];\r
2445     tcp3dInst->resetSdLink[PING_INDEX]   = sdLink[PING_INDEX];\r
2446     tcp3dInst->resetSdLink[PONG_INDEX]   = sdLink[PONG_INDEX];\r
2447 } /* end of - Tcp3d_initPseudoParam() function */\r
2448 \r
2449 /**\r
2450  * @brief   Resets Pseudo PaRAM memory with default values\r
2451  */\r
2452 static void Tcp3d_resetPseudoParam (IN  Tcp3d_Instance  *tcp3dInst,\r
2453                                     IN  uint32_t          codeBlocks)\r
2454 {\r
2455     int32_t                   cnt;\r
2456     EDMA3_DRV_PaRAMRegs     *prm1 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_HD];\r
2457     EDMA3_DRV_PaRAMRegs     *prm2 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_STS];\r
2458     EDMA3_DRV_PaRAMRegs     *prm3 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_SD];\r
2459 \r
2460     for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
2461     {\r
2462         prm1->opt        = tcp3dInst->resetHdOpt[cnt & 1];\r
2463         prm1->linkAddr   = tcp3dInst->resetHdLink[cnt & 1];\r
2464         prm2->opt        = tcp3dInst->resetStsOpt[cnt & 1];\r
2465         prm2->linkAddr   = tcp3dInst->resetStsLink[cnt & 1];\r
2466         prm3->opt        = tcp3dInst->resetSdOpt[cnt & 1];\r
2467         prm3->linkAddr   = tcp3dInst->resetSdLink[cnt & 1];\r
2468 \r
2469         prm1 +=TCP3D_DRV_LINK_CB;\r
2470         prm2 +=TCP3D_DRV_LINK_CB;\r
2471         prm3 +=TCP3D_DRV_LINK_CB;\r
2472     } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
2473 } /* end of - Tcp3d_resetPseudoParam() function */\r
2474 \r
2475 /**\r
2476  *  @b Description\r
2477  *  @n  \r
2478  *      The function is used to get the version information of the TCP3D Driver.\r
2479  *\r
2480  *  @retval\r
2481  *      Version Information.\r
2482  */\r
2483 uint32_t Tcp3d_getVersion (void)\r
2484 {\r
2485     return TCP3D_DRV_VERSION_ID;\r
2486 }\r
2487 \r
2488 /**\r
2489  *  @b Description\r
2490  *  @n  \r
2491  *      The function is used to get the version string for the TCP3D Driver.\r
2492  *\r
2493  *  @retval\r
2494  *      Version String.\r
2495  */\r
2496 const char* Tcp3d_getVersionStr (void)\r
2497 {\r
2498     return Tcp3dDrvVersionStr;\r
2499 }\r
2500 \r
2501 /* end of file */\r