1 /**\r
2 * \file tcp3d_drv.c\r
3 *\r
4 * \brief TCP3D Driver functions.\r
5 *\r
6 * Copyright (C) Texas Instruments Incorporated 2009\r
7 * \r
8 * Redistribution and use in source and binary forms, with or without \r
9 * modification, are permitted provided that the following conditions \r
10 * are met:\r
11 *\r
12 * Redistributions of source code must retain the above copyright \r
13 * notice, this list of conditions and the following disclaimer.\r
14 *\r
15 * Redistributions in binary form must reproduce the above copyright\r
16 * notice, this list of conditions and the following disclaimer in the \r
17 * documentation and/or other materials provided with the \r
18 * distribution.\r
19 *\r
20 * Neither the name of Texas Instruments Incorporated nor the names of\r
21 * its contributors may be used to endorse or promote products derived\r
22 * from this software without specific prior written permission.\r
23 *\r
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
25 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
27 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
28 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
30 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
35 *\r
36 */\r
37 \r
38 /**\r
39 * Include Files\r
40 */\r
41 /* TCP3D driver includes */\r
42 #include <ti/drv/tcp3d/tcp3d_drv.h>\r
43 #include <ti/drv/tcp3d/src/tcp3d_drv_priv.h>\r
44 \r
45 /* TCP3D Types and OSAL defintions: These files can be overriden by customers\r
46 * to point to their copies. Because of this the files have not been explicitly \r
47 * specified to include the driver path.*/\r
48 #include <tcp3d_drv_types.h>\r
49 #include <tcp3d_osal.h>\r
50 \r
51 #define TWO_PATHS 0\r
52 \r
53 #define TPCC_REVT_REGS 0\r
54 #define TPCC_L2P_REGS 1\r
55 \r
56 #define PING_INDEX 0\r
57 #define PONG_INDEX 1\r
58 \r
59 /** @brief Global Variable which describes the TCP3D Driver Version Information */\r
60 const char Tcp3dDrvVersionStr[] = TCP3D_DRV_VERSION_STR ":" __DATE__ ":" __TIME__;\r
61 \r
62 /****************************************************************************\r
63 * TCP3D Driver Functions *\r
64 ****************************************************************************/\r
65 /*******************************************************************************\r
66 * Enables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
67 * in the TPCC_IESR/TPCC_IESRH.\r
68 ******************************************************************************/\r
69 static void Tcp3d_enableEdmaL2pIntr(Tcp3d_Instance *inst)\r
70 {\r
71 #if UNTESTED_CODE\r
72 *inst->intEnSetReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong);\r
73 #ifdef SIM_WORKAROUND\r
74 /**\r
75 * WORKAROUND: Current Simulator does not generate interrupt\r
76 * when there is a pending IPR bit and we enable the IER in the\r
77 * EDMA register space. So, We are forcing the EDMA to generate\r
78 * the interrupt if the IPR has valid bits. \r
79 */\r
80 if ( inst->intPendReg[TPCC_L2P_REGS] &&\r
81 (inst->l2pChMaskPing | inst->l2pChMaskPong) )\r
82 {\r
83 inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
84 }\r
85 #endif\r
86 #else\r
87 /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
88 inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
89 inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
90 inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
91 inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
92 #endif\r
93 inst->pingL2pEnCntr++;\r
94 }\r
95 \r
96 /*******************************************************************************\r
97 * Disables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
98 * in the TPCC_IECR/TPCC_IECRH.\r
99 ******************************************************************************/\r
100 static void Tcp3d_disableEdmaL2pIntr(Tcp3d_Instance *inst)\r
101 {\r
102 #if UNTESTED_CODE\r
103 *inst->intEnClrReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong); \r
104 #else\r
105 /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
106 inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
107 inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
108 inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
109 inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
110 #endif\r
111 inst->pingL2pEnCntr--;\r
112 }\r
113 \r
114 /*******************************************************************************\r
115 * Clears pending interrupt generated by EDMA CC. Sets two bits of L2P channels \r
116 * in the TPCC_ICR/TPCC_ICRH.\r
117 ******************************************************************************/\r
118 static void Tcp3d_clearEdmaL2pIntr(Tcp3d_Instance *inst)\r
119 {\r
120 #if UNTESTED_CODE\r
121 *inst->clrIntPendReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong); \r
122 #endif\r
123 inst->pingL2pEnCntr=0;\r
124 }\r
125 \r
126 /*******************************************************************************\r
127 * Enables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
128 * in the TPCC_IESR/TPCC_IESRH.\r
129 ******************************************************************************/\r
130 static void Tcp3d_enableEdmaPauseIntr(Tcp3d_Instance *inst)\r
131 {\r
132 *inst->intEnSetReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong);\r
133 #ifdef SIM_WORKAROUND\r
134 /**\r
135 * WORKAROUND: Current Simulator does not generate interrupt\r
136 * when there is a pending IPR bit and we enable the IER in the\r
137 * EDMA register space. So, We are forcing the EDMA to generate\r
138 * the interrupt if the IPR has valid bits. \r
139 */\r
140 if ( inst->intPendReg[TPCC_REVT_REGS] &&\r
141 (inst->pauseChMaskPing | inst->pauseChMaskPong) )\r
142 {\r
143 inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
144 }\r
145 #endif\r
146 inst->pingPauseEnCntr++;\r
147 }\r
148 \r
149 /*******************************************************************************\r
150 * Disables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
151 * in the TPCC_IECR/TPCC_IECRH.\r
152 ******************************************************************************/\r
153 static void Tcp3d_disableEdmaPauseIntr(Tcp3d_Instance *inst)\r
154 {\r
155 *inst->intEnClrReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong); \r
156 inst->pingPauseEnCntr--;\r
157 }\r
158 \r
159 /*******************************************************************************\r
160 * Clears pending interrupt generated by EDMA CC. Sets two bits of REVT channels \r
161 * in the TPCC_ICR/TPCC_ICRH.\r
162 ******************************************************************************/\r
163 static void Tcp3d_clearEdmaPauseIntr(Tcp3d_Instance *inst)\r
164 {\r
165 *inst->clrIntPendReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong); \r
166 inst->pingPauseEnCntr=0;\r
167 }\r
168 \r
169 /**\r
170 * @brief TCP3D Driver function for providing the number of buffers\r
171 * required.\r
172 */\r
173 Tcp3d_Result Tcp3d_getNumBuf (IN Tcp3d_SizeCfg *cfg,\r
174 OUT int16_t *nbufs)\r
175 {\r
176 *nbufs = TCP3D_DRV_NUM_BUF;\r
177 \r
178 return ( TCP3D_DRV_NO_ERR );\r
179 }\r
180 \r
181 /**\r
182 * @brief TCP3D Driver function for providing the attributes of all the\r
183 * number of buffers requested through the structure of type\r
184 * Tcp3d_MemBuffer provided.\r
185 */\r
186 Tcp3d_Result Tcp3d_getBufDesc ( IN Tcp3d_SizeCfg *cfg,\r
187 OUT Tcp3d_MemBuffer bufs[])\r
188 {\r
189 bufs[TCP3D_DRV_INST_BUFN].size = sizeof(Tcp3d_Instance);\r
190 bufs[TCP3D_DRV_INST_BUFN].log2align = 2;\r
191 bufs[TCP3D_DRV_INST_BUFN].mclass = Tcp3d_BufClass_L2RAM;\r
192 bufs[TCP3D_DRV_INST_BUFN].volat = TRUE;\r
193 \r
194 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].size = (cfg->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
195 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].log2align = 2;\r
196 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].mclass = Tcp3d_BufClass_L2RAM;\r
197 bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].volat = TRUE;\r
198 \r
199 return ( TCP3D_DRV_NO_ERR );\r
200 }\r
201 \r
202 /**\r
203 * @brief TCP3D Driver Initialization function which must be called only\r
204 * once to initialize the driver instance and other required\r
205 * resources needed for the driver functionality.\r
206 */\r
207 Tcp3d_Result Tcp3d_init( IN Tcp3d_MemBuffer bufs[],\r
208 IN Tcp3d_InitParams *drvInitParams)\r
209 {\r
210 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
211 Tcp3d_Instance *tcp3dInst;\r
212 uint32_t modeReg = 0, endReg = 0, exeRegP0 = 0, exeRegP1 =0;\r
213 int32_t idx, locBufSize[TCP3D_DRV_NUM_BUF];\r
214 CSL_Tcp3d_cfgRegs *tcp3dCfgRegs;\r
215 \r
216 /* Check for valid instance number */\r
217 if ( drvInitParams->instNum > TCP3D_DRV_MAX_NUM_INSTANCES )\r
218 {\r
219 /* Return error */\r
220 tcp3dResult = TCP3D_DRV_INVALID_INSTANCE_NUMBER;\r
221 \r
222 return ( tcp3dResult );\r
223 }\r
224 \r
225 /* compute the buffer sizes table */\r
226 locBufSize[TCP3D_DRV_INST_BUFN] = sizeof(Tcp3d_Instance);\r
227 locBufSize[TCP3D_DRV_PSEUDO_PARAM_BUFN] = (drvInitParams->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
228 \r
229 /* Check if all buffers have valid addresses and sizes */\r
230 for ( idx = 0; idx < TCP3D_DRV_NUM_BUF; idx++)\r
231 {\r
232 if ( bufs[idx].base == NULL || bufs[idx].size < locBufSize[idx] )\r
233 tcp3dResult = TCP3D_DRV_INVALID_BUFF;\r
234 }\r
235 \r
236 /* Initialize the instance if the buffer addresses are not NULL */\r
237 if ( tcp3dResult == TCP3D_DRV_NO_ERR )\r
238 {\r
239 /* Initialize the driver Instance */\r
240 tcp3dInst = (Tcp3d_Instance *) bufs[TCP3D_DRV_INST_BUFN].base;\r
241 \r
242 /* Initialize the pseudo PaRAM array pointer */\r
243 tcp3dInst->pseudoParamBufPtr = (EDMA3_DRV_PaRAMRegs *) bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].base;\r
244 }\r
245 else\r
246 {\r
247 /* Return the error */\r
248 return ( tcp3dResult );\r
249 }\r
250 \r
251 /* Get the address of TCP3D configuration registers base address */\r
252 tcp3dCfgRegs = drvInitParams->tcp3dCfgRegs;\r
253 \r
254 /* Update the instace with the input parameters */\r
255 tcp3dInst->mode = drvInitParams->ctrlParams.mode;\r
256 tcp3dInst->doubleBuffer = drvInitParams->ctrlParams.doubleBuf;\r
257 tcp3dInst->edmaHnd = drvInitParams->edmaHnd;\r
258 tcp3dInst->edmaRegionId = drvInitParams->edmaRegionId;\r
259 tcp3dInst->maxCodeBlocks = drvInitParams->maxCodeBlocks;\r
260 tcp3dInst->notificationEventNum = drvInitParams->notificationEventNum;\r
261 tcp3dInst->instNum = drvInitParams->instNum;\r
262 tcp3dInst->coreId = drvInitParams->coreID;\r
263 \r
264 /* Verify the REVT channels */\r
265 if ( ( drvInitParams->pingCh[0] != drvInitParams->pingConfig.revtCh ) ||\r
266 ( drvInitParams->pongCh[0] != drvInitParams->pongConfig.revtCh ) )\r
267 {\r
268 /* Return error */\r
269 tcp3dResult = TCP3D_DRV_INVALID_EDMA_CH;\r
270 \r
271 return ( tcp3dResult );\r
272 }\r
273 \r
274 for ( idx = 0; idx < TCP3D_DRV_MAX_CH_PER_PATH; idx++ )\r
275 {\r
276 /* Copy PING Channels */\r
277 tcp3dInst->pingCh[idx] = drvInitParams->pingCh[idx];\r
278 \r
279 /* Copy PONG Channels */\r
280 tcp3dInst->pongCh[idx] = drvInitParams->pongCh[idx];\r
281 }\r
282 \r
283 for ( idx = 0; idx < (TCP3D_DRV_MAX_LINK_CH>>1); idx++ )\r
284 {\r
285 /* Copy PING Channels */\r
286 tcp3dInst->pingLinkCh[idx] = drvInitParams->linkCh[idx];\r
287 \r
288 /* Copy PONG Channels */\r
289 tcp3dInst->pongLinkCh[idx] = drvInitParams->linkCh[idx+(TCP3D_DRV_MAX_LINK_CH>>1)];\r
290 }\r
291 \r
292 /* Set the Driver variables to defaults */\r
293 tcp3dInst->constantOne = 1;\r
294 tcp3dInst->pauseState = TCP3D_DRV_STATE_PAUSE;\r
295 \r
296 /* Initialize the driver variables */\r
297 tcp3dInst->maxPingCbCnt = (tcp3dInst->maxCodeBlocks >> 1);\r
298 tcp3dInst->maxPongCbCnt = (tcp3dInst->maxCodeBlocks >> 1);\r
299 tcp3dInst->maxPingCbIdx = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
300 tcp3dInst->maxPongCbIdx = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
301 \r
302 /* Reset run-time variables */\r
303 Tcp3d_resetRuntimeVariables(tcp3dInst);\r
304 \r
305 /* EDMA3 - get PaRAM addresses of all physical channels */\r
306 if ( EDMA3_DRV_SOK != Tcp3d_getEdmaChParamAddr(tcp3dInst) )\r
307 {\r
308 tcp3dResult = TCP3D_DRV_FAIL_EDMA_GET_PARAM_ADDR;\r
309 \r
310 return ( tcp3dResult );\r
311 }\r
312 \r
313 /* Initialize the EDMA PaRAM memory for the physical channels */\r
314 if ( EDMA3_DRV_SOK != Tcp3d_initEdmaChParam(tcp3dInst) )\r
315 {\r
316 tcp3dResult = TCP3D_DRV_FAIL_EDMA_PARAM_INIT;\r
317 \r
318 return ( tcp3dResult );\r
319 }\r
320 \r
321 /* EDMA3 - Enable the EVENT triggered channels */\r
322 if ( EDMA3_DRV_SOK != Tcp3d_enableEdmaChannels(tcp3dInst) )\r
323 {\r
324 tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
325 \r
326 return ( tcp3dResult );\r
327 }\r
328 \r
329 /* Initialize the pseudo PaRAM memory */\r
330 Tcp3d_initPseudoParam ( tcp3dInst,\r
331 tcp3dInst->maxCodeBlocks,\r
332 &drvInitParams->pingConfig,\r
333 &drvInitParams->pongConfig);\r
334 \r
335 /* Prepare the control registers for both P0 and P1 processes */\r
336 Tcp3d_prepControlRegs ( &drvInitParams->ctrlParams,\r
337 &modeReg,\r
338 &endReg,\r
339 &exeRegP0,\r
340 &exeRegP1);\r
341 \r
342 /* \r
343 * Soft Reset the TCP3D.\r
344 * Insert NOPs b/w the reset calls in HW to work properly.\r
345 */\r
346 tcp3dCfgRegs->TCP3_SOFT_RESET = 1;\r
347 tcp3dCfgRegs->TCP3_SOFT_RESET = 0;\r
348 \r
349 /**\r
350 * Write to the Control registers with the prepared values to start\r
351 * the TCP3D state machine.\r
352 */\r
353 tcp3dCfgRegs->TCP3_MODE = modeReg;\r
354 tcp3dCfgRegs->TCP3_END = endReg;\r
355 tcp3dCfgRegs->TCP3_EXE_P0 = exeRegP0;\r
356 if ( tcp3dInst->doubleBuffer != CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
357 tcp3dCfgRegs->TCP3_EXE_P1 = exeRegP1;\r
358 \r
359 /* Set Local Variables used in the runtime APIs */\r
360 Tcp3d_setLocalVariables(tcp3dInst);\r
361 \r
362 /* Disable the interrupts */\r
363 Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
364 Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
365 \r
366 /* Clear pending interrupts */\r
367 Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
368 Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
369 \r
370 /* Reset the EDMA Channels */\r
371 Tcp3d_resetEdmaChParam (tcp3dInst,\r
372 tcp3dInst->maxPingCbCnt,\r
373 tcp3dInst->maxPongCbCnt);\r
374 \r
375 /* Change the state */\r
376 tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
377 \r
378 return ( tcp3dResult );\r
379 \r
380 } /* end of - Tcp3d_init() function */\r
381 \r
382 /**\r
383 * @brief TCP3D Driver Deinitialization function.\r
384 */\r
385 Tcp3d_Result Tcp3d_deInit ( IN Tcp3d_Instance *inst )\r
386 {\r
387 /* Disable interrupts */\r
388 Tcp3d_disableEdmaL2pIntr(inst); \r
389 Tcp3d_disableEdmaPauseIntr(inst); \r
390 \r
391 /* Clear pending interrupts */\r
392 Tcp3d_clearEdmaL2pIntr(inst);\r
393 Tcp3d_clearEdmaPauseIntr(inst);\r
394 \r
395 return ( TCP3D_DRV_NO_ERR );\r
396 }\r
397 \r
398 /**\r
399 * @brief TCP3D Driver function called to reset the driver at sub-frame\r
400 * boundary. This function does the following:\r
401 * 1) Set the instance with the passed values - for example number\r
402 * of blocks for decoding in this subframe which is needed to\r
403 * for checking the boundary and a new status array pointer\r
404 * where the status register values for each code block are\r
405 * trasferred.\r
406 * 2) Initialize all the run-time instance variables to default.\r
407 * 3) Initialize the pseudo PaRAM memory with all the defaults\r
408 * based on mode.\r
409 * 4) Reset the EDMA channels with default values. \r
410 */\r
411 Tcp3d_Result Tcp3d_reset ( IN Tcp3d_Instance *tcp3dInst,\r
412 IN uint32_t codeBlocks)\r
413 {\r
414 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
415 \r
416 /* First check for valid statte */\r
417 if ( ( tcp3dInst->pingStop != 1 ) && ( tcp3dInst->pongStop != 1) )\r
418 tcp3dResult = TCP3D_DRV_INVALID_STATE;\r
419 \r
420 /* Check if the codeblocks value is valid */\r
421 if ( ( codeBlocks > tcp3dInst->maxCodeBlocks ) || ( codeBlocks < 2 ) )\r
422 tcp3dResult = TCP3D_DRV_INVALID_PARAMETER;\r
423 \r
424 /* Return if any error found */\r
425 if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
426 return ( tcp3dResult );\r
427 \r
428 /* update the maxCodeBlocks and dependent variables, if needed */\r
429 if ( codeBlocks != NULL )\r
430 {\r
431 tcp3dInst->maxCodeBlocks = codeBlocks;\r
432 tcp3dInst->maxPingCbCnt = (codeBlocks >> 1);\r
433 tcp3dInst->maxPongCbCnt = (codeBlocks >> 1);\r
434 /* max position index in pseudo Param Buffer */\r
435 tcp3dInst->maxPingCbIdx = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
436 tcp3dInst->maxPongCbIdx = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
437 }\r
438 \r
439 /* Reset run-time variables */\r
440 Tcp3d_resetRuntimeVariables(tcp3dInst);\r
441 \r
442 /* Reset the pseudo PaRAM memory */\r
443 Tcp3d_resetPseudoParam(tcp3dInst, tcp3dInst->maxCodeBlocks);\r
444 \r
445 /* Reset the EDMA Channels */\r
446 Tcp3d_resetEdmaChParam (tcp3dInst,\r
447 tcp3dInst->maxPingCbCnt,\r
448 tcp3dInst->maxPongCbCnt);\r
449 \r
450 /* Disable the interrupts */\r
451 Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
452 Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
453 \r
454 /* Clear pending interrupts */\r
455 Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
456 Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
457 \r
458 /* Change the state */\r
459 tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
460 \r
461 return ( tcp3dResult );\r
462 } /* end of - Tcp3d_reset() function */\r
463 \r
464 /**\r
465 * @brief TCP3D Driver function for enqueuing the code blocks to the input\r
466 * list. Here the input list is a pseudo PaRAM list consisting of\r
467 * actual PaRAM entries for INCFG, LLR, HD, SD & STS transfers.\r
468 */\r
469 Tcp3d_Result Tcp3d_enqueueCodeBlock(IN Tcp3d_Instance *tcp3dInst,\r
470 IN uint32_t blockLength,\r
471 IN uint32_t *inputConfigPtr,\r
472 IN int8_t *llrPtr,\r
473 IN uint32_t llrOffset,\r
474 IN uint32_t *hdPtr,\r
475 IN int8_t *sdPtr,\r
476 IN uint32_t sdOffset,\r
477 IN uint32_t *statusPtr,\r
478 IN uint8_t ntfEventFlag)\r
479 {\r
480 EDMA3_DRV_PaRAMRegs *lastOutPrm;\r
481 int32_t blockIndex;\r
482 int32_t pathFlag;\r
483 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
484 Tcp3d_Result tcp3dResult2 = TCP3D_DRV_NO_ERR;\r
485 EDMA3_DRV_PaRAMRegs *prmCfg;\r
486 EDMA3_DRV_PaRAMRegs *prmLlr;\r
487 EDMA3_DRV_PaRAMRegs *prmHd;\r
488 EDMA3_DRV_PaRAMRegs *prmSts;\r
489 EDMA3_DRV_PaRAMRegs *prmSd;\r
490 EDMA3_DRV_PaRAMRegs *prevLastPrmPtr;\r
491 EDMA3_DRV_PaRAMRegs *prmWrap;\r
492 uint32_t l2pCh[2];\r
493 uint16_t revtLink[2];\r
494 uint16_t ntfdLink[2];\r
495 uint16_t ntfLink[2];\r
496 uint16_t stsLink[2];\r
497 uint16_t sdLink[2];\r
498 uint32_t wrapLink[2];\r
499 \r
500 l2pCh[PING_INDEX] = tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P];\r
501 l2pCh[PONG_INDEX] = tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P];\r
502 revtLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT];\r
503 revtLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT];\r
504 ntfdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTFD];\r
505 ntfdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTFD];\r
506 ntfLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTF];\r
507 ntfLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTF];\r
508 stsLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_STS];\r
509 stsLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_STS];\r
510 sdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_SD];\r
511 sdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_SD];\r
512 wrapLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_WRAP];\r
513 wrapLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_WRAP];\r
514 \r
515 #if TWO_PATHS\r
516 /* get next available path index */\r
517 pathFlag = tcp3dInst->nextCodeBlockIndex;\r
518 if ( pathFlag )\r
519 {\r
520 if ( tcp3dInst->pongFreeCnt )\r
521 {\r
522 blockIndex = tcp3dInst->nextPongInIdx;\r
523 }\r
524 else if ( tcp3dInst->pingFreeCnt )\r
525 {\r
526 blockIndex = tcp3dInst->nextPingInIdx;\r
527 pathFlag = 0;\r
528 }\r
529 }\r
530 else\r
531 {\r
532 if ( tcp3dInst->pingFreeCnt )\r
533 {\r
534 blockIndex = tcp3dInst->nextPingInIdx;\r
535 }\r
536 else if ( tcp3dInst->pongFreeCnt )\r
537 {\r
538 blockIndex = tcp3dInst->nextPongInIdx;\r
539 pathFlag = 1;\r
540 }\r
541 }\r
542 \r
543 /* update the next path flag */\r
544 if ( pathFlag )\r
545 tcp3dInst->nextCodeBlockIndex = 0;\r
546 else\r
547 tcp3dInst->nextCodeBlockIndex = 1;\r
548 \r
549 /* add new block to the list until available capacity */\r
550 if ( tcp3dInst->pingFreeCnt || tcp3dInst->pongFreeCnt )\r
551 #else\r
552 /* path flag from the blockIndex value */\r
553 blockIndex = tcp3dInst->nextCodeBlockIndex;\r
554 pathFlag = (blockIndex & 1);\r
555 \r
556 /* add new block to the list until available capacity */\r
557 if ( ( ( pathFlag == 0 ) && tcp3dInst->pingFreeCnt ) ||\r
558 ( ( pathFlag == 1 ) && tcp3dInst->pongFreeCnt ) )\r
559 #endif\r
560 {\r
561 /* Update the pointers */\r
562 prmCfg = &tcp3dInst->pseudoParamBufPtr[blockIndex*TCP3D_DRV_LINK_CB];\r
563 prmLlr = prmCfg + LINK_CH_IDX_LLR;\r
564 prmHd = prmCfg + LINK_CH_IDX_HD;\r
565 prmSts = prmCfg + LINK_CH_IDX_STS;\r
566 prmSd = prmCfg + LINK_CH_IDX_SD;\r
567 \r
568 /**\r
569 * Update addresses first\r
570 */\r
571 prmCfg->srcAddr = (uint32_t) inputConfigPtr;\r
572 prmLlr->srcAddr = (uint32_t) llrPtr;\r
573 prmHd->destAddr = (uint32_t) hdPtr;\r
574 prmSts->destAddr = (uint32_t) statusPtr;\r
575 prmSd->destAddr = (uint32_t) sdPtr;\r
576 /**\r
577 * Update counts for needed\r
578 */\r
579 prmSd->aCnt = blockLength;\r
580 if ( ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
581 ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
582 {\r
583 prmLlr->aCnt = (blockLength>>1);\r
584 prmLlr->srcBIdx = (blockLength>>1);\r
585 prmLlr->srcCIdx = llrOffset;\r
586 prmHd->aCnt = (blockLength>>3);\r
587 prmSd->destBIdx = sdOffset;\r
588 }\r
589 else\r
590 {\r
591 prmLlr->aCnt = COMPUTE_KOUT(blockLength);\r
592 prmLlr->srcBIdx = llrOffset;\r
593 prmHd->aCnt = COMPUTE_HD_BYTE_SIZE(blockLength);\r
594 }\r
595 \r
596 /**\r
597 * Link Status & Soft decisions if avaiable.\r
598 * NOTE: For wrap-around case, load OPT & LINK fields with reset values\r
599 */\r
600 /* load HD OPT reset value */\r
601 prmHd->opt = tcp3dInst->resetHdOpt[pathFlag];\r
602 /* Check if STS is available */\r
603 if ( statusPtr != NULL )\r
604 {\r
605 /* update HD link */\r
606 prmHd->linkAddr = stsLink[pathFlag];\r
607 /* load STS OPT reset value */\r
608 prmSts->opt = tcp3dInst->resetStsOpt[pathFlag];\r
609 /* Check if SD is available */\r
610 if ( sdPtr != NULL )\r
611 {\r
612 /* load SD OPT reset value */\r
613 prmSd->opt = tcp3dInst->resetSdOpt[pathFlag];\r
614 /* update Status link */\r
615 prmSts->linkAddr = sdLink[pathFlag];\r
616 /* load SD link reset value */\r
617 prmSd->linkAddr = tcp3dInst->resetSdLink[pathFlag];\r
618 /* last param pointer */\r
619 lastOutPrm = prmSd;\r
620 }\r
621 else\r
622 {\r
623 /* link reset value */\r
624 prmSts->linkAddr = tcp3dInst->resetStsLink[pathFlag];\r
625 /* last param pointer */\r
626 lastOutPrm = prmSts;\r
627 }\r
628 }\r
629 else if ( sdPtr != NULL )\r
630 {\r
631 /* update HD link */\r
632 prmHd->linkAddr = sdLink[pathFlag];\r
633 /* load SD OPT reset value */\r
634 prmSd->opt = tcp3dInst->resetSdOpt[pathFlag];\r
635 /* load SD link reset value */\r
636 prmSd->linkAddr = tcp3dInst->resetSdLink[pathFlag];\r
637 /* last param pointer */\r
638 lastOutPrm = prmSd;\r
639 }\r
640 else\r
641 {\r
642 /* load HD link reset value */\r
643 prmHd->linkAddr = tcp3dInst->resetHdLink[pathFlag];\r
644 /* last param pointer */\r
645 lastOutPrm = prmHd;\r
646 }\r
647 \r
648 /* Add the WRAP param at the end of the output PaRAM */\r
649 if ( blockIndex >= (tcp3dInst->maxCodeBlocks-2) )\r
650 {\r
651 /* get the pointer for the wrap param for the appropriate path */\r
652 prmWrap = (EDMA3_DRV_PaRAMRegs *) wrapLink[pathFlag];\r
653 /* link with last out param */\r
654 lastOutPrm->linkAddr = 0xFFFF & wrapLink[pathFlag];\r
655 /* change the last param pointer */\r
656 lastOutPrm = prmWrap;\r
657 }\r
658 \r
659 /**\r
660 * If Interrupt nofication is requested, change the default link \r
661 * to LINK_CH_IDX_NTF for the last PaRAM.\r
662 */\r
663 if ( ntfEventFlag )\r
664 {\r
665 lastOutPrm->linkAddr = ntfLink[pathFlag];\r
666 }\r
667 \r
668 /**\r
669 * Chain the block to previous one in each path. This is done for blocks\r
670 * starting from the second one in each path.\r
671 * \r
672 * Since the blockIndex is tracking linearly the pseudo param buffer\r
673 * and ping & pong lists are used as interleaved lists, chaining is\r
674 * done starting from index 2 onwards till max.\r
675 */\r
676 if ( blockIndex > 1 )\r
677 {\r
678 /* Get the previous last output PaRAM, used in chaining */\r
679 prevLastPrmPtr = tcp3dInst->lastParam[pathFlag];\r
680 \r
681 /* Change the TCC to L2P */\r
682 CSL_FINS(prevLastPrmPtr->opt, TPCC_PARAM_OPT_TCC, l2pCh[pathFlag]);\r
683 \r
684 /**\r
685 * If previous block has notification, change the previous param\r
686 * link to NTFD, otherwise change to dummy REVT link PaRAM.\r
687 */\r
688 if ( tcp3dInst->prevNtfFlag[pathFlag] )\r
689 {\r
690 /* Change the LINK to interrupt Notify PaRAM */\r
691 prevLastPrmPtr->linkAddr = ntfdLink[pathFlag];\r
692 }\r
693 else\r
694 {\r
695 /* Change the LINK to dummy REVT PaRAM */\r
696 prevLastPrmPtr->linkAddr = revtLink[pathFlag];\r
697 }\r
698 }\r
699 \r
700 /* Store ntfEventFlag, used in chaining next block */\r
701 tcp3dInst->prevNtfFlag[pathFlag] = ntfEventFlag;\r
702 \r
703 /* Store the last output PaRAM, used in chaining next block */\r
704 tcp3dInst->lastParam[pathFlag] = lastOutPrm;\r
705 \r
706 /* Increment the ping/pong load counter */\r
707 if ( pathFlag )\r
708 {\r
709 tcp3dInst->pongLoadCnt++;\r
710 tcp3dInst->pongFreeCnt--;\r
711 tcp3dInst->nextPongInIdx += 2;\r
712 }\r
713 else\r
714 {\r
715 tcp3dInst->pingLoadCnt++;\r
716 tcp3dInst->pingFreeCnt--;\r
717 tcp3dInst->nextPingInIdx += 2;\r
718 }\r
719 \r
720 /* Reset index when reached maximum */\r
721 if ( tcp3dInst->nextPingInIdx > tcp3dInst->maxPingCbIdx )\r
722 {\r
723 tcp3dInst->nextPingInIdx = 0;\r
724 }\r
725 if ( tcp3dInst->nextPongInIdx > tcp3dInst->maxPongCbIdx )\r
726 {\r
727 tcp3dInst->nextPongInIdx = 1;\r
728 }\r
729 \r
730 #if !TWO_PATHS\r
731 /* Increment the index value until reaching the last block */\r
732 tcp3dInst->nextCodeBlockIndex++;\r
733 \r
734 /* Reset index when reached maximum */\r
735 if ( tcp3dInst->nextCodeBlockIndex >= tcp3dInst->maxCodeBlocks )\r
736 {\r
737 tcp3dInst->nextCodeBlockIndex = 0;\r
738 }\r
739 #endif\r
740 } /* if enqueue possible */\r
741 else\r
742 {\r
743 tcp3dResult = TCP3D_DRV_INPUT_LIST_FULL;\r
744 } /* if enqueue not possible */\r
745 \r
746 /* Call Start function as needed */\r
747 if ( ( tcp3dInst->startFlag ) &&\r
748 ( (tcp3dInst->pingStop) || (tcp3dInst->pongStop) ) )\r
749 {\r
750 tcp3dResult2 = Tcp3d_start(tcp3dInst, TCP3D_DRV_START_AUTO);\r
751 \r
752 /* If start returned an error, generate an error message. */\r
753 if ( TCP3D_DRV_NO_ERR != tcp3dResult2 )\r
754 {\r
755 Tcp3d_osalLog("Enqueue: Tcp3d_start function returned error with value : %d\n", tcp3dResult2);\r
756 }\r
757 }\r
758 \r
759 return ( tcp3dResult );\r
760 } /* end of - Tcp3d_enqueueCodeBlock() function */\r
761 \r
762 /**\r
763 * @brief This API could be used for starting the driver to start doing\r
764 * EDMA transfers to TCP3 decoder for decoding from the pseudo\r
765 * PaRAM list.\r
766 *\r
767 * This function is executed at the application task thread for\r
768 * starting either the PING or PONG path execution.\r
769 */\r
770 Tcp3d_Result Tcp3d_start ( INOUT Tcp3d_Instance *inst,\r
771 IN uint8_t startMode)\r
772 {\r
773 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
774 EDMA3_DRV_PaRAMRegs *currPrmPtr1, *currPrmPtr2;\r
775 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
776 uint16_t startNeeded = 0; /* 0 - not started, 1 - started */ \r
777 int32_t pingOutIdx, pongOutIdx;\r
778 \r
779 /* Set startFlag if first call to the function is made with AUTO mode */\r
780 if ( ( startMode == TCP3D_DRV_START_AUTO) && ( !inst->startFlag ) )\r
781 {\r
782 inst->startFlag = startMode;\r
783 }\r
784 \r
785 /**\r
786 * Return immediately, if both stop flags are not set.\r
787 * This is possible in two scenarios\r
788 * 1) After the init and before calling start with AUTO mode.\r
789 * 2) In steady state when both ping and pong decoders are busy. \r
790 */\r
791 if ( ( ( inst->pingStop == NULL ) && ( inst->pongStop == NULL ) ) ||\r
792 ( !inst->startFlag ) )\r
793 {\r
794 return ( tcp3dResult );\r
795 }\r
796 \r
797 /**\r
798 * Check startMode parameter to see if start needed\r
799 */\r
800 if ( startMode == TCP3D_DRV_START_AUTO )\r
801 {\r
802 /**\r
803 * Read the source address of L2P Channel PaRAM to get the current\r
804 * pseudo PaRAM pointer for PING/PONG paths. Then compare with the start\r
805 * pointer to get the out indexes.\r
806 */\r
807 currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
808 currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
809 pingOutIdx = GET_CB_IDX(currPrmPtr1 - inst->startPrmPtr);\r
810 pongOutIdx = GET_CB_IDX(currPrmPtr2 - inst->startPrmPtr);\r
811 \r
812 /* Update the counters and indexes using the current out indexes */\r
813 Tcp3d_updateListVariables( inst, pingOutIdx, pongOutIdx );\r
814 \r
815 /**\r
816 * Start is needed in the following cases.\r
817 * - if the current out index is less than next in index\r
818 * - if not, in the wrap case when blocks are loaded from beginning\r
819 * of the list where out index could be greater than next in index.\r
820 * Here check for the load count.\r
821 * \r
822 * Two LSB bits of the variable startNeeded are used for indicating the\r
823 * need to do start. LSB0 is used for PING and LSB1 is used for PONG. \r
824 */\r
825 /* PING STOP */\r
826 if ( inst->pingStop )\r
827 {\r
828 if ( pingOutIdx < inst->nextPingInIdx )\r
829 {\r
830 startNeeded |= 1;\r
831 }\r
832 else if ( inst->pingLoadCnt > 0 )\r
833 {\r
834 startNeeded |= 1;\r
835 }\r
836 }\r
837 \r
838 /* PING STOP */\r
839 if ( inst->pongStop )\r
840 {\r
841 if ( pongOutIdx < inst->nextPongInIdx )\r
842 {\r
843 startNeeded |= 2;\r
844 }\r
845 else if ( inst->pongLoadCnt > 0 )\r
846 {\r
847 startNeeded |= 2;\r
848 }\r
849 }\r
850 }\r
851 else if ( ( startMode == TCP3D_DRV_START_PING ) && ( inst->pingStop ) )\r
852 {\r
853 startNeeded |= 1;\r
854 }\r
855 else if ( ( startMode == TCP3D_DRV_START_PONG ) && ( inst->pongStop ) )\r
856 {\r
857 startNeeded |= 2;\r
858 }\r
859 \r
860 /* If LSB0 is set, start PING */\r
861 if ( startNeeded & 0x1 )\r
862 {\r
863 /**\r
864 * Clear the wrap adjust flags,\r
865 * when the last block decoding in the ping list is detected.\r
866 */\r
867 if (inst->pingLastOutFlag)\r
868 {\r
869 inst->pingLastOutFlag = 0;\r
870 inst->pingWrapCheck = 1;\r
871 }\r
872 \r
873 /* increment counter */\r
874 inst->pingStartCntr++;\r
875 /* Clear the stop flag */\r
876 inst->pingStop = 0;\r
877 /* Enable L2P channel in the PING path */\r
878 result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
879 inst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
880 EDMA3_DRV_TRIG_MODE_MANUAL);\r
881 }\r
882 \r
883 /* If LSB1 is set, start PONG */\r
884 if ( startNeeded & 0x2 )\r
885 {\r
886 /**\r
887 * Clear the wrap adjust flags,\r
888 * when the last block decoding in the pong list is detected.\r
889 */\r
890 if (inst->pongLastOutFlag)\r
891 {\r
892 inst->pongLastOutFlag = 0;\r
893 inst->pongWrapCheck = 1;\r
894 }\r
895 \r
896 /* increment counter */\r
897 inst->pongStartCntr++;\r
898 /* Clear the stop flag */\r
899 inst->pongStop = 0;\r
900 \r
901 /* Enable L2P channel in the PONG path */\r
902 result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
903 inst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
904 EDMA3_DRV_TRIG_MODE_MANUAL);\r
905 }\r
906 \r
907 /* Update the return status, if any EDMA starts fail */\r
908 if ( result != EDMA3_DRV_SOK )\r
909 {\r
910 tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
911 }\r
912 \r
913 /* Change the state to RUNNING, if start successful */\r
914 if ( ( startNeeded ) && ( result == EDMA3_DRV_SOK ) )\r
915 {\r
916 inst->state = TCP3D_DRV_STATE_RUNNING;\r
917 }\r
918 \r
919 return ( tcp3dResult );\r
920 \r
921 } /* end of - Tcp3d_start() function */\r
922 \r
923 /**\r
924 * @brief This API could be used for querying the TCP3D driver to get\r
925 * updates or take appropriate actions.\r
926 * \r
927 * \note This API is not fully scoped currently and the possible query\r
928 * commands and their actions are open as of now.\r
929 */\r
930 Tcp3d_Result Tcp3d_status ( IN Tcp3d_Instance *inst,\r
931 INOUT Tcp3d_Sts *drvStatus )\r
932 {\r
933 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
934 EDMA3_DRV_PaRAMRegs *currPrmPtr1, *currPrmPtr2;\r
935 \r
936 /* Check the control command */\r
937 switch ( drvStatus->cmd )\r
938 {\r
939 case TCP3D_DRV_GET_STATE :\r
940 /* Read state value from driver instance */\r
941 drvStatus->state = inst->state;\r
942 break;\r
943 \r
944 case TCP3D_DRV_GET_MIN_OUT_IDX:\r
945 /**\r
946 * Get the L2P Channel PaRAM address and then read the source\r
947 * address from the PaRAM to get the index to the pseudo PaRAM\r
948 * current read pointer.\r
949 * \r
950 * Compute the minimum index by comparing the current indexes with\r
951 * the pseudo PaRAM start pointer.\r
952 */\r
953 currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
954 currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
955 drvStatus->prmOutIdx = (MIN(currPrmPtr1, currPrmPtr2) - inst->startPrmPtr)>>2;\r
956 break;\r
957 \r
958 case TCP3D_DRV_GET_PING_OUT_IDX:\r
959 /**\r
960 * Read the source address of L2P Channel PaRAM to get the current\r
961 * pseudo PaRAM pointer for PING path. Then compare with the start\r
962 * pointer for the index.\r
963 */\r
964 currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
965 drvStatus->prmOutIdx = (currPrmPtr1 - inst->startPrmPtr)>>2;\r
966 break;\r
967 \r
968 case TCP3D_DRV_GET_PONG_OUT_IDX:\r
969 /**\r
970 * Read the source address of L2P Channel PaRAM to get the current\r
971 * pseudo PaRAM pointer for PONG path. Then compare with the start\r
972 * pointer for the index.\r
973 */\r
974 currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
975 drvStatus->prmOutIdx = (currPrmPtr2 - inst->startPrmPtr)>>2;\r
976 break;\r
977 \r
978 default:\r
979 /* If invalid command passed, flag error */\r
980 tcp3dResult = TCP3D_DRV_FAIL;\r
981 break;\r
982 }\r
983 \r
984 return (tcp3dResult);\r
985 \r
986 } /* end of - Tcp3d_status() function */\r
987 \r
988 /**\r
989 * \brief This API could be used for change or update the TCP3D driver\r
990 * instance values which are set during the init time.\r
991 * \r
992 * Currently, there are few commands supported with some the\r
993 * limitation that they are allowed only when the driver is in\r
994 * IDLE state.\r
995 * \r
996 * \note -# This API is not fully scoped currently and the possible\r
997 * control commands and their actions are open as of now.\r
998 * -# We may need to protect the instance value updations, once\r
999 * they are allowed to change in any state.\r
1000 */\r
1001 Tcp3d_Result Tcp3d_control (IN Tcp3d_Instance *inst,\r
1002 IN Tcp3d_Ctrl *drvCtrl)\r
1003 {\r
1004 Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
1005 \r
1006 /* Check the control command */\r
1007 switch ( drvCtrl->cmd )\r
1008 {\r
1009 case TCP3D_DRV_SET_L2P_INT :\r
1010 if ( drvCtrl->intrFlag )\r
1011 {\r
1012 Tcp3d_enableEdmaL2pIntr(inst);\r
1013 }\r
1014 else\r
1015 { \r
1016 Tcp3d_disableEdmaL2pIntr(inst);\r
1017 }\r
1018 break;\r
1019 case TCP3D_DRV_SET_REVT_INT :\r
1020 if ( drvCtrl->intrFlag )\r
1021 {\r
1022 Tcp3d_enableEdmaPauseIntr(inst);\r
1023 }\r
1024 else\r
1025 { \r
1026 Tcp3d_disableEdmaPauseIntr(inst);\r
1027 }\r
1028 break;\r
1029 \r
1030 case TCP3D_DRV_CLR_REVT_INT :\r
1031 Tcp3d_clearEdmaPauseIntr(inst);\r
1032 break;\r
1033 \r
1034 case TCP3D_DRV_SET_PING_L2P_INT :\r
1035 case TCP3D_DRV_SET_PONG_L2P_INT :\r
1036 case TCP3D_DRV_SET_PING_PAUSE_INT :\r
1037 case TCP3D_DRV_SET_PONG_PAUSE_INT :\r
1038 default:\r
1039 /* If invalid command passed, flag error */\r
1040 tcp3dResult = TCP3D_DRV_FAIL;\r
1041 break;\r
1042 }\r
1043 \r
1044 return (tcp3dResult);\r
1045 \r
1046 } /* end of - Tcp3d_control() function */\r
1047 \r
1048 /*******************************************************************************\r
1049 ******************************************************************************/\r
1050 static void Tcp3d_setLocalVariables (IN Tcp3d_Instance *tcp3dInst)\r
1051 {\r
1052 CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMACC_2_REGS;\r
1053 EDMA3_DRV_PaRAMRegs *prm;\r
1054 \r
1055 /* Set EDMA PaRAM pointers */\r
1056 tcp3dInst->startPrmPtr = (EDMA3_DRV_PaRAMRegs *) L2GLBMAP(tcp3dInst->coreId, \\r
1057 tcp3dInst->pseudoParamBufPtr);\r
1058 tcp3dInst->pingPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pingChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
1059 tcp3dInst->pongPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pongChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
1060 \r
1061 /* Store pointers for the end of list (PING starts first in the list)*/\r
1062 prm = &tcp3dInst->pseudoParamBufPtr[(tcp3dInst->maxCodeBlocks-2)*TCP3D_DRV_LINK_CB];\r
1063 if ( tcp3dInst->maxCodeBlocks % 1 )\r
1064 { /* even */\r
1065 tcp3dInst->endListParam[PING_INDEX] = prm;\r
1066 tcp3dInst->endListParam[PONG_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
1067 }\r
1068 else\r
1069 { /* odd */\r
1070 tcp3dInst->endListParam[PING_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
1071 tcp3dInst->endListParam[PONG_INDEX] = prm;\r
1072 }\r
1073 \r
1074 /**\r
1075 * Set interrupt enable/disable mask for channels using the shadow region\r
1076 * registers.\r
1077 */\r
1078 /* Get EDMA Controller shadow registers pointer */\r
1079 tcp3dInst->tpccShadowRegs = &tpcc2Regs->SHADOW[tcp3dInst->edmaRegionId];\r
1080 /* REVT channel mask and registers (for PAUSE interrupt) */\r
1081 tcp3dInst->pauseChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
1082 tcp3dInst->pauseChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
1083 if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] < 32 )\r
1084 {\r
1085 tcp3dInst->intEnClrReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
1086 tcp3dInst->intEnSetReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
1087 tcp3dInst->clrIntPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
1088 tcp3dInst->intPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
1089 }\r
1090 else\r
1091 {\r
1092 tcp3dInst->intEnClrReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
1093 tcp3dInst->intEnSetReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
1094 tcp3dInst->clrIntPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
1095 tcp3dInst->intPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
1096 }\r
1097 /* L2P channel mask and registers (for L2P interrupt) */\r
1098 tcp3dInst->l2pChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
1099 tcp3dInst->l2pChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
1100 if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] < 32 )\r
1101 {\r
1102 tcp3dInst->intEnClrReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
1103 tcp3dInst->intEnSetReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
1104 tcp3dInst->clrIntPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
1105 tcp3dInst->intPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
1106 }\r
1107 else\r
1108 {\r
1109 tcp3dInst->intEnClrReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
1110 tcp3dInst->intEnSetReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
1111 tcp3dInst->clrIntPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
1112 tcp3dInst->intPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
1113 }\r
1114 \r
1115 /* Clear countes */\r
1116 tcp3dInst->pingStartCntr = 0;\r
1117 tcp3dInst->pongStartCntr = 0;\r
1118 tcp3dInst->pingPauseEnCntr = 0;\r
1119 tcp3dInst->pingL2pEnCntr = 0;\r
1120 tcp3dInst->pingIntr = 0;\r
1121 tcp3dInst->pongIntr = 0;\r
1122 }\r
1123 \r
1124 static void Tcp3d_resetRuntimeVariables (IN Tcp3d_Instance *tcp3dInst)\r
1125 {\r
1126 /* Initialize the driver instace run-time variables */\r
1127 tcp3dInst->nextCodeBlockIndex = 0;\r
1128 tcp3dInst->pingStop = 1;\r
1129 tcp3dInst->pongStop = 1;\r
1130 tcp3dInst->startFlag = 0;\r
1131 tcp3dInst->prevNtfFlag[PING_INDEX] = 0;\r
1132 tcp3dInst->prevNtfFlag[PONG_INDEX] = 0;\r
1133 tcp3dInst->pingLoadCnt = 0;\r
1134 tcp3dInst->pongLoadCnt = 0;\r
1135 tcp3dInst->prevPingOutIdx = 0;\r
1136 tcp3dInst->prevPongOutIdx = 1;\r
1137 tcp3dInst->nextPingInIdx = 0;\r
1138 tcp3dInst->nextPongInIdx = 1;\r
1139 tcp3dInst->pingWrapCheck = 1;\r
1140 tcp3dInst->pongWrapCheck = 1;\r
1141 tcp3dInst->pingLastOutFlag = 0;\r
1142 tcp3dInst->pongLastOutFlag = 0;\r
1143 tcp3dInst->pingFreeCnt = tcp3dInst->maxPingCbCnt;\r
1144 tcp3dInst->pongFreeCnt = tcp3dInst->maxPongCbCnt;\r
1145 }\r
1146 \r
1147 static void Tcp3d_updateListVariables ( INOUT Tcp3d_Instance *inst,\r
1148 IN int32_t pingOutIdx,\r
1149 IN int32_t pongOutIdx )\r
1150 {\r
1151 int32_t indexDiff1, indexDiff2;\r
1152 \r
1153 /**\r
1154 * Load count adjustment is done following the steps described below.\r
1155 * \r
1156 * step1 : get index difference between current and previous indexes\r
1157 * step2 : convert the index difference to count\r
1158 * step3 : reduce the load count by index difference. It is possible that\r
1159 * the diffrence could be negative, which gets corrected after\r
1160 * step4 is completed.\r
1161 * step4 : wrap is detected, reduce the load count by maximum one time.\r
1162 * The wrap detection is done either of the cases.\r
1163 * 1) when index difference is negative\r
1164 * 2) the last block decoding is detected\r
1165 * \r
1166 * NOTES:\r
1167 * - At reset/init, checking for wrap is enabled.\r
1168 * - Once the adjustment is done, checking is disabled until the last\r
1169 * block decoding is done.\r
1170 */\r
1171 \r
1172 /* Adjust the loaded count - PING */\r
1173 /* step1 */\r
1174 indexDiff1 = ( pingOutIdx - inst->prevPingOutIdx );\r
1175 /* step2, step3 */\r
1176 inst->pingLoadCnt -= (indexDiff1>>1);\r
1177 /* step4 */\r
1178 if ( ( (indexDiff1 < 0) || (inst->pingLastOutFlag) ) && (inst->pingWrapCheck) )\r
1179 {\r
1180 inst->pingLoadCnt -= inst->maxPingCbCnt;\r
1181 inst->pingWrapCheck = 0;\r
1182 }\r
1183 \r
1184 /* Adjust the loaded count - PING */\r
1185 /* step1 */\r
1186 indexDiff2 = ( pongOutIdx - inst->prevPongOutIdx );\r
1187 /* step2, step3 */\r
1188 inst->pongLoadCnt -= (indexDiff2>>1);\r
1189 /* step4 */\r
1190 if ( ( (indexDiff2 < 0) || (inst->pongLastOutFlag) ) && (inst->pongWrapCheck) )\r
1191 {\r
1192 inst->pongLoadCnt -= inst->maxPongCbCnt;\r
1193 inst->pongWrapCheck = 0;\r
1194 }\r
1195 \r
1196 /* update free counts - can be negative */\r
1197 inst->pingFreeCnt = ( inst->maxPingCbCnt - inst->pingLoadCnt );\r
1198 inst->pongFreeCnt = ( inst->maxPongCbCnt - inst->pongLoadCnt );\r
1199 \r
1200 /* update previous out index */\r
1201 inst->prevPingOutIdx = pingOutIdx;\r
1202 inst->prevPongOutIdx = pongOutIdx;\r
1203 }\r
1204 \r
1205 /**\r
1206 * @brief Function to get the physical addresses of all the EDMA3 channels\r
1207 * used in TCP3D driver. \r
1208 */\r
1209 static EDMA3_DRV_Result Tcp3d_getEdmaChParamAddr(IN Tcp3d_Instance *tcp3dInst)\r
1210 { \r
1211 EDMA3_DRV_Result result = EDMA3_DRV_SOK; \r
1212 int32_t cnt;\r
1213 \r
1214 for ( cnt = 0; cnt < TCP3D_DRV_MAX_CH_PER_PATH; cnt++ )\r
1215 {\r
1216 /* Get PaRAM address for PING physical channel */ \r
1217 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1218 tcp3dInst->pingCh[cnt],\r
1219 &tcp3dInst->pingChParamAddr[cnt]);\r
1220 \r
1221 /* Get PaRAM address for PONG physical channel */ \r
1222 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1223 tcp3dInst->pongCh[cnt],\r
1224 &tcp3dInst->pongChParamAddr[cnt]);\r
1225 }\r
1226 \r
1227 for ( cnt = 0; cnt < (TCP3D_DRV_MAX_LINK_CH>>1); cnt++ )\r
1228 {\r
1229 /* Get PaRAM address for PING Link channel */ \r
1230 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1231 tcp3dInst->pingLinkCh[cnt],\r
1232 &tcp3dInst->pingLinkChParamAddr[cnt]);\r
1233 \r
1234 /* Get PaRAM address for PONG link channel */ \r
1235 result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
1236 tcp3dInst->pongLinkCh[cnt],\r
1237 &tcp3dInst->pongLinkChParamAddr[cnt]);\r
1238 }\r
1239 \r
1240 return ( result );\r
1241 \r
1242 } /* end of - Tcp3d_getEdmaChParamAddr() function */\r
1243 \r
1244 /**\r
1245 * @brief Enabling the Event triggered EDMA3 channels \r
1246 */\r
1247 static EDMA3_DRV_Result Tcp3d_enableEdmaChannels(Tcp3d_Instance *tcp3dInst)\r
1248 {\r
1249 EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
1250 \r
1251 /* Enable PING channels */\r
1252 result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
1253 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1254 EDMA3_DRV_TRIG_MODE_EVENT);\r
1255 \r
1256 /* Enable PoNG channels */\r
1257 result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
1258 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1259 EDMA3_DRV_TRIG_MODE_EVENT);\r
1260 \r
1261 return ( result );\r
1262 } /* end of - Tcp3d_enableEdmaChannels() function */ \r
1263 \r
1264 /**\r
1265 * @brief Initialize the EDMA channels PaRAM memory with default values\r
1266 */\r
1267 static EDMA3_DRV_Result Tcp3d_initEdmaChParam (IN Tcp3d_Instance *tcp3dInst)\r
1268 {\r
1269 EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0,0};\r
1270 EDMA3_DRV_PaRAMRegs *prm = ¶mSet;\r
1271 EDMA3_DRV_Result status = EDMA3_DRV_SOK;\r
1272 CSL_CPINTC_RegsOvly cpintc0Regs = (CSL_CPINTC_RegsOvly) CSL_CIC_0_REGS;\r
1273 \r
1274 /* Channel - REVT 0 (dummy PaRAM) */\r
1275 /* chain to REVT 0\r
1276 link to ping link cfg channel \r
1277 A-sync\r
1278 ACNT = 1\r
1279 BCNT = 0\r
1280 CCNT = 0\r
1281 scrBIDX = 0\r
1282 desBIDX = 0\r
1283 scrCIDX = 0\r
1284 desCIDX = 0 */\r
1285 /* Fill the PaRAM Set with transfer specific information */\r
1286 /* First set OPT field with appropriate values */\r
1287 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1288 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1289 CSL_EDMA3_TCCH_EN,\r
1290 CSL_EDMA3_ITCINT_DIS,\r
1291 CSL_EDMA3_TCINT_DIS,\r
1292 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1293 CSL_EDMA3_TCC_EARLY,\r
1294 CSL_EDMA3_FIFOWIDTH_NONE,\r
1295 CSL_EDMA3_STATIC_DIS,\r
1296 CSL_EDMA3_SYNC_A,\r
1297 CSL_EDMA3_ADDRMODE_INCR,\r
1298 CSL_EDMA3_ADDRMODE_INCR );\r
1299 #else\r
1300 prm->opt = 0;\r
1301 /* Enable Final transfer completion chain */\r
1302 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1303 /* Program the TCC */\r
1304 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1305 /* Early Trasfer Completion */\r
1306 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1307 /* A Sync Transfer Mode */\r
1308 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1309 /* Src & Dest are in INCR modes */\r
1310 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1311 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1312 #endif\r
1313 prm->srcAddr = NULL;\r
1314 prm->destAddr = NULL;\r
1315 prm->aCnt = 1;\r
1316 prm->bCnt = 0;\r
1317 prm->cCnt = 0;\r
1318 prm->bCntReload = 0;\r
1319 prm->srcBIdx = 0;\r
1320 prm->destBIdx = 0;\r
1321 prm->srcCIdx = 0;\r
1322 prm->destCIdx = 0;\r
1323 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1324 \r
1325 /* Now, write the PaRAM Set. */\r
1326 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1327 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1328 prm);\r
1329 \r
1330 /* Link Channel - set the reload Link PaRAM */\r
1331 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1332 tcp3dInst->pingLinkCh[LINK_CH_IDX_REVT],\r
1333 prm);\r
1334 \r
1335 /* Copy to use in reset function */\r
1336 memcpy(&tcp3dInst->revtPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1337 \r
1338 /* Channel - REVT 1 (dummy PaRAM) */\r
1339 /* chain to REVT 1\r
1340 link to ping link cfg channel \r
1341 A-sync\r
1342 ACNT = 1\r
1343 BCNT = 1\r
1344 CCNT = 1\r
1345 scrBIDX = 0\r
1346 desBIDX = 0\r
1347 scrCIDX = 0\r
1348 desCIDX = 0 */\r
1349 /* Fill the PaRAM Set with transfer specific information */\r
1350 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1351 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1352 \r
1353 /* Now, write the PaRAM Set. */\r
1354 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1355 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1356 prm);\r
1357 \r
1358 /* Link Channel - set the reload Link PaRAM */\r
1359 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1360 tcp3dInst->pongLinkCh[LINK_CH_IDX_REVT],\r
1361 prm);\r
1362 \r
1363 /* Copy to use in reset */\r
1364 memcpy(&tcp3dInst->revtPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1365 \r
1366 /* Channel - L2P 0 */\r
1367 /* chain to REVT 0\r
1368 link to ping link l2p channel \r
1369 AB-sync\r
1370 ACNT = 32\r
1371 BCNT = 4\r
1372 CCNT = pingNumCBs\r
1373 scrBIDX = 32\r
1374 desBIDX = 32\r
1375 scrCIDX = 32*4*2\r
1376 desCIDX = 0 */\r
1377 /* Fill the PaRAM Set with transfer specific information */\r
1378 /* Set OPT field with appropriate values */\r
1379 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1380 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_EN,\r
1381 CSL_EDMA3_TCCH_EN,\r
1382 CSL_EDMA3_ITCINT_DIS,\r
1383 CSL_EDMA3_TCINT_DIS,\r
1384 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1385 CSL_EDMA3_TCC_NORMAL,\r
1386 CSL_EDMA3_FIFOWIDTH_NONE,\r
1387 CSL_EDMA3_STATIC_DIS,\r
1388 CSL_EDMA3_SYNC_AB,\r
1389 CSL_EDMA3_ADDRMODE_INCR,\r
1390 CSL_EDMA3_ADDRMODE_INCR );\r
1391 #else\r
1392 prm->opt = 0;\r
1393 /* Enable Intermediate & Final transfer completion chain */\r
1394 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1395 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1396 /* Program the TCC */\r
1397 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1398 /* AB Sync Transfer Mode */\r
1399 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1400 /* Src & Dest are in INCR modes */\r
1401 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1402 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1403 #endif\r
1404 prm->srcAddr = NULL;\r
1405 prm->destAddr = (uint32_t)(tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1406 prm->aCnt = 32;\r
1407 prm->bCnt = TCP3D_DRV_LINK_CB;\r
1408 prm->cCnt = NULL;\r
1409 prm->bCntReload = TCP3D_DRV_LINK_CB;\r
1410 prm->srcBIdx = 32;\r
1411 prm->destBIdx = 32;\r
1412 prm->srcCIdx = (32<<1)*TCP3D_DRV_LINK_CB;\r
1413 prm->destCIdx = 0;\r
1414 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_L2P]);\r
1415 \r
1416 /* Now, write the PaRAM Set. */\r
1417 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1418 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1419 prm);\r
1420 \r
1421 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1422 tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
1423 prm);\r
1424 \r
1425 /* Copy to use in reset function */\r
1426 memcpy(&tcp3dInst->l2pPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1427 \r
1428 /* Channel - L2P 1 */\r
1429 /* chain to REVT 1\r
1430 link to ping link l2p channel \r
1431 AB-sync\r
1432 ACNT = 32\r
1433 BCNT = 4\r
1434 CCNT = pingNumCBs\r
1435 scrBIDX = 32\r
1436 desBIDX = 32\r
1437 scrCIDX = 32*4*2\r
1438 desCIDX = 0 */\r
1439 /* Fill the PaRAM Set with transfer specific information */\r
1440 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1441 prm->destAddr = (uint32_t)(tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
1442 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_L2P]);\r
1443 \r
1444 /* Now, write the PaRAM Set. */\r
1445 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1446 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
1447 prm);\r
1448 \r
1449 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1450 tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
1451 prm);\r
1452 \r
1453 /* Copy to use in reset function */\r
1454 memcpy(&tcp3dInst->l2pPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
1455 \r
1456 /* Link Channel - pause 0 */\r
1457 /* chain to REVT 0\r
1458 link to ping link revt channel \r
1459 AB-sync\r
1460 ACNT = 1\r
1461 BCNT = 2\r
1462 CCNT = 1 \r
1463 scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
1464 scrCIDX = 0\r
1465 desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
1466 desCIDX = 0 */\r
1467 /* Fill the PaRAM Set with transfer specific information */\r
1468 /* Set OPT field with appropriate values */\r
1469 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1470 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1471 CSL_EDMA3_TCCH_DIS,\r
1472 CSL_EDMA3_ITCINT_DIS,\r
1473 CSL_EDMA3_TCINT_EN,\r
1474 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1475 CSL_EDMA3_TCC_NORMAL,\r
1476 CSL_EDMA3_FIFOWIDTH_NONE,\r
1477 CSL_EDMA3_STATIC_DIS,\r
1478 CSL_EDMA3_SYNC_AB,\r
1479 CSL_EDMA3_ADDRMODE_INCR,\r
1480 CSL_EDMA3_ADDRMODE_INCR );\r
1481 #else\r
1482 prm->opt = 0;\r
1483 /* Enable Intermediate & Final transfer completion interrupt */\r
1484 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
1485 /* Program the TCC */\r
1486 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1487 /* AB Sync Transfer Mode */\r
1488 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1489 /* Src & Dest are in INCR modes */\r
1490 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1491 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1492 #endif\r
1493 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->constantOne);\r
1494 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingStop);\r
1495 prm->aCnt = 1;\r
1496 prm->bCnt = 2;\r
1497 prm->cCnt = 1;\r
1498 prm->bCntReload = 0;\r
1499 prm->srcBIdx = ((uint8_t *)&tcp3dInst->pauseState - &tcp3dInst->constantOne);\r
1500 prm->destBIdx = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pingStop);\r
1501 prm->srcCIdx = 0;\r
1502 prm->destCIdx = 0;\r
1503 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1504 \r
1505 /* Now, write the PaRAM Set. */\r
1506 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1507 tcp3dInst->pingLinkCh[LINK_CH_IDX_PAUSE],\r
1508 prm);\r
1509 \r
1510 /* Link Channel - pause 1 */\r
1511 /* chain to REVT 1\r
1512 link to ping link revt channel \r
1513 AB-sync\r
1514 ACNT = 1\r
1515 BCNT = 2\r
1516 CCNT = 1 \r
1517 scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
1518 scrCIDX = 0\r
1519 desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
1520 desCIDX = 0 */\r
1521 /* Fill the PaRAM Set with transfer specific information */\r
1522 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1523 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongStop);\r
1524 prm->destBIdx = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pongStop);\r
1525 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT]);\r
1526 \r
1527 /* Now, write the PaRAM Set. */\r
1528 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1529 tcp3dInst->pongLinkCh[LINK_CH_IDX_PAUSE],\r
1530 prm);\r
1531 \r
1532 /* Link Channel - INT 0 (notification PaRAM) */\r
1533 /* chain to REVT 0\r
1534 link to ping link cfg channel \r
1535 A-sync\r
1536 ACNT = 4\r
1537 BCNT = 1\r
1538 CCNT = 1\r
1539 scrBIDX = 0\r
1540 desBIDX = 0\r
1541 scrCIDX = 0\r
1542 desCIDX = 0 */\r
1543 /* Fill the PaRAM Set with transfer specific information */\r
1544 /* First set OPT field with appropriate values */\r
1545 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1546 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1547 CSL_EDMA3_TCCH_EN,\r
1548 CSL_EDMA3_ITCINT_DIS,\r
1549 CSL_EDMA3_TCINT_DIS,\r
1550 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1551 CSL_EDMA3_TCC_EARLY,\r
1552 CSL_EDMA3_FIFOWIDTH_NONE,\r
1553 CSL_EDMA3_STATIC_DIS,\r
1554 CSL_EDMA3_SYNC_A,\r
1555 CSL_EDMA3_ADDRMODE_INCR,\r
1556 CSL_EDMA3_ADDRMODE_INCR );\r
1557 #else\r
1558 prm->opt = 0;\r
1559 /* Enable Final transfer completion chain */\r
1560 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1561 /* Program the TCC */\r
1562 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1563 /* Early Trasfer Completion */\r
1564 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
1565 /* A Sync Transfer Mode */\r
1566 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1567 /* Src & Dest are in INCR modes */\r
1568 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1569 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1570 #endif\r
1571 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->notificationEventNum);\r
1572 prm->destAddr = (uint32_t)(&cpintc0Regs->STATUS_SET_INDEX_REG);\r
1573 prm->aCnt = 4;\r
1574 prm->bCnt = 1;\r
1575 prm->cCnt = 1;\r
1576 prm->bCntReload = 0;\r
1577 prm->srcBIdx = 0;\r
1578 prm->destBIdx = 0;\r
1579 prm->srcCIdx = 0;\r
1580 prm->destCIdx = 0;\r
1581 prm->linkAddr = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
1582 \r
1583 /* Now, write the PaRAM Set. */\r
1584 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1585 tcp3dInst->pingLinkCh[LINK_CH_IDX_NTF],\r
1586 prm);\r
1587 \r
1588 prm->linkAddr = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG];\r
1589 /* Now, write the PaRAM Set. */\r
1590 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1591 tcp3dInst->pingLinkCh[LINK_CH_IDX_NTFD],\r
1592 prm);\r
1593 \r
1594 /* Link Channel - INT 1 (notification PaRAM) */\r
1595 /* chain to REVT 1\r
1596 link to ping link cfg channel \r
1597 A-sync\r
1598 ACNT = 4\r
1599 BCNT = 1\r
1600 CCNT = 1\r
1601 scrBIDX = 0\r
1602 desBIDX = 0\r
1603 scrCIDX = 0\r
1604 desCIDX = 0 */\r
1605 /* Fill the PaRAM Set with transfer specific information */\r
1606 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1607 prm->linkAddr = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
1608 \r
1609 /* Now, write the PaRAM Set. */\r
1610 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1611 tcp3dInst->pongLinkCh[LINK_CH_IDX_NTF],\r
1612 prm);\r
1613 \r
1614 /* Now, write the PaRAM Set. */\r
1615 prm->linkAddr = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG];\r
1616 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1617 tcp3dInst->pongLinkCh[LINK_CH_IDX_NTFD],\r
1618 prm);\r
1619 \r
1620 /* Link Channel - Wrap 0 */\r
1621 /* chain to REVT 0\r
1622 link to ping link l2p channel \r
1623 A-sync\r
1624 ACNT = 4\r
1625 BCNT = 1\r
1626 CCNT = 1 \r
1627 scrBIDX = 0\r
1628 scrCIDX = 0\r
1629 desBIDX = 0\r
1630 desCIDX = 0 */\r
1631 /* Fill the PaRAM Set with transfer specific information */\r
1632 /* Set OPT field with appropriate values */\r
1633 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1634 prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1635 CSL_EDMA3_TCCH_EN,\r
1636 CSL_EDMA3_ITCINT_DIS,\r
1637 CSL_EDMA3_TCINT_DIS,\r
1638 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1639 CSL_EDMA3_TCC_NORMAL,\r
1640 CSL_EDMA3_FIFOWIDTH_NONE,\r
1641 CSL_EDMA3_STATIC_DIS,\r
1642 CSL_EDMA3_SYNC_A,\r
1643 CSL_EDMA3_ADDRMODE_INCR,\r
1644 CSL_EDMA3_ADDRMODE_INCR );\r
1645 #else\r
1646 prm->opt = 0;\r
1647 /* Enable Final transfer completion chain */\r
1648 prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1649 /* Program the TCC */\r
1650 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1651 /* A Sync Transfer Mode */\r
1652 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1653 /* Src & Dest are in INCR modes */\r
1654 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1655 prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1656 #endif\r
1657 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPingCbCnt);\r
1658 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingLastOutFlag);\r
1659 prm->aCnt = 4;\r
1660 prm->bCnt = 1;\r
1661 prm->cCnt = 1;\r
1662 prm->bCntReload = 0;\r
1663 prm->srcBIdx = 0;\r
1664 prm->destBIdx = 0;\r
1665 prm->srcCIdx = 0;\r
1666 prm->destCIdx = 0;\r
1667 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1668 \r
1669 /* Now, write the PaRAM Set. */\r
1670 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1671 tcp3dInst->pingLinkCh[LINK_CH_IDX_WRAP],\r
1672 prm);\r
1673 \r
1674 /* Link Channel - Wrap 1 */\r
1675 /* chain to REVT 1\r
1676 link to ping link l2p channel \r
1677 A-sync\r
1678 ACNT = 4\r
1679 BCNT = 1\r
1680 CCNT = 1 \r
1681 scrBIDX = 0\r
1682 scrCIDX = 0\r
1683 desBIDX = 0\r
1684 desCIDX = 0 */\r
1685 /* Fill the PaRAM Set with transfer specific information */\r
1686 CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1687 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPongCbCnt);\r
1688 prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongLastOutFlag);\r
1689 prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1690 \r
1691 /* Now, write the PaRAM Set. */\r
1692 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1693 tcp3dInst->pongLinkCh[LINK_CH_IDX_WRAP],\r
1694 prm);\r
1695 \r
1696 return ( status );\r
1697 \r
1698 } /* end of - Tcp3d_initEdmaChParam() function */\r
1699 \r
1700 /**\r
1701 * @brief Resets the the EDMA channels PaRAM memory with default values\r
1702 */\r
1703 static EDMA3_DRV_Result Tcp3d_resetEdmaChParam( IN Tcp3d_Instance *tcp3dInst,\r
1704 IN uint32_t pingNumCBs,\r
1705 IN uint32_t pongNumCBs)\r
1706 {\r
1707 EDMA3_DRV_Result status = EDMA3_DRV_SOK;\r
1708 EDMA3_DRV_PaRAMRegs *prm;\r
1709 \r
1710 /* L2P 0 */\r
1711 prm = &tcp3dInst->l2pPrm[PING_INDEX];\r
1712 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[0]);\r
1713 prm->cCnt = pingNumCBs;\r
1714 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1715 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
1716 prm);\r
1717 \r
1718 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1719 tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
1720 prm);\r
1721 \r
1722 /* L2P 1 */\r
1723 prm = &tcp3dInst->l2pPrm[PONG_INDEX];\r
1724 prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[TCP3D_DRV_LINK_CB]);\r
1725 prm->cCnt = pongNumCBs;\r
1726 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1727 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
1728 prm);\r
1729 \r
1730 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1731 tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
1732 prm);\r
1733 \r
1734 /* REVT 0 */\r
1735 prm = &tcp3dInst->revtPrm[PING_INDEX];\r
1736 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1737 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1738 prm);\r
1739 \r
1740 /* REVT 1 */\r
1741 prm = &tcp3dInst->revtPrm[PONG_INDEX];\r
1742 status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
1743 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1744 prm);\r
1745 \r
1746 return ( status );\r
1747 \r
1748 } /* end of - Tcp3d_resetEdmaChParam() function */\r
1749 \r
1750 /**\r
1751 * @brief Initialize the Pseudo PaRAM memory with default values\r
1752 */\r
1753 static void Tcp3d_initPseudoParam ( IN Tcp3d_Instance *tcp3dInst,\r
1754 IN uint32_t codeBlocks,\r
1755 IN Tcp3d_Config *pingConfig,\r
1756 IN Tcp3d_Config *pongConfig)\r
1757 {\r
1758 int32_t cnt, flag;\r
1759 EDMA3_DRV_PaRAMRegs prmSet[TCP3D_DRV_LINK_CB];\r
1760 EDMA3_DRV_PaRAMRegs *prm;\r
1761 uint8_t mode = tcp3dInst->mode;\r
1762 uint32_t incfgOpt[2];\r
1763 uint32_t incfgLink[2];\r
1764 uint32_t incfgStartAddress[2];\r
1765 uint32_t stsOpt[2];\r
1766 uint32_t stsLink[2];\r
1767 uint32_t stsStartAddress[2];\r
1768 uint32_t hdOpt[2];\r
1769 uint32_t hdLink[2];\r
1770 uint32_t hdStartAddress[2];\r
1771 uint32_t llrOpt[2];\r
1772 uint32_t llrLink[2];\r
1773 uint32_t llrStartAddress[2];\r
1774 uint32_t sdOpt[2];\r
1775 uint32_t sdLink[2];\r
1776 uint32_t sdStartAddress[2];\r
1777 \r
1778 incfgStartAddress[PING_INDEX] = pingConfig->inCfgStart;\r
1779 incfgStartAddress[PONG_INDEX] = pongConfig->inCfgStart;\r
1780 \r
1781 incfgLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_LLR]);\r
1782 incfgLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_LLR]);\r
1783 \r
1784 llrStartAddress[PING_INDEX] = pingConfig->llrStart;\r
1785 llrStartAddress[PONG_INDEX] = pongConfig->llrStart;\r
1786 \r
1787 llrLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_HD]);\r
1788 llrLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_HD]);\r
1789 \r
1790 hdStartAddress[PING_INDEX] = pingConfig->hdStart;\r
1791 hdStartAddress[PONG_INDEX] = pongConfig->hdStart;\r
1792 \r
1793 hdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1794 hdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1795 \r
1796 stsStartAddress[PING_INDEX] = pingConfig->stsStart;\r
1797 stsStartAddress[PONG_INDEX] = pongConfig->stsStart;\r
1798 \r
1799 stsLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1800 stsLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1801 \r
1802 sdStartAddress[PING_INDEX] = pingConfig->sdStart;\r
1803 sdStartAddress[PONG_INDEX] = pongConfig->sdStart;\r
1804 \r
1805 sdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1806 sdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
1807 \r
1808 /**\r
1809 * INCFG Ping & Pong - fill all the initial values\r
1810 */\r
1811 /* chain to REVT\r
1812 link to link llr channel \r
1813 A-sync\r
1814 ACNT = 60\r
1815 BCNT = 1\r
1816 CCNT = 1\r
1817 scrBIDX = 0\r
1818 desBIDX = 0\r
1819 scrCIDX = 0\r
1820 desCIDX = 0 */\r
1821 /* Set OPT field with appropriate values */\r
1822 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1823 incfgOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1824 CSL_EDMA3_TCCH_EN,\r
1825 CSL_EDMA3_ITCINT_DIS,\r
1826 CSL_EDMA3_TCINT_DIS,\r
1827 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1828 CSL_EDMA3_TCC_NORMAL,\r
1829 CSL_EDMA3_FIFOWIDTH_NONE,\r
1830 CSL_EDMA3_STATIC_DIS,\r
1831 CSL_EDMA3_SYNC_A,\r
1832 CSL_EDMA3_ADDRMODE_INCR,\r
1833 CSL_EDMA3_ADDRMODE_INCR );\r
1834 \r
1835 incfgOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1836 CSL_EDMA3_TCCH_EN,\r
1837 CSL_EDMA3_ITCINT_DIS,\r
1838 CSL_EDMA3_TCINT_DIS,\r
1839 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1840 CSL_EDMA3_TCC_NORMAL,\r
1841 CSL_EDMA3_FIFOWIDTH_NONE,\r
1842 CSL_EDMA3_STATIC_DIS,\r
1843 CSL_EDMA3_SYNC_A,\r
1844 CSL_EDMA3_ADDRMODE_INCR,\r
1845 CSL_EDMA3_ADDRMODE_INCR );\r
1846 #else\r
1847 incfgOpt[PING_INDEX] = 0;\r
1848 /* Src & Dest are in INCR modes */\r
1849 incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1850 incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1851 /* Program the TCC */\r
1852 CSL_FINS(incfgOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1853 /* Enable Final transfer completion chain */\r
1854 incfgOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1855 /* A Sync Transfer Mode */\r
1856 incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1857 \r
1858 incfgOpt[PONG_INDEX] = 0;\r
1859 /* Src & Dest are in INCR modes */\r
1860 incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1861 incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1862 /* Program the TCC */\r
1863 CSL_FINS(incfgOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1864 /* Enable Final transfer completion chain */\r
1865 incfgOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
1866 /* AB Sync Transfer Mode */\r
1867 incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1868 #endif\r
1869 prm = &prmSet[LINK_CH_IDX_INCFG];\r
1870 prm->srcAddr = NULL;\r
1871 prm->aCnt = 60;\r
1872 prm->bCnt = 1;\r
1873 prm->cCnt = 1;\r
1874 prm->bCntReload = 0;\r
1875 prm->srcBIdx = 0;\r
1876 prm->destBIdx = 0;\r
1877 prm->srcCIdx = 0;\r
1878 prm->destCIdx = 0;\r
1879 \r
1880 /**\r
1881 * LLR Ping & Pong - fill all the initial values\r
1882 */\r
1883 /* chain to REVT\r
1884 link to link hd channel \r
1885 AB-sync\r
1886 ACNT = NULL (updated during enque operation)\r
1887 BCNT = NULL (updated during enque operation)\r
1888 CCNT = NULL (updated during enque operation)\r
1889 scrBIDX = 0\r
1890 desBIDX = 0\r
1891 scrCIDX = 0\r
1892 desCIDX = 0 */\r
1893 /* Set OPT field with appropriate values */\r
1894 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1895 llrOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1896 CSL_EDMA3_TCCH_DIS,\r
1897 CSL_EDMA3_ITCINT_DIS,\r
1898 CSL_EDMA3_TCINT_DIS,\r
1899 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1900 CSL_EDMA3_TCC_NORMAL,\r
1901 CSL_EDMA3_FIFOWIDTH_NONE,\r
1902 CSL_EDMA3_STATIC_DIS,\r
1903 CSL_EDMA3_SYNC_AB,\r
1904 CSL_EDMA3_ADDRMODE_INCR,\r
1905 CSL_EDMA3_ADDRMODE_INCR );\r
1906 \r
1907 llrOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1908 CSL_EDMA3_TCCH_DIS,\r
1909 CSL_EDMA3_ITCINT_DIS,\r
1910 CSL_EDMA3_TCINT_DIS,\r
1911 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1912 CSL_EDMA3_TCC_NORMAL,\r
1913 CSL_EDMA3_FIFOWIDTH_NONE,\r
1914 CSL_EDMA3_STATIC_DIS,\r
1915 CSL_EDMA3_SYNC_AB,\r
1916 CSL_EDMA3_ADDRMODE_INCR,\r
1917 CSL_EDMA3_ADDRMODE_INCR );\r
1918 #else\r
1919 llrOpt[PING_INDEX] = 0;\r
1920 /* Src & Dest are in INCR modes */\r
1921 llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1922 llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1923 /* Program the TCC */\r
1924 CSL_FINS(llrOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
1925 /* Enable Intermediate & Final transfer completion chain */\r
1926 llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1927 /* AB Sync Transfer Mode */\r
1928 llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1929 \r
1930 llrOpt[PONG_INDEX] = 0;\r
1931 /* Src & Dest are in INCR modes */\r
1932 llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
1933 llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
1934 /* Program the TCC */\r
1935 CSL_FINS(llrOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
1936 /* Enable Intermediate & Final transfer completion chain */\r
1937 llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1938 /* AB Sync Transfer Mode */\r
1939 llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
1940 #endif\r
1941 prm = &prmSet[LINK_CH_IDX_LLR];\r
1942 prm->srcAddr = NULL;\r
1943 prm->aCnt = NULL;\r
1944 prm->bCntReload = 0;\r
1945 if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
1946 ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
1947 {\r
1948 prm->bCnt = 2;\r
1949 prm->cCnt = 3;\r
1950 prm->srcBIdx = NULL;\r
1951 prm->destBIdx = 0x1000;\r
1952 prm->srcCIdx = NULL;\r
1953 prm->destCIdx = 0x2000;\r
1954 }\r
1955 else\r
1956 {\r
1957 prm->bCnt = 3;\r
1958 prm->cCnt = 1;\r
1959 prm->srcBIdx = NULL;\r
1960 prm->destBIdx = 0x2000;\r
1961 prm->srcCIdx = 0;\r
1962 prm->destCIdx = 0;\r
1963 llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1964 llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
1965 }\r
1966 \r
1967 /**\r
1968 * HD Ping & Pong - fill all the initial values\r
1969 */\r
1970 /* chain to REVT\r
1971 link to link pause channel \r
1972 A-sync\r
1973 ACNT = NULL (updated during enque operation)\r
1974 BCNT = 1\r
1975 CCNT = 1\r
1976 scrBIDX = 0\r
1977 desBIDX = 0\r
1978 scrCIDX = 0\r
1979 desCIDX = 0 */\r
1980 /* Set OPT field with appropriate values */\r
1981 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
1982 hdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1983 CSL_EDMA3_TCCH_EN,\r
1984 CSL_EDMA3_ITCINT_DIS,\r
1985 CSL_EDMA3_TCINT_DIS,\r
1986 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
1987 CSL_EDMA3_TCC_NORMAL,\r
1988 CSL_EDMA3_FIFOWIDTH_NONE,\r
1989 CSL_EDMA3_STATIC_DIS,\r
1990 CSL_EDMA3_SYNC_A,\r
1991 CSL_EDMA3_ADDRMODE_INCR,\r
1992 CSL_EDMA3_ADDRMODE_INCR );\r
1993 \r
1994 hdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
1995 CSL_EDMA3_TCCH_EN,\r
1996 CSL_EDMA3_ITCINT_DIS,\r
1997 CSL_EDMA3_TCINT_DIS,\r
1998 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
1999 CSL_EDMA3_TCC_NORMAL,\r
2000 CSL_EDMA3_FIFOWIDTH_NONE,\r
2001 CSL_EDMA3_STATIC_DIS,\r
2002 CSL_EDMA3_SYNC_A,\r
2003 CSL_EDMA3_ADDRMODE_INCR,\r
2004 CSL_EDMA3_ADDRMODE_INCR );\r
2005 #else\r
2006 hdOpt[PING_INDEX] = 0;\r
2007 /* Src & Dest are in INCR modes */\r
2008 hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2009 hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2010 /* Program the TCC */\r
2011 CSL_FINS(hdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2012 /* Enable Intermediate & Final transfer completion chain */\r
2013 hdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2014 /* A Sync Transfer Mode */\r
2015 hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2016 \r
2017 hdOpt[PONG_INDEX] = 0;\r
2018 /* Src & Dest are in INCR modes */\r
2019 hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2020 hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2021 /* Program the TCC */\r
2022 CSL_FINS(hdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2023 /* Enable Intermediate & Final transfer completion chain */\r
2024 hdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2025 /* A Sync Transfer Mode */\r
2026 hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2027 #endif\r
2028 prm = &prmSet[LINK_CH_IDX_HD];\r
2029 prm->destAddr = NULL;\r
2030 prm->aCnt = NULL;\r
2031 prm->bCnt = 1;\r
2032 prm->cCnt = 1;\r
2033 prm->bCntReload = 0;\r
2034 prm->srcBIdx = 0;\r
2035 prm->destBIdx = 0;\r
2036 prm->srcCIdx = 0;\r
2037 prm->destCIdx = 0;\r
2038 \r
2039 /**\r
2040 * STS Ping & Pong - fill all the initial values\r
2041 */\r
2042 /* chain to REVT\r
2043 link to link sd channel \r
2044 A-sync\r
2045 ACNT = 12\r
2046 BCNT = 1\r
2047 CCNT = 1\r
2048 scrBIDX = 0\r
2049 desBIDX = 0\r
2050 scrCIDX = 0\r
2051 desCIDX = 0 */\r
2052 /* Set OPT field with appropriate values */\r
2053 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2054 stsOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2055 CSL_EDMA3_TCCH_EN,\r
2056 CSL_EDMA3_ITCINT_DIS,\r
2057 CSL_EDMA3_TCINT_DIS,\r
2058 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2059 CSL_EDMA3_TCC_NORMAL,\r
2060 CSL_EDMA3_FIFOWIDTH_NONE,\r
2061 CSL_EDMA3_STATIC_DIS,\r
2062 CSL_EDMA3_SYNC_A,\r
2063 CSL_EDMA3_ADDRMODE_INCR,\r
2064 CSL_EDMA3_ADDRMODE_INCR );\r
2065 \r
2066 stsOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2067 CSL_EDMA3_TCCH_EN,\r
2068 CSL_EDMA3_ITCINT_DIS,\r
2069 CSL_EDMA3_TCINT_DIS,\r
2070 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2071 CSL_EDMA3_TCC_NORMAL,\r
2072 CSL_EDMA3_FIFOWIDTH_NONE,\r
2073 CSL_EDMA3_STATIC_DIS,\r
2074 CSL_EDMA3_SYNC_A,\r
2075 CSL_EDMA3_ADDRMODE_INCR,\r
2076 CSL_EDMA3_ADDRMODE_INCR );\r
2077 #else\r
2078 stsOpt[PING_INDEX] = 0;\r
2079 /* Src & Dest are in INCR modes */\r
2080 stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2081 stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2082 /* Program the TCC */\r
2083 CSL_FINS(stsOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2084 /* Enable Final transfer completion chain */\r
2085 stsOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2086 /* A Sync Transfer Mode */\r
2087 stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2088 \r
2089 stsOpt[PONG_INDEX] = 0;\r
2090 /* Src & Dest are in INCR modes */\r
2091 stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2092 stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2093 /* Program the TCC */\r
2094 CSL_FINS(stsOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2095 /* Enable Final transfer completion chain */\r
2096 stsOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2097 /* A Sync Transfer Mode */\r
2098 stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2099 #endif\r
2100 prm = &prmSet[LINK_CH_IDX_STS];\r
2101 prm->destAddr = NULL;\r
2102 prm->aCnt = 12;\r
2103 prm->bCnt = 1;\r
2104 prm->cCnt = 1;\r
2105 prm->bCntReload = 0;\r
2106 prm->srcBIdx = 0;\r
2107 prm->destBIdx = 0;\r
2108 prm->srcCIdx = 0;\r
2109 prm->destCIdx = 0;\r
2110 \r
2111 /**\r
2112 * SD Ping & Pong - fill all the initial values\r
2113 */\r
2114 /* chain to REVT\r
2115 link to link pause channel \r
2116 A-sync / AB-sync based on mode\r
2117 ACNT = NULL (updated during enque operation)\r
2118 BCNT = 1/3 based on mode \r
2119 CCNT = 1\r
2120 scrBIDX = 0\r
2121 desBIDX = 0\r
2122 scrCIDX = 0\r
2123 desCIDX = 0 */\r
2124 /* Set OPT field with appropriate values */\r
2125 #if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
2126 sdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2127 CSL_EDMA3_TCCH_EN,\r
2128 CSL_EDMA3_ITCINT_DIS,\r
2129 CSL_EDMA3_TCINT_DIS,\r
2130 tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
2131 CSL_EDMA3_TCC_NORMAL,\r
2132 CSL_EDMA3_FIFOWIDTH_NONE,\r
2133 CSL_EDMA3_STATIC_DIS,\r
2134 CSL_EDMA3_SYNC_A,\r
2135 CSL_EDMA3_ADDRMODE_INCR,\r
2136 CSL_EDMA3_ADDRMODE_INCR );\r
2137 \r
2138 sdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
2139 CSL_EDMA3_TCCH_EN,\r
2140 CSL_EDMA3_ITCINT_DIS,\r
2141 CSL_EDMA3_TCINT_DIS,\r
2142 tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
2143 CSL_EDMA3_TCC_NORMAL,\r
2144 CSL_EDMA3_FIFOWIDTH_NONE,\r
2145 CSL_EDMA3_STATIC_DIS,\r
2146 CSL_EDMA3_SYNC_A,\r
2147 CSL_EDMA3_ADDRMODE_INCR,\r
2148 CSL_EDMA3_ADDRMODE_INCR );\r
2149 #else\r
2150 sdOpt[PING_INDEX] = 0;\r
2151 /* Src & Dest are in INCR modes */\r
2152 sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2153 sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2154 /* Program the TCC */\r
2155 CSL_FINS(sdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
2156 /* Enable Intermediate & Final transfer completion chain */\r
2157 sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2158 /* A Sync Transfer Mode */\r
2159 sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2160 \r
2161 sdOpt[PONG_INDEX] = 0;\r
2162 /* Src & Dest are in INCR modes */\r
2163 sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
2164 sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
2165 /* Program the TCC */\r
2166 CSL_FINS(sdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
2167 /* Enable Intermediate & Final transfer completion chain */\r
2168 sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
2169 /* A Sync Transfer Mode */\r
2170 sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2171 #endif\r
2172 prm = &prmSet[LINK_CH_IDX_SD];\r
2173 prm->destAddr = NULL;\r
2174 prm->aCnt = NULL;\r
2175 prm->cCnt = 1;\r
2176 prm->bCntReload = 0;\r
2177 prm->srcCIdx = 0;\r
2178 prm->destCIdx = 0;\r
2179 if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
2180 ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
2181 {\r
2182 prm->bCnt = 3;\r
2183 prm->srcBIdx = 0x2000;\r
2184 prm->destBIdx = NULL;\r
2185 sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2186 sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
2187 }\r
2188 else\r
2189 {\r
2190 prm->bCnt = 1;\r
2191 prm->srcBIdx = 0;\r
2192 prm->destBIdx = 0;\r
2193 }\r
2194 \r
2195 for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
2196 {\r
2197 flag = cnt & 1;\r
2198 \r
2199 prm = &prmSet[LINK_CH_IDX_INCFG];\r
2200 prm->opt = incfgOpt[flag];\r
2201 prm->destAddr = incfgStartAddress[flag];\r
2202 prm->linkAddr = incfgLink[flag];\r
2203 \r
2204 prm = &prmSet[LINK_CH_IDX_LLR];\r
2205 prm->opt = llrOpt[flag];\r
2206 prm->destAddr = llrStartAddress[flag];\r
2207 prm->linkAddr = llrLink[flag];\r
2208 \r
2209 prm = &prmSet[LINK_CH_IDX_STS];\r
2210 prm->opt = stsOpt[flag];\r
2211 prm->srcAddr = stsStartAddress[flag];\r
2212 prm->linkAddr = stsLink[flag];\r
2213 \r
2214 prm = &prmSet[LINK_CH_IDX_HD];\r
2215 prm->opt = hdOpt[flag];\r
2216 prm->srcAddr = hdStartAddress[flag];\r
2217 prm->linkAddr = hdLink[flag];\r
2218 \r
2219 prm = &prmSet[LINK_CH_IDX_SD];\r
2220 prm->opt = sdOpt[flag];\r
2221 prm->srcAddr = sdStartAddress[flag];\r
2222 prm->linkAddr = sdLink[flag];\r
2223 \r
2224 memcpy(&tcp3dInst->pseudoParamBufPtr[cnt*TCP3D_DRV_LINK_CB], &prmSet[0], 32*TCP3D_DRV_LINK_CB);\r
2225 \r
2226 } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
2227 \r
2228 /* Store the lastOpt & lastLink values for use in enque function */\r
2229 tcp3dInst->resetHdOpt[PING_INDEX] = hdOpt[PING_INDEX];\r
2230 tcp3dInst->resetHdOpt[PONG_INDEX] = hdOpt[PONG_INDEX];\r
2231 tcp3dInst->resetHdLink[PING_INDEX] = hdLink[PING_INDEX];\r
2232 tcp3dInst->resetHdLink[PONG_INDEX] = hdLink[PONG_INDEX];\r
2233 \r
2234 tcp3dInst->resetStsOpt[PING_INDEX] = stsOpt[PING_INDEX];\r
2235 tcp3dInst->resetStsOpt[PONG_INDEX] = stsOpt[PONG_INDEX];\r
2236 tcp3dInst->resetStsLink[PING_INDEX] = stsLink[PING_INDEX];\r
2237 tcp3dInst->resetStsLink[PONG_INDEX] = stsLink[PONG_INDEX];\r
2238 \r
2239 tcp3dInst->resetSdOpt[PING_INDEX] = sdOpt[PING_INDEX];\r
2240 tcp3dInst->resetSdOpt[PONG_INDEX] = sdOpt[PONG_INDEX];\r
2241 tcp3dInst->resetSdLink[PING_INDEX] = sdLink[PING_INDEX];\r
2242 tcp3dInst->resetSdLink[PONG_INDEX] = sdLink[PONG_INDEX];\r
2243 } /* end of - Tcp3d_initPseudoParam() function */\r
2244 \r
2245 /**\r
2246 * @brief Resets Pseudo PaRAM memory with default values\r
2247 */\r
2248 static void Tcp3d_resetPseudoParam (IN Tcp3d_Instance *tcp3dInst,\r
2249 IN uint32_t codeBlocks)\r
2250 {\r
2251 int32_t cnt;\r
2252 EDMA3_DRV_PaRAMRegs *prm1 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_HD];\r
2253 EDMA3_DRV_PaRAMRegs *prm2 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_STS];\r
2254 EDMA3_DRV_PaRAMRegs *prm3 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_SD];\r
2255 \r
2256 for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
2257 {\r
2258 prm1->opt = tcp3dInst->resetHdOpt[cnt & 1];\r
2259 prm1->linkAddr = tcp3dInst->resetHdLink[cnt & 1];\r
2260 prm2->opt = tcp3dInst->resetStsOpt[cnt & 1];\r
2261 prm2->linkAddr = tcp3dInst->resetStsLink[cnt & 1];\r
2262 prm3->opt = tcp3dInst->resetSdOpt[cnt & 1];\r
2263 prm3->linkAddr = tcp3dInst->resetSdLink[cnt & 1];\r
2264 \r
2265 prm1 +=TCP3D_DRV_LINK_CB;\r
2266 prm2 +=TCP3D_DRV_LINK_CB;\r
2267 prm3 +=TCP3D_DRV_LINK_CB;\r
2268 } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
2269 } /* end of - Tcp3d_resetPseudoParam() function */\r
2270 \r
2271 /**\r
2272 * @b Description\r
2273 * @n \r
2274 * The function is used to get the version information of the TCP3D Driver.\r
2275 *\r
2276 * @retval\r
2277 * Version Information.\r
2278 */\r
2279 uint32_t Tcp3d_getVersion (void)\r
2280 {\r
2281 return TCP3D_DRV_VERSION_ID;\r
2282 }\r
2283 \r
2284 /**\r
2285 * @b Description\r
2286 * @n \r
2287 * The function is used to get the version string for the TCP3D Driver.\r
2288 *\r
2289 * @retval\r
2290 * Version String.\r
2291 */\r
2292 const char* Tcp3d_getVersionStr (void)\r
2293 {\r
2294 return Tcp3dDrvVersionStr;\r
2295 }\r
2296 \r
2297 /* end of file */\r