| author | Ravi Sankar Korada <korada@ti.com> | |
| Wed, 1 Aug 2012 21:06:44 +0000 (17:06 -0400) | ||
| committer | Ravi Sankar Korada <korada@ti.com> | |
| Wed, 1 Aug 2012 21:06:44 +0000 (17:06 -0400) |
1044 files changed:
diff --git a/Settings.xdc.xdt b/Settings.xdc.xdt
--- /dev/null
+++ b/Settings.xdc.xdt
@@ -0,0 +1,23 @@
+%%{\r
+/*!\r
+ * This template implements the Settings.xdc\r
+ */ \r
+ /* Versioning */\r
+ var ver = this;\r
+ for each(i=0;i<ver.length;i++)\r
+ {\r
+ if(String(ver[i]).length < 2)\r
+ {\r
+ ver[i]="0"+ver[i];\r
+ }\r
+ }\r
+ \r
+ var packageVersion = "\""+ver[0]+"."+ver[1]+"."+ver[2]+"."+ver[3]+"\"";\r
+\r
+%%}\r
+\r
+module Settings\r
+{\r
+ config string tcp3dVersionString = `packageVersion`;\r
+}\r
+\r
diff --git a/build/buildlib.xs b/build/buildlib.xs
--- /dev/null
+++ b/build/buildlib.xs
@@ -0,0 +1,535 @@
+/******************************************************************************\r
+ * FILE PURPOSE: Build Library Utilities\r
+ ******************************************************************************\r
+ * FILE NAME: buildlib.xs\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains common routines that are used by the various TCP3D driver \r
+ * components.\r
+ *\r
+ * Copyright (C) 2011, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : listAllFiles\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * Utility function which lists all files with a specific extension \r
+ * present in a directory and any directory inside it.\r
+ **************************************************************************/\r
+function listAllFiles(ext, dir, recurse)\r
+{ \r
+ var srcFile = [];\r
+ var d;\r
+ \r
+ /* If recurse parameter is not specified we default to recursive search. */\r
+ if (recurse == null)\r
+ recurse = true;\r
+ \r
+ if (dir == undefined) \r
+ d = ".";\r
+ else \r
+ d = dir;\r
+ \r
+ /* Get access to the current directory. */\r
+ var file = new java.io.File(d);\r
+ \r
+ /* Check if the file exists and it is a directory. */\r
+ if (file.exists() && file.isDirectory()) \r
+ {\r
+ /* Get a list of all files in the specific directory. */\r
+ var fileList = file.listFiles();\r
+ for (var i = 0; i < fileList.length; i++) \r
+ {\r
+ /* Dont add the generated directory 'package' and any of its files \r
+ * to the list here. */\r
+ if (fileList[i].getName().matches("package") == false)\r
+ {\r
+ /* Check if the detected file is a directory */\r
+ if (fileList[i].isDirectory())\r
+ {\r
+ /* We will recurse into the subdirectory only if required to do so. */\r
+ if (recurse == true)\r
+ {\r
+ /* Generate the directory Name in which we will recurse. */ \r
+ var directoryName = d + "/" + fileList[i].getName();\r
+ \r
+ /* Get a list of all files in this directory */\r
+ var fileListing = listAllFiles (ext, directoryName, recurse);\r
+ if (fileListing != null)\r
+ {\r
+ /* Return a list of all file names in the directory. */\r
+ for (var j = 0 ; j < fileListing.length; j++) \r
+ srcFile[srcFile.length++] = fileListing[j];\r
+ }\r
+ }\r
+ }\r
+ else\r
+ {\r
+ /* This was a file. Check if the file name matches the extension */\r
+ if (fileList[i].getName().endsWith(ext) == true)\r
+ srcFile[srcFile.length++] = d + "/" + fileList[i].getName();\r
+ }\r
+ }\r
+ }\r
+ return srcFile;\r
+ }\r
+ return null;\r
+}\r
+\r
+function createMake(makefile)\r
+{\r
+ /* Create the main make file */\r
+ var fileModule = xdc.module('xdc.services.io.File');\r
+ if(makefile==undefined)\r
+ {\r
+ try{\r
+ makefile = fileModule.open("makefile", "w");\r
+ } catch (ex)\r
+ {\r
+ print("makefile cannot be written to. Please check Writing Permissions.");\r
+ java.lang.System.exit(1);\r
+ } \r
+ \r
+ Pkg.makePrologue += "\ninclude makefile\n"; \r
+ \r
+ Pkg.makeEpilogue += "\nclean::\n\t-$(RM) makefile\n";\r
+ makefile.writeLine("#*******************************************************************************");\r
+ makefile.writeLine("#* FILE PURPOSE: Top level makefile for Creating Component Libraries");\r
+ makefile.writeLine("#*******************************************************************************");\r
+ makefile.writeLine("#* FILE NAME: makefile");\r
+ makefile.writeLine("#*");\r
+ makefile.writeLine("#* DESCRIPTION: Defines Compiler tools paths, libraries , Build Options ");\r
+ makefile.writeLine("#*");\r
+ makefile.writeLine("#*");\r
+ makefile.writeLine("#*******************************************************************************");\r
+ makefile.writeLine("#*");\r
+ makefile.writeLine("# (Mandatory) Specify where various tools are installed.");\r
+\r
+ var file = xdc.module('xdc.services.io.File');\r
+ \r
+ var xdcTargetType = java.lang.System.getenv("XDCTARGET");\r
+ var toolsBaseDir = java.lang.System.getenv("XDCCGROOT"); \r
+ \r
+ makefile.writeLine("\n# Output for prebuilt generated libraries");\r
+ makefile.writeLine("export LIBDIR ?= ./lib");\r
+\r
+ /* Create INCDIR from XDCPATH */\r
+ \r
+ /* copy the environment array from the current environment */\r
+ var env = java.lang.System.getenv();\r
+ var getxdcpath=String(java.lang.System.getenv("XDCPATH"));\r
+ getxdcpath= getxdcpath.replace(/\\/g,"/");\r
+ var keys = env.keySet().toArray();\r
+ var key;\r
+ var stat={};\r
+ var env_j=[];\r
+ var listxdcpath = new Array();\r
+ for (var i = 0; i < keys.length; i++) {\r
+ key = String(keys[i]);\r
+ if((key.match("INSTALL_PATH")) || (key.match("INSTALLDIR")))\r
+ {\r
+ var keyPath=String(env.get(key));\r
+ keyPath=keyPath.replace(/\\/g,"/");\r
+ var file = xdc.module('xdc.services.io.File');\r
+ keyPath=file.getDOSPath(keyPath);\r
+ if(getxdcpath.toString().match(keyPath))\r
+ {\r
+ listxdcpath.push({keyname: key,keypath: keyPath});\r
+ while(getxdcpath.toString().match(keyPath))\r
+ {\r
+ getxdcpath=getxdcpath.toString().replace(keyPath,"$("+key+")");\r
+ }\r
+ }\r
+ }\r
+ }\r
+ var pkgroot="..";\r
+ for (var i = Pkg.name.split('.').length; i > 1; i--) {\r
+ pkgroot+="/..";\r
+ }\r
+ \r
+ makefile.writeLine("\n# ROOT Directory"); \r
+ makefile.writeLine("export ROOTDIR := "+pkgroot);\r
+ \r
+ makefile.writeLine("\n# INCLUDE Directory");\r
+ makefile.writeLine("export INCDIR := "+getxdcpath+";$(ROOTDIR)"); \r
+ \r
+ makefile.writeLine("\n# Common Macros used in make"); \r
+ makefile.writeLine("\nifndef RM"); \r
+ makefile.writeLine("export RM = rm -f");\r
+ makefile.writeLine("endif"); \r
+ \r
+ makefile.writeLine("\nifndef CP"); \r
+ makefile.writeLine("export CP = cp -p"); \r
+ makefile.writeLine("endif"); \r
+ \r
+ makefile.writeLine("\nexport MKDIR = mkdir -p");\r
+ \r
+ makefile.writeLine("\nifndef RMDIR"); \r
+ makefile.writeLine("export RMDIR = rm -rf");\r
+ makefile.writeLine("endif"); \r
+ \r
+ makefile.writeLine("\nifndef SED"); \r
+ makefile.writeLine("export SED = sed"); \r
+ makefile.writeLine("endif"); \r
+ \r
+ makefile.writeLine("\nifndef MAKE"); \r
+ makefile.writeLine("export MAKE = make"); \r
+ makefile.writeLine("endif"); \r
+\r
+ makefile.writeLine("\n# PHONY Targets"); \r
+ makefile.writeLine(".PHONY: all clean cleanall "); \r
+ \r
+ makefile.writeLine("\n# FORCE Targets"); \r
+ makefile.writeLine("FORCE: "); \r
+ \r
+ makefile.writeLine("\n# all rule"); \r
+ makefile.writeLine("all: .executables"); \r
+ makefile.writeLine(".executables: .libraries");\r
+ makefile.writeLine(".libraries:");\r
+ \r
+ makefile.writeLine("\n# Clean Rule"); \r
+ makefile.writeLine("clean:: clean_package"); \r
+ makefile.writeLine("# Clean Top Level Object Directory "); \r
+ makefile.writeLine("clean_package :\n\t$(RMDIR) $(LIBDIR)/*/"); \r
+ makefile.writeLine("\t$(RMDIR) package/cfg"); \r
+ }\r
+ else\r
+ {\r
+ try{\r
+ makefile = fileModule.open("makefile", "a");\r
+ } catch (ex)\r
+ {\r
+ print("makefile cannot be written to. Please check Writing Permissions.");\r
+ java.lang.System.exit(1);\r
+ } \r
+ \r
+ }\r
+\r
+ return makefile;\r
+}\r
+\r
+function createLibMake(makelibname,targetname, objectPath)\r
+{\r
+ var tooldir;\r
+ var stringname=String(targetname).replace("(xdc.bld.ITarget.Module)","");\r
+ if(stringname.match("ARM11"))\r
+ {\r
+ tooldir="TI_ARM11_GEN_INSTALL_PATH"; \r
+ }\r
+ else\r
+ {\r
+ tooldir="C6X_GEN_INSTALL_PATH";\r
+ }\r
+ switch(stringname)\r
+ {\r
+ case String(C66LE):\r
+ targetname=C66LE;\r
+ break;\r
+ case String(C66BE):\r
+ targetname=C66BE;\r
+ break;\r
+\r
+ }\r
+ var fileModule = xdc.module('xdc.services.io.File');\r
+ try{\r
+ var dstFile = new java.io.File(makelibname);\r
+ dstFile.getParentFile().mkdirs(); \r
+ libmakefile = fileModule.open(makelibname, "w");\r
+ /* Add to Archive list */\r
+ } catch (ex)\r
+ {\r
+ print(makelibname+" cannot be written to. Please check Writing Permissions.");\r
+ java.lang.System.exit(1);\r
+ } \r
+ libmakefile.writeLine("#*******************************************************************************");\r
+ libmakefile.writeLine("#* FILE PURPOSE: Lower level makefile for Creating Component Libraries");\r
+ libmakefile.writeLine("#*******************************************************************************");\r
+ libmakefile.writeLine("#* FILE NAME: "+makelibname);\r
+ libmakefile.writeLine("#*");\r
+ libmakefile.writeLine("#* DESCRIPTION: Defines Source Files, Compilers flags and build rules");\r
+ libmakefile.writeLine("#*");\r
+ libmakefile.writeLine("#*");\r
+ libmakefile.writeLine("#*******************************************************************************");\r
+ libmakefile.writeLine("#");\r
+ libmakefile.writeLine("");\r
+ libmakefile.writeLine("#");\r
+ libmakefile.writeLine("# Macro definitions referenced below");\r
+ libmakefile.writeLine("#");\r
+ libmakefile.writeLine("empty =");\r
+ libmakefile.writeLine("space =$(empty) $(empty)");\r
+ \r
+ if(stringname.match("ti.targets"))\r
+ {\r
+\r
+ var rtslibtemp = targetname.lnkOpts.suffix.toString().split("/");\r
+ var rtslib;\r
+ for(n=0;n<rtslibtemp.length;n++)\r
+ {\r
+ if(rtslibtemp[n].match(".lib"))\r
+ { \r
+ rtslib=rtslibtemp[n];\r
+ }\r
+ }\r
+\r
+ libmakefile.writeLine("CC = $("+tooldir+")/bin/"+targetname.cc.cmd +" "+targetname.ccOpts.prefix+" "+targetname.cc.opts);\r
+ libmakefile.writeLine("AC = $("+tooldir+")/bin/"+targetname.asm.cmd +" "+targetname.asmOpts.prefix+" "+targetname.asm.opts); \r
+ libmakefile.writeLine("ARIN = $("+tooldir+")/bin/"+targetname.ar.cmd +" "+targetname.ar.opts); \r
+ libmakefile.writeLine("LD = $("+tooldir+")/bin/"+targetname.lnk.cmd +" "+targetname.lnk.opts); \r
+ libmakefile.writeLine("RTSLIB = -l $("+tooldir+")/lib/"+rtslib); \r
+ }\r
+ else\r
+ {\r
+ print("Error: Non-TI targets are not currently supported ");\r
+ java.lang.System.exit(1);\r
+\r
+ }\r
+ \r
+ libmakefile.writeLine("INCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\\$(space),$(INCDIR))))");\r
+ libmakefile.writeLine("OBJEXT = o"+targetname.suffix); \r
+ libmakefile.writeLine("AOBJEXT = s"+targetname.suffix); \r
+ /* libmakefile.writeLine("INTERNALDEFS = -D"+stringname.replace(/\./g,"_")+" -Dxdc_target_types__=ti/targets/std.h -DMAKEFILE_BUILD -eo.$(OBJEXT) -ea.$(AOBJEXT) -fr=$(@D) -fs=$(@D) -ppa -ppd=$@.dep");*/\r
+ libmakefile.writeLine("INTERNALDEFS = -D"+stringname.replace(/\./g,"_")+" -DMAKEFILE_BUILD -eo.$(OBJEXT) -ea.$(AOBJEXT) -fr=$(@D) -fs=$(@D) -ppa -ppd=$@.dep");\r
+ libmakefile.writeLine("INTERNALLINKDEFS = -o $@ -m $@.map");\r
+ libmakefile.writeLine("OBJDIR = $(LIBDIR)/obj"); \r
+ \r
+ return libmakefile;\r
+\r
+}\r
+\r
+function makeAddObjects(srcString, makefilename, srcfiles, flags,fileExt, targetName)\r
+{\r
+ var sourcestring = (srcString + fileExt).toString().toUpperCase();\r
+ var compileflagstring = sourcestring + "FLAGS";\r
+ var objectliststring = sourcestring + "OBJS";\r
+ /* List all the source files */\r
+ makefilename.writeLine("\n#List the "+srcString+" Files"); \r
+ makefilename.writeLine(sourcestring + "= \\");\r
+ for(var i=0;i<srcfiles.length-1;i++)\r
+ {\r
+ makefilename.writeLine(" "+srcfiles[i]+"\\");\r
+ }\r
+ makefilename.writeLine(" "+srcfiles[i]+"\n");\r
+ \r
+ /* Flags for the source files */\r
+ makefilename.writeLine("# FLAGS for the "+srcString+" Files"); \r
+ var compileflags="";\r
+ if(fileExt == "asm" && flags.aopts != undefined)\r
+ {\r
+ compileflags+=" "+flags.aopts;\r
+ }\r
+ else if((fileExt == "c" || fileExt == "sa")&& flags.copts != undefined)\r
+ {\r
+ compileflags+=" "+flags.copts;\r
+ } \r
+\r
+ if(flags.incs != undefined)\r
+ {\r
+ compileflags+=" "+flags.incs;\r
+ }\r
+\r
+\r
+ makefilename.writeLine(compileflagstring+" = "+compileflags +" \n"); \r
+ makefilename.writeLine("# Make Rule for the "+srcString+" Files"); \r
+ \r
+ makefilename.writeLine(objectliststring +" = $(patsubst %."+fileExt+", $(OBJDIR)/%.$(OBJEXT), $(" + sourcestring + "))"); \r
+ makefilename.writeLine("\n$("+objectliststring+"): $(OBJDIR)/%.$(OBJEXT): %."+fileExt); \r
+ if(fileExt == "c")\r
+ { \r
+ makefilename.writeLine("\t-@echo cl"+targetName.suffix +" $< ..."); \r
+ }\r
+ else\r
+ {\r
+ makefilename.writeLine("\t-@echo asm"+targetName.suffix +" $< ..."); \r
+ }\r
+ makefilename.writeLine("\tif [ ! -d $(@D) ]; then $(MKDIR) $(@D) ; fi;"); \r
+ \r
+ if(fileExt == "c")\r
+ {\r
+ makefilename.writeLine("\t$(RM) $@.dep");\r
+ makefilename.writeLine("\t$(CC) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) -fc $< ");\r
+ makefilename.writeLine("\t-@$(CP) $@.dep $@.pp; \\");\r
+ makefilename.writeLine(" $(SED) -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\\\$$//' \\");\r
+ makefilename.writeLine(" -e '/^$$/ d' -e 's/$$/ :/' < $@.pp >> $@.dep; \\");\r
+ makefilename.writeLine(" $(RM) $@.pp ");\r
+ }\r
+ else if(fileExt == "asm")\r
+ {\r
+ makefilename.writeLine("\t$(AC) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) -fa $< ");\r
+ }\r
+ else if(fileExt == "sa")\r
+ {\r
+ makefilename.writeLine("\t$(AC) $("+compileflagstring+") $(INTERNALDEFS) $(INCS) $< ");\r
+ }\r
+ makefilename.writeLine("\n#Create Empty rule for dependency");\r
+ makefilename.writeLine("$("+objectliststring+"):"+makefilename.$private.fd);\r
+ makefilename.writeLine(makefilename.$private.fd+":");\r
+ makefilename.writeLine("\n#Include Depedency for "+srcString+" Files");\r
+ makefilename.writeLine("ifneq (clean,$(MAKECMDGOALS))");\r
+ makefilename.writeLine(" -include $("+objectliststring+":%.$(OBJEXT)=%.$(OBJEXT).dep)");\r
+ makefilename.writeLine("endif");\r
+ \r
+}\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : buildLibrary\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * Utility function which will build a specific library\r
+ **************************************************************************/\r
+var makefilelocal;\r
+function buildLibrary (libOptions, libName, target, libFiles) \r
+{\r
+ var lldFullLibraryPath = "./lib/c66/" + libName;\r
+ var lldFullBuildPath = "./build/c66/" + libName;\r
+ var lldFullLibraryPathMake = "$(LIBDIR)/" + "c66/" + libName;\r
+\r
+ /* Create Main make file in the root of package folder */\r
+ makefilelocal = createMake(makefilelocal);\r
+\r
+ /* Write the rule to make library in main makefile */\r
+ lib = lldFullBuildPath+".a"+target.suffix;\r
+ libMake = lldFullLibraryPathMake+".a"+target.suffix;\r
+ var objectPath= "./package/"+lldFullBuildPath;\r
+ makefilelocal.writeLine("\n\n# Make rule to create "+libMake+" library");\r
+ makefilelocal.writeLine(".libraries: "+ libMake);\r
+ makefilelocal.writeLine(libMake+": FORCE\n\t$(MAKE) -f "+lib+".mk $@"); \r
+\r
+ /* Create Library make file in the lib folder */\r
+ var makefilelib= createLibMake(lib+".mk",target,objectPath); \r
+\r
+ /* Rule to clean library in main makefile */\r
+ makefilelocal.writeLine("# Rule to clean "+libMake+" library"); \r
+ makefilelocal.writeLine("clean ::\n\t$(RM) "+ libMake); \r
+ librule="\n\n"+libMake+" :";\r
+\r
+ /* Add files to be compiled */\r
+ /* Separate out the C and assembly files */\r
+ var cfiles= new Array();\r
+ var afiles= new Array();\r
+ var safiles= new Array();\r
+ for each(var srcFile in libFiles)\r
+ {\r
+ var srcFile=String(srcFile);\r
+ var dot = srcFile.lastIndexOf(".");\r
+ var extension = srcFile.substr(dot,srcFile.length); \r
+ if(extension == ".c")\r
+ {\r
+ cfiles.push(srcFile);\r
+ }\r
+ else if(extension == ".sa")\r
+ {\r
+ safiles.push(srcFile);\r
+ }\r
+ else if(extension == ".asm")\r
+ {\r
+ afiles.push(srcFile);\r
+ }\r
+ else\r
+ {\r
+ print("ERROR: Unsupported file extension");\r
+ java.lang.System.exit(1);\r
+ }\r
+ }\r
+ if(cfiles.length > 0)\r
+ { \r
+ makeAddObjects("COMMONSRC",makefilelib,cfiles,libOptions,"c",target);\r
+ librule += " $(COMMONSRCCOBJS)"; \r
+ }\r
+ if(afiles.length > 0)\r
+ { \r
+ makeAddObjects("COMMONSRC",makefilelib,afiles,libOptions,"asm",target);\r
+ librule += " $(COMMONSRCASMOBJS)"; \r
+ }\r
+ if(safiles.length > 0)\r
+ { \r
+ makeAddObjects("COMMONSRC",makefilelib,safiles,libOptions,"sa",target);\r
+ librule += " $(COMMONSRCSAOBJS)"; \r
+ }\r
+\r
+ makefilelib.writeLine(librule);\r
+ makefilelib.writeLine("\t@echo archiving $? into $@ ..."); \r
+ makefilelib.writeLine("\tif [ ! -d $(LIBDIR)/c66 ]; then $(MKDIR) $(LIBDIR)/c66 ; fi;"); \r
+ makefilelib.writeLine("\t$(ARIN) $@ $?");\r
+ makefilelib.close(); \r
+ \r
+ /* Create the Epilogue; which executes after all the builds are completed. \r
+ * This is used to generate the benchmark information for the built library. \r
+ * Also add the benchmarking information file to the package. */\r
+ Pkg.makeEpilogue += ".libraries: benchmarking_" + target.suffix + "\n";\r
+ Pkg.makeEpilogue += "benchmarking_" + target.suffix + ":";\r
+ Pkg.makeEpilogue += "\n\t ofd6x.exe -x " + lldFullLibraryPath + ".a" + target.suffix + " > tmp.xml";\r
+ Pkg.makeEpilogue += "\n\t sectti.exe tmp.xml > " + lldFullLibraryPath + ".a" + target.suffix + "_size.txt";\r
+ Pkg.makeEpilogue += "\n\t $(RM) tmp.xml\n\n";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = lldFullLibraryPath + ".a" + target.suffix + "_size.txt";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = lldFullBuildPath + ".a" + target.suffix + ".mk";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = lldFullLibraryPath + ".a" + target.suffix;\r
+\r
+ /* We need to clean after ourselves; extend the 'clean' target to take care of this. */\r
+ Pkg.makeEpilogue += "clean::\n";\r
+ Pkg.makeEpilogue += "\t$(RM) " + lldFullBuildPath + ".a" + target.suffix + "_size.txt\n"; \r
+ // Pkg.makeEpilogue += "\t$(RM) " + lldFullBuildPath + ".a" + target.suffix + ".mk\n";\r
+ Pkg.makeEpilogue += "\t$(RMDIR) " + "$(LIBDIR)/" + "c66/ \n\n";\r
+\r
+ return lib;\r
+}\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : createMiniPkg\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * The function is responsible for creating the mini tar package\r
+ * The MINI package has the following files:- \r
+ * - Driver Source Files. \r
+ * - Header files (exported and internal driver files) \r
+ * - Simple Makefiles. \r
+ **************************************************************************/\r
+function createMiniPkg(pkgName)\r
+{\r
+ /* Get the package Name. */\r
+ var packageRepository = xdc.getPackageRepository(Pkg.name);\r
+ var packageBase = xdc.getPackageBase(Pkg.name);\r
+ var packageName = packageBase.substring(packageRepository.length + 1);\r
+\r
+ /* Convert the Package name by replacing back slashes with forward slashes. This is required because\r
+ * otherwise with long names the tar is unable to change directory. */\r
+ var newPkgName = new java.lang.String(packageRepository);\r
+ var newPkgRep = newPkgName.replace('\\', '/');\r
+\r
+ /* Step1: Create the MINI Package and add the simple Big and Little Endian Makefiles to the package */\r
+ Pkg.makeEpilogue += "release: mini_pkg\n";\r
+ Pkg.makeEpilogue += "mini_pkg:\n";\r
+ Pkg.makeEpilogue += "\t tar -C " + "\"" + newPkgRep + "\"" + " -cf packages/" + pkgName + "_mini.tar " + \r
+ packageName + "simpleC66LE.mak " + packageName + "simpleC66BE.mak\n";\r
+\r
+ /* Step2: Add the exported header files to the package */\r
+ var includeFiles = libUtility.listAllFiles (".h", ".", false);\r
+ for (var k = 0 ; k < includeFiles.length; k++)\r
+ Pkg.makeEpilogue += "\t tar -C " + "\"" + newPkgRep + "\"" + " -rf packages/" + pkgName + "_mini.tar " + \r
+ packageName + includeFiles[k] + "\n";\r
+\r
+ /* Step3: Add the internal header files to the package */\r
+ includeFiles = libUtility.listAllFiles (".h", "include", true);\r
+ for (var k = 0 ; k < includeFiles.length; k++)\r
+ Pkg.makeEpilogue += "\t tar -C " + "\"" + newPkgRep + "\"" + " -rf packages/" + pkgName + "_mini.tar " + \r
+ packageName + includeFiles[k] + "\n";\r
+\r
+ /* Step4: Add the PDSP firmware files to the package */\r
+ includeFiles = libUtility.listAllFiles (".h", "firmware", true);\r
+ for (var k = 0 ; k < includeFiles.length; k++)\r
+ Pkg.makeEpilogue += "\t tar -C " + "\"" + newPkgRep + "\"" + " -rf packages/" + pkgName + "_mini.tar " + \r
+ packageName + includeFiles[k] + "\n";\r
+\r
+ /* Step5: Add the device specific files to the package */\r
+ includeFiles = libUtility.listAllFiles (".c", "device", true);\r
+ for (var k = 0 ; k < includeFiles.length; k++)\r
+ Pkg.makeEpilogue += "\t tar -C " + "\"" + newPkgRep + "\"" + " -rf packages/" + pkgName + "_mini.tar " + \r
+ packageName + includeFiles[k] + "\n";\r
+\r
+ /* Step4: Add the driver source files to the package; the filter should have generated a source listing */\r
+ Pkg.makeEpilogue += "\t tar -C " + "\"" + newPkgRep + "\"" + " -T src.lst -rf packages/" + pkgName + "_mini.tar " + "\n";\r
+\r
+ /* Ensure that we clean up the mini package */\r
+ Pkg.makeEpilogue += "clean::\n";\r
+ Pkg.makeEpilogue += "\t $(RM) packages/" + pkgName + "_mini.tar\n";\r
+}\r
diff --git a/config.bld b/config.bld
--- /dev/null
+++ b/config.bld
@@ -0,0 +1,105 @@
+/******************************************************************************\r
+ * FILE PURPOSE: Build configuration Script for the TCP3D Driver\r
+ ******************************************************************************\r
+ * FILE NAME: config.bld\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the build configuration script for the TCP3D driver\r
+ * and is responsible for configuration of the paths for the various \r
+ * tools required to build the driver.\r
+ *\r
+ * Copyright (C) 2011, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Set package attribute as ZIP or TAR */\r
+Pkg.attrs.archiver = "tar";\r
+\r
+/* Get the Tools Base directory from the Environment Variable. */\r
+var toolsBaseDir = java.lang.System.getenv("XDCCGROOT");\r
+\r
+/* Get the base directory for the TCP3D Driver Package */\r
+var tcp3dDriverPath = new java.io.File(".//").getPath();\r
+\r
+var tcp3dDriverInstallType;\r
+\r
+/* Read the part number from the environment variable. */\r
+var tcp3dPartNumber = java.lang.System.getenv("PARTNO");\r
+\r
+if(tcp3dPartNumber == null)\r
+{\r
+ tcp3dPartNumber = "keystone2";\r
+}\r
+\r
+/* Include Path */\r
+var tcp3dIncludePath = " -i" + tcp3dDriverPath + "/src" + " -i" + tcp3dDriverPath + " -i" + tcp3dDriverPath + "/test";\r
+\r
+/* Configure the TCP3D Release Version Information */\r
+/* We use the information from compatibility key. It require 3 steps: */ \r
+/* remove SPACE and TAB, convert to string and split to make array */\r
+var tcp3dDriverReleaseVersion = (""+Pkg.version.replace(/\s/g, "")).split(',');\r
+\r
+/* TCP3D Driver Coverity Analysis: Check the environment variable to determine if Static\r
+ * Analysis has to be done on the TCP3D Driver Code base or not? */\r
+var tcp3dDriverCoverityAnalysis = java.lang.System.getenv("LLDCOV");\r
+\r
+/* C66 ELF compiler configuration for Little Endian Mode. */\r
+var C66LE = xdc.useModule('ti.targets.elf.C66');\r
+C66LE.rootDir = toolsBaseDir;\r
+C66LE.ccOpts.prefix = "-mo -o3 -q -k -eo.o";\r
+\r
+/* C66 ELF compiler configuration for Big Endian Mode. */\r
+var C66BE = xdc.useModule('ti.targets.elf.C66_big_endian');\r
+C66BE.rootDir = toolsBaseDir;\r
+C66BE.ccOpts.prefix = "-mo -o3 -q -k -eo.o";\r
+\r
+/* Check if we need to run the STATIC Analysis or not? */\r
+var coverityAnalysis = java.lang.System.getenv("STATIC_ANALYZE");\r
+\r
+/* Setup the Coverity Filters to perform Static Analysis. */\r
+if (coverityAnalysis == "ON") {\r
+ var coverityInstallPath = java.lang.System.getenv("STATIC_ANALYZE_PATH");\r
+ var cfgBase = xdc.getPackageBase("tisb.coverity.filters") + "cfg";\r
+\r
+ var coverityFilter = [\r
+ {\r
+ moduleName: "tisb.coverity.filters.Coverity",\r
+ params: {\r
+ cfgDir: cfgBase, // The Coverity configuration file directory\r
+ rootDir: coverityInstallPath,\r
+ outDir: xdc.csd() + "cov_out",\r
+ analyzeLibs: true\r
+ }\r
+ },\r
+ ];\r
+\r
+ /* Run the coverity filters on the LE Build only. */\r
+ C66LE.profiles["release"].filters = coverityFilter;\r
+}\r
+\r
+/* Check if we need to create the Makefiles? */\r
+var miniBuild = java.lang.System.getenv("MINI_PACKAGE");\r
+\r
+if (miniBuild == "ON")\r
+{\r
+ /* Add the filter for simple Makefile generation. */\r
+ var makeC66LEFilter = {\r
+ moduleName: "build.filter.Make",\r
+ params: {\r
+ makefileName: "simpleC66LE.mak",\r
+ }\r
+ };\r
+ C66LE.profiles["release"].filters[C66LE.profiles["release"].filters.length++] = makeC66LEFilter;\r
+\r
+ var makeC66BEFilter = {\r
+ moduleName: "build.filter.Make",\r
+ params: {\r
+ makefileName: "simpleC66BE.mak",\r
+ }\r
+ };\r
+ C66BE.profiles["release"].filters[C66BE.profiles["release"].filters.length++] = makeC66BEFilter;\r
+}\r
+\r
+/* List all the build targets here. */\r
+Build.targets = [ C66LE, C66BE ];\r
+\r
+var devices = ["tci6634/c66"/*,"tci6636/c66","tci6638/c66"*/];\r
diff --git a/docs/Module.xs b/docs/Module.xs
--- /dev/null
+++ b/docs/Module.xs
@@ -0,0 +1,55 @@
+/******************************************************************************\r
+ * FILE PURPOSE: TCP3D Driver DOCS Module specification file.\r
+ ******************************************************************************\r
+ * FILE NAME: module.xs\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the module specification for the TCP3D Driver Documentation .\r
+ *\r
+ * Copyright (C) 2008, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Load the library utility. */\r
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : modBuild\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * The function is used to build the TCP3D driver documentation and add it\r
+ * to the package.\r
+ **************************************************************************/\r
+function modBuild() \r
+{\r
+ /* Create the actual PROLOGUE Section for the Documentation.*/\r
+ Pkg.makePrologue += "release: tcp3d_document_generation\n";\r
+ Pkg.makePrologue += "tcp3d_document_generation:\n";\r
+ Pkg.makePrologue += "\t @echo ----------------------------\n";\r
+ Pkg.makePrologue += "\t @echo Generating TCP3D Driver Documentation\n";\r
+ Pkg.makePrologue += "\t doxygen docs/TCP3D_DRV_doxconfig\n";\r
+ Pkg.makePrologue += "\t @echo TCP3D Driver Documentation Generated \n";\r
+ Pkg.makePrologue += "\t @echo ----------------------------\n";\r
+\r
+ /* Add the documentation file to the package. */\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/TCP3D_DRV_APIIF.chm";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/TCP3D_DriverSDS.pdf";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/tifooter.htm";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/tiheader.htm";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/tilogo.gif";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/titagline.gif";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/doxy/html";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/TCP3D_LLD_SoftwareManifest.pdf";\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/ReleaseNotes_TCP3DDriver.pdf";\r
+\r
+ if ( tcp3dDriverInstallType == "SETUP" )\r
+ {\r
+ Pkg.makePrologue += "all: eclipse_plugin_generation\n";\r
+ Pkg.makePrologue += "eclipse_plugin_generation:\n";\r
+ Pkg.makePrologue += "\t @echo ----------------------------\n";\r
+ Pkg.makePrologue += "\t @echo TCP3D Eclipse Plugin Generation\n";\r
+ Pkg.makePrologue += "\t xs xdc.tools.eclipsePluginGen -o . -x ./docs/eclipse/sample.xml -c ./docs/eclipse/toc_cdoc_sample.xml\n";\r
+ Pkg.makePrologue += "\t @echo TCP3D Eclipse Plugin Generated \n";\r
+ Pkg.makePrologue += "\t @echo ----------------------------\n";\r
+ }\r
+}\r
+\r
diff --git a/docs/ReleaseNotes_TCP3DDriver.doc b/docs/ReleaseNotes_TCP3DDriver.doc
new file mode 100644 (file)
index 0000000..2e573ab
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diff --git a/docs/ReleaseNotes_TCP3DDriver.pdf b/docs/ReleaseNotes_TCP3DDriver.pdf
new file mode 100644 (file)
index 0000000..5742f7b
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diff --git a/docs/TCP3D_DRV_doxconfig.xdt b/docs/TCP3D_DRV_doxconfig.xdt
--- /dev/null
@@ -0,0 +1,255 @@
+%%{\r
+/*!\r
+ * This template implements the Doxyfile\r
+ */ \r
+ /* Versioning */\r
+ var ver = this;\r
+ var packageVersion = ver[0]+"."+ver[1]+"."+ver[2]+"."+ver[3];\r
+\r
+%%}\r
+\r
+# Doxyfile 1.5.1-p1\r
+\r
+#---------------------------------------------------------------------------\r
+# Project related configuration options\r
+#---------------------------------------------------------------------------\r
+PROJECT_NAME = "TCP3D Driver"\r
+PROJECT_NUMBER = `packageVersion`\r
+OUTPUT_DIRECTORY = ./docs/doxy\r
+CREATE_SUBDIRS = NO\r
+OUTPUT_LANGUAGE = English\r
+USE_WINDOWS_ENCODING = YES\r
+BRIEF_MEMBER_DESC = YES\r
+REPEAT_BRIEF = YES\r
+ABBREVIATE_BRIEF = "The $name class" \\r
+ "The $name widget" \\r
+ "The $name file" \\r
+ is \\r
+ provides \\r
+ specifies \\r
+ contains \\r
+ represents \\r
+ a \\r
+ an \\r
+ the\r
+ALWAYS_DETAILED_SEC = NO\r
+INLINE_INHERITED_MEMB = NO\r
+FULL_PATH_NAMES = NO\r
+STRIP_FROM_PATH =\r
+STRIP_FROM_INC_PATH =\r
+SHORT_NAMES = NO\r
+JAVADOC_AUTOBRIEF = NO\r
+MULTILINE_CPP_IS_BRIEF = NO\r
+DETAILS_AT_TOP = NO\r
+INHERIT_DOCS = YES\r
+SEPARATE_MEMBER_PAGES = NO\r
+TAB_SIZE = 8\r
+ALIASES =\r
+OPTIMIZE_OUTPUT_FOR_C = YES\r
+OPTIMIZE_OUTPUT_JAVA = NO\r
+BUILTIN_STL_SUPPORT = NO\r
+DISTRIBUTE_GROUP_DOC = NO\r
+SUBGROUPING = YES\r
+#---------------------------------------------------------------------------\r
+# Build related configuration options\r
+#---------------------------------------------------------------------------\r
+EXTRACT_ALL = NO\r
+EXTRACT_PRIVATE = NO\r
+EXTRACT_STATIC = NO\r
+EXTRACT_LOCAL_CLASSES = YES\r
+EXTRACT_LOCAL_METHODS = NO\r
+HIDE_UNDOC_MEMBERS = YES\r
+HIDE_UNDOC_CLASSES = YES\r
+HIDE_FRIEND_COMPOUNDS = NO\r
+HIDE_IN_BODY_DOCS = NO\r
+INTERNAL_DOCS = NO\r
+CASE_SENSE_NAMES = NO\r
+HIDE_SCOPE_NAMES = NO\r
+SHOW_INCLUDE_FILES = YES\r
+INLINE_INFO = YES\r
+SORT_MEMBER_DOCS = YES\r
+SORT_BRIEF_DOCS = NO\r
+SORT_BY_SCOPE_NAME = NO\r
+GENERATE_TODOLIST = YES\r
+GENERATE_TESTLIST = YES\r
+GENERATE_BUGLIST = YES\r
+GENERATE_DEPRECATEDLIST= YES\r
+ENABLED_SECTIONS =\r
+MAX_INITIALIZER_LINES = 30\r
+SHOW_USED_FILES = YES\r
+SHOW_DIRECTORIES = NO\r
+FILE_VERSION_FILTER = \r
+#---------------------------------------------------------------------------\r
+# configuration options related to warning and progress messages\r
+#---------------------------------------------------------------------------\r
+QUIET = NO\r
+WARNINGS = YES\r
+WARN_IF_UNDOCUMENTED = YES\r
+WARN_IF_DOC_ERROR = YES\r
+WARN_NO_PARAMDOC = NO\r
+WARN_FORMAT = "$file:$line: $text"\r
+WARN_LOGFILE =\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the input files\r
+#---------------------------------------------------------------------------\r
+INPUT = ./src \\r
+ . \r
+# ./docs/doxy/template\r
+\r
+FILE_PATTERNS = *.h\r
+RECURSIVE = NO\r
+EXCLUDE = YES \\r
+ ./example \\r
+ ./test \\r
+ ./package \\r
+ ./packages\r
+EXCLUDE_SYMLINKS = NO\r
+EXCLUDE_PATTERNS = cslr_*.h \\r
+ *profile*.* \\r
+ *_priv.h \\r
+ *_types.h\r
+EXAMPLE_PATH =\r
+EXAMPLE_PATTERNS = *\r
+EXAMPLE_RECURSIVE = NO\r
+IMAGE_PATH =\r
+INPUT_FILTER =\r
+FILTER_PATTERNS =\r
+FILTER_SOURCE_FILES = NO\r
+#---------------------------------------------------------------------------\r
+# configuration options related to source browsing\r
+#---------------------------------------------------------------------------\r
+SOURCE_BROWSER = NO\r
+INLINE_SOURCES = NO\r
+STRIP_CODE_COMMENTS = YES\r
+REFERENCED_BY_RELATION = NO\r
+REFERENCES_RELATION = NO\r
+REFERENCES_LINK_SOURCE = YES\r
+USE_HTAGS = NO\r
+VERBATIM_HEADERS = NO\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the alphabetical class index\r
+#---------------------------------------------------------------------------\r
+ALPHABETICAL_INDEX = NO\r
+COLS_IN_ALPHA_INDEX = 5\r
+IGNORE_PREFIX =\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the HTML output\r
+#---------------------------------------------------------------------------\r
+GENERATE_HTML = YES\r
+HTML_OUTPUT = html\r
+HTML_FILE_EXTENSION = .html\r
+HTML_HEADER = ./docs/tiheader.htm\r
+HTML_FOOTER = ./docs/tifooter.htm\r
+HTML_STYLESHEET =\r
+HTML_ALIGN_MEMBERS = YES\r
+GENERATE_HTMLHELP = YES\r
+CHM_FILE = ..\..\TCP3D_DRV_APIIF.chm\r
+HHC_LOCATION = hhc.exe\r
+GENERATE_CHI = NO\r
+BINARY_TOC = NO\r
+TOC_EXPAND = NO\r
+DISABLE_INDEX = NO\r
+ENUM_VALUES_PER_LINE = 4\r
+GENERATE_TREEVIEW = NO\r
+TREEVIEW_WIDTH = 250\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the LaTeX output\r
+#---------------------------------------------------------------------------\r
+GENERATE_LATEX = NO\r
+LATEX_OUTPUT = latex\r
+LATEX_CMD_NAME = latex\r
+MAKEINDEX_CMD_NAME = makeindex\r
+COMPACT_LATEX = NO\r
+PAPER_TYPE = a4wide\r
+EXTRA_PACKAGES =\r
+LATEX_HEADER =\r
+PDF_HYPERLINKS = YES\r
+USE_PDFLATEX = YES\r
+LATEX_BATCHMODE = NO\r
+LATEX_HIDE_INDICES = NO\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the RTF output\r
+#---------------------------------------------------------------------------\r
+GENERATE_RTF = NO\r
+RTF_OUTPUT = rtf\r
+COMPACT_RTF = NO\r
+RTF_HYPERLINKS = NO\r
+RTF_STYLESHEET_FILE =\r
+RTF_EXTENSIONS_FILE =\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the man page output\r
+#---------------------------------------------------------------------------\r
+GENERATE_MAN = NO\r
+MAN_OUTPUT = man\r
+MAN_EXTENSION = .3\r
+MAN_LINKS = NO\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the XML output\r
+#---------------------------------------------------------------------------\r
+GENERATE_XML = NO\r
+XML_OUTPUT = xml\r
+XML_SCHEMA =\r
+XML_DTD =\r
+XML_PROGRAMLISTING = YES\r
+#---------------------------------------------------------------------------\r
+# configuration options for the AutoGen Definitions output\r
+#---------------------------------------------------------------------------\r
+GENERATE_AUTOGEN_DEF = NO\r
+#---------------------------------------------------------------------------\r
+# configuration options related to the Perl module output\r
+#---------------------------------------------------------------------------\r
+GENERATE_PERLMOD = NO\r
+PERLMOD_LATEX = NO\r
+PERLMOD_PRETTY = YES\r
+PERLMOD_MAKEVAR_PREFIX =\r
+#---------------------------------------------------------------------------\r
+# Configuration options related to the preprocessor\r
+#---------------------------------------------------------------------------\r
+ENABLE_PREPROCESSING = YES\r
+MACRO_EXPANSION = NO\r
+EXPAND_ONLY_PREDEF = NO\r
+SEARCH_INCLUDES = YES\r
+INCLUDE_PATH =\r
+INCLUDE_FILE_PATTERNS =\r
+PREDEFINED =\r
+EXPAND_AS_DEFINED =\r
+SKIP_FUNCTION_MACROS = YES\r
+#---------------------------------------------------------------------------\r
+# Configuration::additions related to external references\r
+#---------------------------------------------------------------------------\r
+TAGFILES =\r
+GENERATE_TAGFILE =\r
+ALLEXTERNALS = NO\r
+EXTERNAL_GROUPS = YES\r
+PERL_PATH = /usr/bin/perl\r
+#---------------------------------------------------------------------------\r
+# Configuration options related to the dot tool\r
+#---------------------------------------------------------------------------\r
+CLASS_DIAGRAMS = NO\r
+HIDE_UNDOC_RELATIONS = YES\r
+HAVE_DOT = NO\r
+CLASS_GRAPH = YES\r
+COLLABORATION_GRAPH = YES\r
+GROUP_GRAPHS = YES\r
+UML_LOOK = NO\r
+TEMPLATE_RELATIONS = NO\r
+INCLUDE_GRAPH = YES\r
+INCLUDED_BY_GRAPH = YES\r
+CALL_GRAPH = NO\r
+CALLER_GRAPH = NO\r
+GRAPHICAL_HIERARCHY = YES\r
+DIRECTORY_GRAPH = YES\r
+DOT_IMAGE_FORMAT = png\r
+DOT_PATH = \r
+DOTFILE_DIRS = \r
+MAX_DOT_GRAPH_WIDTH = 1024\r
+MAX_DOT_GRAPH_HEIGHT = 1024\r
+MAX_DOT_GRAPH_DEPTH = 1000\r
+DOT_TRANSPARENT = YES\r
+DOT_MULTI_TARGETS = NO\r
+GENERATE_LEGEND = YES\r
+DOT_CLEANUP = YES\r
+#---------------------------------------------------------------------------\r
+# Configuration::additions related to the search engine\r
+#---------------------------------------------------------------------------\r
+SEARCHENGINE = NO\r
diff --git a/docs/TCP3D_DriverSDS.pdf b/docs/TCP3D_DriverSDS.pdf
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index 0000000..8acb005
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index 0000000..8acb005
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diff --git a/docs/TCP3D_LLD_SoftwareManifest.pdf b/docs/TCP3D_LLD_SoftwareManifest.pdf
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index 0000000..14d8187
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diff --git a/docs/doxy/rundoxy.bat b/docs/doxy/rundoxy.bat
--- /dev/null
+++ b/docs/doxy/rundoxy.bat
@@ -0,0 +1 @@
+T:\Doxygen\doxygen\1.5.1-p1\bin\doxygen docs\TCP3D_DRV_doxconfig\r
diff --git a/docs/doxy/template/asapimain.h b/docs/doxy/template/asapimain.h
--- /dev/null
@@ -0,0 +1,63 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+/*\r
+ * This is a little header file which doxygen parses to generate the main\r
+ * documentation page\r
+ */\r
+\r
+/**\r
+ * @file asapimain.h\r
+ *\r
+ * @brief Header file to generate the TCP3D Driver Functions Document Main Page\r
+ */\r
+\r
+/**\r
+ * @mainpage TCP3D Driver Functions\r
+ *\r
+ * @section Data Structures\r
+ *\r
+ * List of all the TCP3D Driver Data Structures with brief descriptions.\r
+ *\r
+ * @section Files\r
+ *\r
+ * List of all the TCP3D Driver interface files with brief descriptions.\r
+ *\r
+ * @section Related Pages\r
+ *\r
+ * List of all related documentation pages (Disclaimer, etc.).\r
+ */\r
diff --git a/docs/doxy/template/doxygen.h b/docs/doxy/template/doxygen.h
--- /dev/null
@@ -0,0 +1,96 @@
+/*\r
+ * This is a little header file which Doxygen parses to generate the disclaimer page\r
+ */\r
+\r
+/**\r
+ * @file doxygen.h\r
+ *\r
+ * @brief Header file to generate the TI Disclaimer Page\r
+ */\r
+\r
+/**\r
+ * @page Disclaimer\r
+ *<center> <B>IMPORTANT NOTICE </B> </center>\r
+ * Texas Instruments Incorporated and its subsidiaries (TI) reserve the right\r
+ * to make corrections, modifications, enhancements, improvements, and other\r
+ * changes to its products and services at any time and to discontinue any\r
+ * product or service without notice. Customers should obtain the latest\r
+ * relevant information before placing orders and should verify that such\r
+ * information is current and complete. All products are sold subject to TI\92s\r
+ * terms and conditions of sale supplied at the time of order acknowledgment.\r
+ *\r
+ * TI warrants performance of its hardware products to the specifications\r
+ * applicable at the time of sale in accordance with TI\92s standard warranty.\r
+ * Testing and other quality control techniques are used to the extent TI\r
+ * deems necessary to support this warranty. Except where mandated by\r
+ * government requirements, testing of all parameters of each product is not\r
+ * necessarily performed.\r
+ *\r
+ * TI assumes no liability for applications assistance or customer product\r
+ * design. Customers are responsible for their products and applications\r
+ * using TI components. To minimize the risks associated with customer\r
+ * products and applications, customers should provide adequate design and\r
+ * operating safeguards.\r
+ *\r
+ * TI does not warrant or represent that any license, either express or\r
+ * implied, is granted under any TI patent right, copyright, mask work right,\r
+ * or other TI intellectual property right relating to any combination,\r
+ * machine, or process in which TI products or services are used. Information\r
+ * published by TI regarding third-party products or services does not\r
+ * constitute a license from TI to use such products or services or a warranty\r
+ * or endorsement thereof. Use of such information may require a license from a\r
+ * third party under the patents or other intellectual property of the third\r
+ * party, or a license from TI under the patents or other intellectual property\r
+ * of TI.\r
+ *\r
+ * Reproduction of information in TI data books or data sheets is permissible\r
+ * only if reproduction is without alteration and is accompanied by all\r
+ * associated warranties, conditions, limitations, and notices. Reproduction\r
+ * of this information with alteration is an unfair and deceptive business\r
+ * practice. TI is not responsible or liable for such altered documentation.\r
+ *\r
+ * Resale of TI products or services with statements different from or beyond\r
+ * the parameters stated by TI for that product or service voids all express\r
+ * and any implied warranties for the associated TI product or service and is\r
+ * an unfair and deceptive business practice. TI is not responsible or liable\r
+ * for any such statements.\r
+ *\r
+ *\r
+ *\r
+ *\r
+ * Mailing Address: Texas Instruments\r
+ * Post Office Box 655303 Dallas, Texas 75265\r
+ *\r
+ *\r
+ *\r
+ * Copyright © 2008 Texas Instruments Incorporated. All rights reserved.\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
diff --git a/docs/doxy/tifooter.htm b/docs/doxy/tifooter.htm
--- /dev/null
+++ b/docs/doxy/tifooter.htm
@@ -0,0 +1,4 @@
+<hr size="1"><small>\r
+Copyright $year, Texas Instruments Incorporated</small>\r
+</body>\r
+</html>\r
diff --git a/docs/doxy/tiheader.htm b/docs/doxy/tiheader.htm
--- /dev/null
+++ b/docs/doxy/tiheader.htm
@@ -0,0 +1,12 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">\r
+<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">\r
+<title>$title</title>\r
+<link href="$relpath$doxygen.css" rel="stylesheet" type="text/css">\r
+<link href="$relpath$tabs.css" rel="stylesheet" type="text/css">\r
+</head><body>\r
+<table width=100%>\r
+<tr>\r
+ <td bgcolor="black" width="1"><a href="http://www.ti.com"><img border=0 src="tilogo.gif"></a></td>\r
+ <td bgcolor="red"><img src="titagline.gif"></td>\r
+</tr>\r
+</table>\r
diff --git a/docs/doxy/tilogo.gif b/docs/doxy/tilogo.gif
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diff --git a/docs/eclipse/sample.xml.xdt b/docs/eclipse/sample.xml.xdt
--- /dev/null
@@ -0,0 +1,26 @@
+%%{
+/*!
+ * This template implements the Doxyfile
+ */
+ /* Versioning */
+ var ver = this;
+ var packageVersion = ver[0]+"."+ver[1]+"."+ver[2]+"."+ver[3];
+
+%%}
+
+<?xml version="1.0" encoding="UTF-8" ?>
+<product>
+ <name>TCP3 Decoder Driver</name>
+ <id>ti.drv.tcp3d</id>
+ <version>`packageVersion`</version>
+ <companyName>Texas Instruments Inc.</companyName>
+ <companyUrl>http://ti.com</companyUrl>
+ <copyRightNotice>Copyright Texas Instruments 2012</copyRightNotice>
+ <licenseNotice>
+ Released under the Eclipse Public License 1.0 (http://www.eclipse.org/legal/epl-v10.html)
+ </licenseNotice>
+ <installLocation>../../..</installLocation>
+ <repository>../../../packages</repository>
+ <docsLoc>../../../packages/ti/drv/tcp3d/docs</docsLoc>
+ <folderPrefix>TCP3 Decoder Driver</folderPrefix>
+</product>
diff --git a/docs/eclipse/toc_cdoc_sample.xml b/docs/eclipse/toc_cdoc_sample.xml
--- /dev/null
@@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<?xml-stylesheet type="text/xsl" href="toc.xsl"?>
+<toc label="TCP3 Decoder Driver" topic="packages.html">
+<topic class="toc-id" label="Functions" href="doxy/html/group___t_c_p3_d___d_r_v___f_u_n_c_t_i_o_n.html" title="TCP3 Decoder driver functions">
+</topic>
+<topic class="toc-id" label="Utility Functions" href="doxy/html/group___t_c_p3_d___d_r_v___u_t_i_l___f_u_n_c_t_i_o_n.html" title="TCP3 Decoder driver utility functions">
+</topic>
+<topic class="toc-id" label="Symbols" href="doxy/html/group___t_c_p3_d___d_r_v___s_y_m_b_o_l.html" title="TCP3 Decoder driver defines">
+</topic>
+<topic class="toc-id" label="Data Structures" href="doxy/html/group___t_c_p3_d___d_r_v___d_a_t_a_s_t_r_u_c_t.html" title="TCP3 Decoder driver data structures">
+</topic>
+</toc>
diff --git a/docs/tifooter.htm b/docs/tifooter.htm
--- /dev/null
+++ b/docs/tifooter.htm
@@ -0,0 +1,4 @@
+<hr size="1"><small>\r
+Copyright $year, Texas Instruments Incorporated</small>\r
+</body>\r
+</html>\r
diff --git a/docs/tiheader.htm b/docs/tiheader.htm
--- /dev/null
+++ b/docs/tiheader.htm
@@ -0,0 +1,12 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">\r
+<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">\r
+<title>$title</title>\r
+<link href="$relpath$doxygen.css" rel="stylesheet" type="text/css">\r
+<link href="$relpath$tabs.css" rel="stylesheet" type="text/css">\r
+</head><body>\r
+<table width=100%>\r
+<tr>\r
+ <td bgcolor="black" width="1"><a href="http://www.ti.com"><img border=0 src="tilogo.gif"></a></td>\r
+ <td bgcolor="red"><img src="titagline.gif"></td>\r
+</tr>\r
+</table>\r
diff --git a/docs/tilogo.gif b/docs/tilogo.gif
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diff --git a/example/Module.xs b/example/Module.xs
--- /dev/null
+++ b/example/Module.xs
@@ -0,0 +1,71 @@
+/******************************************************************************\r
+ * FILE PURPOSE: TCP3D Example files.\r
+ ******************************************************************************\r
+ * FILE NAME: module.xs\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the module specification for TCP3D Driver Unit Example\r
+ * Files\r
+ *\r
+ * Copyright (C) 2009, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Load the library utility. */\r
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");\r
+\r
+var otherFiles = [\r
+];\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : modBuild\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * The function is used to add all the source files in the example \r
+ * directory into the package.\r
+ **************************************************************************/\r
+function modBuild() \r
+{\r
+ /* Add all the .c files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".c", "example");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .h files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".h", "example");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .cfg files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".cfg", "example");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .cmd files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".cmd", "example");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .txt files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".txt", "example");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .txt files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".ini", "example");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .txt files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".dat", "example/testvectors");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all the .txt files to the release package. */\r
+ var exampleFiles = libUtility.listAllFiles (".bin", "example/testvectors");\r
+ for (var k = 0 ; k < exampleFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = exampleFiles[k];\r
+\r
+ /* Add all other files to the release package. */\r
+ for (var k = 0 ; k < otherFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = otherFiles[k];\r
+}\r
diff --git a/example/macros.ini b/example/macros.ini
--- /dev/null
+++ b/example/macros.ini
@@ -0,0 +1 @@
+TCP3D_INSTALL_PATH = ..\..\..\..\..\r
diff --git a/example/simtci6634/c66/bios/link.cmd b/example/simtci6634/c66/bios/link.cmd
--- /dev/null
@@ -0,0 +1,7 @@
+SECTIONS\r
+{\r
+ .init_array: load >> L2SRAM\r
+ .csl_vect > L2SRAM\r
+ .main_mem > L2SRAM\r
+ .profile_mem > L2SRAM\r
+}\r
diff --git a/example/simtci6634/c66/bios/sample_config.cfg b/example/simtci6634/c66/bios/sample_config.cfg
--- /dev/null
@@ -0,0 +1,134 @@
+/*\r
+ * ======== sample_config.cfg ========\r
+ */\r
+\r
+/* IPC packages */\r
+var ListMP = xdc.useModule('ti.sdo.ipc.ListMP');\r
+var GateMP = xdc.useModule('ti.sdo.ipc.GateMP');\r
+var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');\r
+var HeapMemMP = xdc.useModule('ti.sdo.ipc.heaps.HeapMemMP');\r
+var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');\r
+var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');\r
+\r
+/* Configure System to use SysMin */\r
+System = xdc.useModule('xdc.runtime.System');\r
+SysStd = xdc.useModule('xdc.runtime.SysStd');\r
+System.SupportProxy = xdc.useModule('xdc.runtime.SysMin')\r
+System.SupportProxy = SysStd;\r
+System.extendedFormats = "%$S%f";\r
+\r
+/* Set the system stack - 0x2000 */\r
+Program.stack = 0x4000;\r
+\r
+var Memory = xdc.useModule('xdc.runtime.Memory');\r
+var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');\r
+\r
+/* Use HeapMem for default heap manager and give it 49152 (0xC000)\r
+ * bytes to work with.\r
+ */\r
+Program.sectMap["systemHeap"] = Program.platform.dataMemory;\r
+var heapMemParams = new HeapMem.Params;\r
+heapMemParams.size = 0x18000;\r
+heapMemParams.sectionName = "systemHeap";\r
+Memory.defaultHeapInstance = HeapMem.create(heapMemParams);\r
+\r
+/*\r
+ * Creating Heap Memories for using with test application\r
+ */\r
+/* Create a heap for TCP3D input/output data using ti.bios.HeapMem. */\r
+/* Program.sectMap["tcp3DataSection"] = {loadSegment: "MSMCSRAM"};\r
+var heapMemParams1 = new HeapMem.Params;\r
+heapMemParams1.size = 0x100000;\r
+heapMemParams1.align = 64;\r
+heapMemParams1.sectionName = "tcp3DataSection";\r
+Program.global.tcp3dDataHeap = HeapMem.create(heapMemParams1); */\r
+\r
+/* Create a heap for TCP3D driver using ti.bios.HeapMem. */\r
+Program.sectMap["tcp3DriverSection"] = Program.platform.dataMemory;\r
+var heapMemParams2 = new HeapMem.Params;\r
+heapMemParams2.size = 0x4000;\r
+heapMemParams2.sectionName = "tcp3DriverSection";\r
+Program.global.tcp3dDrvHeap = HeapMem.create(heapMemParams2);\r
+\r
+/* Create a heap for TCP3D QUEUE DESCRIPTORS using ti.bios.HeapMem. */\r
+Program.sectMap["tcp3QueueDescrSection"] = Program.platform.dataMemory;\r
+var heapMemParams3 = new HeapMem.Params;\r
+heapMemParams3.size = 4096;\r
+heapMemParams3.sectionName = "tcp3QueueDescrSection";\r
+Program.global.tcp3dQueHeap = HeapMem.create(heapMemParams3);\r
+\r
+/* To avoid wasting shared memory for Notify and MessageQ transports */\r
+for (var i = 0; i < MultiProc.numProcessors; i++) {\r
+ Ipc.setEntryMeta({\r
+ remoteProcId: i,\r
+ setupNotify: false,\r
+ setupMessageQ: false,\r
+ });\r
+}\r
+\r
+\r
+SharedRegion.setEntryMeta(0,\r
+ { base: 0x0C000000,\r
+ len: 0x100000,\r
+ ownerProcId: 0,\r
+ cacheLineSize: 64,\r
+ isValid: true,\r
+ name: "sharemem",\r
+ });\r
+\r
+/* \r
+ * Pull in Timer, Semaphore, Swi, Task, and Queue modules\r
+ * used in this example.\r
+ */\r
+var BIOS = xdc.useModule('ti.sysbios.BIOS');\r
+xdc.useModule('ti.sysbios.hal.Timer');\r
+xdc.useModule('ti.sysbios.knl.Semaphore');\r
+xdc.useModule('ti.sysbios.knl.Swi');\r
+xdc.useModule('ti.sysbios.knl.Task');\r
+xdc.useModule('ti.sysbios.hal.Cache');\r
+xdc.useModule('ti.sysbios.family.c64p.Hwi');\r
+xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');\r
+xdc.useModule('xdc.runtime.Log');\r
+xdc.useModule('xdc.runtime.Error');\r
+var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');\r
+var ECM = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');\r
+\r
+/*\r
+ * Enable Event Groups here and registering of ISR for specific GEM INTC is done\r
+ * using EventCombiner_dispatchPlug() and Hwi_eventMap() APIs\r
+ */\r
+ECM.eventGroupHwiNum[0] = 7;\r
+ECM.eventGroupHwiNum[1] = 8;\r
+ECM.eventGroupHwiNum[2] = 9;\r
+ECM.eventGroupHwiNum[3] = 10;\r
+\r
+/*\r
+ * Setup the Logger for Driver\r
+ */\r
+var LoggerSys0Params0 = new LoggerSys.Params;\r
+LoggerSys0Params0.instance.name = 'tcp3dDrvLog';\r
+Program.global.tcp3dDrvLog = LoggerSys.create(LoggerSys0Params0);\r
+\r
+/*\r
+ * allow printf() to be called from Swi threads. Note that use of this gate\r
+ * incurs additional latency for Swi processing since Swi scheduler will be\r
+ * disabled to manage critical sections within the RTS library code.\r
+BIOS.rtsGateType = BIOS.GateSwi;\r
+ */\r
+\r
+\r
+/*\r
+ * Adding the other Dependent packages\r
+ */\r
+/*xdc.loadPackage('ti.wbi.common.api');*/\r
+xdc.loadPackage('ti.sdo.edma3.drv');\r
+\r
+/* Load the TCP3D package */\r
+var Tcp3d = xdc.useModule('ti.drv.tcp3d.Settings');\r
+\r
+/* Load the CSL package */\r
+var Csl = xdc.useModule('ti.csl.Settings');\r
+\r
+/* Device specific configuration */\r
+var devName = "tci6634";\r
+Csl.deviceType = devName;\r
diff --git a/example/simtci6634/c66/bios/tcp3dSimtci6634C66BiosExampleProject.txt b/example/simtci6634/c66/bios/tcp3dSimtci6634C66BiosExampleProject.txt
--- /dev/null
@@ -0,0 +1,16 @@
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/tcp3d_drv_sample_init.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/tcp3d_example_main.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/sample_cfg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/sample_cs.c"\r
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/sample_init.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/sample_int_reg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/CpIntc_local.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/tcp3d_codeBlkSeg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/tcp3d_inputConfigPrep.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/tcp3d_itg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/src/tcp3d_testset_functions.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/simtci6634/c66/bios/tcp3d_osal.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/simtci6634/c66/bios/link.cmd"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/example/simtci6634/c66/bios/sample_config.cfg"
+-ccs.setCompilerOptions "-mv6600 -g -DUSE_TCP3D_DRIVER_TYPES --diag_warning=225 -I${TCP3D_INSTALL_PATH} -I${TCP3D_INSTALL_PATH}/ti/drv/tcp3d/example/src"\r
+-rtsc.enableRtsc\r
diff --git a/example/simtci6634/c66/bios/tcp3d_osal.c b/example/simtci6634/c66/bios/tcp3d_osal.c
--- /dev/null
@@ -0,0 +1,61 @@
+/**\r
+ * @file sample_osal.c\r
+ *\r
+ * @brief \r
+ * This is the OS abstraction layer and is used by the CPPI and QMSS\r
+ * low level drivers for the CPPI sample example.\r
+ *\r
+ * \par\r
+ * ============================================================================\r
+ * @n (C) Copyright 2009, Texas Instruments, Inc.\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+/* XDC includes */ \r
+#include <xdc/std.h>\r
+#include <xdc/cfg/global.h>\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is the TCP3D OSAL Logging API which logs \r
+ * the messages on the console.\r
+ *\r
+ * @param[in] fmt\r
+ * Formatted String.\r
+ *\r
+ * @retval\r
+ * Not Applicable\r
+ */\r
+void Osal_tcp3dLog ( char *fmt, ... )\r
+{\r
+}\r
+\r
+\r
diff --git a/example/src/CpIntc_local.c b/example/src/CpIntc_local.c
--- /dev/null
@@ -0,0 +1,144 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+/* \r
+ * Copyright (c) 2009\r
+ * Texas Instruments\r
+ *\r
+ * All rights reserved. Property of Texas Instruments\r
+ * Restricted rights to use, duplicate or disclose this code are\r
+ * granted through contract.\r
+ * \r
+ * */\r
+/*\r
+ * ======== CpIntc.c ========\r
+ */\r
+\r
+#include <xdc/std.h>\r
+#include <xdc/runtime/Error.h>\r
+#include <xdc/runtime/Startup.h>\r
+#include <xdc/runtime/System.h>\r
+\r
+#include "ti/sysbios/family/c66/tci66xx/package/internal/CpIntc.xdc.h"\r
+\r
+/*\r
+ * ======== CpIntc_dispatch ========\r
+ */\r
+//UInt32 cpintcCntr = 0;\r
+//UInt32 cpintcCntr1 = 0;\r
+//UInt32 cpintcCntr2 = 0;\r
+//UInt32 sysIntTrack[200];\r
+Void CpIntc_dispatchLoc(UInt hostInt)\r
+{\r
+ Int32 i;\r
+ UInt32 index;\r
+ UInt32 offset;\r
+ UInt32 srsrVal;\r
+ Int32 sysInt;\r
+ UInt32 id = 0;\r
+ extern volatile cregister UInt32 DNUM;\r
+\r
+// cpintcCntr++;\r
+\r
+ /* for core# 4-7 use INTC1 otherwise use INTC0 */\r
+ if (DNUM > 3) {\r
+ id = 1;\r
+ }\r
+ \r
+// if ( (*((UInt32*)0x0180000C)) == 0x1 )\r
+// System_printf("MISS detected\n");\r
+ \r
+ sysInt = CpIntc_module->hostIntToSysInt[hostInt];\r
+ \r
+// sysIntTrack[cpintcCntr]=((hostInt<<16)|sysInt);\r
+// sysIntTrack[0]=((hostInt<<16)|sysInt);\r
+\r
+ /* \r
+ * If only one system interrupt is mapped to a host interrupt\r
+ * we don't need to read the Sys Status Raw Registers. We\r
+ * know exactly which system interrupt triggered the interrupt.\r
+ */ \r
+ if (sysInt != 0xff && sysInt != 0xfe) {\r
+// cpintcCntr1++;\r
+ /* clear system interrupt associated with host interrupt */\r
+ CpIntc_clearSysInt(id, sysInt);\r
+\r
+ /* call function with arg */\r
+ CpIntc_module->dispatchTab[sysInt].fxn(\r
+ CpIntc_module->dispatchTab[sysInt].arg);\r
+ }\r
+ else {\r
+// cpintcCntr2++;\r
+ /*\r
+ * Loop through System Interrupt Status Enabled/Clear Registers for\r
+ * pending enabled interrupts. The highest numbered system interrupt\r
+ * will be processed first from left to right.\r
+ */\r
+ for (i = CpIntc_numStatusRegs - 1; i >= 0; i--) {\r
+ offset = i << 5;\r
+ \r
+ /*\r
+ * SDOCM00062100 - Nyquist CpIntc_dispatch needs to read the\r
+ * correct status pending and enabled register once the\r
+ * Simulator is fixed.\r
+ * Fix is:\r
+ * srsrVal = CpIntc_module->controller[id]->SECR[j - i];\r
+ */\r
+ srsrVal = CpIntc_module->controller[id]->SRSR[i] &\r
+ CpIntc_module->controller[id]->ESR[i];\r
+ \r
+ /* Find pending interrupts from left to right */\r
+ while (srsrVal) {\r
+ index = 31 - _lmbd(1, srsrVal);\r
+ srsrVal &= ~(1 << index);\r
+ \r
+ /* Make sure pending interrupt is mapped to host interrupt */\r
+ if (CpIntc_module->controller[id]->CMR[offset + index]\r
+ == hostInt) {\r
+ /* clear system interrupt first */\r
+ CpIntc_clearSysInt(id, offset + index);\r
+ \r
+ /* call function with arg */\r
+ CpIntc_module->dispatchTab[offset + index].fxn(\r
+ CpIntc_module->dispatchTab[offset + index].arg);\r
+ } \r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+\r
diff --git a/example/src/sample.h b/example/src/sample.h
--- /dev/null
+++ b/example/src/sample.h
@@ -0,0 +1,215 @@
+/*\r
+ * bios6_edma3_drv_sample.h\r
+ *\r
+ * Header file for the sample application for the EDMA3 Driver.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _BIOS6_EDMA3_DRV_SAMPLE_H_\r
+#define _BIOS6_EDMA3_DRV_SAMPLE_H_\r
+\r
+#include <stdio.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+\r
+/* Include EDMA3 Driver */\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/**\r
+ * Set this flag to use the CpIntc_dispatchLoc() function as the Event Combiner\r
+ * dispatchPlug function when ever the system interrupts are registered with\r
+ * CPINTC with callbacks.\r
+ */\r
+#define USE_LOCAL_CPINTC_DISPATCH 0\r
+\r
+/**\r
+ * Set this flag to use the edma3ComplHandlerLoc() function as the completion\r
+ * interrupt ISR for the region used for driver testing.\r
+ */\r
+#define EDMA_LOCAL_COMP_ISR 1\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+/**\r
+ * \brief TCC Callback - Caters to channel specific status reporting.\r
+ */\r
+typedef struct {\r
+ /** Callback function */\r
+ EDMA3_RM_TccCallback tccCb;\r
+\r
+ /** Callback data, passed to the Callback function */\r
+ void *cbData;\r
+} tccCallbackParams;\r
+#endif\r
+\r
+/* Macro to get CPINTC number */\r
+#define WHICH_CPINTC_NUM(core) ((core > 3)? 1: 0 )\r
+\r
+/**\r
+ * Cache line size on the underlying SoC. It needs to be modified\r
+ * for different cache line sizes, if the Cache is Enabled.\r
+ */\r
+#define EDMA3_CACHE_LINE_SIZE_IN_BYTES (128u)\r
+\r
+/* Error returned in case of buffers are not aligned on the cache boundary */\r
+#define EDMA3_NON_ALIGNED_BUFFERS_ERROR (-1)\r
+\r
+/* Error returned in case of data mismatch */\r
+#define EDMA3_DATA_MISMATCH_ERROR (-2)\r
+\r
+/**\r
+ * \brief EDMA3 Initialization\r
+ *\r
+ * This function initializes the EDMA3 Driver for the given EDMA3 controller\r
+ * and opens a EDMA3 driver instance. It internally calls EDMA3_DRV_create() and\r
+ * EDMA3_DRV_open(), in that order.\r
+ *\r
+ * It also registers interrupt handlers for various EDMA3 interrupts like \r
+ * transfer completion or error interrupts.\r
+ *\r
+ * \param edma3Id [IN] EDMA3 Controller Instance Id (Hardware\r
+ * instance id, starting from 0)\r
+ * \param errorCode [IN/OUT] Error code while opening DRV instance\r
+ * \return EDMA3_DRV_Handle: If successfully opened, the API will return the\r
+ * associated driver's instance handle.\r
+ */\r
+EDMA3_DRV_Handle edma3init (unsigned int edma3Id, EDMA3_DRV_Result *errorCode,\r
+ unsigned int dspCoreID, unsigned int tpccRegionUsed);\r
+\r
+/**\r
+ * \brief EDMA3 De-initialization\r
+ *\r
+ * This function de-initializes the EDMA3 Driver for the given EDMA3 controller\r
+ * and closes the previously opened EDMA3 driver instance. It internally calls \r
+ * EDMA3_DRV_close and EDMA3_DRV_delete(), in that order.\r
+ *\r
+ * It also un-registers the previously registered interrupt handlers for various \r
+ * EDMA3 interrupts.\r
+ *\r
+ * \param edma3Id [IN] EDMA3 Controller Instance Id (Hardware\r
+ * instance id, starting from 0)\r
+ * \param hEdma [IN] EDMA3 Driver handle, returned while using\r
+ * edma3init().\r
+ * \return EDMA3_DRV_SOK if success, else error code\r
+ */\r
+EDMA3_DRV_Result edma3deinit (unsigned int edma3Id, EDMA3_DRV_Handle hEdma);\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Invalidate\r
+ *\r
+ * This function invalidates the D cache.\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheInvalidate(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes);\r
+\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Flush\r
+ *\r
+ * This function flushes (cleans) the Cache\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheFlush(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes);\r
+\r
+\r
+\r
+/**\r
+ * Counting Semaphore related functions (OS dependent) should be\r
+ * called/implemented by the application. A handle to the semaphore\r
+ * is required while opening the driver/resource manager instance.\r
+ */\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Create\r
+ *\r
+ * This function creates a counting semaphore with specified\r
+ * attributes and initial value. It should be used to create a semaphore\r
+ * with initial value as '1'. The semaphore is then passed by the user\r
+ * to the EDMA3 driver/RM for proper sharing of resources.\r
+ * \param initVal [IN] is initial value for semaphore\r
+ * \param semParams [IN] is the semaphore attributes.\r
+ * \param hSem [OUT] is location to receive the handle to just created\r
+ * semaphore.\r
+ * \return EDMA3_DRV_SOK if successful, else a suitable error code.\r
+ */\r
+EDMA3_DRV_Result edma3OsSemCreate(int initVal,\r
+ const Semaphore_Params *semParams,\r
+ EDMA3_OS_Sem_Handle *hSem);\r
+\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Delete\r
+ *\r
+ * This function deletes or removes the specified semaphore\r
+ * from the system. Associated dynamically allocated memory\r
+ * if any is also freed up.\r
+ * \param hSem [IN] handle to the semaphore to be deleted\r
+ * \return EDMA3_DRV_SOK if successful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemDelete(EDMA3_OS_Sem_Handle hSem);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif /* extern "C" */\r
+\r
+#endif /* _BIOS6_EDMA3_DRV_SAMPLE_H_ */\r
+\r
diff --git a/example/src/sample_cfg.c b/example/src/sample_cfg.c
--- /dev/null
+++ b/example/src/sample_cfg.c
@@ -0,0 +1,1771 @@
+/*\r
+ * sample_cfg.c\r
+ *\r
+ * Platform specific EDMA3 hardware related information like number of transfer\r
+ * controllers, various interrupt ids etc. It is used while interrupts\r
+ * enabling / disabling. It needs to be ported for different SoCs.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+/* Number of EDMA3 controllers present in the system */\r
+#define NUM_EDMA3_INSTANCES 3u\r
+const unsigned int numEdma3Instances = NUM_EDMA3_INSTANCES;\r
+\r
+/* Number of DSPs present in the system */\r
+#define NUM_DSPS 4u\r
+//const unsigned int numDsps = NUM_DSPS;\r
+\r
+#define CGEM_REG_START (0x01800000)\r
+\r
+/* Determine the processor id by reading DNUM register. */\r
+unsigned short determineProcId()\r
+ {\r
+ volatile unsigned int *addr;\r
+ unsigned int core_no;\r
+\r
+ /* Identify the core number */\r
+ addr = (unsigned int *)(CGEM_REG_START+0x40000);\r
+ core_no = ((*addr) & 0x000F0000)>>16;\r
+\r
+ return core_no;\r
+ }\r
+\r
+/** Whether global configuration required for EDMA3 or not.\r
+ * This configuration should be done only once for the EDMA3 hardware by\r
+ * any one of the masters (i.e. DSPs).\r
+ * It can be changed depending on the use-case.\r
+ */\r
+unsigned int gblCfgReqdArray [NUM_DSPS] = {\r
+ 0, /* DSP#0 is Master, will do the global init */\r
+ 1, /* DSP#1 is Slave, will not do the global init */\r
+ 1, /* DSP#2 is Slave, will not do the global init */\r
+ 1, /* DSP#3 is Slave, will not do the global init */\r
+ };\r
+\r
+unsigned short isGblConfigRequired(unsigned int dspNum)\r
+ {\r
+ return gblCfgReqdArray[dspNum];\r
+ }\r
+\r
+/* Semaphore handles */\r
+EDMA3_OS_Sem_Handle semHandle[NUM_EDMA3_INSTANCES] = {NULL,NULL,NULL};\r
+\r
+\r
+/* Variable which will be used internally for referring number of Event Queues. */\r
+unsigned int numEdma3EvtQue[NUM_EDMA3_INSTANCES] = {2u, 4u, 4u};\r
+\r
+/* Variable which will be used internally for referring number of TCs. */\r
+unsigned int numEdma3Tc[NUM_EDMA3_INSTANCES] = {2u, 4u, 4u};\r
+\r
+/**\r
+ * Variable which will be used internally for referring transfer completion\r
+ * interrupt. Completion interrupts for all the shadow regions and all the\r
+ * EDMA3 controllers are captured since it is a multi-DSP platform.\r
+ */\r
+unsigned int ccXferCompInt[NUM_EDMA3_INSTANCES][EDMA3_MAX_REGIONS] = {\r
+ {\r
+ 38u, 39u, 40u, 41u,\r
+ 42u, 43u, 44u, 45u,\r
+ },\r
+ {\r
+ 8u, 9u, 10u, 11u,\r
+ 12u, 13u, 14u, 15u,\r
+ },\r
+ {\r
+ 24u, 25u, 26u, 27u,\r
+ 28u, 29u, 30u, 31u,\r
+ },\r
+ };\r
+\r
+/**\r
+ * Variable which will be used internally for referring channel controller's\r
+ * error interrupt.\r
+ */\r
+unsigned int ccErrorInt[NUM_EDMA3_INSTANCES] = {32u, 0u, 16u};\r
+\r
+/**\r
+ * Variable which will be used internally for referring transfer controllers'\r
+ * error interrupts.\r
+ */\r
+unsigned int tcErrorInt[NUM_EDMA3_INSTANCES][EDMA3_MAX_TC] = {\r
+ {\r
+ 34u, 35u, 0u, 0u,\r
+ 0u, 0u, 0u, 0u,\r
+ },\r
+ {\r
+ 2u, 3u, 4u, 5u,\r
+ 0u, 0u, 0u, 0u,\r
+ },\r
+ {\r
+ 18u, 19u, 20u, 21u,\r
+ 0u, 0u, 0u, 0u,\r
+ },\r
+ };\r
+\r
+/* Driver Object Initialization Configuration */\r
+EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[NUM_EDMA3_INSTANCES] =\r
+{\r
+ {\r
+ /* EDMA3 INSTANCE# 0 */\r
+ /** Total number of DMA Channels supported by the EDMA3 Controller */\r
+ 16u,\r
+ /** Total number of QDMA Channels supported by the EDMA3 Controller */\r
+ 8u,\r
+ /** Total number of TCCs supported by the EDMA3 Controller */\r
+ 16u,\r
+ /** Total number of PaRAM Sets supported by the EDMA3 Controller */\r
+ 128u,\r
+ /** Total number of Event Queues in the EDMA3 Controller */\r
+ 2u,\r
+ /** Total number of Transfer Controllers (TCs) in the EDMA3 Controller */\r
+ 2u,\r
+ /** Number of Regions on this EDMA3 controller */\r
+ 8u,\r
+\r
+ /**\r
+ * \brief Channel mapping existence\r
+ * A value of 0 (No channel mapping) implies that there is fixed association\r
+ * for a channel number to a parameter entry number or, in other words,\r
+ * PaRAM entry n corresponds to channel n.\r
+ */\r
+ 1u,\r
+\r
+ /** Existence of memory protection feature */\r
+ 1u,\r
+\r
+ /** Global Register Region of CC Registers */\r
+ (void *)0x02700000u,\r
+ /** Transfer Controller (TC) Registers */\r
+ {\r
+ (void *)0x02760000u,\r
+ (void *)0x02768000u,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL\r
+ },\r
+ /** Interrupt no. for Transfer Completion */\r
+ 38u,\r
+ /** Interrupt no. for CC Error */\r
+ 32u,\r
+ /** Interrupt no. for TCs Error */\r
+ {\r
+ 34u,\r
+ 35u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ },\r
+\r
+ /**\r
+ * \brief EDMA3 TC priority setting\r
+ *\r
+ * User can program the priority of the Event Queues\r
+ * at a system-wide level. This means that the user can set the\r
+ * priority of an IO initiated by either of the TCs (Transfer Controllers)\r
+ * relative to IO initiated by the other bus masters on the\r
+ * device (ARM, DSP, USB, etc)\r
+ */\r
+ {\r
+ 0u,\r
+ 1u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+ /**\r
+ * \brief To Configure the Threshold level of number of events\r
+ * that can be queued up in the Event queues. EDMA3CC error register\r
+ * (CCERR) will indicate whether or not at any instant of time the\r
+ * number of events queued up in any of the event queues exceeds\r
+ * or equals the threshold/watermark value that is set\r
+ * in the queue watermark threshold register (QWMTHRA).\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief To Configure the Default Burst Size (DBS) of TCs.\r
+ * An optimally-sized command is defined by the transfer controller\r
+ * default burst size (DBS). Different TCs can have different\r
+ * DBS values. It is defined in Bytes.\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a Parameter RAM set,\r
+ * if it exists, otherwise of no use.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, 14u, 15u,\r
+ /* DMA channels 16-63 DOES NOT exist */\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a TCC. This specific\r
+ * TCC code will be returned when the transfer is completed\r
+ * on the mapped channel.\r
+ */\r
+ {\r
+ 0u, 1u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 4u, 5u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 8u, 9u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 12u, 13u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ /* DMA channels 16-63 DOES NOT exist */\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping of DMA channels to Hardware Events from\r
+ * various peripherals, which use EDMA for data transfer.\r
+ * All channels need not be mapped, some can be free also.\r
+ */\r
+ {\r
+ 0x00003333u,\r
+ 0x00000000u\r
+ }\r
+ },\r
+\r
+ {\r
+ /* EDMA3 INSTANCE# 1 */\r
+ /** Total number of DMA Channels supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of QDMA Channels supported by the EDMA3 Controller */\r
+ 8u,\r
+ /** Total number of TCCs supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of PaRAM Sets supported by the EDMA3 Controller */\r
+ 512u,\r
+ /** Total number of Event Queues in the EDMA3 Controller */\r
+ 4u,\r
+ /** Total number of Transfer Controllers (TCs) in the EDMA3 Controller */\r
+ 4u,\r
+ /** Number of Regions on this EDMA3 controller */\r
+ 8u,\r
+\r
+ /**\r
+ * \brief Channel mapping existence\r
+ * A value of 0 (No channel mapping) implies that there is fixed association\r
+ * for a channel number to a parameter entry number or, in other words,\r
+ * PaRAM entry n corresponds to channel n.\r
+ */\r
+ 1u,\r
+\r
+ /** Existence of memory protection feature */\r
+ 1u,\r
+\r
+ /** Global Register Region of CC Registers */\r
+ (void *)0x02720000u,\r
+ /** Transfer Controller (TC) Registers */\r
+ {\r
+ (void *)0x02770000u,\r
+ (void *)0x02778000u,\r
+ (void *)0x02780000u,\r
+ (void *)0x02788000u,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL\r
+ },\r
+ /** Interrupt no. for Transfer Completion */\r
+ 8u,\r
+ /** Interrupt no. for CC Error */\r
+ 0u,\r
+ /** Interrupt no. for TCs Error */\r
+ {\r
+ 2u,\r
+ 3u,\r
+ 4u,\r
+ 5u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ },\r
+\r
+ /**\r
+ * \brief EDMA3 TC priority setting\r
+ *\r
+ * User can program the priority of the Event Queues\r
+ * at a system-wide level. This means that the user can set the\r
+ * priority of an IO initiated by either of the TCs (Transfer Controllers)\r
+ * relative to IO initiated by the other bus masters on the\r
+ * device (ARM, DSP, USB, etc)\r
+ */\r
+ {\r
+ 0u,\r
+ 1u,\r
+ 2u,\r
+ 3u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+ /**\r
+ * \brief To Configure the Threshold level of number of events\r
+ * that can be queued up in the Event queues. EDMA3CC error register\r
+ * (CCERR) will indicate whether or not at any instant of time the\r
+ * number of events queued up in any of the event queues exceeds\r
+ * or equals the threshold/watermark value that is set\r
+ * in the queue watermark threshold register (QWMTHRA).\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief To Configure the Default Burst Size (DBS) of TCs.\r
+ * An optimally-sized command is defined by the transfer controller\r
+ * default burst size (DBS). Different TCs can have different\r
+ * DBS values. It is defined in Bytes.\r
+ */\r
+ {\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a Parameter RAM set,\r
+ * if it exists, otherwise of no use.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, 14u, 15u,\r
+ 16u, 17u, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, 30u, 31u,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, 38u, 39u,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, 46u, 47u,\r
+ 48u, 49u, 50u, 51u, 52u, 53u, 54u, 55u,\r
+ 56u, 57u, 58u, 59u, 60u, 61u, 62u, 63u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a TCC. This specific\r
+ * TCC code will be returned when the transfer is completed\r
+ * on the mapped channel.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 16u, 17u, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, 38u, 39u,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 48u, 49u, 50u, 51u, 52u, 53u, 54u, 55u,\r
+ 56u, 57u, 58u, 59u, 60u, 61u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping of DMA channels to Hardware Events from\r
+ * various peripherals, which use EDMA for data transfer.\r
+ * All channels need not be mapped, some can be free also.\r
+ */\r
+ {\r
+ 0x3FFF3FFFu,\r
+ 0x3FFF3FFFu\r
+ }\r
+ },\r
+\r
+ {\r
+ /* EDMA3 INSTANCE# 2 */\r
+ /** Total number of DMA Channels supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of QDMA Channels supported by the EDMA3 Controller */\r
+ 8u,\r
+ /** Total number of TCCs supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of PaRAM Sets supported by the EDMA3 Controller */\r
+ 512u,\r
+ /** Total number of Event Queues in the EDMA3 Controller */\r
+ 4u,\r
+ /** Total number of Transfer Controllers (TCs) in the EDMA3 Controller */\r
+ 4u,\r
+ /** Number of Regions on this EDMA3 controller */\r
+ 8u,\r
+\r
+ /**\r
+ * \brief Channel mapping existence\r
+ * A value of 0 (No channel mapping) implies that there is fixed association\r
+ * for a channel number to a parameter entry number or, in other words,\r
+ * PaRAM entry n corresponds to channel n.\r
+ */\r
+ 1u,\r
+\r
+ /** Existence of memory protection feature */\r
+ 1u,\r
+\r
+ /** Global Register Region of CC Registers */\r
+ (void *)0x02740000u,\r
+ /** Transfer Controller (TC) Registers */\r
+ {\r
+ (void *)0x02790000u,\r
+ (void *)0x02798000u,\r
+ (void *)0x027A0000u,\r
+ (void *)0x027A8000u,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL\r
+ },\r
+ /** Interrupt no. for Transfer Completion */\r
+ 24u,\r
+ /** Interrupt no. for CC Error */\r
+ 16u,\r
+ /** Interrupt no. for TCs Error */\r
+ {\r
+ 18u,\r
+ 19u,\r
+ 20u,\r
+ 21u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ },\r
+\r
+ /**\r
+ * \brief EDMA3 TC priority setting\r
+ *\r
+ * User can program the priority of the Event Queues\r
+ * at a system-wide level. This means that the user can set the\r
+ * priority of an IO initiated by either of the TCs (Transfer Controllers)\r
+ * relative to IO initiated by the other bus masters on the\r
+ * device (ARM, DSP, USB, etc)\r
+ */\r
+ {\r
+ 0u,\r
+ 1u,\r
+ 2u,\r
+ 3u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+ /**\r
+ * \brief To Configure the Threshold level of number of events\r
+ * that can be queued up in the Event queues. EDMA3CC error register\r
+ * (CCERR) will indicate whether or not at any instant of time the\r
+ * number of events queued up in any of the event queues exceeds\r
+ * or equals the threshold/watermark value that is set\r
+ * in the queue watermark threshold register (QWMTHRA).\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief To Configure the Default Burst Size (DBS) of TCs.\r
+ * An optimally-sized command is defined by the transfer controller\r
+ * default burst size (DBS). Different TCs can have different\r
+ * DBS values. It is defined in Bytes.\r
+ */\r
+ {\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a Parameter RAM set,\r
+ * if it exists, otherwise of no use.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, 14u, 15u,\r
+ 16u, 17u, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, 30u, 31u,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, 38u, 39u,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, 46u, 47u,\r
+ 48u, 49u, 50u, 51u, 52u, 53u, 54u, 55u,\r
+ 56u, 57u, 58u, 59u, 60u, 61u, 62u, 63u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a TCC. This specific\r
+ * TCC code will be returned when the transfer is completed\r
+ * on the mapped channel.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 48u, 49u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 56u, 57u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping of DMA channels to Hardware Events from\r
+ * various peripherals, which use EDMA for data transfer.\r
+ * All channels need not be mapped, some can be free also.\r
+ */\r
+ {\r
+ 0x3FFC3FFFu,\r
+ 0x03033F3Fu\r
+ }\r
+ },\r
+};\r
+\r
+EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[NUM_EDMA3_INSTANCES][EDMA3_MAX_REGIONS] =\r
+ {\r
+ /* EDMA3 INSTANCE# 0 */\r
+ {\r
+ /* Resources owned/reserved by region 0 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0xFFFF000Fu, 0x00000FFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000003u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 */\r
+ {0x00000003u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 1 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x000000F0u, 0xFFFFF000u, 0x000000FFu, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x000000F0u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x0000000Cu},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x000000F0u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000030u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000030u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000030u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 2 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000F00u, 0x00000000u, 0xFFFFFF00u, 0x0000000Fu,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000F00u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000030u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000F00u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000300u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000300u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000300u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 3 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0xFFFFFFF0u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000F000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x000000C0u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000F000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00003000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00003000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00003000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 4 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 5 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 6 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 7 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+ },\r
+\r
+ /* EDMA3 INSTANCE# 1 */\r
+ {\r
+ /* Resources owned/reserved by region 0 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000FFFFu, 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0xFFFFFFFFu, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFFFu, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFFFu, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00003FFFu, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00003FFFu, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00003FFFu, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 1 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0xFFFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0xFFFFFFFFu, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x0000000Cu},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x3FFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 2 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x0000FFFFu, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000030u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00003FFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 3 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0xFFFF0000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0xFFFF0000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x000000C0u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0xFFFF0000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x3FFF0000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x3FFF0000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x3FFF0000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 4 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 5 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 6 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 7 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+ },\r
+\r
+ /* EDMA3 INSTANCE# 2 */\r
+ {\r
+ /* Resources owned/reserved by region 0 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000FFF0u, 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0xFFFFFFFFu, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFF0u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFF0u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00003FF0u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00003FF0u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00003FF0u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 1 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0xFFFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0xFFFFFFFFu, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x0000000Cu},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x3FFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 2 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x0000FFFFu, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000030u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00003FFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 3 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000000Fu, 0xFFFF00FFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0xFFFF00FFu},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x000000C0u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0xFFFF00FFu},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000000Fu, 0x0303003Cu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x0303003Cu},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x0303003Cu},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 4 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 5 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 6 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 7 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+ },\r
+ };\r
+\r
+/* End of File */\r
diff --git a/example/src/sample_cs.c b/example/src/sample_cs.c
--- /dev/null
+++ b/example/src/sample_cs.c
@@ -0,0 +1,503 @@
+/*\r
+ * sample_cs.c\r
+ *\r
+ * Sample functions showing the implementation of critical section entry/exit\r
+ * routines and various semaphore related routines (all BIOS6 depenedent).\r
+ * These implementations MUST be provided by the user / application, using the\r
+ * EDMA3 driver, for its correct functioning.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
+#include <ti/sysbios/hal/Cache.h>\r
+#include <ti/sysbios/hal/Hwi.h>\r
+#include <ti/sysbios/knl/Task.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+\r
+#include "sample.h"\r
+\r
+#define CHECK_OS_PROTECT_FUNCTIONS 0\r
+\r
+extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];\r
+extern unsigned int ccErrorInt[];\r
+extern unsigned int tcErrorInt[][EDMA3_MAX_TC];\r
+\r
+/**\r
+ * DSP instance number on which the executable is running. Its value is\r
+ * determined by reading the processor specific register DNUM.\r
+ */\r
+extern unsigned int dsp_num;\r
+extern unsigned int tpccRegionUsedLoc;\r
+extern unsigned int gemEvents[2];\r
+\r
+/* Local variables used for Temp Fix */\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+#include <xdc/runtime/System.h>\r
+#include "c6x.h"\r
+\r
+volatile unsigned int testOsFuncFlag = 0;\r
+volatile unsigned int testOsFuncLog[2][100];\r
+volatile unsigned int testOsFuncCntr[2] = {0,0};\r
+\r
+#endif\r
+\r
+Void edmaTestInit(Void)\r
+{\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ Int i;\r
+ for(i=0;i<100;i++)\r
+ {\r
+ testOsFuncLog[0][i] = 0;\r
+ testOsFuncLog[1][i] = 0;\r
+ }\r
+ testOsFuncCntr[0] = 0;\r
+ testOsFuncCntr[1] = 0;\r
+#endif\r
+}\r
+\r
+/**\r
+ * \brief EDMA3 OS Protect Entry\r
+ *\r
+ * This function saves the current state of protection in 'intState'\r
+ * variable passed by caller, if the protection level is\r
+ * EDMA3_OS_PROTECT_INTERRUPT. It then applies the requested level of\r
+ * protection.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION and\r
+ * EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, variable 'intState' is ignored,\r
+ * and the requested interrupt is disabled.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, '*intState' specifies the\r
+ * Transfer Controller number whose interrupt needs to be disabled.\r
+ *\r
+ * \param level is numeric identifier of the desired degree of protection.\r
+ * \param intState is memory location where current state of protection is\r
+ * saved for future use while restoring it via edma3OsProtectExit() (Only\r
+ * for EDMA3_OS_PROTECT_INTERRUPT protection level).\r
+ * \return None\r
+ */\r
+void edma3OsProtectEntry (unsigned int edma3InstanceId,\r
+ int level, unsigned int *intState)\r
+ {\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ testOsFuncLog[0][testOsFuncCntr[0]++] = TSCL;\r
+#endif\r
+ if (((level == EDMA3_OS_PROTECT_INTERRUPT)\r
+ || (level == EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR))\r
+ && (intState == NULL))\r
+ {\r
+ return;\r
+ }\r
+ else\r
+ {\r
+ switch (level)\r
+ {\r
+ /* Disable all (global) interrupts */\r
+ case EDMA3_OS_PROTECT_INTERRUPT :\r
+ *intState = Hwi_disable();\r
+ break;\r
+\r
+ /* Disable scheduler */\r
+ case EDMA3_OS_PROTECT_SCHEDULER :\r
+ Task_disable();\r
+ break;\r
+\r
+ /* Disable EDMA3 transfer completion interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 0 )\r
+ testOsFuncFlag = 1;\r
+ else\r
+ System_exit(1);\r
+#endif\r
+ CpIntc_disableSysInt(WHICH_CPINTC_NUM(dsp_num), ccXferCompInt[edma3InstanceId][tpccRegionUsedLoc]);\r
+ //EventCombiner_disableEvent(ccXferCompInt[edma3InstanceId][dsp_num]);\r
+ //intState_cs = Hwi_disable(); // Temp fix\r
+ //eventId = CpIntc_getEventId(ccXferHostInt[edma3InstanceId][dsp_num]);\r
+ //EventCombiner_disableEvent(gemEvents[0]);\r
+ break;\r
+\r
+ /* Disable EDMA3 CC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 0 )\r
+ testOsFuncFlag = 2;\r
+ else\r
+ System_exit(1);\r
+#endif\r
+ CpIntc_disableSysInt(WHICH_CPINTC_NUM(dsp_num), ccErrorInt[edma3InstanceId]);\r
+ //EventCombiner_disableEvent(ccErrorInt[edma3InstanceId]);\r
+ break;\r
+\r
+ /* Disable EDMA3 TC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR :\r
+ switch (*intState)\r
+ {\r
+ case 0:\r
+ case 1:\r
+ case 2:\r
+ case 3:\r
+ case 4:\r
+ case 5:\r
+ case 6:\r
+ case 7:\r
+ /* Fall through... */\r
+ /* Disable the corresponding interrupt */\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 0 )\r
+ testOsFuncFlag = 3;\r
+ else\r
+ System_exit(1);\r
+#endif\r
+ CpIntc_disableSysInt(WHICH_CPINTC_NUM(dsp_num), tcErrorInt[edma3InstanceId][*intState]);\r
+ //EventCombiner_disableEvent(tcErrorInt[edma3InstanceId][*intState]);\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Protect Exit\r
+ *\r
+ * This function undoes the protection enforced to original state\r
+ * as is specified by the variable 'intState' passed, if the protection\r
+ * level is EDMA3_OS_PROTECT_INTERRUPT.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION and\r
+ * EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, variable 'intState' is ignored,\r
+ * and the requested interrupt is enabled.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, 'intState' specifies the\r
+ * Transfer Controller number whose interrupt needs to be enabled.\r
+ * \param level is numeric identifier of the desired degree of protection.\r
+ * \param intState is original state of protection at time when the\r
+ * corresponding edma3OsProtectEntry() was called (Only\r
+ * for EDMA3_OS_PROTECT_INTERRUPT protection level).\r
+ * \return None\r
+ */\r
+void edma3OsProtectExit (unsigned int edma3InstanceId,\r
+ int level, unsigned int intState)\r
+ {\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ testOsFuncLog[1][testOsFuncCntr[1]++] = TSCL;\r
+#endif\r
+ switch (level)\r
+ {\r
+ /* Enable all (global) interrupts */\r
+ case EDMA3_OS_PROTECT_INTERRUPT :\r
+ Hwi_restore(intState);\r
+ break;\r
+\r
+ /* Enable scheduler */\r
+ case EDMA3_OS_PROTECT_SCHEDULER :\r
+ Task_enable();\r
+ break;\r
+\r
+ /* Enable EDMA3 transfer completion interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 1 )\r
+ testOsFuncFlag = 0;\r
+ else\r
+ System_exit(0);\r
+#endif\r
+ CpIntc_enableSysInt(WHICH_CPINTC_NUM(dsp_num), ccXferCompInt[edma3InstanceId][tpccRegionUsedLoc]);\r
+ //EventCombiner_enableEvent(ccXferCompInt[edma3InstanceId][dsp_num]);\r
+ //Hwi_restore(intState_cs); // Temp fix\r
+ //eventId = CpIntc_getEventId(ccXferHostInt[edma3InstanceId][dsp_num]);\r
+ //EventCombiner_enableEvent(gemEvents[0]);\r
+ break;\r
+\r
+ /* Enable EDMA3 CC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 2 )\r
+ testOsFuncFlag = 0;\r
+ else\r
+ System_exit(0);\r
+#endif\r
+ CpIntc_enableSysInt(WHICH_CPINTC_NUM(dsp_num), ccErrorInt[edma3InstanceId]);\r
+ //EventCombiner_enableEvent(ccErrorInt[edma3InstanceId]);\r
+ break;\r
+\r
+ /* Enable EDMA3 TC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR :\r
+ switch (intState)\r
+ {\r
+ case 0:\r
+ case 1:\r
+ case 2:\r
+ case 3:\r
+ case 4:\r
+ case 5:\r
+ case 6:\r
+ case 7:\r
+ /* Fall through... */\r
+ /* Enable the corresponding interrupt */\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 3 )\r
+ testOsFuncFlag = 0;\r
+ else\r
+ System_exit(0);\r
+#endif\r
+ CpIntc_enableSysInt(WHICH_CPINTC_NUM(dsp_num), tcErrorInt[edma3InstanceId][intState]);\r
+ //EventCombiner_enableEvent(tcErrorInt[edma3InstanceId][intState]);\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Invalidate\r
+ *\r
+ * This function invalidates the D cache.\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheInvalidate(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes)\r
+ {\r
+ EDMA3_DRV_Result cacheInvResult = EDMA3_DRV_SOK;\r
+\r
+ /* Verify whether the start address is cache aligned or not */\r
+ if((mem_start_ptr & (EDMA3_CACHE_LINE_SIZE_IN_BYTES-1u)) != 0)\r
+ {\r
+#ifdef EDMA3_DRV_DEBUG\r
+ EDMA3_DRV_PRINTF("\r\n Cache : Memory is not %d bytes alinged\r\n",\r
+ EDMA3_CACHE_LINE_SIZE_IN_BYTES);\r
+#endif\r
+ cacheInvResult = EDMA3_NON_ALIGNED_BUFFERS_ERROR;\r
+ }\r
+ else\r
+ {\r
+ Cache_inv((Ptr)mem_start_ptr, num_bytes, Cache_Type_ALL, TRUE);\r
+ }\r
+\r
+ return cacheInvResult;\r
+}\r
+\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Flush\r
+ *\r
+ * This function flushes (cleans) the Cache\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheFlush(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes)\r
+ {\r
+ EDMA3_DRV_Result cacheFlushResult = EDMA3_DRV_SOK;\r
+\r
+ /* Verify whether the start address is cache aligned or not */\r
+ if((mem_start_ptr & (EDMA3_CACHE_LINE_SIZE_IN_BYTES-1u)) != 0)\r
+ {\r
+#ifdef EDMA3_DRV_DEBUG\r
+ EDMA3_DRV_PRINTF("\r\n Cache : Memory is not %d bytes alinged\r\n",\r
+ EDMA3_CACHE_LINE_SIZE_IN_BYTES);\r
+#endif\r
+ cacheFlushResult = EDMA3_NON_ALIGNED_BUFFERS_ERROR;\r
+ }\r
+ else\r
+ {\r
+ Cache_wb((Ptr)mem_start_ptr, num_bytes, Cache_Type_ALL, TRUE);\r
+ }\r
+\r
+ return cacheFlushResult;\r
+}\r
+\r
+\r
+/**\r
+ * Counting Semaphore related functions (OS dependent) should be\r
+ * called/implemented by the application. A handle to the semaphore\r
+ * is required while opening the driver/resource manager instance.\r
+ */\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Create\r
+ *\r
+ * This function creates a counting semaphore with specified\r
+ * attributes and initial value. It should be used to create a semaphore\r
+ * with initial value as '1'. The semaphore is then passed by the user\r
+ * to the EDMA3 driver/RM for proper sharing of resources.\r
+ * \param initVal [IN] is initial value for semaphore\r
+ * \param semParams [IN] is the semaphore attributes.\r
+ * \param hSem [OUT] is location to recieve the handle to just created\r
+ * semaphore\r
+ * \return EDMA3_DRV_SOK if succesful, else a suitable error code.\r
+ */\r
+EDMA3_DRV_Result edma3OsSemCreate(int initVal,\r
+ const Semaphore_Params *semParams,\r
+ EDMA3_OS_Sem_Handle *hSem)\r
+ {\r
+ EDMA3_DRV_Result semCreateResult = EDMA3_DRV_SOK;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semCreateResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ *hSem = (EDMA3_OS_Sem_Handle)Semaphore_create(initVal, semParams, NULL);\r
+ if ( (*hSem) == NULL )\r
+ {\r
+ semCreateResult = EDMA3_DRV_E_SEMAPHORE;\r
+ }\r
+ }\r
+\r
+ return semCreateResult;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Delete\r
+ *\r
+ * This function deletes or removes the specified semaphore\r
+ * from the system. Associated dynamically allocated memory\r
+ * if any is also freed up.\r
+ * \param hSem [IN] handle to the semaphore to be deleted\r
+ * \return EDMA3_DRV_SOK if succesful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemDelete(EDMA3_OS_Sem_Handle hSem)\r
+ {\r
+ EDMA3_DRV_Result semDeleteResult = EDMA3_DRV_SOK;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semDeleteResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ Semaphore_delete((Semaphore_Handle *)&hSem);\r
+ }\r
+\r
+ return semDeleteResult;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Take\r
+ *\r
+ * This function takes a semaphore token if available.\r
+ * If a semaphore is unavailable, it blocks currently\r
+ * running thread in wait (for specified duration) for\r
+ * a free semaphore.\r
+ * \param hSem [IN] is the handle of the specified semaphore\r
+ * \param mSecTimeout [IN] is wait time in milliseconds\r
+ * \return EDMA3_DRV_Result if successful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemTake(EDMA3_OS_Sem_Handle hSem, int mSecTimeout)\r
+ {\r
+ EDMA3_DRV_Result semTakeResult = EDMA3_DRV_SOK;\r
+ unsigned short semPendResult;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semTakeResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ semPendResult = Semaphore_pend(hSem, mSecTimeout);\r
+ if (semPendResult == FALSE)\r
+ {\r
+ semTakeResult = EDMA3_DRV_E_SEMAPHORE;\r
+ }\r
+ }\r
+\r
+ return semTakeResult;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Give\r
+ *\r
+ * This function gives or relinquishes an already\r
+ * acquired semaphore token\r
+ * \param hSem [IN] is the handle of the specified semaphore\r
+ * \return EDMA3_DRV_Result if successful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemGive(EDMA3_OS_Sem_Handle hSem)\r
+ {\r
+ EDMA3_DRV_Result semGiveResult = EDMA3_DRV_SOK;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semGiveResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ Semaphore_post(hSem);\r
+ }\r
+\r
+ return semGiveResult;\r
+ }\r
+\r
+/* End of File */\r
+\r
diff --git a/example/src/sample_init.c b/example/src/sample_init.c
--- /dev/null
@@ -0,0 +1,217 @@
+/*\r
+ * sample_init.c\r
+ *\r
+ * Sample Initialization for the EDMA3 Driver for BIOS 6 based applications.\r
+ * It should be MANDATORILY done once before EDMA3 usage.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+#include <ti/sysbios/hal/Hwi.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+\r
+#include "sample.h"\r
+\r
+/** @brief EDMA3 Driver Instance specific Semaphore handle */\r
+extern EDMA3_OS_Sem_Handle semHandle[];\r
+\r
+/** To Register the ISRs with the underlying OS, if required. */\r
+extern void registerEdma3Interrupts ( unsigned int edma3Id,\r
+ unsigned int tpccRegionUsed,\r
+ unsigned int dsp_num);\r
+/** To Unregister the ISRs with the underlying OS, if previously registered. */\r
+extern void unregisterEdma3Interrupts ( unsigned int edma3Id,\r
+ unsigned int dsp_num);\r
+\r
+/* To find out the DSP# */\r
+extern unsigned short determineProcId();\r
+\r
+/**\r
+ * To check whether the global EDMA3 configuration is required or not.\r
+ * It should be done ONCE by any of the masters present in the system.\r
+ * This function checks whether the global configuration is required by the\r
+ * current master or not. In case of many masters, it should be done only\r
+ * by one of the masters. Hence this function will return TRUE only once\r
+ * and FALSE for all other masters. \r
+ */\r
+extern unsigned short isGblConfigRequired(unsigned int dspNum);\r
+\r
+/**\r
+ * DSP instance number on which the executable is running. Its value is\r
+ * determined by reading the processor specific register DNUM.\r
+ */\r
+unsigned int dsp_num;\r
+\r
+/* Number of EDMA3 controllers present in the system */\r
+extern const unsigned int numEdma3Instances;\r
+\r
+/* External Global Configuration Structure */\r
+extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];\r
+\r
+/* External Instance Specific Configuration Structure */\r
+extern EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[][EDMA3_MAX_REGIONS];\r
+\r
+/* Variables defined in tcp3d_main.c \r
+extern unsigned int tpccRegionUsed;\r
+extern unsigned int dspCoreID;*/\r
+unsigned int tpccRegionUsedLoc;\r
+\r
+/* variable available only if CHECK_OS_PROTECT_FUNCTIONS is defined in sample_cs.c */\r
+//extern unsigned int testOsFuncLog[2][100];\r
+extern Void edmaTestInit(Void);\r
+\r
+/**\r
+ * \brief EDMA3 Initialization\r
+ *\r
+ * This function initializes the EDMA3 Driver and registers the\r
+ * interrupt handlers.\r
+ *\r
+ * \return EDMA3_DRV_SOK if success, else error code\r
+ */\r
+EDMA3_DRV_Handle edma3init (unsigned int edma3Id, EDMA3_DRV_Result *errorCode,\r
+ unsigned int dspCoreID, unsigned int tpccRegionUsed)\r
+ {\r
+ EDMA3_DRV_Result edma3Result = EDMA3_DRV_E_INVALID_PARAM;\r
+ Semaphore_Params semParams;\r
+ EDMA3_DRV_GblConfigParams *globalConfig = NULL;\r
+ EDMA3_DRV_InstanceInitConfig *instanceConfig = NULL;\r
+ EDMA3_DRV_InitConfig initCfg;\r
+ EDMA3_RM_MiscParam miscParam;\r
+ EDMA3_DRV_Handle hEdma = NULL;\r
+\r
+ if ((edma3Id >= numEdma3Instances) || (errorCode == NULL))\r
+ return hEdma;\r
+\r
+ edmaTestInit();// see sample_cs.c file\r
+\r
+ /* DSP instance number */\r
+ dsp_num = dspCoreID; //determineProcId();\r
+ //tpccRegionUsed = 3;//(3-dsp_num);\r
+ tpccRegionUsedLoc = tpccRegionUsed;\r
+\r
+ globalConfig = &sampleEdma3GblCfgParams[edma3Id];\r
+\r
+ /* Configure it as master, if required */\r
+ miscParam.isSlave = 0;//isGblConfigRequired(dsp_num);\r
+ edma3Result = EDMA3_DRV_create (edma3Id, globalConfig ,\r
+ (void *)&miscParam);\r
+\r
+ if (edma3Result == EDMA3_DRV_SOK)\r
+ {\r
+ /**\r
+ * Driver Object created successfully.\r
+ * Create a semaphore now for driver instance.\r
+ */\r
+ Semaphore_Params_init(&semParams);\r
+\r
+ initCfg.drvSemHandle = NULL;\r
+ edma3Result = edma3OsSemCreate(1, &semParams, &initCfg.drvSemHandle);\r
+ }\r
+\r
+ if (edma3Result == EDMA3_DRV_SOK)\r
+ {\r
+ /* Save the semaphore handle for future use */\r
+ semHandle[edma3Id] = initCfg.drvSemHandle;\r
+\r
+ /* configuration structure for the Driver */\r
+ instanceConfig = &sampleInstInitConfig[edma3Id][tpccRegionUsed];\r
+\r
+ initCfg.isMaster = TRUE;\r
+ /* Choose shadow region according to the DSP# */\r
+ initCfg.regionId = (EDMA3_RM_RegionId)tpccRegionUsed;\r
+ /* Driver instance specific config NULL */\r
+ initCfg.drvInstInitConfig = instanceConfig;\r
+\r
+ initCfg.gblerrCb = NULL;\r
+ initCfg.gblerrData = NULL;\r
+\r
+ /* Open the Driver Instance */\r
+ hEdma = EDMA3_DRV_open (edma3Id, (void *) &initCfg, &edma3Result);\r
+ }\r
+\r
+ if(hEdma && (edma3Result == EDMA3_DRV_SOK))\r
+ {\r
+ /**\r
+ * Register Interrupt Handlers for various interrupts\r
+ * like transfer completion interrupt, CC error\r
+ * interrupt, TC error interrupts etc, if required.\r
+ */\r
+ registerEdma3Interrupts(edma3Id, tpccRegionUsed, dsp_num);\r
+ }\r
+\r
+ *errorCode = edma3Result; \r
+ return hEdma;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 De-initialization\r
+ *\r
+ * This function removes the EDMA3 Driver instance and unregisters the\r
+ * interrupt handlers.\r
+ *\r
+ * \return EDMA3_DRV_SOK if success, else error code\r
+ */\r
+EDMA3_DRV_Result edma3deinit (unsigned int edma3Id, EDMA3_DRV_Handle hEdma)\r
+ {\r
+ EDMA3_DRV_Result edma3Result = EDMA3_DRV_E_INVALID_PARAM;\r
+\r
+ /* Unregister Interrupt Handlers first */\r
+ unregisterEdma3Interrupts(edma3Id, dsp_num);\r
+\r
+ /* Delete the semaphore */\r
+ edma3Result = edma3OsSemDelete(semHandle[edma3Id]);\r
+\r
+ if (EDMA3_DRV_SOK == edma3Result )\r
+ {\r
+ /* Make the semaphore handle as NULL. */\r
+ semHandle[edma3Id] = NULL;\r
+\r
+ /* Now, close the EDMA3 Driver Instance */\r
+ edma3Result = EDMA3_DRV_close (hEdma, NULL);\r
+ }\r
+\r
+ if (EDMA3_DRV_SOK == edma3Result )\r
+ {\r
+ /* Now, delete the EDMA3 Driver Object */\r
+ edma3Result = EDMA3_DRV_delete (edma3Id, NULL);\r
+ }\r
+\r
+ return edma3Result;\r
+ }\r
+\r
+/* End of File */\r
+\r
diff --git a/example/src/sample_int_reg.c b/example/src/sample_int_reg.c
--- /dev/null
@@ -0,0 +1,482 @@
+/*\r
+ * sample_int_reg.c\r
+ *\r
+ * Platform specific interrupt registration and un-registration routines.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+#include <ti/sysbios/family/c64p/Hwi.h>\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
+\r
+#include <xdc/runtime/System.h>\r
+\r
+#include "sample.h"\r
+\r
+extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];\r
+extern unsigned int ccErrorInt[];\r
+extern unsigned int tcErrorInt[][EDMA3_MAX_TC];\r
+extern unsigned int numEdma3Tc[];\r
+\r
+#define DEBUG_PRINTS 0\r
+#define MAP_ONCE_ONLY 1\r
+#define ISR_APPROACH_WHILE 1 // 0 would make the code to hang\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tpcc.h>\r
+\r
+//extern CSL_TpccRegs *tpcc2Regs;\r
+extern unsigned int tpccRegionUsedLoc;\r
+\r
+tccCallbackParams edma3IntrParamsLoc[64];\r
+unsigned int allocatedTCCsLoc[2u] = {0x0u, 0x0u};\r
+\r
+static void edma3ComplHandlerLoc (unsigned int edma3Id);\r
+#endif\r
+\r
+void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(unsigned int arg) =\r
+ {\r
+ &lisrEdma3TC0ErrHandler0,\r
+ &lisrEdma3TC1ErrHandler0,\r
+ &lisrEdma3TC2ErrHandler0,\r
+ &lisrEdma3TC3ErrHandler0,\r
+ &lisrEdma3TC4ErrHandler0,\r
+ &lisrEdma3TC5ErrHandler0,\r
+ &lisrEdma3TC6ErrHandler0,\r
+ &lisrEdma3TC7ErrHandler0,\r
+ };\r
+\r
+unsigned int hwiInterrupt = 8;\r
+\r
+unsigned int gemEvents[2];\r
+\r
+/* Host interrupts for transfer completion (per spec intc_1.3.4.12.xlsx) */\r
+/* First 4 cores are connected from CP_INTC0 and last 4 cores are connected from CP_INTC1 */\r
+//unsigned int ccXferHostInt[NUM_EDMA3_INSTANCES][NUM_DSPS] = {\r
+ /* CP_INTC0 | CP_INTC1 */\r
+unsigned int ccXferHostInt[5][8] = {\r
+ {68u, 78u, 88u, 98u, 68u, 78u, 88u, 98u},\r
+ {69u, 79u, 89u, 99u, 69u, 79u, 89u, 99u},\r
+ {70u, 80u, 90u, 100u, 70u, 80u, 90u, 100u},\r
+ {71u, 81u, 91u, 101u, 71u, 81u, 91u, 101u},\r
+ {72u, 82u, 92u, 102u, 72u, 82u, 92u, 102u},\r
+ };\r
+unsigned int edma3ErrHostInt[5][8] = {\r
+ {73u, 83u, 93u, 103u, 73u, 83u, 93u, 103u},\r
+ {64u, 74u, 84u, 94u, 64u, 74u, 84u, 94u},\r
+ {65u, 75u, 85u, 95u, 65u, 75u, 85u, 95u},\r
+ {66u, 76u, 86u, 96u, 66u, 76u, 86u, 96u},\r
+ {67u, 77u, 87u, 97u, 67u, 77u, 87u, 97u},\r
+ };\r
+\r
+//extern unsigned int dsp_num;\r
+//extern unsigned int tpccRegionUsed;\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+extern Void CpIntc_dispatchLoc(UInt hostInt);\r
+#endif\r
+\r
+/** To Register the ISRs with the underlying OS, if required */\r
+void registerEdma3Interrupts ( unsigned int edma3Id,\r
+ unsigned int tpccRegionUsed,\r
+ unsigned int dsp_num)\r
+ {\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+ unsigned int numTc = 0;\r
+#if MAP_ONCE_ONLY\r
+ static UInt32 mapDone = 0;\r
+#endif\r
+ unsigned int cpIntcNum = WHICH_CPINTC_NUM(dsp_num);//(dsp_num > 3)? 1: 0;\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Transfer completion ISR */\r
+ CpIntc_dispatchPlug(ccXferCompInt[edma3Id][tpccRegionUsed],\r
+#if EDMA_LOCAL_COMP_ISR\r
+ edma3ComplHandlerLoc,\r
+#else\r
+ lisrEdma3ComplHandler0,\r
+#endif\r
+ edma3Id,\r
+ TRUE);\r
+#if MAP_ONCE_ONLY\r
+ if (!mapDone)\r
+#endif\r
+ CpIntc_mapSysIntToHostInt(cpIntcNum, ccXferCompInt[edma3Id][tpccRegionUsed],\r
+ ccXferHostInt[edma3Id][dsp_num]);\r
+ CpIntc_enableHostInt(cpIntcNum, ccXferHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(ccXferHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_dispatchPlug (eventId,\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+ CpIntc_dispatchLoc,\r
+#else\r
+ CpIntc_dispatch,\r
+#endif\r
+ ccXferHostInt[edma3Id][dsp_num],\r
+ TRUE);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t ccXferCompInt : %d \n", ccXferCompInt[edma3Id][tpccRegionUsed]);\r
+ System_printf("\t\t ccXferHostInt : %d \n", ccXferHostInt[edma3Id][dsp_num]);\r
+ System_printf("\t\t eventId : %d \n", eventId);\r
+#endif\r
+ gemEvents[0] = eventId;\r
+\r
+ /* CC Error ISR */\r
+ CpIntc_dispatchPlug(ccErrorInt[edma3Id], lisrEdma3CCErrHandler0,\r
+ edma3Id, TRUE);\r
+#if MAP_ONCE_ONLY\r
+ if (!mapDone)\r
+#endif\r
+ CpIntc_mapSysIntToHostInt(cpIntcNum, ccErrorInt[edma3Id],\r
+ edma3ErrHostInt[edma3Id][dsp_num]);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t ccErrorInt : %d \n", ccErrorInt[edma3Id]);\r
+ System_printf("\t\t edma3ErrHostInt : %d \n", edma3ErrHostInt[edma3Id][dsp_num]);\r
+#endif\r
+\r
+ /* TC Error ISR */\r
+ while (numTc < numEdma3Tc[edma3Id])\r
+ {\r
+ CpIntc_dispatchPlug(tcErrorInt[edma3Id][numTc],\r
+ (CpIntc_FuncPtr )(ptrEdma3TcIsrHandler[numTc]),\r
+ edma3Id, TRUE);\r
+#if MAP_ONCE_ONLY\r
+ if (!mapDone)\r
+#endif\r
+ CpIntc_mapSysIntToHostInt(cpIntcNum, tcErrorInt[edma3Id][numTc],\r
+ edma3ErrHostInt[edma3Id][dsp_num]);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t tcErrorInt : %d \n", tcErrorInt[edma3Id][numTc]);\r
+ System_printf("\t\t edma3ErrHostInt : %d \n", edma3ErrHostInt[edma3Id][dsp_num]);\r
+#endif\r
+ numTc++;\r
+ }\r
+ /* Enable the host interrupt which is common for both CC and TC error */\r
+ CpIntc_enableHostInt(cpIntcNum, edma3ErrHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(edma3ErrHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_dispatchPlug (eventId,\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+ CpIntc_dispatchLoc,\r
+#else\r
+ CpIntc_dispatch,\r
+#endif\r
+ edma3ErrHostInt[edma3Id][dsp_num],\r
+ TRUE);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t eventId : %d \n", eventId);\r
+#endif\r
+ gemEvents[1] = eventId;\r
+\r
+ //Hwi_enableInterrupt(hwiInterrupt);\r
+\r
+ /* enable the 'global' switch */\r
+ CpIntc_enableAllHostInts(cpIntcNum);\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+ tpccRegionUsedLoc = tpccRegionUsed;\r
+#endif\r
+\r
+#if MAP_ONCE_ONLY\r
+ mapDone = 1;\r
+#endif\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+ }\r
+\r
+/** To Unregister the ISRs with the underlying OS, if previously registered. */\r
+void unregisterEdma3Interrupts (unsigned int edma3Id, unsigned int dsp_num)\r
+ {\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+// unsigned int numTc = 0;\r
+ unsigned int cpIntcNum = WHICH_CPINTC_NUM(dsp_num);//(dsp_num > 3)? 1: 0;\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Transfer completion ISR */\r
+ CpIntc_disableHostInt(cpIntcNum, ccXferHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(ccXferHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_disableEvent(eventId);\r
+\r
+ /* CC/TC Error ISR */\r
+ CpIntc_disableHostInt(cpIntcNum, edma3ErrHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(edma3ErrHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_disableEvent(eventId);\r
+\r
+ /**\r
+ * Clear all system interrupt to host interrupt mapping.\r
+ * - might not be needed\r
+ * - doing to get clean numbers from cpintc dispatcher for debugging\r
+ * - DID NOT HELP, so commenting for now\r
+ */\r
+// CpIntc_mapSysIntToHostInt(cpIntcNum, ccXferCompInt[edma3Id][tpccRegionUsedLoc], 0);\r
+// CpIntc_mapSysIntToHostInt(cpIntcNum, ccErrorInt[edma3Id], 0);\r
+// while (numTc < numEdma3Tc[edma3Id])\r
+// {\r
+// CpIntc_mapSysIntToHostInt(cpIntcNum, tcErrorInt[edma3Id][numTc], 0);\r
+// numTc++;\r
+// }\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+ }\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+/**\r
+ * edma3ComplHandler\r
+ * \brief Interrupt handler for successful transfer completion.\r
+ *\r
+ * \note This function first disables its own interrupt to make it non-\r
+ * entrant. Later, after calling all the callback functions, it\r
+ * re-enables its own interrupt.\r
+ *\r
+ * \return None.\r
+ */\r
+UInt32 tpccIsrCntr = 0;\r
+UInt32 tpccCbCntr = 0;\r
+static void edma3ComplHandlerLoc (unsigned int edma3Id)\r
+ {\r
+#if !ISR_APPROACH_WHILE\r
+ unsigned int Cnt;\r
+#endif\r
+ volatile CSL_TPCC_ShadowRegs *shadowRegs = NULL;\r
+ volatile unsigned int pendingIrqs;\r
+ unsigned int indexl;\r
+ unsigned int indexh;\r
+ CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMACC_2_REGS;\r
+\r
+ tpccIsrCntr++;\r
+\r
+ if (tpcc2Regs != NULL)\r
+ {\r
+ shadowRegs = (volatile CSL_TPCC_ShadowRegs *)\r
+ (&tpcc2Regs->SHADOW[tpccRegionUsedLoc]);\r
+ }\r
+\r
+#if !ISR_APPROACH_WHILE\r
+ Cnt = 0u;\r
+#endif\r
+ pendingIrqs = 0u;\r
+ indexl = 1u;\r
+ indexh = 1u;\r
+\r
+#if ISR_APPROACH_WHILE\r
+ while((shadowRegs->TPCC_IPR !=0 ) || (shadowRegs->TPCC_IPRH !=0 ))\r
+ {\r
+ /* Loop for EDMA3_RM_COMPL_HANDLER_RETRY_COUNT number of time,\r
+ breaks when no pending interrupt is found */\r
+ indexl = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPR;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[0u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u) == TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPR register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[indexl].tccCb != NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICR = (1u << indexl);\r
+\r
+ tpccCbCntr++;\r
+ \r
+ edma3IntrParamsLoc[indexl].tccCb (indexl,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[indexl].cbData);\r
+ }\r
+ }\r
+ ++indexl;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+\r
+ indexh = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPRH;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[1u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u)==TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPRH register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[32u+indexh].tccCb!=NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICRH = (1u << indexh);\r
+\r
+ edma3IntrParamsLoc[32u+indexh].tccCb(32u+indexh,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[32u+indexh].cbData);\r
+ }\r
+ }\r
+ ++indexh;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+ }\r
+#else // ISR_APPROACH_WHILE\r
+ if((shadowRegs->TPCC_IPR !=0 ) || (shadowRegs->TPCC_IPRH !=0 ))\r
+ {\r
+ /**\r
+ * Since an interrupt has found, we have to make sure that this\r
+ * interrupt (TCC) belongs to the TCCs allocated by us only.\r
+ * It might happen that someone else, who is using EDMA3 also,\r
+ * is the owner of this interrupt channel i.e. the TCC.\r
+ * For this, use the allocatedTCCs[], to check which all interrupt\r
+ * channels are owned by the EDMA3 RM Instances.\r
+ */\r
+\r
+ edma3OsProtectEntry (edma3Id,\r
+ EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,\r
+ NULL);\r
+\r
+ /* Loop for EDMA3_RM_COMPL_HANDLER_RETRY_COUNT number of time,\r
+ breaks when no pending interrupt is found */\r
+ while ((Cnt < 10u)\r
+ && ((indexl != 0u) || (indexh != 0u)))\r
+ {\r
+ indexl = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPR;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[0u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u) == TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPR register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[indexl].tccCb != NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICR = (1u << indexl);\r
+\r
+ tpccCbCntr++;\r
+ \r
+ edma3IntrParamsLoc[indexl].tccCb (indexl,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[indexl].cbData);\r
+ }\r
+ }\r
+ ++indexl;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+\r
+ indexh = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPRH;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[1u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u)==TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPRH register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[32u+indexh].tccCb!=NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICRH = (1u << indexh);\r
+\r
+ edma3IntrParamsLoc[32u+indexh].tccCb(32u+indexh,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[32u+indexh].cbData);\r
+ }\r
+ }\r
+ ++indexh;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+\r
+ Cnt++;\r
+ }\r
+\r
+ indexl = (shadowRegs->TPCC_IPR & allocatedTCCsLoc[0u]);\r
+ indexh = (shadowRegs->TPCC_IPRH & allocatedTCCsLoc[1u]);\r
+\r
+ if((indexl !=0 ) || (indexh !=0 ))\r
+ {\r
+ shadowRegs->TPCC_IEVAL=0x1u;\r
+ }\r
+\r
+ edma3OsProtectExit (edma3Id,\r
+ EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,\r
+ NULL);\r
+ }\r
+ /* for testing only */\r
+ else\r
+ {\r
+ while(1);\r
+ }\r
+#endif // ISR_APPROACH_WHILE\r
+ }\r
+#endif // EDMA_LOCAL_COMP_ISR\r
diff --git a/example/src/tcp3d_codeBlkSeg.c b/example/src/tcp3d_codeBlkSeg.c
--- /dev/null
@@ -0,0 +1,208 @@
+/** \r
+ * \file tcp3d_codeBlkSeg.c\r
+ *\r
+ * \brief Calculates code block segmentation parameteres based on the block length and SW0 length. \r
+ *\r
+ * Copyright (c) Texas Instruments Incorporated 2008\r
+ *\r
+ * Use of this software is controlled by the terms and conditions found in the\r
+ * license agreement under which this software has been supplied or provided.\r
+ * \r
+ */\r
+#include "tcp3d_codeBlkSeg.h"\r
+\r
+/** TCP3D SW0 nominal values */\r
+Int32 tcp3d_sw0_Tab[] = {16, 32, 48, 64, 96, 128};\r
+\r
+/** Used for getting the sw0LenSel index values */\r
+Int32 TAB[] = {0, 1, 2, 3, 3, 4, 4, 5};\r
+\r
+/** Table used for division optimization logic */\r
+Int32 shiftValTab [] = {4, 5, 4, 6, 5, 7};\r
+\r
+/** Table used for division optimization logic */\r
+Uint32 mulValTab [] = {32768, 32768, 10923, 32768, 10923, 32768};\r
+\r
+/** Table used for checking bounds */\r
+Uint32 frameLenTab[2][2] = {40,5114,40,6144};\r
+\r
+/** \r
+ * \fn Int32 TCP3D_codeBlkSeg (\r
+ * IN Uint32 blockLengthK,\r
+ * IN Uint8 numMAP,\r
+ * IN Uint8 * const RESTRICT sw0NomLen,\r
+ * OUT Uint8 * const RESTRICT sw0LenSel,\r
+ * OUT Uint8 * const RESTRICT sw1Len,\r
+ * OUT Uint8 * const RESTRICT sw2LenSel,\r
+ * OUT Uint8 * const RESTRICT numsw0)\r
+ * \brief Calculates code block segmentation parameteres based on the block length and SW0 length.\r
+ * \r
+ * \r
+ * \param[in] blockLengthK\r
+ * Code block length. (Number of information bits.)\r
+ * \r
+ *\r
+ * \param[in] numMAP\r
+ * Number of MAP decoders used. =1 for WCDMA, =2 for LTE and WiMAX\r
+ *\r
+ * \param[in] sw0NomLen\r
+ * Nominal length for the sliding window 0. Valid values are from the set: {16, 32, \r
+ * 48, 64, 96, 128}. Note that if [blockLengthK <= (numMAP * 128 * sw0NomLen)] does \r
+ * not hold, the function will pick the first greater length value from the set for which\r
+ * the above inequality holds, and will return it.\r
+ * \r
+ * This will be updated with the picked value.\r
+ * \r
+ * \param[out] sw0LenSel\r
+ * Input configuration register parameter. The value depends on the picked SW0 length \r
+ * used, (sw0NomLen), and the possible values are: \r
+ * 0 - 16 bits \r
+ * 1 - 32 bits\r
+ * 2 - 48 bits\r
+ * 3 - 64 bits\r
+ * 4 - 96 bits\r
+ * 5 - 128 bits\r
+ *\r
+ * \r
+ * \param[out] sw1Len\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 9 - 10 bits\r
+ * 10 - 11 bits\r
+ * 11 - 12 bits\r
+ * ...\r
+ * 127 - 128 bits\r
+ * \r
+ * \r
+ * \param[out] sw2LenSel\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 0 - SW2 is not present\r
+ * 1 - SW2 length is same as SW1\r
+ * 2 - SW2 length is less by 2 bits from SW1\r
+ * \r
+ * \param[out] numsw0\r
+ * Input configuration register parameter. Number of SW0 used in the decoder.\r
+ * \r
+ * \return Return indicates PASS or FAIL with ZERO or non-ZERO values.\r
+ * \r
+ * \r
+ */\r
+Int32 TCP3D_codeBlkSeg (\r
+ IN Uint32 blockLengthK,\r
+ IN Uint8 numMAP,\r
+ INOUT Uint8 * const RESTRICT sw0NomLen,\r
+ OUT Uint8 * const RESTRICT sw0LenSel,\r
+ OUT Uint8 * const RESTRICT sw1Len,\r
+ OUT Uint8 * const RESTRICT sw2LenSel,\r
+ OUT Uint8 * const RESTRICT numsw0)\r
+{\r
+ Int32 status = 0;\r
+ Int32 K, Kext;\r
+ Int32 numSWrem;\r
+ Int32 subFrameLen;\r
+ Int32 sw0LenSelTmp;\r
+ Int32 sw1LenTmp;\r
+ Int32 sw2LenSelTmp;\r
+ Int32 numsw0Tmp;\r
+ Int32 numSW;\r
+ Int32 shiftVal, mulVal;\r
+ Int32 sw0Len = *sw0NomLen;\r
+\r
+ /**\r
+ * Check the bounds based on numMAP value. frameLenTab is for the bound values\r
+ * numMAP - mode - block length bounds\r
+ * 1 - 3GPP - [40,5114]\r
+ * 2 - LTE/WIMAX - [40,6144]\r
+ */\r
+ if ( (blockLengthK < frameLenTab[numMAP-1][0]) ||\r
+ (blockLengthK > frameLenTab[numMAP-1][1]) )\r
+ {\r
+ status = 1;\r
+ return (status);\r
+ }\r
+\r
+ K = blockLengthK;\r
+ Kext = ((K + 0x3)>>2)<<2;\r
+\r
+ //Calculate sw0LenSelTmp, SW1Len, SW2LenSel, numsw0Tmp\r
+ subFrameLen = Kext >> numMAP; //Kext / (2*numMAP);\r
+\r
+ sw0LenSelTmp = TAB[((sw0Len>>4)-1)&0x7];\r
+\r
+ //Check that this holds: (reg->NumInfoBits <= 128 * sparms->tcp3_SW0_length * numMap)\r
+ while((Kext > 128 * sw0Len * numMAP) && sw0LenSelTmp<6)\r
+ {\r
+ sw0LenSelTmp++;\r
+ sw0Len = tcp3d_sw0_Tab[sw0LenSelTmp];\r
+ }\r
+\r
+ //numSW = subFrameLen/sw0Len; Replaced by:\r
+ shiftVal = shiftValTab[sw0LenSelTmp];\r
+ mulVal = mulValTab[sw0LenSelTmp];\r
+ numSW = _mpysu((subFrameLen >> shiftVal), mulVal)>>15;\r
+\r
+ numSWrem = subFrameLen - numSW*sw0Len;\r
+ if(numSWrem)\r
+ {\r
+ numSW++;\r
+ }\r
+\r
+ if(numSW == 1)\r
+ {\r
+ numsw0Tmp = 0;\r
+ sw1LenTmp = subFrameLen-1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 0; //SW2 is Off.\r
+ }\r
+ else if(numSW == 2)\r
+ {\r
+ numsw0Tmp = 0;\r
+ if(subFrameLen & 0x3)\r
+ {\r
+ sw1LenTmp = 2*(subFrameLen>>2) + 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 2; //sw1LenTmp > SW2Len\r
+ }\r
+ else\r
+ {\r
+ sw1LenTmp = (subFrameLen>>1) - 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 1; //sw1LenTmp = SW2Len\r
+ }\r
+ }\r
+ else if( numSWrem <= (sw0Len>>1) )\r
+ {\r
+ numsw0Tmp = numSW-2;\r
+ numSWrem = subFrameLen - (numSW-2)*sw0Len;\r
+ if((numSWrem) & 0x3)\r
+ {\r
+ sw1LenTmp = 2*(numSWrem>>2) + 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 2; //sw1LenTmp > SW2Len\r
+ }\r
+ else\r
+ {\r
+ sw1LenTmp = (numSWrem>>1) - 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 1; //sw1LenTmp = SW2Len\r
+ }\r
+ }\r
+ else\r
+ {\r
+ numsw0Tmp = numSW-1;\r
+ sw1LenTmp = numSWrem - 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 0; //SW2 is Off.\r
+ }\r
+\r
+\r
+ *sw0LenSel = (Uint8) sw0LenSelTmp;\r
+ *sw1Len = (Uint8) sw1LenTmp;\r
+ *sw2LenSel = (Uint8) sw2LenSelTmp;\r
+ *numsw0 = (Uint8) numsw0Tmp;\r
+ *sw0NomLen = (Uint8) sw0Len;\r
+\r
+ return ( status );\r
+\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
diff --git a/example/src/tcp3d_codeBlkSeg.h b/example/src/tcp3d_codeBlkSeg.h
--- /dev/null
@@ -0,0 +1,81 @@
+#ifndef _TCP3D_CODE_BLK_SEG_H_\r
+#define _TCP3D_CODE_BLK_SEG_H_\r
+\r
+#ifndef USE_TCP3D_DRIVER_TYPES\r
+#include "swpform.h"\r
+#else\r
+#include <ti/csl/tistdtypes.h>\r
+#include <tcp3d_drv_types.h>\r
+#endif\r
+\r
+/** \r
+ * \fn Int32 TCP3D_codeBlkSeg (\r
+ * IN Uint32 blockLengthK,\r
+ * IN Uint8 numMAP,\r
+ * IN Uint8 * const RESTRICT sw0NomLen,\r
+ * OUT Uint8 * const RESTRICT sw0LenSel,\r
+ * OUT Uint8 * const RESTRICT sw1Len,\r
+ * OUT Uint8 * const RESTRICT sw2LenSel,\r
+ * OUT Uint8 * const RESTRICT numsw0)\r
+ * \brief Calculates code block segmentation parameteres based on the block lenght and SW0 length.\r
+ * \r
+ * \r
+ * \param[in] blockLengthK\r
+ * Code block length. (Number of information bits.)\r
+ * \r
+ *\r
+ * \param[in] numMAP\r
+ * Number of MAP decoders used. =1 for WCDMA, =2 for LTE and WiMAX\r
+ *\r
+ * \param[in,out] sw0NomLen\r
+ * Nominal length for the sliding window 0. Valid values are from the set: {16, 32, \r
+ * 48, 64, 96, 128}. Note that if [blockLengthK <= (numMAP * 128 * sw0NomLen)] does \r
+ * not hold, the function will pick the first greater length value from the set for which\r
+ * the above inequality holds, and will return it.\r
+ * \r
+ * This will be updated with the picked value.\r
+ * \r
+ * \param[out] sw0LenSel\r
+ * Input configuration register parameter. The value depends on the picked SW0 length \r
+ * used, (sw0NomLen), and the possible values are: \r
+ * 0 - 16 bits \r
+ * 1 - 32 bits\r
+ * 2 - 48 bits\r
+ * 3 - 64 bits\r
+ * 4 - 96 bits\r
+ * 5 - 128 bits\r
+ *\r
+ * \r
+ * \param[out] sw1Len\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 9 - 10 bits\r
+ * 10 - 11 bits\r
+ * 11 - 12 bits\r
+ * ...\r
+ * 127 - 128 bits\r
+ * \r
+ * \r
+ * \param[out] sw2LenSel\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 0 - SW2 is not present\r
+ * 1 - SW2 length is same as SW1\r
+ * 2 - SW2 length is less by 2 bits from SW1\r
+ * \r
+ * \param[out] numsw0\r
+ * Input configuration register parameter. Number of SW0 used in the decoder.\r
+ * \r
+ * \return Return indicates PASS or FAIL with ZERO or non-ZERO values.\r
+ * \r
+ * \r
+ */\r
+Int32 TCP3D_codeBlkSeg (\r
+ IN Uint32 blockLengthK,\r
+ IN Uint8 numMAP,\r
+ IN Uint8 * const RESTRICT sw0NomLen,\r
+ OUT Uint8 * const RESTRICT sw0LenSel,\r
+ OUT Uint8 * const RESTRICT sw1Len,\r
+ OUT Uint8 * const RESTRICT sw2LenSel,\r
+ OUT Uint8 * const RESTRICT numsw0);\r
+#endif\r
diff --git a/example/src/tcp3d_drv_sample.h b/example/src/tcp3d_drv_sample.h
--- /dev/null
@@ -0,0 +1,155 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_SAMPLE_H_\r
+#define _TCP3D_SAMPLE_H_\r
+\r
+#include <xdc/std.h>\r
+#include <xdc/runtime/System.h>\r
+#include <xdc/runtime/Memory.h>\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+#include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
+\r
+#include "sample.h"\r
+\r
+#if (CSL_TCP3D_PER_CNT > 1)\r
+#include "tcp3d_multi_inst.h"\r
+#else\r
+#include "tcp3d_single_inst.h"\r
+#endif\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+extern tccCallbackParams edma3IntrParamsLoc[];\r
+extern unsigned int allocatedTCCsLoc[];\r
+#endif\r
+\r
+#define EDMA_RESULT_CHECK(res) ((res == EDMA3_DRV_SOK) ? "Passed": "Failed")\r
+\r
+/*\r
+ * EDMA Resource structure\r
+ */\r
+typedef struct EDMA_RES\r
+{\r
+ UInt32 chNo;\r
+ UInt32 tccNo;\r
+ EDMA3_RM_TccCallback cbFunc;\r
+ Void *cbData;\r
+} EDMA_RES;\r
+\r
+/*\r
+ * EDMA configuration structure\r
+ */\r
+typedef struct EDMA_CONFIG\r
+{\r
+ EDMA_RES pingChRes[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ EDMA_RES pongChRes[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ EDMA_RES linkChRes[TCP3D_DRV_MAX_LINK_CH];\r
+} EDMA_CONFIG;\r
+\r
+/**\r
+ * \brief TCP3D Initialization\r
+ *\r
+ * This function initializes the TCP3D Driver for the given TCP3D instance ID.\r
+ * It internally calls Tcp3d_getNumBuf(), Tcp3d_getBufDesc() and Tcp3d_init(),\r
+ * in that order and memory is allocated from the heap pointer given.\r
+ */\r
+Tcp3d_Instance* tcp3dSampleInit(\r
+ IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ UInt32 testMaxBlocks,\r
+ UInt32 testMode,\r
+ UInt32 testDoubleBuffer,\r
+ UInt32 testLteCrcSel,\r
+ UInt32 dspCoreID,\r
+ EDMA3_DRV_Handle hEdma,\r
+ UInt32 tpccRegionUsed,\r
+ EDMA_CONFIG *edmaConfig,\r
+ Tcp3d_Result *errCode);\r
+\r
+/**\r
+ * \brief TCP3D De-initialization\r
+ *\r
+ * This function de-initializes the TCP3D Driver for the given TCP3D instance ID.\r
+ * Frees any memory allocated from the heap during the initialization.\r
+ * \r
+ * Currently, there are no driver function calls.\r
+ */\r
+Tcp3d_Result tcp3dSampleDeinit(\r
+ IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ Tcp3d_Instance *tcp3dInst);\r
+\r
+/**\r
+ * \brief Open EDMA channels for TCP3D driver\r
+ *\r
+ * Function for opening EDMA3 channels using the EDMA3 LLD APIs based on the\r
+ * TCP3D instance ID given and the details are updated in the edmaConfig structure.\r
+ */\r
+Void openEdmaChannels ( EDMA3_DRV_Handle hEdma,\r
+ UInt8 instNum,\r
+ EDMA_CONFIG *edmaConfig);\r
+\r
+/**\r
+ * \brief Close EDMA channels for TCP3D driver\r
+ *\r
+ * This function initializes the TCP3D Driver for the given TCP3D instance ID.\r
+ * It internally calls Tcp3d_getNumBuf(), Tcp3d_getBufDesc() and Tcp3d_init(),\r
+ * in that order and memory is allocated from the heap pointer given.\r
+ */\r
+Void closeEdmaChannels (EDMA3_DRV_Handle hEdma,\r
+ UInt8 instNum,\r
+ EDMA_CONFIG *edmaConfig);\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+/**\r
+ * Fill the tables for allocated TCC & tccCB params, used with local\r
+ * EDMA3 call back ISR routine (see in sample_int_reg.c file).\r
+ */\r
+Void updateAllocatedTccsLoc( EDMA_CONFIG *edmaConfig);\r
+#endif\r
+\r
+#endif /* _TCP3D_SAMPLE_H_ */\r
+\r
diff --git a/example/src/tcp3d_drv_sample_init.c b/example/src/tcp3d_drv_sample_init.c
--- /dev/null
@@ -0,0 +1,448 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include "tcp3d_drv_sample.h"\r
+\r
+Tcp3d_MemBuffer *bufs;\r
+Int16 nbufs;\r
+\r
+/**\r
+ * NOTE: All the configuration values whether they are used in the current\r
+ * driver or not. Unused values are kept as place holders for future use.\r
+ */ \r
+Void fillConfig(Tcp3d_InitParams *drvInitParams, UInt32 perId)\r
+{\r
+ UInt32 baseDataRegs;\r
+\r
+ if ( perId < CSL_TCP3D_PER_CNT )\r
+ {\r
+ /* Set the notification Event number */\r
+ drvInitParams->notificationEventNum = getNotifyEventNum(perId); \r
+\r
+ /* Set the Control Register base address */\r
+ drvInitParams->tcp3dCfgRegs = (CSL_Tcp3d_cfgRegs *) getTcp3dCfgRegsBase(perId);\r
+\r
+ /* Set REVT channel numbers */\r
+ drvInitParams->pingConfig.revtCh = getRevt0ChannelNum(perId);\r
+ drvInitParams->pongConfig.revtCh = getRevt1ChannelNum(perId);\r
+\r
+ /* Set the TCP3D PING addresses */\r
+ baseDataRegs = getTcp3dDataRegsBase(perId);\r
+ drvInitParams->pingConfig.inCfgStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_OFFSET;\r
+ drvInitParams->pingConfig.llrStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_SYS_P0_OFFSET;\r
+ drvInitParams->pingConfig.interStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_INTER_P0_OFFSET;\r
+ drvInitParams->pingConfig.hdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_HD0_OFFSET;\r
+ drvInitParams->pingConfig.stsStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_OFFSET;\r
+ drvInitParams->pingConfig.sdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_SO0_OFFSET;\r
+ \r
+ /* Set the TCP3D PONG addresses */\r
+ drvInitParams->pongConfig.inCfgStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_OFFSET;\r
+ drvInitParams->pongConfig.llrStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_SYS_P1_OFFSET;\r
+ drvInitParams->pongConfig.interStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_INTER_P1_OFFSET;\r
+ if ( drvInitParams->ctrlParams.doubleBuf == CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
+ {\r
+ drvInitParams->pongConfig.hdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_HD0_OFFSET;\r
+ drvInitParams->pongConfig.sdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_SO0_OFFSET;\r
+ drvInitParams->pongConfig.stsStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_OFFSET;\r
+ }\r
+ else\r
+ {\r
+ drvInitParams->pongConfig.hdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_HD1_OFFSET;\r
+ drvInitParams->pongConfig.sdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_SO1_OFFSET;\r
+ drvInitParams->pongConfig.stsStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_OFFSET;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ System_printf("Wrong Instance ID passed\n");\r
+ System_exit(0);\r
+ }\r
+}\r
+\r
+Tcp3d_Instance* tcp3dSampleInit(\r
+ IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ UInt32 testMaxBlocks,\r
+ UInt32 testMode,\r
+ UInt32 testDoubleBuffer,\r
+ UInt32 testLteCrcSel,\r
+ UInt32 dspCoreID,\r
+ EDMA3_DRV_Handle hEdma,\r
+ UInt32 tpccRegionUsed,\r
+ EDMA_CONFIG *edmaConfig,\r
+ Tcp3d_Result *errCode)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ Tcp3d_SizeCfg sizeCfg;\r
+ Tcp3d_InitParams drvInitParams;\r
+ Int32 cnt;\r
+ UInt32 numBytes;\r
+ UInt8 align;\r
+\r
+ /*\r
+ * Setup TCP3D Driver Initialization Sequence\r
+ */\r
+ /* Step 1: Set parameters in the sizeCfg structure for TCP3D driver\r
+ * memory allocation. This will be used with the driver functions\r
+ * Tcp3d_getNumBuf() & Tcp3d_getBufDesc() */\r
+ sizeCfg.maxCodeBlocks = testMaxBlocks;\r
+ sizeCfg.mode = testMode;\r
+\r
+ /* Step 2: Get Number of buffers required for TCP3D Driver */\r
+ tcp3dResult = Tcp3d_getNumBuf(&sizeCfg, &nbufs);\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
+ {\r
+ System_printf("Get Num Bufs failed\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_getNumBuf() passed\n");\r
+ }\r
+\r
+ /* Step 3: Allocate memory for buffer descriptor structure */\r
+ numBytes = nbufs * sizeof (Tcp3d_MemBuffer);\r
+ bufs = (Tcp3d_MemBuffer *) Memory_alloc(dataHeap, numBytes, 0, NULL); \r
+ if ( bufs == NULL )\r
+ {\r
+ System_printf("Memory allocation failed !!! (DRV MEMBUFS)\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Step 4: Get TCP3D Driver buffer descriptor requirements */\r
+ tcp3dResult = Tcp3d_getBufDesc(&sizeCfg, bufs);\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
+ {\r
+ System_printf("Get Buf Descriptor failed\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_getBufDesc() passed\n");\r
+ }\r
+\r
+ /* Step 5: Allocate memory for buffers based on the requirements given */\r
+ /*\r
+ * NOTE:\r
+ * 1) The memory class type is NOT used for allocation.\r
+ * 2) The memory allocation is always done from the data Heap. See the\r
+ * BIOS config file more details (drvHeap).\r
+ */\r
+ for (cnt = 0; cnt < nbufs; ++cnt)\r
+ {\r
+ numBytes = bufs[cnt].size;\r
+ align = 1<<bufs[cnt].log2align;\r
+ \r
+ bufs[cnt].base = (Tcp3d_MemBuffer *) Memory_alloc ( dataHeap,\r
+ numBytes,\r
+ align,\r
+ NULL);\r
+\r
+ if ( bufs[cnt].base == NULL )\r
+ {\r
+ System_printf("Memory allocation failed !!! (DRV BUF)\n");\r
+ System_exit(0);\r
+ }\r
+ }\r
+\r
+ /* Step 7: Set TCP3D Driver init parameters */\r
+ drvInitParams.coreID = dspCoreID;\r
+ drvInitParams.maxCodeBlocks = testMaxBlocks;\r
+ drvInitParams.instNum = instNum;\r
+\r
+ /* Set the EDMA variables/resoureces */\r
+ drvInitParams.edmaHnd = hEdma;\r
+ drvInitParams.edmaRegionId = tpccRegionUsed;\r
+ for (cnt = 0; cnt < TCP3D_DRV_MAX_CH_PER_PATH; ++cnt)\r
+ {\r
+ drvInitParams.pingCh[cnt] = edmaConfig->pingChRes[cnt].chNo;\r
+ drvInitParams.pongCh[cnt] = edmaConfig->pongChRes[cnt].chNo;\r
+ }\r
+ for (cnt = 0; cnt < TCP3D_DRV_MAX_LINK_CH; ++cnt)\r
+ {\r
+ drvInitParams.linkCh[cnt] = edmaConfig->linkChRes[cnt].chNo;\r
+ }\r
+\r
+ /* Set the Control Register parameters */\r
+ drvInitParams.ctrlParams.mode = testMode;\r
+ drvInitParams.ctrlParams.doubleBuf = testDoubleBuffer;\r
+ drvInitParams.ctrlParams.intTable = CSL_TCP3D_CFG_TCP3_MODE_ITG_EN_ENABLE;\r
+ drvInitParams.ctrlParams.autoTrig = CSL_TCP3D_CFG_TCP3_MODE_AUTO_TRIG_EN_ENABLE;\r
+ drvInitParams.ctrlParams.errIgnore = CSL_TCP3D_CFG_TCP3_MODE_ERROR_IGNORE_EN_DONT_STOP;\r
+ drvInitParams.ctrlParams.lteCrcSel = testLteCrcSel;\r
+#ifdef _LITTLE_ENDIAN\r
+ drvInitParams.ctrlParams.endInt = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INTR_32_BIT_PACKED;\r
+ drvInitParams.ctrlParams.endInData = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INDATA_32_BIT_PACKED;\r
+#else\r
+ drvInitParams.ctrlParams.endInt = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INTR_16_BIT_NATIVE;\r
+ drvInitParams.ctrlParams.endInData = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INDATA_8_BIT_NATIVE;\r
+#endif\r
+ drvInitParams.ctrlParams.exeP0cmd = CSL_TCP3D_CFG_TCP3_EXE_P0_EXE_CMD_ENABLE;\r
+ if ( testDoubleBuffer != CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
+ drvInitParams.ctrlParams.exeP1cmd = CSL_TCP3D_CFG_TCP3_EXE_P1_EXE_CMD_ENABLE;\r
+\r
+ fillConfig(&drvInitParams, instNum);\r
+\r
+ /* Step 8: Call the TCP3D Driver init function */\r
+ tcp3dResult = Tcp3d_init ( bufs, &drvInitParams);\r
+\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR)\r
+ {\r
+ System_printf("TCP3D Driver Init failed\n");\r
+ System_exit(0);\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_init() passed\n");\r
+ }\r
+\r
+ *errCode = tcp3dResult;\r
+\r
+ /* Initialize the TCP3D driver instance variable */\r
+ return ((Tcp3d_Instance* )bufs[TCP3D_DRV_INST_BUFN].base);\r
+}\r
+\r
+Tcp3d_Result tcp3dSampleDeinit( IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ Tcp3d_Instance *tcp3dInst)\r
+{\r
+ Int32 cnt;\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+\r
+ tcp3dResult = Tcp3d_deInit(tcp3dInst);\r
+\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR)\r
+ {\r
+ System_printf("TCP3D Driver De-Init failed\n");\r
+ System_exit(0);\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_deInit() passed\n");\r
+ }\r
+\r
+ /* Free memory allocated for TCP3D Driver Initialization sequence */\r
+ /* NOTE:\r
+ * It is assumed that the nbufs and bufs[] values are preserved from init. \r
+ */\r
+ for (cnt = 0; cnt < nbufs; ++cnt)\r
+ {\r
+ Memory_free(dataHeap, bufs[cnt].base, bufs[cnt].size); \r
+ }\r
+ Memory_free(dataHeap, bufs, nbufs*sizeof(Tcp3d_MemBuffer)); \r
+\r
+ return (tcp3dResult);\r
+}\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * Fill the tables for allocated TCC & tccCB params, used with local\r
+ * EDMA3 call back ISR routine (see in sample_int_reg.c file).\r
+ */\r
+Void updateAllocatedTccsLoc( EDMA_CONFIG *edmaConfig)\r
+{\r
+ Int i;\r
+ UInt32 tcc;\r
+\r
+ allocatedTCCsLoc[0] = 0u;\r
+ allocatedTCCsLoc[1] = 0u;\r
+\r
+ for (i=0;i<TCP3D_DRV_MAX_CH_PER_PATH;i++)\r
+ {\r
+ if( edmaConfig->pingChRes[i].cbFunc != NULL)\r
+ {\r
+ tcc = edmaConfig->pingChRes[i].tccNo;\r
+ edma3IntrParamsLoc[tcc].tccCb = edmaConfig->pingChRes[i].cbFunc;\r
+ edma3IntrParamsLoc[tcc].cbData = edmaConfig->pingChRes[i].cbData;\r
+ if (tcc < 32u)\r
+ allocatedTCCsLoc[0u] |= (0x1u << tcc);\r
+ else\r
+ allocatedTCCsLoc[1u] |= (0x1u << (tcc - 32u));\r
+ }\r
+ if( edmaConfig->pongChRes[i].cbFunc != NULL)\r
+ {\r
+ tcc = edmaConfig->pongChRes[i].tccNo;\r
+ edma3IntrParamsLoc[tcc].tccCb = edmaConfig->pongChRes[i].cbFunc;\r
+ edma3IntrParamsLoc[tcc].cbData = edmaConfig->pongChRes[i].cbData;\r
+ if (tcc < 32u)\r
+ allocatedTCCsLoc[0u] |= (0x1u << tcc);\r
+ else\r
+ allocatedTCCsLoc[1u] |= (0x1u << (tcc - 32u));\r
+ }\r
+ }\r
+}\r
+#endif\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void openEdmaChannels ( EDMA3_DRV_Handle hEdma,\r
+ UInt8 perId,\r
+ EDMA_CONFIG *edmaConfig)\r
+{\r
+ EDMA3_DRV_Result result, status = EDMA3_DRV_SOK;\r
+ Int32 i;\r
+\r
+ if ( perId < CSL_TCP3D_PER_CNT )\r
+ {\r
+ edmaConfig->pingChRes[0].chNo = getRevt0ChannelNum(perId);\r
+ edmaConfig->pongChRes[0].chNo = getRevt1ChannelNum(perId);\r
+ edmaConfig->pingChRes[1].chNo = EDMA3_DRV_DMA_CHANNEL_ANY;\r
+ edmaConfig->pongChRes[1].chNo = EDMA3_DRV_DMA_CHANNEL_ANY;\r
+ }\r
+ else\r
+ {\r
+ System_printf("Wrong Instance ID passed\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Fille the edmaConfig structure with defaults */\r
+ for (i=0;i<TCP3D_DRV_MAX_CH_PER_PATH;i++)\r
+ {\r
+ /* PING channel defaults */\r
+ edmaConfig->pingChRes[i].tccNo = EDMA3_DRV_TCC_ANY;\r
+ edmaConfig->pingChRes[i].cbFunc = NULL;\r
+ edmaConfig->pingChRes[i].cbData = NULL;\r
+ \r
+ /* PONG channel defaults */\r
+ edmaConfig->pongChRes[i].tccNo = EDMA3_DRV_TCC_ANY;\r
+ edmaConfig->pongChRes[i].cbFunc = NULL;\r
+ edmaConfig->pongChRes[i].cbData = NULL;\r
+ }\r
+\r
+ /**\r
+ * Open all the Physical Channels and then register call backs \r
+ */ \r
+ for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++)\r
+ {\r
+ result = EDMA3_DRV_requestChannel (hEdma, \r
+ &edmaConfig->pingChRes[i].chNo, \r
+ &edmaConfig->pingChRes[i].tccNo,\r
+ (EDMA3_RM_EventQueue)0,\r
+ edmaConfig->pingChRes[i].cbFunc, \r
+ edmaConfig->pingChRes[i].cbData);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d open (result = %d)\n", edmaConfig->pingChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+\r
+ result = EDMA3_DRV_requestChannel (hEdma, \r
+ &edmaConfig->pongChRes[i].chNo, \r
+ &edmaConfig->pongChRes[i].tccNo,\r
+ (EDMA3_RM_EventQueue)0,\r
+ edmaConfig->pongChRes[i].cbFunc, \r
+ edmaConfig->pongChRes[i].cbData);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d open (result = %d)\n", edmaConfig->pongChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ } /* end of - for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++) */\r
+\r
+ /**\r
+ * Open all the Link Channels \r
+ */\r
+ for(i=0; i<TCP3D_DRV_MAX_LINK_CH; i++)\r
+ {\r
+ /* Load the local variable with default values */\r
+ edmaConfig->linkChRes[i].chNo = EDMA3_DRV_LINK_CHANNEL; \r
+\r
+ result = EDMA3_DRV_requestChannel (hEdma, \r
+ &edmaConfig->linkChRes[i].chNo, \r
+ &edmaConfig->linkChRes[i].tccNo,\r
+ (EDMA3_RM_EventQueue)0,\r
+ edmaConfig->linkChRes[i].cbFunc, \r
+ edmaConfig->linkChRes[i].cbData);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA link channel %d open (result = %d)\n", edmaConfig->linkChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ } /* end of - for(i=0; i<TCP3D_DRV_MAX_LINK_CH; i++) */\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+ /* This must be called after opening channels */\r
+ updateAllocatedTccsLoc(edmaConfig);\r
+#endif\r
+\r
+ if ( status != EDMA3_DRV_SOK )\r
+ System_exit(0);\r
+ \r
+} /* openEdmaChannels() */\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void closeEdmaChannels( EDMA3_DRV_Handle hEdma,\r
+ UInt8 perId,\r
+ EDMA_CONFIG *edmaConfig)\r
+{\r
+ EDMA3_DRV_Result result, status = EDMA3_DRV_SOK;\r
+ Int32 i;\r
+\r
+ /**\r
+ * Close all the Physical Channels and do unregister call backs before\r
+ */\r
+ for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++)\r
+ {\r
+ result = EDMA3_DRV_freeChannel (hEdma, edmaConfig->pingChRes[i].chNo);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d close (result = %d)\n", edmaConfig->pingChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ \r
+ result = EDMA3_DRV_freeChannel (hEdma, edmaConfig->pongChRes[i].chNo);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d close (result = %d)\n", edmaConfig->pongChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ } /* end of - for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++) */\r
+\r
+ /**\r
+ * Close all the Link Channels \r
+ */\r
+ for(i=0; i<TCP3D_DRV_MAX_LINK_CH; i++)\r
+ {\r
+ result = EDMA3_DRV_freeChannel (hEdma, edmaConfig->linkChRes[i].chNo);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA link channel %d close (result = %d)\n", edmaConfig->linkChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ }\r
+\r
+ if ( status != EDMA3_DRV_SOK )\r
+ System_exit(0);\r
+ \r
+} /* closeEdmaChannels() */\r
+\r
+/* End of File */\r
diff --git a/example/src/tcp3d_drv_types.h b/example/src/tcp3d_drv_types.h
--- /dev/null
@@ -0,0 +1,78 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_DRV_TYPES_H_\r
+#define _TCP3D_DRV_TYPES_H_\r
+\r
+/* c99 types includes */\r
+#include <stdint.h>\r
+#include <stdlib.h>\r
+\r
+/** @addtogroup TCP3D_DRV_MACRO\r
+ @{ */\r
+\r
+/**\r
+ * @brief Key work used with the function definitions to represent them as \r
+ * static and inline type functions.\r
+ */\r
+#define INLINE static inline\r
+\r
+/**\r
+ * @brief Key work for restrict abstracted to support various compilers.\r
+ */\r
+#define RESTRICT restrict\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as INPUT only.\r
+ */\r
+#define IN\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as OUTPUT only.\r
+ */\r
+#define OUT\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as both INPUT and OUTPUT.\r
+ */\r
+#define INOUT\r
+\r
+/**\r
+@}\r
+*/\r
+\r
+#endif /* _TCP3D_DRV_TYPES_H_ */\r
diff --git a/example/src/tcp3d_example_main.c b/example/src/tcp3d_example_main.c
--- /dev/null
@@ -0,0 +1,1336 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <stdio.h>\r
+#include <time.h>\r
+#include <string.h>\r
+\r
+/* XDC includes */\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+/* BIOS includes */\r
+#include <ti/sysbios/knl/Task.h>\r
+#include <ti/sysbios/BIOS.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+#include <ti/sysbios/family/c64p/Hwi.h>\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
+\r
+/* IPC includes */ \r
+#include <ti/ipc/GateMP.h>\r
+#include <ti/ipc/Ipc.h>\r
+#include <ti/ipc/ListMP.h>\r
+#include <ti/ipc/SharedRegion.h>\r
+#include <ti/ipc/MultiProc.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/csl_chipAux.h>\r
+#include <ti/csl/cslr_tpcc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+#include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
+#include <ti/csl/csl_tsc.h>\r
+#include <ti/csl/csl_cacheAux.h>\r
+#include <ti/csl/csl_xmcAux.h>\r
+\r
+#include "sample.h"\r
+#include "tcp3d_drv_sample.h"\r
+#include "tcp3d_main.h"\r
+\r
+/**********************************************************************\r
+ ************************** Test Compile Flags ************************\r
+ **********************************************************************/\r
+#define DEBUG_VARS 0 // add debug variables at different places in the code \r
+\r
+#define DEBUG_PRINT 0\r
+\r
+#define MY_LOG_PRINT0(x) {\\r
+ if(DEBUG_PRINT)\\r
+ {\\r
+ System_printf(#x"\n");\\r
+ }\\r
+}\r
+\r
+#define MY_LOG_PRINT1(x, val) {\\r
+ if(DEBUG_PRINT)\\r
+ {\\r
+ System_printf(#x" %d\n", val);\\r
+ }\\r
+}\r
+\r
+#define MY_LOG_PRINT2(x, val1, y, val2) {\\r
+ if(DEBUG_PRINT)\\r
+ {\\r
+ System_printf(#x" %d, "#y" %d\n", val1, val2);\\r
+ }\\r
+}\r
+\r
+/**\r
+ * This is used for plotting timing diagram using matlab by collecting the data\r
+ * points from running the code.\r
+ * \r
+ * Requirements:\r
+ * 1) it is required to enable the logging for TCP3D in the Simulator\r
+ * Configuration file. The decoding and reset times are collected from the\r
+ * log file (c:\\Tcp3dDebug.log) generated from running the simulator.\r
+ */\r
+#define TEST_PROFILE_LOG 1 \r
+\r
+/**********************************************************************\r
+ ************************** Test Definitions **************************\r
+ **********************************************************************/\r
+#define START_CMD_PERIOD 1\r
+\r
+#define SIMULATOR_SUPPORT 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Variables ****************************\r
+ **********************************************************************/\r
+/* Code Block Test Variables */\r
+#pragma DATA_SECTION(codeBlockSet, ".main_mem")\r
+cbTestDesc codeBlockSet;\r
+\r
+Char *strMode[4] = {"3GPP(0)","LTE(1)","WIMAX(2)","WCDMA Split(3)"};\r
+Char *strDBuf[2] = {"Disable(0)","Enable(1)"};\r
+Char *strInst[2] = {"TCP3D_A(0)","TCP3D_B(1)"};\r
+\r
+UInt32 keepTestVectMem = 0;\r
+UInt32 firstTime = 1;\r
+UInt32 testMaxCodeBlocks;\r
+UInt32 dspCoreID;\r
+\r
+/* File Operation Variables */\r
+UInt32 testCntr = 0;\r
+UInt32 testErrCntr = 0;\r
+UInt32 totErrCnt;\r
+#ifdef USE_PDK_INSTALL_BASE\r
+Char testvectFolderBase[] = "C:\\ti\\csl_lld_keystone2_1_0_0_2\\packages\\ti\\drv\\tcp3d\\example\\testvectors\\";\r
+#else\r
+Char testvectFolderBase[] = "..\\..\\testvectors\\";\r
+#endif\r
+Char folderName[1000] = "";\r
+Char *testFolder[] = { "lte", "wcdma", "wimax", };\r
+/* Number of test folders computed. Alternately can be set manually as length of *testFolder[] array */\r
+UInt32 numTests = sizeof(testFolder)/sizeof(*testFolder);\r
+\r
+/* Throughput calculation variables */\r
+clock_t total_clock_end, total_clock_start;\r
+UInt32 test_cycles;\r
+UInt32 TotalBitsDecoded;\r
+Float ThroughPut;\r
+\r
+/* BIOS variables */\r
+Semaphore_Handle semRcvDone, semSendBlock, semSendWait, semRcvStart;\r
+IHeap_Handle dataHeap = NULL;\r
+IHeap_Handle drvHeap = NULL;\r
+\r
+/* Driver configuration variables */\r
+Tcp3d_Result tcp3dResultSend = TCP3D_DRV_NO_ERR;\r
+Tcp3d_Instance *tcp3dDrvInst[2] = {NULL, NULL};\r
+Tcp3d_Instance *inst;\r
+Tcp3d_Ctrl drvCtrl;\r
+Tcp3d_Sts drvStatus;\r
+\r
+Int32 sendBlockCnt;\r
+Int32 rcvBlockCnt;\r
+#if TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT\r
+UInt32 tempICRegs[15]; /* to store 15 registers */\r
+#endif\r
+\r
+/**\r
+ * EDMA3 LLD & TCP3D Driver Init/Deinit related variables\r
+ */\r
+EDMA3_DRV_Handle hEdma;\r
+UInt32 tpccNum;\r
+UInt32 tpccRegionUsed;\r
+EDMA_CONFIG edmaConfig[2];\r
+UInt8 instNum;\r
+/* Flags used in ISR functions */\r
+UInt32 pingComplete, pongComplete;\r
+UInt32 pauseIntr = 0, l2pIntr = 0;\r
+UInt32 soldoutCntr = 0;\r
+UInt32 tcp3dEventCntr = 0;\r
+UInt32 tpccEvtCntr = 0;\r
+UInt32 rcvStartFlag = 0;\r
+UInt32 pauseIntFlag = 0;\r
+UInt32 afterIntrSoldout = 0, afterIntrPause = 0;\r
+UInt32 pendPauseCntr = 0;\r
+\r
+#if DEBUG_VARS\r
+#include <ti/csl/src/intc/csl_intc.h>\r
+#include <ti/csl/csl_cpIntcAux.h>\r
+\r
+/* To track the RCV task posting */\r
+volatile Int semCnt;\r
+\r
+/* Register pointers */\r
+CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMA2CC_REGS;\r
+CSL_CPINTC_RegsOvly cpintc0Regs = (CSL_CPINTC_RegsOvly) CSL_CP_INTC_0_REGS;\r
+CSL_IntcRegsOvly gemIntcRegs = (CSL_IntcRegsOvly)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS;\r
+#endif\r
+\r
+/**********************************************************************\r
+ *********************** Test Local Functions *************************\r
+ **********************************************************************/\r
+/**\r
+ * Task Functions\r
+ */\r
+Void testerTaskFunc(Void);\r
+Void tskHeartBeat(Void);\r
+Void sndBlockTaskFunc(Void);\r
+Void rcvBlockTaskFunc(Void);\r
+\r
+/**\r
+ * (De)Init Functions\r
+ */\r
+Void allInit(Void);\r
+Void allDeInit(Void);\r
+Void getMemoryStats(Void);\r
+\r
+/**\r
+ * EDMA Channel ISR functions\r
+ */\r
+Void revt0ChCallback(Void);\r
+Void revt1ChCallback(Void);\r\r
+\r
+/**\r
+ * Cache and other IP functions\r
+ */\r
+static Int32 enable_tcp3d (void);\r
+void tcp3dBeginMemAccess (void *ptr, uint32_t size);\r
+void tcp3dEndMemAccess (void *ptr, uint32_t size);\r
+\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+extern Void CpIntc_dispatchLoc(UInt hostInt);\r
+#endif\r
+\r
+Void soldOutAction(Void)\r
+{\r
+ /* clear flag */\r
+ pauseIntFlag = 0;\r
+\r
+#if SOLDOUT_USE_L2P_INTERRUPT\r
+ /**\r
+ * 1) enable L2P channel interrupt to get notified to try enqueue again\r
+ * 2) also enable REVT channel interrupt for PAUSE detection\r
+ */\r
+ /* Set interrupt flag on PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* Call TCP3D driver control to set interrupt on L2P channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+#else\r
+ /* keep trying until successful */\r
+ Semaphore_post(semSendBlock);\r
+#endif\r
+}\r
+\r
+Void soldOutActionClear (Void)\r
+{\r
+#if SOLDOUT_USE_L2P_INTERRUPT\r
+ if ( pauseIntFlag )\r
+ {\r
+ afterIntrSoldout++;\r
+ \r
+ /**\r
+ * 1) diable L2P channel interrupt to get notified to try enqueue again\r
+ * 2) also disable REVT channel interrupt for PAUSE detection\r
+ */\r
+ /* Call TCP3D driver control to set interrupt on L2P channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* Set interrupt flag on PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+ }\r
+#else\r
+ /* nothing to be done */\r
+#endif\r
+}\r
+\r
+/*******************************************************************************\r
+ TESTING METHOD 1: Copy test vector folder to workspace\r
+--------------------------------------------------------------------------------\r
+1. In this method, ensure that the entire \93example\testvectors\94 folder is \r
+ placed two levels higher than the unit example project .out file location.\r
+ For example, if the unit example project out file is located under\r
+ \93C:\MyPDKWorkspace\tcp3dExampleProject\Debug\94 folder, then please copy\r
+ the folder \93example\testvectors\94 from the PDK package to \93C:\MyPDKWorkspace\94.\r
+2. Ensure that the compile flag USE_PDK_INSTALL_BASE is undefined in\r
+ the project \93tcp3dExampleProject\94 before building.\r
+3. Build the project.\r
+4. Launch the debug session to load and run the out file.\r
+\r
+ TESTING METHOD 2: Use the test vector folder from the PDK installation\r
+--------------------------------------------------------------------------------\r
+1. In this method, ensure that the compile flag USE_PDK_INSTALL_BASE is defined\r
+ in the project \93tcp3dExampleProject\94.\r
+2. Also, ensure the variable \93testvectFolderBase\94 defined in the tcp3d_example_main.c\r
+ file is set to \93<PDK_INSTALL_DIR>\packages\ti\drv\tcp3d\example\testvectors\94\r
+ when the USE_PDK_INSTALL_BASE flag is defined.\r
+3. Build the project.\r
+4. Launch the debug session to load and run the out file.\r
+ \r
+By default, example project is configured to test using "METHOD 1"\r
+ ******************************************************************************/\r
+/*\r
+ * main()\r
+ */\r
+Void main(Void)\r
+{\r
+ Task_Params taskParams;\r
+\r
+ /* Initialize the heap in shared memory. Using IPC module to do that */ \r
+ Ipc_start();\r
+\r
+ /* Power on TCP3D peripheral before using it */\r
+ if (enable_tcp3d () < 0)\r
+ {\r
+ System_printf ("Error: TCP3D PSC Initialization Failed\n");\r
+ return;\r
+ }\r
+ \r
+ /* Enable time stamp counter */\r
+ CSL_tscEnable();\r
+\r
+ /* Enable L1D cache. Disable L2 caching for our tests. */\r
+ CACHE_setL1DSize (CACHE_L1_MAXIM3); /* CACHE_L1_0KCACHE */\r
+ CACHE_setL2Size (CACHE_0KCACHE);\r
+\r
+ /* Initialize the default Task parameters */\r
+ Task_Params_init(&taskParams);\r
+\r
+ /* Crete the tester Task using default Task parameters */\r
+ Task_create((Task_FuncPtr)testerTaskFunc, &taskParams, NULL);\r
+\r
+ BIOS_start();\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void testerTaskFunc(Void)\r
+{\r
+ Int i;\r
+ Task_Params taskParams;\r
+ Semaphore_Params semParams;\r
+\r
+ /* Set the one-time global test variables */\r
+ testMaxCodeBlocks = 86; /* max possible used in init */\r
+ dspCoreID = CSL_chipReadDNUM();\r
+\r
+ /******** Select the TCP3D Instance Number **********/\r
+#if 0\r
+ if ( dspCoreID == 0 ) // Core 0\r
+ instNum = CSL_TCP3D_A;\r
+ else\r
+ instNum = CSL_TCP3D_B;\r
+#else\r
+ instNum = getTcp3dInstNum(dspCoreID);\r
+#endif\r
+\r
+ /* Initialize the default Task parameters */\r
+ Task_Params_init(&taskParams);\r
+\r
+ /* Initialize the default Semaphore parameters */\r
+ Semaphore_Params_init(&semParams);\r
+\r
+ /* Crete the Binary Semaphore */\r
+ semParams.mode = Semaphore_Mode_BINARY;\r
+ semRcvDone = Semaphore_create(0, &semParams, NULL);\r
+\r
+ /* Get the Heap handles - used when ever memory allocations are needed */\r
+ //dataHeap = HeapMem_Handle_upCast(tcp3dDataHeap);\r
+ dataHeap = (IHeap_Handle) SharedRegion_getHeap(0);\r
+ drvHeap = HeapMem_Handle_upCast(tcp3dDrvHeap);\r
+\r
+ while( testCntr < numTests )\r
+ {\r
+\r
+ /**\r
+ * Create the Binary semaphores each time using the parameters set\r
+ * outside the tester while loop.\r
+ * \r
+ * It was observed that at times the receive semaphore count was\r
+ * non-zero after the first run and receive task was getting triggered\r
+ * before posting from the ISR callback. So, the semaphores are created\r
+ * for each test to work-around with the problem. \r
+ */\r
+ semSendBlock = Semaphore_create(0, &semParams, NULL);\r
+ semSendWait = Semaphore_create(0, &semParams, NULL);\r
+ semRcvStart = Semaphore_create(0, &semParams, NULL);\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semRcvStart);\r
+#endif\r
+\r
+ /**\r
+ * Create the send and receive tasks for each test using the default\r
+ * tak parameters.\r
+ * \r
+ * NOTE: No need to do the Task_delete() as these tasks have exits.\r
+ */\r
+ Task_create((Task_FuncPtr)sndBlockTaskFunc, &taskParams, NULL);\r
+ Task_create((Task_FuncPtr)rcvBlockTaskFunc, &taskParams, NULL);\r
+\r
+ System_printf("\n******************************************************************\n");\r
+ System_printf("\n----- TEST #%d STARTED ------\n", testCntr);\r
+\r
+ /**\r
+ * Prepare data for Code Blocks processing (reading test vector files).\r
+ * Allocates Memory as needed from the tcp3dDataHeap\r
+ */\r
+ if ( firstTime )\r
+ {\r
+ System_printf("\nReading test vector files started (including memory allocation)...\n");\r
+ strcpy(folderName, testvectFolderBase);\r
+ strcat(folderName, testFolder[testCntr]);\r
+ getTestSetCB(dataHeap, &codeBlockSet, folderName);\r
+ System_printf("Reading test vector files complete\n");\r
+#if DEBUG_PRINT\r
+ System_printf("\tPrepared %d code blocks in %s mode\n", codeBlockSet.maxNumCB, strMode[codeBlockSet.mode]);\r
+#endif\r
+ firstTime = 0;\r
+ }\r
+ else\r
+ {\r
+ System_printf("\nUsing the test vectors read before\n");\r
+ }\r
+\r
+ System_printf("\n----- TEST INITIALIZATION STARTED -----\n\n");\r
+ allInit();\r
+ getMemoryStats(); /* Heap Stats */\r
+ System_printf("\n----- TEST INITIALIZATION COMPLETE -----\n\n");\r
+\r
+#if TEST_PREPARE_ONLY_BETASTATE\r
+ for (i = 0; i < codeBlockSet.maxNumCB ;i++)\r
+ {\r
+ /* Prepare fixed IC registers using the inCfgParams of first block*/\r
+ Tcp3d_prepFixedConfigRegs(codeBlockSet.cbData[i]->inCfgParams, codeBlockSet.cbData[i]->inCfg);\r
+\r
+ /* Prepare block size dependent params */\r
+ prepareBlockSizeDepICParams(codeBlockSet.cbData[i]);\r
+ }\r
+#elif TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT\r
+ /* Prepare fixed IC registers using the inCfgParams of first block*/\r
+ Tcp3d_prepFixedConfigRegs(codeBlockSet.cbData[0]->inCfgParams, tempICRegs);\r
+#endif\r
+\r
+ /* Start the Send task first */\r
+ Semaphore_post(semSendBlock);\r
+\r
+ /* Wait for the Receive task to complete */\r
+ Semaphore_pend(semRcvDone, BIOS_WAIT_FOREVER);\r
+\r
+ /**\r
+ * Test Profile Calculations\r
+ * \r
+ * (Total Bits)\r
+ * Throughput (Mbps) = -----------------------------\r
+ * (Total Time)*(10^-9)*(10^6)\r
+ * \r
+ */\r
+ TotalBitsDecoded = 0;\r
+ for (i = 0; i < codeBlockSet.maxNumCB; ++i)\r
+ {\r
+ TotalBitsDecoded += codeBlockSet.cbData[i]->blockSize;\r
+ }\r
+\r
+ test_cycles = (total_clock_end - total_clock_start);\r
+ ThroughPut = TotalBitsDecoded*1.0;\r
+ ThroughPut = (ThroughPut/test_cycles)*1000;\r
+\r
+ /******** Free code blocks ********/\r
+ if ( keepTestVectMem )\r
+ {\r
+ System_printf("\nNo freeing - Using the test vectors read before\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("\nTest vectors memory freeing started...\n");\r
+ freeTestSetCB(dataHeap, &codeBlockSet);\r
+ System_printf("Test vectors memory freeing complete\n");\r
+#if DEBUG_PRINT\r
+ System_printf("\tFreed memory allocated for %d code blocks in %s mode\n", codeBlockSet.maxNumCB, strMode[codeBlockSet.mode]);\r
+#endif\r
+ firstTime = 1;\r
+ }\r
+\r
+ System_printf("\n----- TEST DE-INITIALIZATION STARTED -----\n\n");\r
+ allDeInit();\r
+ getMemoryStats(); /* Heap Stats */\r
+ System_printf("\n----- TEST DE-INITIALIZATION COMPLETE -----\n");\r
+ \r
+ if ( totErrCnt > 0 )\r
+ {\r
+ System_printf("\n----- TEST #%d FAILED -----\n", testCntr);\r
+ testErrCntr++;\r
+ }\r
+ else\r
+ {\r
+ System_printf("\n----- TEST #%d PASSED -----\n", testCntr);\r
+ }\r
+ System_printf("\n+++++++++++++++++++++++ TEST #%d SUMMARY +++++++++++++++++++++++++\n", testCntr);\r
+ System_printf("TCP3D Peripheral Configuration\n");\r
+ System_printf(" Instance : %s\n", strInst[instNum]);\r
+ System_printf(" Mode Tested : %s\n", strMode[codeBlockSet.mode]);\r
+ System_printf(" Double Buffer Mode : %s\n", strDBuf[codeBlockSet.doubleBuffer]);\r
+ System_printf("Max code blocks (Input Capacity) : %d\n", testMaxCodeBlocks);\r
+ System_printf("Code blocks sent for decoding : %d\n", codeBlockSet.maxNumCB);\r
+ System_printf("Call back counters : %d - interrupts\n", pauseIntr);\r
+ System_printf(" (%d-SOLDOUT, %d-PAUSE, %d-PENDPAUSE)\n", afterIntrSoldout, afterIntrPause, pendPauseCntr);\r
+ System_printf("Total Notificaiton Interrupts : %d\n", tcp3dEventCntr);\r
+ System_printf("Throughput Calculations\n");\r
+ System_printf(" Total Bits Decoded : %d\n", TotalBitsDecoded);\r
+ System_printf(" Time Taken (in cycles) : %d\n", test_cycles);\r
+ System_printf(" Effective Throughput : %f Mbps\n", ThroughPut);\r
+ System_printf("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");\r
+\r
+ System_printf("\n******************************************************************\n");\r
+\r
+ /* Increment the test counter */\r
+ testCntr++;\r
+\r
+ /**\r
+ * Delete the semaphores each time, so that there is no left over count.\r
+ * See the explanation at the beginning of this loop where the create\r
+ * semaphore calls are present. \r
+ */\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semRcvStart);\r
+#endif\r
+ Semaphore_delete(&semSendWait);\r
+ Semaphore_delete(&semSendBlock);\r
+ Semaphore_delete(&semRcvStart);\r
+ }\r
+\r
+ /* All test status print */\r
+ if(testErrCntr)\r
+ {\r
+ System_printf("!!! SOME TESTS FAILED !!!\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("!!! ALL TESTS PASSED !!!\n");\r
+ }\r
+\r
+ /* Remove all creations - to make graceful system exit */\r
+ Semaphore_delete(&semRcvDone);\r
+\r
+ System_exit(0);\r
+}\r
+ \r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void sndBlockTaskFunc(Void)\r
+{\r
+ UInt8 notifyFlag;\r
+ cbDataDesc *cbPtr;\r
+ static UInt32 cookie = 0;\r
+\r
+ sendBlockCnt = 0;\r
+\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semSendBlock);\r
+#endif\r
+\r
+ total_clock_start = TSCL;\r
+\r
+ while(1)\r
+ {\r
+ /* Pending on Semaphore to run the loop */\r
+ Semaphore_pend(semSendBlock, BIOS_WAIT_FOREVER);\r
+\r
+ /* set TCP3D instance to use */\r
+ inst = tcp3dDrvInst[instNum];\r
+\r
+ /* Get pointer to the code block data structure */\r
+ cbPtr = codeBlockSet.cbData[sendBlockCnt];\r
+\r
+ /* Interrupt flag, used in Tcp3d_enqueueCodeBlock function */\r
+ notifyFlag = 0;\r
+ if ( sendBlockCnt >= (codeBlockSet.maxNumCB-2) )\r
+ {\r
+ notifyFlag = 1; /* Set for the last CB in each path (PING & PONG) */\r
+ }\r
+\r
+ /**\r
+ * Prepare input configuration (IC) registers.\r
+ */\r
+ if ( TCP3D_DRV_INPUT_LIST_FULL == tcp3dResultSend )\r
+ {\r
+ /* IC prepare not required. Just clear soldout actions. */\r
+ soldOutActionClear();\r
+ }\r
+ else\r
+ {\r
+ /* Prepare Input Config Registers */\r
+#if TEST_PREPARE_ONLY_BETASTATE\r
+ /* Prepare only beta state registers */\r
+ prepareBetaStateICParams(cbPtr, cbPtr->mode);\r
+#elif TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT \r
+ /* Prepare only registers depend on code block configuration\r
+ * (tempICRegs has the fixed registers prepare outside send loop) */\r
+ prepareIC(cbPtr, tempICRegs, 1);\r
+#else\r
+ /* Prepare all registers */\r
+ prepareIC(cbPtr, NULL, NULL);\r
+#endif\r
+ }\r
+\r
+ checkBetaValues (cbPtr->inCfg);\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ tcp3dEndMemAccess(cbPtr->inCfg, cbPtr->sizeCFG);\r
+ tcp3dEndMemAccess(cbPtr->inLLR, cbPtr->sizeLLR);\r
+\r
+ tcp3dBeginMemAccess(cbPtr->outHD, cbPtr->sizeHD);\r
+ if (cbPtr->sdFlag)\r
+ tcp3dBeginMemAccess(cbPtr->outSD, cbPtr->sizeSD);\r
+ if (cbPtr->stsFlag)\r
+ tcp3dBeginMemAccess(cbPtr->outSts, cbPtr->sizeSTS);\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+\r
+ /**\r
+ * WORKAROUND CODE:\r
+ * This code works in line with the code in the second while loop\r
+ * in the send task where check for completion is done.\r
+ * Here we are setting the last byte in the outHD with some value when\r
+ * the refHD has 0x00. This avoids any false completion of send task.\r
+ */\r
+ if ( sendBlockCnt >= (codeBlockSet.maxNumCB-2) )\r
+ {\r
+ /* Fill the last byte in outHD when refHD last byte is ZERO */\r
+ uint8_t *bytePtr1, *bytePtr2;\r
+ uint32_t byteSize;\r
+\r
+ bytePtr1 = (UInt8 *) cbPtr->refHD;\r
+ bytePtr2 = (UInt8 *) cbPtr->outHD;\r
+ byteSize = (cbPtr->blockSize>>3);\r
+\r
+ if ( bytePtr1[byteSize-1] == 0 )\r
+ {\r
+ bytePtr2[byteSize-1] = 0xde;\r
+ }\r
+ }\r
+\r
+\r
+ /* Enqueue the Code block */\r
+ tcp3dResultSend = Tcp3d_enqueueCodeBlock ( inst,\r
+ cbPtr->blockSize,\r
+ (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->inCfg),\r
+ (Int8 *)L2GLBMAP(dspCoreID, cbPtr->inLLR),\r
+ cbPtr->llrOffset,\r
+ (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->outHD),\r
+ (Int8 *)L2GLBMAP(dspCoreID, cbPtr->outSD), \r
+ cbPtr->sdOffset,\r
+ (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->outSts),\r
+ notifyFlag); // 1 - GEN EVENT, 0 - NO EVENT\r
+\r
+\r
+ /* Check for soldout case */\r
+ if ( TCP3D_DRV_INPUT_LIST_FULL != tcp3dResultSend )\r
+ {\r
+ /* increment the block count */\r
+ sendBlockCnt++;\r
+\r
+ /* goto next block */\r
+ Semaphore_post(semSendBlock);\r
+ }\r
+ else\r
+ {\r
+ /* increment soldout count */\r
+ soldoutCntr++;\r
+\r
+ soldOutAction(); /* take action */\r
+ }\r
+\r
+ /* Start the driver after START_CMD_PERIOD blocks */\r
+ if ( sendBlockCnt == START_CMD_PERIOD )\r
+ {\r
+ if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
+ {\r
+ System_printf("Tcp3d_start function returned error (AUTO)\n");\r
+ System_exit(0);\r
+ }\r
+ }\r
+\r
+ /* Check for end of task and exit */\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ {\r
+ /* set flags first */\r
+ pauseIntFlag = 0;\r
+ l2pIntr = pauseIntr;\r
+ pendPauseCntr = 0;\r
+\r
+#if SOLDOUT_USE_L2P_INTERRUPT\r
+ if ( soldoutCntr )\r
+ {\r
+ /* Call TCP3D driver control to set interrupt on L2P channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+ }\r
+#endif\r
+\r
+ /* Set interrupt flag PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_CLR_REVT_INT;\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* Check to see if restart needed before exit */\r
+ if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
+ {\r
+ System_printf("Tcp3d_start function returned error (AUTO)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Set interrupt flag PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* out of enqueue loop */\r
+ break;\r
+ }\r
+ } /* end of - while(1) */\r
+\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semSendWait);\r
+#endif\r
+\r
+ /**\r
+ * Check for pending Pauses and waiting for the last block to be decoded \r
+ */\r
+ while ( 1 )\r
+ {\r
+ /* Pending on Semaphore to run the loop */\r
+ Semaphore_pend(semSendWait, BIOS_WAIT_FOREVER);\r
+\r
+ /* Received both the completion events, so exit send task */\r
+ if ( tcp3dEventCntr >= 2 )\r
+ {\r
+ break;\r
+ } else if ( tcp3dEventCntr == 1 )\r
+ {\r
+ /* one code block test case */\r
+ if ( codeBlockSet.maxNumCB == 1 )\r
+ {\r
+ break;\r
+ }\r
+ else if ( codeBlockSet.mode == TEST_MODE_SPLIT )\r
+ { /* missing one notificatin event - possible in split mode */\r
+ /**\r
+ * WORKAROUND CODE:\r
+ * This is possibility in case of SPLIT mode, that one event is\r
+ * lost when both ping and pong channels try to generate system\r
+ * events at close proximity.\r
+ * In this test bench we have enabled notification events for\r
+ * the last two blocks, so checking the outHD & refHD last bytes\r
+ * to confirm the decoding of these blocks are completed.\r
+ */\r
+ \r
+ /* cbPtr for last two code blocks */\r
+ cbDataDesc *cbPtr1 = codeBlockSet.cbData[codeBlockSet.maxNumCB-2];\r
+ cbDataDesc *cbPtr2 = codeBlockSet.cbData[codeBlockSet.maxNumCB-1];\r
+ uint8_t *bytePtr11, *bytePtr12, *bytePtr21, *bytePtr22;\r
+ uint32_t size1, size2;\r
+\r
+ bytePtr11 = (UInt8 *) cbPtr1->refHD;\r
+ bytePtr12 = (UInt8 *) cbPtr1->outHD;\r
+ bytePtr21 = (UInt8 *) cbPtr2->refHD;\r
+ bytePtr22 = (UInt8 *) cbPtr2->outHD;\r
+ size1 = (cbPtr1->blockSize>>3); /* in bytes */\r
+ size2 = (cbPtr2->blockSize>>3); /* in bytes */\r
+\r
+ /* check if last HD byte of last two blocks are completed */\r
+ if ((bytePtr11[size1-1] == bytePtr12[size1-1]) &&\r
+ (bytePtr21[size2-1] == bytePtr22[size2-1]) ) \r
+ {\r
+ System_printf("Notification event missed (Race Condition)\n");\r
+ System_printf("Since the last two block decoding completed, completing send task\n");\r
+ System_printf("Block : %d\n", codeBlockSet.maxNumCB-2);\r
+ System_printf("\trefHD[%d] = 0x%x\t outHD[%d] = 0x%x\n", size1-1, bytePtr11[size1-1], size1-1, bytePtr12[size1-1]);\r
+ System_printf("Block : %d\n", codeBlockSet.maxNumCB-1);\r
+ System_printf("\trefHD[%d] = 0x%x\t outHD[%d] = 0x%x\n", size2-1, bytePtr21[size2-1], size2-1, bytePtr22[size2-1]);\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+ if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
+ {\r
+ System_printf("Tcp3d_start function returned error\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* keep trying until finding two end events */\r
+ Semaphore_post(semSendWait);\r
+\r
+ pendPauseCntr++;\r
+ }\r
+\r
+ /* Last code block decoded - Start the receive task */\r
+ total_clock_end = TSCL;\r
+ Semaphore_post(semRcvStart);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void rcvBlockTaskFunc(Void)\r
+{\r
+ Int32 errCnt;\r
+\r
+ cbDataDesc *cbPtr;\r
+ Int idx, loopCnt;\r
+ Int fail = 0;\r
+ UInt8 *ptr1, *ptr2;\r
+ \r
+ rcvBlockCnt = 0;\r
+ totErrCnt = 0;\r
+\r
+ while(1)\r
+ {\r
+ Semaphore_pend(semRcvStart, BIOS_WAIT_FOREVER);\r
+\r
+ /* prints for send task are done here */\r
+ if ( tcp3dResultSend == TCP3D_DRV_NO_ERR )\r
+ {\r
+#if DEBUG_PRINT\r
+ for ( loopCnt = 0; loopCnt < sendBlockCnt; loopCnt++ )\r
+ {\r
+ cbPtr = codeBlockSet.cbData[loopCnt];\r
+ System_printf("Send Task: Enqueued Block %d (Size: %d, SW0: %d)\n",\r
+ loopCnt, cbPtr->blockSize,\r
+ cbPtr->sw0LengthUsed);\r
+ }\r
+#endif\r
+ System_printf("Send Task: Enqueued %d Blocks\n\n", sendBlockCnt);\r
+ }\r
+ else\r
+ {\r
+ System_printf("Send Task: Enqueued Blocks failed (tcp3dResultSend : %d)\n\n", tcp3dResultSend);\r
+ System_exit(0);\r
+ }\r
+\r
+ MY_LOG_PRINT0(Rcv Task: SEM RECEIVED);\r
+\r
+ while( rcvBlockCnt < codeBlockSet.maxNumCB )\r
+ {\r
+ /* Get the pointer to the Code Block Set */\r
+ cbPtr = codeBlockSet.cbData[rcvBlockCnt];\r
+ \r
+ /* Step 2: Verify All the outputs */\r
+ fail = 0;\r
+ /* Step 2.1: Hard Decisions Verification */\r
+ ptr1 = (UInt8 *) cbPtr->refHD;\r
+ ptr2 = (UInt8 *) cbPtr->outHD;\r
+\r
+ /* Invalidate out HD */\r
+ CACHE_invL1d (cbPtr->outHD, cbPtr->blockSize>>3, CACHE_WAIT);\r
+\r
+ errCnt = 0; \r
+ for (idx = 0; idx < (cbPtr->blockSize>>3); ++idx)\r
+ {\r
+ if ( ptr1[idx] != ptr2[idx] )\r
+ {\r
+ errCnt++;\r
+ System_printf("\tBlock Count %d, HD mismatch byte %d\n", rcvBlockCnt, idx);\r
+ }\r
+ }\r
+\r
+ if (errCnt)\r
+ {\r
+ MY_LOG_PRINT2(Rcv task: HD FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
+ fail++;\r
+ }\r
+ else\r
+ {\r
+ MY_LOG_PRINT1(Rcv task: HD PASSED, rcvBlockCnt);\r
+ }\r
+ \r
+ /* Step 2.2: Soft Decisions Verification */\r
+ if (cbPtr->sdFlag)\r
+ {\r
+ if ( codeBlockSet.mode == TEST_MODE_SPLIT ) /* SPLIT MODE */\r
+ loopCnt = cbPtr->blockSize;\r
+ else\r
+ loopCnt = (3*cbPtr->blockSize);\r
+ \r
+ /* Invalidate out SD */\r
+ CACHE_invL1d (cbPtr->outSD, loopCnt, CACHE_WAIT);\r
+\r
+ /* NOTE: Assumed that the Soft Decisions are in a single array */\r
+ errCnt = 0;\r
+ for (idx = 0; idx < loopCnt; ++idx)\r
+ {\r
+ if ( cbPtr->refSD[idx] != cbPtr->outSD[idx] )\r
+ {\r
+ errCnt += 1;\r
+ System_printf("\tBlock Count %d, SD mismatch byte %d\n", rcvBlockCnt, idx);\r
+ }\r
+ }\r
+ \r
+ if (errCnt)\r
+ {\r
+ MY_LOG_PRINT2(Rcv task: SD FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
+ fail++;\r
+ }\r
+ else\r
+ {\r
+ MY_LOG_PRINT1(Rcv task: SD PASSED, rcvBlockCnt);\r
+ }\r
+ } /* if (cbPtr->sdFlag) */\r
+ \r
+ /* Step 2.3: errCnt Registers Verification */\r
+ if (cbPtr->stsFlag)\r
+ {\r
+ /* Invalidate out Sts */\r
+ CACHE_invL1d (cbPtr->outSts, 12, CACHE_WAIT);\r
+\r
+ errCnt = 0;\r
+ for (idx = 0; idx < 3; ++idx)\r
+ {\r
+ if ( cbPtr->refSts[idx] != cbPtr->outSts[idx] )\r
+ {\r
+ errCnt += 1;\r
+ System_printf("\tBlock Count %d, STS mismatch word %d\n", rcvBlockCnt, idx);\r
+ }\r
+ }\r
+ if (errCnt)\r
+ {\r
+ MY_LOG_PRINT2(Rcv task: STS FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
+ fail++;\r
+ }\r
+ else\r
+ {\r
+ MY_LOG_PRINT1(Rcv task: STS PASSED, rcvBlockCnt);\r
+ }\r
+ } /* if (cbPtr->stsFlag) */\r
+ if (fail)\r
+ {\r
+ System_printf("Rcv task: Block %d FAILED\n", rcvBlockCnt);\r
+ totErrCnt++;\r
+ }\r
+#if DEBUG_PRINT\r
+ else\r
+ {\r
+ System_printf("Rcv task: Block %d PASSED\n", rcvBlockCnt);\r
+ }\r
+#endif\r
+ rcvBlockCnt++;\r
+ }\r
+ if(rcvBlockCnt >= codeBlockSet.maxNumCB)\r
+ {\r
+ break;\r
+ } \r
+ }\r
+\r
+ System_printf("Rcv Task: COMPLETE - verified %d blocks\n", rcvBlockCnt);\r
+ \r
+ /* Prepare for next test, set by "tester task" */\r
+ Semaphore_post(semRcvDone);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void revt0ChCallback(Void)\r
+{\r
+ /* Increment the ISR counter */\r
+ pauseIntr++;\r
+ \r
+ pauseIntFlag = 1;\r
+\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ Semaphore_post(semSendWait);\r
+ else\r
+ Semaphore_post(semSendBlock);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void revt1ChCallback(Void)\r
+{\r
+ /* Increment the ISR counter */\r
+ pauseIntr++;\r
+ \r
+ pauseIntFlag = 2;\r
+\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ Semaphore_post(semSendWait);\r
+ else\r
+ Semaphore_post(semSendBlock);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void tskHeartBeat(Void)\r
+{\r
+ static unsigned int counter = 0u;\r
+\r
+ while (counter < 0x1000000u)\r
+ {\r
+ Task_sleep (1000u);\r
+ System_printf("\n!!! EDMA3 LLD HrtBt %x\n", counter);\r
+ counter++;\r
+ }\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void getMemoryStats(Void)\r
+{\r
+ Memory_Stats memStats;\r
+\r
+ Memory_getStats(drvHeap, &memStats);\r
+ System_printf("\nHeap Usage/Staus\n");\r
+ System_printf(" tcp3dDrvHeap : %d of %d free\n", memStats.totalFreeSize, memStats.totalSize);\r
+\r
+ Memory_getStats(dataHeap, &memStats);\r
+ System_printf(" tcp3dDataHeap : %d of %d free\n", memStats.totalFreeSize, memStats.totalSize);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void tcp3dEventISR(UInt32 testEvtNum)\r
+{\r
+ tcp3dEventCntr++;\r
+ tpccEvtCntr++;\r
+\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ Semaphore_post(semSendWait);\r
+ else\r
+ Semaphore_post(semSendBlock);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void registerTcp3dEvent(Void)\r
+{\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+ static UInt32 mapDone = 0;\r
+ UInt32 testEvt = getNotifyEventNum(instNum);\r
+ UInt32 hostIntr = getHostIntrNum(dspCoreID);\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Completion ISR Registration */\r
+ CpIntc_dispatchPlug(testEvt, tcp3dEventISR, hostIntr, TRUE);\r
+ if (!mapDone)\r
+ CpIntc_mapSysIntToHostInt(0, testEvt, hostIntr);\r
+ CpIntc_enableHostInt(0, hostIntr);\r
+ eventId = CpIntc_getEventId(hostIntr);\r
+ EventCombiner_dispatchPlug (eventId,\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+ CpIntc_dispatchLoc,\r
+#else\r
+ CpIntc_dispatch,\r
+#endif\r
+ hostIntr,\r
+ TRUE);\r
+#if DEBUG_PRINT\r
+ System_printf("\t\t testEvt : %d \n", testEvt);\r
+ System_printf("\t\t hostIntr : %d \n", hostIntr);\r
+ System_printf("\t\t eventId : %d \n", eventId);\r
+#endif\r
+\r
+ /* enable the 'global' switch */\r
+ CpIntc_enableAllHostInts(0);\r
+\r
+ mapDone = 1;\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void unregisterTcp3dEvent(Void)\r
+{\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+ UInt32 hostIntr = getHostIntrNum(dspCoreID);\r
+ \r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Driver Completion ISR */\r
+ CpIntc_disableHostInt(0, hostIntr);\r
+ eventId = CpIntc_getEventId(hostIntr);\r
+ EventCombiner_disableEvent(eventId);\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void allInit(Void)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;\r
+\r
+ /* Initialize EDMA3 first */\r
+ hEdma = NULL;\r
+ tpccNum = 2;\r
+ tpccRegionUsed = 3;\r
+ hEdma = edma3init ( tpccNum,\r
+ &edmaResult,\r
+ dspCoreID,\r
+ tpccRegionUsed);\r
+ if (edmaResult != EDMA3_DRV_SOK)\r
+ {\r
+ System_printf("edma3init() FAILED, error code: %d\n", edmaResult);\r
+ }\r
+ else\r
+ {\r
+ System_printf("EDMA3 LLD Initialization complete (TPCC #%d, Region #%d)\n", tpccNum, tpccRegionUsed);\r
+ }\r
+\r
+ /* Allocate all EDMA channels required for TCP3D Driver */\r
+ System_printf("EDMA3 Channels opening started...\n");\r
+\r
+ /* Open channels for one instance */\r
+ openEdmaChannels (hEdma, instNum, &edmaConfig[instNum]);\r
+\r
+ /* Register call backs */\r
+ EDMA3_DRV_registerTccCb(hEdma, edmaConfig[instNum].pingChRes[0].chNo, (EDMA3_RM_TccCallback)&revt0ChCallback, NULL);\r
+ EDMA3_DRV_registerTccCb(hEdma, edmaConfig[instNum].pongChRes[0].chNo, (EDMA3_RM_TccCallback)&revt1ChCallback, NULL);\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+ /* Fill call back details */\r
+ edmaConfig[instNum].pingChRes[0].cbFunc = (EDMA3_RM_TccCallback)&revt0ChCallback;\r
+ edmaConfig[instNum].pingChRes[0].cbData = NULL;\r
+ edmaConfig[instNum].pongChRes[0].cbFunc = (EDMA3_RM_TccCallback)&revt1ChCallback;\r
+ edmaConfig[instNum].pongChRes[0].cbData = NULL;\r
+\r
+ /**\r
+ * Update the information to use with local EDMA ISR \r
+ * (NOTE: This function must be called after the channels are opened)\r
+ */\r
+ updateAllocatedTccsLoc(&edmaConfig[instNum]);\r
+#endif\r
+\r
+ System_printf("EDMA3 Channels opening complete\n");\r
+\r
+ System_printf("TCP3 Decoder Driver Initialization sequence started...\n");\r
+\r
+ /* Initialize the TCP3D first */\r
+ tcp3dDrvInst[instNum] = tcp3dSampleInit (drvHeap,\r
+ instNum,\r
+ testMaxCodeBlocks,\r
+ codeBlockSet.mode,\r
+ codeBlockSet.doubleBuffer,\r
+ codeBlockSet.lteCrcSel,\r
+ dspCoreID,\r
+ hEdma,\r
+ tpccRegionUsed,\r
+ &edmaConfig[instNum],\r
+ &tcp3dResult);\r
+\r
+ System_printf("TCP3 Decoder Driver Initialization sequence complete\n");\r
+\r
+ /* Register the Notification Event for TCP3D */\r
+ registerTcp3dEvent();\r
+\r
+ /* Set the global flags to default values */\r
+ pingComplete = 0;\r
+ pongComplete = 0;\r
+ pauseIntr = 0;\r
+ l2pIntr = 0;\r
+ tcp3dEventCntr = 0;\r
+ pauseIntFlag = 0;\r
+ rcvStartFlag = 0;\r
+ soldoutCntr = 0;\r
+ afterIntrSoldout = 0;\r
+ afterIntrPause = 0;\r
+ pendPauseCntr = 0;\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void allDeInit(Void)\r
+{\r
+ EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;\r
+\r
+ /* Un-register the Notification Event for TCP3D */\r
+ unregisterTcp3dEvent();\r
+\r
+ /* Close all EDMA channels allocated for the test */\r
+ System_printf("EDMA3 Channels freeing started...\n");\r
+\r
+ /* Register call backs */\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pingChRes[0].chNo);\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pingChRes[1].chNo);\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pongChRes[0].chNo);\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pongChRes[1].chNo);\r
+\r
+ /* Close channels */\r
+ closeEdmaChannels(hEdma, instNum, &edmaConfig[instNum]);\r
+\r
+ System_printf("EDMA3 Channels freeing complete\n");\r
+\r
+ /* Deinit for TCP3D driver */\r
+ System_printf("TCP3 Decoder Driver De-Initialization sequence started...\n");\r
+\r
+ tcp3dSampleDeinit(drvHeap, instNum, tcp3dDrvInst[instNum]);\r
+\r
+ System_printf("TCP3 Decoder Driver De-Initialization sequence complete\n");\r
+\r
+ /* De-init EDMA3 */\r
+ edmaResult = edma3deinit(tpccNum, hEdma);\r
+ if (edmaResult != EDMA3_DRV_SOK)\r
+ {\r
+ System_printf("edma3deinit() FAILED, error code: %d\n", edmaResult);\r
+ }\r
+ else\r
+ {\r
+ System_printf("EDMA3 LLD De-Initialization complete\n");\r
+ }\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This function enables the power/clock domains for TCP3D. \r
+ *\r
+ * @retval\r
+ * Not Applicable.\r
+ */\r
+static Int32 enable_tcp3d (void)\r
+{\r
+#ifndef SIMULATOR_SUPPORT\r
+ /* TCP3D power domain is turned OFF by default.\r
+ * It needs to be turned on before doing any TCP3D device register access.\r
+ * This is not required for the simulator. */\r
+\r
+ /* Set TCP3D Power domain to ON */ \r
+ CSL_PSC_enablePowerDomain (CSL_PSC_PD_TCP3D);\r
+\r
+ /* Enable the clocks too for TCP3D */\r
+ CSL_PSC_setModuleNextState (CSL_PSC_LPSC_TCP3D, PSC_MODSTATE_ENABLE);\r
+\r
+ /* Start the state transition */\r
+ CSL_PSC_startStateTransition (CSL_PSC_PD_TCP3D);\r
+\r
+ /* Wait until the state transition process is completed. */\r
+ while (!CSL_PSC_isStateTransitionDone (CSL_PSC_PD_TCP3D));\r
+\r
+ /* Return TCP3D PSC status */\r
+ if ((CSL_PSC_getPowerDomainState(CSL_PSC_PD_TCP3D) == PSC_PDSTATE_ON) &&\r
+ (CSL_PSC_getModuleState (CSL_PSC_LPSC_TCP3D) == PSC_MODSTATE_ENABLE))\r
+ {\r
+ /* TCP3D ON. Ready for use */ \r
+ return 0;\r
+ }\r
+ else\r
+ {\r
+ /* SRIO Power on failed. Return error */ \r
+ return -1; \r
+ }\r
+#else\r
+ /* PSC is not supported on simulator. Return success always */\r
+ return 0;\r
+#endif\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to indicate that a block of memory is \r
+ * about to be accessed. If the memory block is cached then this \r
+ * indicates that the application would need to ensure that the \r
+ * cache is updated with the data from the actual memory.\r
+ *\r
+ * @param[in] ptr\r
+ * Address of memory block\r
+ *\r
+ * @param[in] size\r
+ * Size of memory block\r
+ *\r
+ * @retval\r
+ * Not Applicable\r
+ */\r
+void tcp3dBeginMemAccess (void *ptr, uint32_t size)\r
+{\r
+ /* Invalidate L1D cache and wait until operation is complete. \r
+ * Use this approach if L2 cache is not enabled */ \r
+ CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);\r
+\r
+ /* Cleanup the prefectch buffer also. */\r
+ CSL_XMC_invalidatePrefetchBuffer(); \r
+\r
+ return;\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to indicate that the block of memory has \r
+ * finished being accessed. If the memory block is cached then the \r
+ * application would need to ensure that the contents of the cache \r
+ * are updated immediately to the actual memory. \r
+ *\r
+ * @param[in] ptr\r
+ * Address of memory block\r
+ * @param[in] size\r
+ * Size of memory block\r
+ *\r
+ * @retval\r
+ * Not Applicable\r
+ */\r
+void tcp3dEndMemAccess (void *ptr, uint32_t size)\r
+{\r
+ /* Writeback L1D cache and wait until operation is complete. \r
+ * Use this approach if L2 cache is not enabled */ \r
+ CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT); \r
+\r
+ return;\r
+}\r
+\r
+/* end of file */\r
diff --git a/example/src/tcp3d_example_main.h b/example/src/tcp3d_example_main.h
--- /dev/null
@@ -0,0 +1,237 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_MAIN_H_\r
+#define _TCP3D_MAIN_H_\r
+\r
+/* XDC includes */\r
+//#include <xdc/std.h>\r
+#include <xdc/cfg/global.h>\r
+#include <xdc/runtime/System.h>\r
+#include <xdc/runtime/Memory.h>\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+/* Driver includes */\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+#include <ti/drv/tcp3d/src/tcp3d_utils.h>\r
+\r
+/* Utility includes */\r
+#include "tcp3d_codeBlkSeg.h"\r
+\r
+/**********************************************************************\r
+ ************************** Test Macros *******************************\r
+ **********************************************************************/\r
+/**\r
+ * Address mapping is done based on the mapping shown below.\r
+ * Check on the address done to ensure it be in L2SRAM space.\r
+ * \r
+ * L2SRAM : org = 0x00800000, len = 0x100000 (local)\r
+ * GEM0_L2_MEM : org = 0x10800000, len = 0x100000 (global)\r
+ * GEM1_L2_MEM : org = 0x11800000, len = 0x100000 (global)\r
+ * GEM2_L2_MEM : org = 0x12800000, len = 0x100000 (global)\r
+ * GEM3_L2_MEM : org = 0x13800000, len = 0x100000 (global)\r
+ *\r
+ * MSMCSRAM : org = 0x0c000000, len = 0x200000 (global)\r
+ */\r
+#define L2GLBMAP(coreID, addr) \\r
+ ( ( ((UInt32)(addr) >= 0x00800000) && ((UInt32)(addr) < 0x00900000) ) ? \\r
+ ( (UInt32)(addr) | (UInt32)((0x10 | (coreID & 0x3)) << 24) ) : \\r
+ (UInt32)(addr) ) \r
+\r
+/**********************************************************************\r
+ ************************** Test Compile Flags ************************\r
+ **********************************************************************/\r
+/**\r
+ * Prepare all input config registers outside the Send loop (block size based, etc)\r
+ * except for beta states since they are data dependent.\r
+ */\r
+#define TEST_PREPARE_ONLY_BETASTATE 1\r
+\r
+/**\r
+ * Set this flag to use the fixed input configuration parameters preparation\r
+ * optimization. This flag is useful only if TEST_PREPARE_ONLY_BETASTATE is\r
+ * not used.\r
+ */\r
+#define TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT 0\r
+\r
+/**\r
+ * Check the beta state values with the reference from the file generated \r
+ * with the test vectors.\r
+ */\r
+#define TEST_BETA_VALUE_CHECK 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Definitions **************************\r
+ **********************************************************************/\r
+/* TCP3D modes */\r
+#define TEST_MODE_SINGLE CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_3GPP //0 (NOT SUPPORTED)\r
+#define TEST_MODE_LTE CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE //1\r
+#define TEST_MODE_WIMAX CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX //2\r
+#define TEST_MODE_SPLIT CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_HSUPA //3\r
+\r
+/* Test True/False flags */\r
+#define TEST_FALSE 0\r
+#define TEST_TRUE 1\r
+\r
+/* Test Interrupt flags */\r
+#define TEST_INTR_ENABLE 1\r
+#define TEST_INTR_DISABLE 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Structures ***************************\r
+ **********************************************************************/\r
+/*\r
+ * Structure that holds the configuration parameters. Used for storing the\r
+ * configuration values read from the file blockXX_cfgreg.dat for a given\r
+ * code block.\r
+ */\r
+typedef struct cbConfig\r
+{\r
+ /* Control */\r
+ Int32 mode_sel; //TCP3_MODE\r
+ Int32 lte_crc_init_sel;\r
+\r
+ /* Input */\r
+ Int32 NumInfoBits; //CFG0\r
+ Int32 SW0_length; //CFG1\r
+ Int32 maxst_en; //CFG2\r
+ Int32 out_flag_en;\r
+ Int32 out_order_sel;\r
+ Int32 ext_scale_en;\r
+ Int32 soft_out_flag_en;\r
+ Int32 soft_out_fmt;\r
+ Int32 min_itr;\r
+ Int32 max_itr;\r
+ Int32 snr_val;\r
+ Int32 snr_rep;\r
+ Int32 stop_sel;\r
+ Int32 crc_iter_pass;\r
+ Int32 crc_sel;\r
+ Int32 maxst_thold; //CFG3\r
+ Int32 maxst_value;\r
+ Int32 ext_scale_0; //CFG8\r
+ Int32 ext_scale_1;\r
+ Int32 ext_scale_2;\r
+ Int32 ext_scale_3;\r
+ Int32 ext_scale_4; //CFG9\r
+ Int32 ext_scale_5;\r
+ Int32 ext_scale_6;\r
+ Int32 ext_scale_7;\r
+ Int32 ext_scale_8; //CFG10\r
+ Int32 ext_scale_9;\r
+ Int32 ext_scale_10;\r
+ Int32 ext_scale_11;\r
+ Int32 ext_scale_12; //CFG11\r
+ Int32 ext_scale_13;\r
+ Int32 ext_scale_14;\r
+ Int32 ext_scale_15;\r
+} cbConfig;\r
+\r
+/*\r
+ * Structure for one code block description.\r
+ */\r
+typedef struct cbDataDesc\r
+{\r
+ UInt32 mode;\r
+ UInt32 crcInitVal;\r
+ Int8 tailBits[12];\r
+ Tcp3d_InCfgParams *inCfgParams;\r
+ UInt8 sw0LengthUsed;\r
+\r
+ UInt32 blockSize;\r
+ UInt32 interFlag;\r
+ UInt32 sdFlag;\r
+ UInt32 stsFlag;\r
+ UInt32 llrOffset;\r
+ UInt32 sdOffset;\r
+\r
+ UInt32 sizeCFG;\r
+ UInt32 sizeINTER;\r
+ UInt32 sizeLLR;\r
+ UInt32 sizeHD;\r
+ UInt32 sizeSD;\r
+ UInt32 sizeSTS;\r
+\r
+ UInt32 *inCfg;\r
+ UInt16 *inInter;\r
+ Int8 *inLLR; /* three arrays with offset in llrOffset */\r
+ UInt32 *outHD;\r
+ UInt32 *refHD;\r
+ Int8 *outSD; /* three arrays with offset in sdOffset */\r
+ Int8 *refSD; /* three arrays with offset in sdOffset */\r
+ UInt32 *outSts;\r
+ UInt32 *refSts;\r
+} cbDataDesc;\r
+\r
+/*\r
+ * Structure for one test description. \r
+ */\r
+typedef struct cbTestDesc\r
+{\r
+ cbDataDesc **cbData;\r
+ Int32 maxNumCB;\r
+ Int32 mode;\r
+ Int32 doubleBuffer;\r
+ Int32 lteCrcSel;\r
+} cbTestDesc;\r
+\r
+/**********************************************************************\r
+ ************************** Test Global Tables ************************\r
+ **********************************************************************/\r
+/* interleaver tables (used in tcp3d_inputCongigPrep.c file) */\r
+extern Int16 TCP3_LteInterleaverTable[220][7];\r
+extern Int16 TCP3_WimaxInterleaverTable[17][4];\r
+\r
+/**********************************************************************\r
+ *********************** Test Global Functions ************************\r
+ **********************************************************************/\r
+/* interleaver table index calculation function */\r
+Int32 LTE_interleaver_index(Int32 K);\r
+Int32 WIMAX_interleaver_index(Int32 K);\r
+\r
+/* input config prepare function definitions (see tcp3d_inputCongigPrep.c) */\r
+Void prepareBlockSizeDepICParams(cbDataDesc *cbPtr);\r
+Void prepareBetaStateICParams(cbDataDesc *cbPtr, UInt8 mode);\r
+Void prepareIC(cbDataDesc *cbPtr, UInt32 *tempIC, UInt8 copyFlag);\r
+Void fillICParams(Tcp3d_InCfgParams *inCfgParams, cbConfig *cbCfg);\r
+Void checkBetaValues (UInt32 inCfg[]);\r
+\r
+/* Test vector functions (see tcp3d_testvector.c) */\r
+Int getTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet, Char *testFolder);\r
+Void freeTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet);\r
+\r
+#endif /* _TCP3D_MAIN_H_ */\r
diff --git a/example/src/tcp3d_inputConfigPrep.c b/example/src/tcp3d_inputConfigPrep.c
--- /dev/null
@@ -0,0 +1,314 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+#include "tcp3d_main.h"\r
+\r
+/* XDC includes */\r
+#include <xdc/std.h>\r
+#include <xdc/cfg/global.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+#include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
+\r
+#if TEST_PREPARE_ONLY_BETASTATE\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void prepareBlockSizeDepICParams(cbDataDesc *cbPtr)\r
+{\r
+ Int32 frameLenInd;\r
+ UInt8 numMAP;\r
+ \r
+ if ( ( cbPtr->mode == TEST_MODE_SINGLE ) ||\r
+ ( cbPtr->mode == TEST_MODE_SPLIT ) ) \r
+ numMAP = 1; /* for 3GPP numMAP=1 */\r
+ else\r
+ numMAP = 2; /* LTE or WIMAX */\r
+\r
+ /* IC0 - IC1 */\r
+ cbPtr->inCfgParams->blockLen = (cbPtr->blockSize-1);\r
+ TCP3D_codeBlkSeg ( cbPtr->blockSize,\r
+ numMAP,\r
+ &cbPtr->sw0LengthUsed,\r
+ &cbPtr->inCfgParams->sw0LenSel,\r
+ &cbPtr->inCfgParams->sw1Len,\r
+ &cbPtr->inCfgParams->sw2LenSel,\r
+ &cbPtr->inCfgParams->numsw0);\r
+\r
+ /* IC12 - IC14 */\r
+ if ( cbPtr->mode == TEST_MODE_LTE )\r
+ { /* LTE */\r
+ frameLenInd = LTE_interleaver_index(cbPtr->blockSize);\r
+ cbPtr->inCfgParams->itgParam[0] = (UInt16) ((2*TCP3_LteInterleaverTable[frameLenInd][2]) % TCP3_LteInterleaverTable[frameLenInd][0]);\r
+ cbPtr->inCfgParams->itgParam[1] = TCP3_LteInterleaverTable[frameLenInd][6];\r
+ cbPtr->inCfgParams->itgParam[2] = TCP3_LteInterleaverTable[frameLenInd][3];\r
+ cbPtr->inCfgParams->itgParam[3] = TCP3_LteInterleaverTable[frameLenInd][4];\r
+ cbPtr->inCfgParams->itgParam[4] = TCP3_LteInterleaverTable[frameLenInd][5];\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_WIMAX )\r
+ { /* WIMAX */\r
+ /* NOTE: Finding Index function is not implemented */\r
+ frameLenInd = WIMAX_interleaver_index(cbPtr->blockSize);\r
+ cbPtr->inCfgParams->itgParam[0] = 0;\r
+ cbPtr->inCfgParams->itgParam[1] = TCP3_WimaxInterleaverTable[frameLenInd][0]; \r
+ cbPtr->inCfgParams->itgParam[2] = TCP3_WimaxInterleaverTable[frameLenInd][1]; \r
+ cbPtr->inCfgParams->itgParam[3] = TCP3_WimaxInterleaverTable[frameLenInd][2]; \r
+ cbPtr->inCfgParams->itgParam[4] = TCP3_WimaxInterleaverTable[frameLenInd][3];\r
+ }\r
+\r
+ Tcp3d_prepBlockSizeDepConfigRegs ( cbPtr->mode,\r
+ &cbPtr->inCfg[0],\r
+ cbPtr->inCfgParams->numsw0,\r
+ cbPtr->inCfgParams->blockLen,\r
+ cbPtr->inCfgParams->sw0LenSel,\r
+ cbPtr->inCfgParams->sw2LenSel,\r
+ cbPtr->inCfgParams->sw1Len,\r
+ &cbPtr->inCfgParams->itgParam[0]);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void prepareBetaStateICParams(cbDataDesc *cbPtr, UInt8 mode)\r
+{\r
+ if ( mode != TEST_MODE_WIMAX )\r
+ {\r
+ Tcp3d_betaStates ( cbPtr->tailBits,\r
+ //cbPtr->tailMap1,\r
+ 1, /* change to -1 for sign change */\r
+ COMPUTE_KT(cbPtr->blockSize),\r
+ cbPtr->inCfgParams->betaMap0,\r
+ cbPtr->inCfgParams->betaMap1);\r
+\r
+ Tcp3d_prepBetaStateConfigRegs ( mode,\r
+ &cbPtr->inCfg[0],\r
+ &cbPtr->inCfgParams->betaMap0[0],\r
+ &cbPtr->inCfgParams->betaMap1[0]);\r
+ }\r
+}\r
+\r
+#else\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * This function is used for filling the changing values and calling the \r
+ * utility prepare functions for constructing all the 15 input config registers \r
+ */\r
+Void prepareIC(cbDataDesc *cbPtr, UInt32 *tempIC, UInt8 copyFlag)\r
+{\r
+ UInt8 numMAP;\r
+ Int32 frameLenInd;\r
+ Int i;\r
+ Tcp3d_InCfgParams *inCfgParams = cbPtr->inCfgParams;\r
+ \r
+ if ( ( cbPtr->mode == TEST_MODE_SINGLE ) ||\r
+ ( cbPtr->mode == TEST_MODE_SPLIT ) ) \r
+ numMAP = 1; /* for 3GPP numMAP=1 */\r
+ else\r
+ numMAP = 2; /* LTE or WIMAX */\r
+\r
+ /* IC0 - IC1 */\r
+ inCfgParams->blockLen = (cbPtr->blockSize-1);\r
+ TCP3D_codeBlkSeg ( cbPtr->blockSize,\r
+ numMAP,\r
+ &cbPtr->sw0LengthUsed,\r
+ &inCfgParams->sw0LenSel,\r
+ &inCfgParams->sw1Len,\r
+ &inCfgParams->sw2LenSel,\r
+ &inCfgParams->numsw0);\r
+\r
+ /* IC2 - IC3 */\r
+ /* Fixed values filled once during init */\r
+ /* IC4 - IC7 */\r
+ if ( mode != TEST_MODE_WIMAX )\r
+ {\r
+ /* compute the beta state values from tail bits */\r
+ Tcp3d_betaStates ( cbPtr->tailBits,\r
+ 1, /* change to -1 for sign change */\r
+ COMPUTE_KT(cbPtr->blockSize),\r
+ inCfgParams->betaMap0,\r
+ inCfgParams->betaMap1);\r
+ }\r
+ /* IC8 - IC11 */\r
+ /* Fixed values filled once during init */\r
+ /* IC12 - IC14 */\r
+ if ( cbPtr->mode == TEST_MODE_LTE )\r
+ { /* LTE */\r
+ frameLenInd = LTE_interleaver_index(cbPtr->blockSize);\r
+ inCfgParams->itgParam[0] = (UInt16) ((2*TCP3_LteInterleaverTable[frameLenInd][2]) % TCP3_LteInterleaverTable[frameLenInd][0]);\r
+ inCfgParams->itgParam[1] = TCP3_LteInterleaverTable[frameLenInd][6];\r
+ inCfgParams->itgParam[2] = TCP3_LteInterleaverTable[frameLenInd][3];\r
+ inCfgParams->itgParam[3] = TCP3_LteInterleaverTable[frameLenInd][4];\r
+ inCfgParams->itgParam[4] = TCP3_LteInterleaverTable[frameLenInd][5];\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_WIMAX )\r
+ { /* WIMAX */\r
+ /* NOTE: Finding Index function is not implemented */\r
+ frameLenInd = WIMAX_interleaver_index(cbPtr->blockSize);\r
+ inCfgParams->itgParam[0] = 0;\r
+ inCfgParams->itgParam[1] = TCP3_WimaxInterleaverTable[frameLenInd][0]; \r
+ inCfgParams->itgParam[2] = TCP3_WimaxInterleaverTable[frameLenInd][1]; \r
+ inCfgParams->itgParam[3] = TCP3_WimaxInterleaverTable[frameLenInd][2]; \r
+ inCfgParams->itgParam[4] = TCP3_WimaxInterleaverTable[frameLenInd][3];\r
+ }\r
+\r
+ /* All Input Config Registers are populated */\r
+ Tcp3d_prepConfigRegs ( cbPtr->mode,\r
+ inCfgParams,\r
+ cbPtr->inCfg,\r
+ tempIC,\r
+ copyFlag);\r
+}\r
+#endif\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * This function is used for filling the fixed values in the inCfgParams\r
+ * structure.\r
+ */\r
+Void fillICParams(Tcp3d_InCfgParams *inCfgParams, cbConfig *cbCfg)\r
+{\r
+ /* copy the config info into inCfgParams */\r
+ /* IC0 - IC1 */\r
+ /* Filled by the TCP3D_codeBlkSeg() function call */\r
+ /* IC2 */\r
+ inCfgParams->intLoadSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_SET;\r
+ inCfgParams->maxStar = cbCfg->maxst_en;\r
+ inCfgParams->outStsRead = cbCfg->out_flag_en;\r
+#ifdef _BIG_ENDIAN\r
+ inCfgParams->outOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_SWAP;\r
+#else\r
+ inCfgParams->outOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_NO_SWAP;\r
+#endif\r
+ inCfgParams->extScale = cbCfg->ext_scale_en;\r
+ inCfgParams->softOutRead = cbCfg->soft_out_flag_en;\r
+#ifdef _BIG_ENDIAN\r
+ inCfgParams->softOutOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_8_BIT;\r
+#else\r
+ inCfgParams->softOutOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_32_BIT;\r
+#endif\r
+ inCfgParams->softOutFrmtSel = cbCfg->soft_out_fmt;\r
+ inCfgParams->minIter = cbCfg->min_itr;\r
+ inCfgParams->maxIter = cbCfg->max_itr;\r
+ inCfgParams->snrVal = cbCfg->snr_val;\r
+ inCfgParams->snrReport = cbCfg->snr_rep;\r
+ inCfgParams->stopSel = cbCfg->stop_sel;\r
+ inCfgParams->crcIterSel = cbCfg->crc_iter_pass;\r
+ inCfgParams->crcPolySel = cbCfg->crc_sel;\r
+ /* IC3 */\r
+ inCfgParams->maxStarThres = cbCfg->maxst_thold;\r
+ inCfgParams->maxStarValue = cbCfg->maxst_value;\r
+ /* IC4 - IC7 */\r
+ /* Filling with defaults - updated based on tail bits */\r
+ memset(inCfgParams->betaMap0,0,8);\r
+ memset(inCfgParams->betaMap0,0,8);\r
+ /* IC8 - IC11 */\r
+ inCfgParams->extrScale[0] = cbCfg->ext_scale_0;\r
+ inCfgParams->extrScale[1] = cbCfg->ext_scale_1;\r
+ inCfgParams->extrScale[2] = cbCfg->ext_scale_2;\r
+ inCfgParams->extrScale[3] = cbCfg->ext_scale_3;\r
+ inCfgParams->extrScale[4] = cbCfg->ext_scale_4;\r
+ inCfgParams->extrScale[5] = cbCfg->ext_scale_5;\r
+ inCfgParams->extrScale[6] = cbCfg->ext_scale_6;\r
+ inCfgParams->extrScale[7] = cbCfg->ext_scale_7;\r
+ inCfgParams->extrScale[8] = cbCfg->ext_scale_8;\r
+ inCfgParams->extrScale[9] = cbCfg->ext_scale_9;\r
+ inCfgParams->extrScale[10] = cbCfg->ext_scale_10;\r
+ inCfgParams->extrScale[11] = cbCfg->ext_scale_11;\r
+ inCfgParams->extrScale[12] = cbCfg->ext_scale_12;\r
+ inCfgParams->extrScale[13] = cbCfg->ext_scale_13;\r
+ inCfgParams->extrScale[14] = cbCfg->ext_scale_14;\r
+ inCfgParams->extrScale[15] = cbCfg->ext_scale_15;\r
+ /* IC12 - IC14 */\r
+ /* Filling with defaults - updated based on block size */\r
+ inCfgParams->itgParam[0] = 0;\r
+ inCfgParams->itgParam[1] = 0;\r
+ inCfgParams->itgParam[2] = 0;\r
+ inCfgParams->itgParam[3] = 0;\r
+ inCfgParams->itgParam[4] = 0;\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This function compares the prepared beta state values with the \r
+ * reference test vector file. \r
+ *\r
+ * @param[in] inCfg\r
+ * Address of input configuration registers array.\r
+ *\r
+ * @retval\r
+ * Not Applicable.\r
+ */\r
+void checkBetaValues (uint32_t inCfg[])\r
+{\r
+#if TEST_BETA_VALUE_CHECK\r
+ Int idx, i;\r
+ Char fileName[300];\r
+ FILE *fid;\r
+ UInt32 inCfgRef[15];\r
+ UInt32 tmp;\r
+\r
+ /* Check Beta state values with reference */\r
+ sprintf(fileName, "%s\\reference\\block%d_inp_cfg.dat", testFolder[testCntr], sendBlockCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\t Reference Input configuration file open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<15;i++)\r
+ {\r
+ fscanf(fid, "%x", &tmp);\r
+ inCfgRef[i] = tmp;\r
+ }\r
+ fclose(fid);\r
+\r
+ for (idx = 4; idx < 8; ++idx)\r
+ {\r
+ if ( inCfgRef[idx] != inCfg[idx] )\r
+ {\r
+ System_printf("\t Block Count %d, INCFG mismatch %d\n", sendBlockCnt, idx);\r
+ }\r
+ }\r
+#else\r
+ return;\r
+#endif\r
+}\r
+\r
+/* end of file */\r
diff --git a/example/src/tcp3d_itg.c b/example/src/tcp3d_itg.c
--- /dev/null
+++ b/example/src/tcp3d_itg.c
@@ -0,0 +1,366 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+\r
+#include <xdc/std.h>\r
+\r
+/***************************************************************************/\r
+/* LTE Interelaver table with the coefficients P0,P1,P2 and G0 needed for */\r
+/* internal LTE coefficient generation. */\r
+/* K f1 f2 P0 P1 P2 G0 */\r
+/***************************************************************************/\r
+Int16 TCP3_LteInterleaverTable [220][7] = {\r
+ 40, 3, 10, 30, 20, 10, 13, // 0\r
+ 48, 7, 12, 36, 24, 12, 19, // 1\r
+ 56, 19, 42, 42, 28, 14, 5, // 2\r
+ 64, 7, 16, 48, 32, 16, 23, // 3\r
+ 72, 7, 18, 54, 36, 18, 25, // 4\r
+ 80, 11, 20, 60, 40, 20, 31, // 5\r
+ 88, 5, 22, 22, 44, 66, 27, // 6\r
+ 96, 11, 24, 72, 48, 24, 35, // 7\r
+ 104, 7, 26, 78, 52, 26, 33, // 8\r
+ 112, 41, 84, 28, 56, 84, 13, // 9\r
+ 120, 103, 90, 90, 60, 30, 73, // 10\r
+ 128, 15, 32, 96, 64, 32, 47, // 11\r
+ 136, 9, 34, 34, 68, 102, 43, // 12\r
+ 144, 17, 108, 36, 72, 108, 125, // 13\r
+ 152, 9, 38, 38, 76, 114, 47, // 14\r
+ 160, 21, 120, 40, 80, 120, 141, // 15\r
+ 168, 101, 84, 42, 84, 126, 17, // 16\r
+ 176, 21, 44, 44, 88, 132, 65, // 17\r
+ 184, 57, 46, 46, 92, 138, 103, // 18\r
+ 192, 23, 48, 144, 96, 48, 71, // 19\r
+ 200, 13, 50, 50, 100, 150, 63, // 20\r
+ 208, 27, 52, 156, 104, 52, 79, // 21\r
+ 216, 11, 36, 162, 108, 54, 47, // 22\r
+ 224, 27, 56, 168, 112, 56, 83, // 23\r
+ 232, 85, 58, 58, 116, 174, 143, // 24\r
+ 240, 29, 60, 60, 120, 180, 89, // 25\r
+ 248, 33, 62, 62, 124, 186, 95, // 26\r
+ 256, 15, 32, 192, 128, 64, 47, // 27\r
+ 264, 17, 198, 66, 132, 198, 215, // 28\r
+ 272, 33, 68, 68, 136, 204, 101, // 29\r
+ 280, 103, 210, 210, 140, 70, 33, // 30\r
+ 288, 19, 36, 216, 144, 72, 55, // 31\r
+ 296, 19, 74, 222, 148, 74, 93, // 32\r
+ 304, 37, 76, 76, 152, 228, 113, // 33\r
+ 312, 19, 78, 234, 156, 78, 97, // 34\r
+ 320, 21, 120, 80, 160, 240, 141, // 35\r
+ 328, 21, 82, 82, 164, 246, 103, // 36\r
+ 336, 115, 84, 252, 168, 84, 199, // 37\r
+ 344, 193, 86, 86, 172, 258, 279, // 38\r
+ 352, 21, 44, 88, 176, 264, 65, // 39\r
+ 360, 133, 90, 90, 180, 270, 223, // 40\r
+ 368, 81, 46, 92, 184, 276, 127, // 41\r
+ 376, 45, 94, 94, 188, 282, 139, // 42\r
+ 384, 23, 48, 288, 192, 96, 71, // 43\r
+ 392, 243, 98, 294, 196, 98, 341, // 44\r
+ 400, 151, 40, 300, 200, 100, 191, // 45\r
+ 408, 155, 102, 306, 204, 102, 257, // 46\r
+ 416, 25, 52, 104, 208, 312, 77, // 47\r
+ 424, 51, 106, 318, 212, 106, 157, // 48\r
+ 432, 47, 72, 324, 216, 108, 119, // 49\r
+ 440, 91, 110, 330, 220, 110, 201, // 50\r
+ 448, 29, 168, 112, 224, 336, 197, // 51\r
+ 456, 29, 114, 114, 228, 342, 143, // 52\r
+ 464, 247, 58, 348, 232, 116, 305, // 53\r
+ 472, 29, 118, 118, 236, 354, 147, // 54\r
+ 480, 89, 180, 120, 240, 360, 269, // 55\r
+ 488, 91, 122, 366, 244, 122, 213, // 56\r
+ 496, 157, 62, 124, 248, 372, 219, // 57\r
+ 504, 55, 84, 378, 252, 126, 139, // 58\r
+ 512, 31, 64, 384, 256, 128, 95, // 59\r
+ 528, 17, 66, 132, 264, 396, 83, // 60\r
+ 544, 35, 68, 408, 272, 136, 103, // 61\r
+ 560, 227, 420, 420, 280, 140, 87, // 62\r
+ 576, 65, 96, 144, 288, 432, 161, // 63\r
+ 592, 19, 74, 444, 296, 148, 93, // 64\r
+ 608, 37, 76, 152, 304, 456, 113, // 65\r
+ 624, 41, 234, 156, 312, 468, 275, // 66\r
+ 640, 39, 80, 480, 320, 160, 119, // 67\r
+ 656, 185, 82, 164, 328, 492, 267, // 68\r
+ 672, 43, 252, 504, 336, 168, 295, // 69\r
+ 688, 21, 86, 172, 344, 516, 107, // 70\r
+ 704, 155, 44, 528, 352, 176, 199, // 71\r
+ 720, 79, 120, 540, 360, 180, 199, // 72\r
+ 736, 139, 92, 552, 368, 184, 231, // 73\r
+ 752, 23, 94, 564, 376, 188, 117, // 74\r
+ 768, 217, 48, 192, 384, 576, 265, // 75\r
+ 784, 25, 98, 196, 392, 588, 123, // 76\r
+ 800, 17, 80, 200, 400, 600, 97, // 77\r
+ 816, 127, 102, 612, 408, 204, 229, // 78\r
+ 832, 25, 52, 208, 416, 624, 77, // 79\r
+ 848, 239, 106, 636, 424, 212, 345, // 80\r
+ 864, 17, 48, 216, 432, 648, 65, // 81\r
+ 880, 137, 110, 220, 440, 660, 247, // 82\r
+ 896, 215, 112, 672, 448, 224, 327, // 83\r
+ 912, 29, 114, 228, 456, 684, 143, // 84\r
+ 928, 15, 58, 696, 464, 232, 73, // 85\r
+ 944, 147, 118, 708, 472, 236, 265, // 86\r
+ 960, 29, 60, 240, 480, 720, 89, // 87\r
+ 976, 59, 122, 732, 488, 244, 181, // 88\r
+ 992, 65, 124, 248, 496, 744, 189, // 89\r
+ 1008, 55, 84, 756, 504, 252, 139, // 90\r
+ 1024, 31, 64, 768, 512, 256, 95, // 91\r
+ 1056, 17, 66, 264, 528, 792, 83, // 92\r
+ 1088, 171, 204, 816, 544, 272, 375, // 93\r
+ 1120, 67, 140, 840, 560, 280, 207, // 94\r
+ 1152, 35, 72, 864, 576, 288, 107, // 95\r
+ 1184, 19, 74, 888, 592, 296, 93, // 96\r
+ 1216, 39, 76, 912, 608, 304, 115, // 97\r
+ 1248, 19, 78, 936, 624, 312, 97, // 98\r
+ 1280, 199, 240, 960, 640, 320, 439, // 99\r
+ 1312, 21, 82, 328, 656, 984, 103, // 100\r
+ 1344, 211, 252, 1008, 672, 336, 463, // 101\r
+ 1376, 21, 86, 344, 688, 1032, 107, // 102\r
+ 1408, 43, 88, 1056, 704, 352, 131, // 103\r
+ 1440, 149, 60, 360, 720, 1080, 209, // 104\r
+ 1472, 45, 92, 368, 736, 1104, 137, // 105\r
+ 1504, 49, 846, 376, 752, 1128, 895, // 106\r
+ 1536, 71, 48, 1152, 768, 384, 119, // 107\r
+ 1568, 13, 28, 392, 784, 1176, 41, // 108\r
+ 1600, 17, 80, 400, 800, 1200, 97, // 109\r
+ 1632, 25, 102, 408, 816, 1224, 127, // 110\r
+ 1664, 183, 104, 1248, 832, 416, 287, // 111\r
+ 1696, 55, 954, 1272, 848, 424, 1009, // 112\r
+ 1728, 127, 96, 1296, 864, 432, 223, // 113\r
+ 1760, 27, 110, 1320, 880, 440, 137, // 114\r
+ 1792, 29, 112, 448, 896, 1344, 141, // 115\r
+ 1824, 29, 114, 456, 912, 1368, 143, // 116\r
+ 1856, 57, 116, 464, 928, 1392, 173, // 117\r
+ 1888, 45, 354, 472, 944, 1416, 399, // 118\r
+ 1920, 31, 120, 1440, 960, 480, 151, // 119\r
+ 1952, 59, 610, 1464, 976, 488, 669, // 120\r
+ 1984, 185, 124, 496, 992, 1488, 309, // 121\r
+ 2016, 113, 420, 504, 1008, 1512, 533, // 122\r
+ 2048, 31, 64, 1536, 1024, 512, 95, // 123\r
+ 2112, 17, 66, 528, 1056, 1584, 83, // 124\r
+ 2176, 171, 136, 1632, 1088, 544, 307, // 125\r
+ 2240, 209, 420, 560, 1120, 1680, 629, // 126\r
+ 2304, 253, 216, 576, 1152, 1728, 469, // 127\r
+ 2368, 367, 444, 1776, 1184, 592, 811, // 128\r
+ 2432, 265, 456, 608, 1216, 1824, 721, // 129\r
+ 2496, 181, 468, 624, 1248, 1872, 649, // 130\r
+ 2560, 39, 80, 1920, 1280, 640, 119, // 131\r
+ 2624, 27, 164, 1968, 1312, 656, 191, // 132\r
+ 2688, 127, 504, 2016, 1344, 672, 631, // 133\r
+ 2752, 143, 172, 2064, 1376, 688, 315, // 134\r
+ 2816, 43, 88, 2112, 1408, 704, 131, // 135\r
+ 2880, 29, 300, 720, 1440, 2160, 329, // 136\r
+ 2944, 45, 92, 736, 1472, 2208, 137, // 137\r
+ 3008, 157, 188, 752, 1504, 2256, 345, // 138\r
+ 3072, 47, 96, 2304, 1536, 768, 143, // 139\r
+ 3136, 13, 28, 784, 1568, 2352, 41, // 140\r
+ 3200, 111, 240, 2400, 1600, 800, 351, // 141\r
+ 3264, 443, 204, 2448, 1632, 816, 647, // 142\r
+ 3328, 51, 104, 2496, 1664, 832, 155, // 143\r
+ 3392, 51, 212, 2544, 1696, 848, 263, // 144\r
+ 3456, 451, 192, 2592, 1728, 864, 643, // 145\r
+ 3520, 257, 220, 880, 1760, 2640, 477, // 146\r
+ 3584, 57, 336, 896, 1792, 2688, 393, // 147\r
+ 3648, 313, 228, 912, 1824, 2736, 541, // 148\r
+ 3712, 271, 232, 2784, 1856, 928, 503, // 149\r
+ 3776, 179, 236, 2832, 1888, 944, 415, // 150\r
+ 3840, 331, 120, 2880, 1920, 960, 451, // 151\r
+ 3904, 363, 244, 2928, 1952, 976, 607, // 152\r
+ 3968, 375, 248, 2976, 1984, 992, 623, // 153\r
+ 4032, 127, 168, 3024, 2016, 1008, 295, // 154\r
+ 4096, 31, 64, 3072, 2048, 1024, 95, // 155\r
+ 4160, 33, 130, 1040, 2080, 3120, 163, // 156\r
+ 4224, 43, 264, 3168, 2112, 1056, 307, // 157\r
+ 4288, 33, 134, 1072, 2144, 3216, 167, // 158\r
+ 4352, 477, 408, 1088, 2176, 3264, 885, // 159\r
+ 4416, 35, 138, 3312, 2208, 1104, 173, // 160\r
+ 4480, 233, 280, 1120, 2240, 3360, 513, // 161\r
+ 4544, 357, 142, 1136, 2272, 3408, 499, // 162\r
+ 4608, 337, 480, 1152, 2304, 3456, 817, // 163\r
+ 4672, 37, 146, 1168, 2336, 3504, 183, // 164\r
+ 4736, 71, 444, 3552, 2368, 1184, 515, // 165\r
+ 4800, 71, 120, 3600, 2400, 1200, 191, // 166\r
+ 4864, 37, 152, 1216, 2432, 3648, 189, // 167\r
+ 4928, 39, 462, 3696, 2464, 1232, 501, // 168\r
+ 4992, 127, 234, 3744, 2496, 1248, 361, // 169\r
+ 5056, 39, 158, 3792, 2528, 1264, 197, // 170\r
+ 5120, 39, 80, 3840, 2560, 1280, 119, // 171\r
+ 5184, 31, 96, 3888, 2592, 1296, 127, // 172\r
+ 5248, 113, 902, 1312, 2624, 3936, 1015, // 173\r
+ 5312, 41, 166, 1328, 2656, 3984, 207, // 174\r
+ 5376, 251, 336, 4032, 2688, 1344, 587, // 175\r
+ 5440, 43, 170, 4080, 2720, 1360, 213, // 176\r
+ 5504, 21, 86, 1376, 2752, 4128, 107, // 177\r
+ 5568, 43, 174, 4176, 2784, 1392, 217, // 178\r
+ 5632, 45, 176, 1408, 2816, 4224, 221, // 179\r
+ 5696, 45, 178, 1424, 2848, 4272, 223, // 180\r
+ 5760, 161, 120, 1440, 2880, 4320, 281, // 181\r
+ 5824, 89, 182, 1456, 2912, 4368, 271, // 182\r
+ 5888, 323, 184, 4416, 2944, 1472, 507, // 183\r
+ 5952, 47, 186, 4464, 2976, 1488, 233, // 184\r
+ 6016, 23, 94, 4512, 3008, 1504, 117, // 185\r
+ 6080, 47, 190, 4560, 3040, 1520, 237, // 186\r
+ 6144, 263, 480, 4608, 3072, 1536, 743, // 187\r
+\r
+/*********FOLLOWING PART IS EXTENTION TO 8192 with step 64 TO TEST TCP3 *************/\r
+ 6208, 3, 194, 4656, 3104, 1552, 197, // 188\r
+ 6272, 3, 14, 4704, 3136, 1568, 17, // 189\r
+ 6336, 5, 66, 1584, 3168, 4752, 71, // 190\r
+ 6400, 3, 10, 4800, 3200, 1600, 13, // 191\r
+ 6464, 3, 202, 4848, 3232, 1616, 205, // 192\r
+ 6528, 5, 102, 1632, 3264, 4896, 107, // 193\r
+ 6592, 3, 206, 4944, 3296, 1648, 209, // 194\r
+ 6656, 3, 26, 4992, 3328, 1664, 29, // 195\r
+ 6720, 11, 210, 5040, 3360, 1680, 221, // 196\r
+ 6784, 3, 106, 5088, 3392, 1696, 109, // 197\r
+ 6848, 3, 214, 5136, 3424, 1712, 217, // 198\r
+ 6912, 5, 6, 1728, 3456, 5184, 11, // 199\r
+ 6976, 3, 218, 5232, 3488, 1744, 221, // 200\r
+ 7040, 3, 110, 5280, 3520, 1760, 113, // 201\r
+ 7104, 5, 222, 1776, 3552, 5328, 227, // 202\r
+ 7168, 3, 14, 5376, 3584, 1792, 17, // 203\r
+ 7232, 3, 226, 5424, 3616, 1808, 229, // 204\r
+ 7296, 5, 114, 1824, 3648, 5472, 119, // 205\r
+ 7360, 3, 230, 5520, 3680, 1840, 233, // 206\r
+ 7424, 3, 58, 5568, 3712, 1856, 61, // 207\r
+ 7488, 5, 78, 1872, 3744, 5616, 83, // 208\r
+ 7552, 3, 118, 5664, 3776, 1888, 121, // 209\r
+ 7616, 3, 238, 5712, 3808, 1904, 241, // 210\r
+ 7680, 7, 30, 5760, 3840, 1920, 37, // 211\r
+ 7744, 3, 22, 5808, 3872, 1936, 25, // 212\r
+ 7808, 3, 122, 5856, 3904, 1952, 125, // 213\r
+ 7872, 5, 246, 1968, 3936, 5904, 251, // 214\r
+ 7936, 3, 62, 5952, 3968, 1984, 65, // 215\r
+ 8000, 3, 10, 6000, 4000, 2000, 13, // 216\r
+ 8064, 5, 42, 2016, 4032, 6048, 47, // 217\r
+ 8128, 3, 254, 6096, 4064, 2032, 257, // 218\r
+ 8192, 3, 2, 6144, 4096, 2048, 5, // 219\r
+};\r
+\r
+Int16 TCP3_WimaxInterleaverTable[17][4] ={\r
+ 20, 18, 11, 4, // 0\r
+ 8, 12, 23, 34, // 1\r
+ 4, 14, 27, 40, // 2\r
+ 44, 54, 23, 4, // 3\r
+ 28, 8, 39, 46, // 4\r
+ 44, 12, 79, 90, // 5\r
+ 52, 14, 27, 40, // 6\r
+ 68, 20, 107, 126, // 7\r
+ 44, 12, 23, 34, // 8\r
+ 44, 12, 71, 82, // 9\r
+ 52, 14, 27, 40, // 10\r
+ 52, 14, 87, 100, // 11\r
+ 212, 356, 119, 402, // 12\r
+ 172, 588, 387, 474, // 13\r
+ 172, 44, 447, 1390, // 14\r
+ 124, 1000, 87, 1070, // 15\r
+ 212, 1320, 131, 1362 // 16\r
+};\r
+\r
+/*WiMAX frame lengths*/\r
+Int32 WIMAX_FRAME_LENGTHS[17] = {\r
+ 48, /* 0: 6 Bytes */\r
+ 72, /* 1: 9 Bytes */\r
+ 96, /* 2: 12 Bytes */\r
+ 144, /* 3: 18 Bytes */\r
+ 192, /* 4: 24 Bytes */\r
+ 216, /* 5: 27 Bytes */\r
+ 240, /* 6: 30 Bytes */\r
+ 288, /* 7: 36 Bytes */\r
+ 360, /* 8: 45 Bytes */\r
+ 384, /* 9: 48 Bytes */\r
+ 432, /* 10: 54 Bytes */\r
+ 480, /* 11: 60 Bytes */\r
+ 960, /* 12: 120 Bytes */\r
+ 1920, /* 13: 240 Bytes */\r
+ 2880, /* 14: 360 Bytes */\r
+ 3840, /* 15: 480 Bytes */\r
+ 4800 /* 16: 600 Bytes */\r
+};\r
+\r
+/*\r
+ * Calculates the LTE interleaver table index for given block length K\r
+ */\r
+Int32 LTE_interleaver_index(Int32 K)\r
+{\r
+ Int32 ind = K;\r
+\r
+ if ( K <= 512u )\r
+ {\r
+ ind = ( K >> 3 ) - 5u;\r
+ }\r
+ else if ( K <= 1024u )\r
+ {\r
+ ind = ( K >> 4 ) + 27u;\r
+ }\r
+ else if ( K <= 2048u )\r
+ {\r
+ ind = ( K >> 5 ) + 59u;\r
+ }\r
+ else if ( K <= 8192u )\r
+ {\r
+ ind = ( K >> 6 ) + 91u;\r
+ }\r
+\r
+ if ( ind == K )\r
+ {\r
+ printf("%s\n"," Error: Unsupported block length ");\r
+ exit(0);\r
+ }\r
+\r
+ return (ind);\r
+}\r
+\r
+/*\r
+ * Calculates the WIMAX interleaver table index for given block length K\r
+ */\r
+Int32 WIMAX_interleaver_index(Int32 K)\r
+{\r
+ Int32 ind = K, i;\r
+\r
+ for (i = 0; i < 17; ++i)\r
+ {\r
+ if ( K == WIMAX_FRAME_LENGTHS[i] )\r
+ {\r
+ ind = i;\r
+ }\r
+ }\r
+\r
+ if ( ind == K )\r
+ {\r
+ printf("%s\n"," Error: Unsupported block length ");\r
+ exit(0);\r
+ }\r
+\r
+ return (ind);\r
+}\r
diff --git a/example/src/tcp3d_main.h b/example/src/tcp3d_main.h
--- /dev/null
+++ b/example/src/tcp3d_main.h
@@ -0,0 +1,234 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#ifndef _TCP3D_MAIN_H_\r
+#define _TCP3D_MAIN_H_\r
+\r
+/* XDC includes */\r
+//#include <xdc/std.h>\r
+#include <xdc/cfg/global.h>\r
+#include <xdc/runtime/System.h>\r
+#include <xdc/runtime/Memory.h>\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+/* Driver includes */\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+#include <ti/drv/tcp3d/src/tcp3d_utils.h>\r
+\r
+/* Utility includes */\r
+#include "tcp3d_codeBlkSeg.h"\r
+\r
+/**********************************************************************\r
+ ************************** Test Macros *******************************\r
+ **********************************************************************/\r
+/**\r
+ * Address mapping is done based on the mapping shown below.\r
+ * Check on the address done to ensure it be in L2SRAM space.\r
+ * \r
+ * L2SRAM : org = 0x00800000, len = 0x100000 (local)\r
+ * GEM0_L2_MEM : org = 0x10800000, len = 0x100000 (global)\r
+ * GEM1_L2_MEM : org = 0x11800000, len = 0x100000 (global)\r
+ * GEM2_L2_MEM : org = 0x12800000, len = 0x100000 (global)\r
+ * GEM3_L2_MEM : org = 0x13800000, len = 0x100000 (global)\r
+ *\r
+ * MSMCSRAM : org = 0x0c000000, len = 0x200000 (global)\r
+ */\r
+#define L2GLBMAP(coreID, addr) \\r
+ ( ( ((UInt32)(addr) >= 0x00800000) && ((UInt32)(addr) < 0x00900000) ) ? \\r
+ ( (UInt32)(addr) | (UInt32)((0x10 | (coreID & 0x3)) << 24) ) : \\r
+ (UInt32)(addr) ) \r
+\r
+/**********************************************************************\r
+ ************************** Test Compile Flags ************************\r
+ **********************************************************************/\r
+/**\r
+ * Prepare all input config registers outside the Send loop (block size based, etc)\r
+ * except for beta states since they are data dependent.\r
+ */\r
+#define TEST_PREPARE_ONLY_BETASTATE 1\r
+\r
+/**\r
+ * Set this flag to use the fixed input configuration parameters preparation\r
+ * optimization. This flag is useful only if TEST_PREPARE_ONLY_BETASTATE is\r
+ * not used.\r
+ */\r
+#define TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT 0\r
+\r
+/**\r
+ * Check the beta state values with the reference from the file generated \r
+ * with the test vectors.\r
+ */\r
+#define TEST_BETA_VALUE_CHECK 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Definitions **************************\r
+ **********************************************************************/\r
+/* TCP3D modes */\r
+#define TEST_MODE_SINGLE CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_3GPP //0 (NOT SUPPORTED)\r
+#define TEST_MODE_LTE CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE //1\r
+#define TEST_MODE_WIMAX CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX //2\r
+#define TEST_MODE_SPLIT CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_HSUPA //3\r
+\r
+/* Test True/False flags */\r
+#define TEST_FALSE 0\r
+#define TEST_TRUE 1\r
+\r
+/* Test Interrupt flags */\r
+#define TEST_INTR_ENABLE 1\r
+#define TEST_INTR_DISABLE 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Structures ***************************\r
+ **********************************************************************/\r
+/*\r
+ * Structure that holds the configuration parameters. Used for storing the\r
+ * configuration values read from the file blockXX_cfgreg.dat for a given\r
+ * code block.\r
+ */\r
+typedef struct cbConfig\r
+{\r
+ /* Control */\r
+ Int32 mode_sel; //TCP3_MODE\r
+ Int32 lte_crc_init_sel;\r
+\r
+ /* Input */\r
+ Int32 NumInfoBits; //CFG0\r
+ Int32 SW0_length; //CFG1\r
+ Int32 maxst_en; //CFG2\r
+ Int32 out_flag_en;\r
+ Int32 out_order_sel;\r
+ Int32 ext_scale_en;\r
+ Int32 soft_out_flag_en;\r
+ Int32 soft_out_fmt;\r
+ Int32 min_itr;\r
+ Int32 max_itr;\r
+ Int32 snr_val;\r
+ Int32 snr_rep;\r
+ Int32 stop_sel;\r
+ Int32 crc_iter_pass;\r
+ Int32 crc_sel;\r
+ Int32 maxst_thold; //CFG3\r
+ Int32 maxst_value;\r
+ Int32 ext_scale_0; //CFG8\r
+ Int32 ext_scale_1;\r
+ Int32 ext_scale_2;\r
+ Int32 ext_scale_3;\r
+ Int32 ext_scale_4; //CFG9\r
+ Int32 ext_scale_5;\r
+ Int32 ext_scale_6;\r
+ Int32 ext_scale_7;\r
+ Int32 ext_scale_8; //CFG10\r
+ Int32 ext_scale_9;\r
+ Int32 ext_scale_10;\r
+ Int32 ext_scale_11;\r
+ Int32 ext_scale_12; //CFG11\r
+ Int32 ext_scale_13;\r
+ Int32 ext_scale_14;\r
+ Int32 ext_scale_15;\r
+} cbConfig;\r
+\r
+/*\r
+ * Structure for one code block description.\r
+ */\r
+typedef struct cbDataDesc\r
+{\r
+ UInt32 mode;\r
+ UInt32 crcInitVal;\r
+ Int8 tailBits[12];\r
+ Tcp3d_InCfgParams *inCfgParams;\r
+ UInt8 sw0LengthUsed;\r
+\r
+ UInt32 blockSize;\r
+ UInt32 interFlag;\r
+ UInt32 sdFlag;\r
+ UInt32 stsFlag;\r
+ UInt32 llrOffset;\r
+ UInt32 sdOffset;\r
+\r
+ UInt32 sizeCFG;\r
+ UInt32 sizeINTER;\r
+ UInt32 sizeLLR;\r
+ UInt32 sizeHD;\r
+ UInt32 sizeSD;\r
+ UInt32 sizeSTS;\r
+\r
+ UInt32 *inCfg;\r
+ UInt16 *inInter;\r
+ Int8 *inLLR; /* three arrays with offset in llrOffset */\r
+ UInt32 *outHD;\r
+ UInt32 *refHD;\r
+ Int8 *outSD; /* three arrays with offset in sdOffset */\r
+ Int8 *refSD; /* three arrays with offset in sdOffset */\r
+ UInt32 *outSts;\r
+ UInt32 *refSts;\r
+} cbDataDesc;\r
+\r
+/*\r
+ * Structure for one test description. \r
+ */\r
+typedef struct cbTestDesc\r
+{\r
+ cbDataDesc **cbData;\r
+ Int32 maxNumCB;\r
+ Int32 mode;\r
+ Int32 doubleBuffer;\r
+ Int32 lteCrcSel;\r
+} cbTestDesc;\r
+\r
+/**********************************************************************\r
+ ************************** Test Global Tables ************************\r
+ **********************************************************************/\r
+/* interleaver tables (used in tcp3d_inputCongigPrep.c file) */\r
+extern Int16 TCP3_LteInterleaverTable[220][7];\r
+extern Int16 TCP3_WimaxInterleaverTable[17][4];\r
+\r
+/**********************************************************************\r
+ *********************** Test Global Functions ************************\r
+ **********************************************************************/\r
+/* interleaver table index calculation function */\r
+Int32 LTE_interleaver_index(Int32 K);\r
+Int32 WIMAX_interleaver_index(Int32 K);\r
+\r
+/* input config prepare function definitions (see tcp3d_inputCongigPrep.c) */\r
+Void prepareBlockSizeDepICParams(cbDataDesc *cbPtr);\r
+Void prepareBetaStateICParams(cbDataDesc *cbPtr, UInt8 mode);\r
+Void prepareIC(cbDataDesc *cbPtr, UInt32 *tempIC, UInt8 copyFlag);\r
+Void fillICParams(Tcp3d_InCfgParams *inCfgParams, cbConfig *cbCfg);\r
+Void checkBetaValues (UInt32 inCfg[]);\r
+\r
+/* Test vector functions (see tcp3d_testvector.c) */\r
+Int getTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet, Char *testFolder);\r
+Void freeTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet);\r
+\r
+#endif /* _TCP3D_MAIN_H_ */\r
diff --git a/example/src/tcp3d_multi_inst.h b/example/src/tcp3d_multi_inst.h
--- /dev/null
@@ -0,0 +1,135 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _TCP3D_MULTI_INST_H_\r
+#define _TCP3D_MULTI_INST_H_\r
+\r
+/**\r
+ * Test TCP3D Notification Events\r
+ */\r
+#define TCP3D_A_TEST_EVENT 7\r
+#define TCP3D_B_TEST_EVENT 23\r
+\r
+/**\r
+ * This gives the channel numbers to which the TCP3 decoder REVTs are mapped.\r
+ * ((per spec intc_1.3.4.12.xlsx, TPCC2)\r
+ */\r
+#define TCP3D_A_REVT0_CH_NUMBER 34\r
+#define TCP3D_A_REVT1_CH_NUMBER 35\r
+#define TCP3D_B_REVT0_CH_NUMBER 36\r
+#define TCP3D_B_REVT1_CH_NUMBER 37\r
+\r
+INLINE UInt32 getHostIntrNum(UInt32 dspCoreID)\r
+{\r
+ /* Host Interrupts for CPINTC0 (per spec intc_1.3.4.12.xls) */\r
+ UInt32 hostIntr[] = {13u, 29u, 45u, 61u};\r
+\r
+ return hostIntr[dspCoreID];\r
+}\r
+\r
+INLINE UInt32 getNotifyEventNum(UInt8 instNum)\r
+{\r
+ UInt32 testEvt;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ testEvt = TCP3D_A_TEST_EVENT; // First instance\r
+ else\r
+ testEvt = TCP3D_B_TEST_EVENT; // Second instance\r
+\r
+ return testEvt;\r
+}\r
+\r
+INLINE UInt32 getRevt0ChannelNum(UInt8 instNum)\r
+{\r
+ UInt32 chNum;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ chNum = TCP3D_A_REVT0_CH_NUMBER; // First instance\r
+ else\r
+ chNum = TCP3D_B_REVT0_CH_NUMBER; // Second instance\r
+\r
+ return chNum;\r
+}\r
+\r
+INLINE UInt32 getRevt1ChannelNum(UInt8 instNum)\r
+{\r
+ UInt32 chNum;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ chNum = TCP3D_A_REVT1_CH_NUMBER; // First instance\r
+ else\r
+ chNum = TCP3D_B_REVT1_CH_NUMBER; // Second instance\r
+\r
+ return chNum;\r
+}\r
+\r
+INLINE UInt8 getTcp3dInstNum(UInt32 dspCoreID)\r
+{\r
+ UInt8 instNum;\r
+\r
+ if ( dspCoreID == 0 )\r
+ instNum = CSL_TCP3D_0; // First instance\r
+ else\r
+ instNum = CSL_TCP3D_1; // Second instance\r
+\r
+ return instNum;\r
+}\r
+\r
+INLINE UInt32 getTcp3dCfgRegsBase(UInt8 instNum)\r
+{\r
+ UInt32 regBase;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ regBase = CSL_TCP3D_0_CFG_REGS; // First instance\r
+ else\r
+ regBase = CSL_TCP3D_1_CFG_REGS; // Second instance\r
+\r
+ return regBase;\r
+}\r
+\r
+INLINE UInt32 getTcp3dDataRegsBase(UInt8 instNum)\r
+{\r
+ UInt32 regBase;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ regBase = CSL_TCP3D_0_DATA_REGS; // First instance\r
+ else\r
+ regBase = CSL_TCP3D_1_DATA_REGS; // Second instance\r
+\r
+ return regBase;\r
+}\r
+\r
+#endif /* _TCP3D_MULTI_INST_H_ */\r
+\r
diff --git a/example/src/tcp3d_single_inst.h b/example/src/tcp3d_single_inst.h
--- /dev/null
@@ -0,0 +1,90 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _TCP3D_SINGLE_INST_H_\r
+#define _TCP3D_SINGLE_INST_H_\r
+\r
+/**\r
+ * Test TCP3D Notification Events\r
+ */\r
+#define TCP3D_A_TEST_EVENT 23\r
+\r
+/**\r
+ * This gives the channel numbers to which the TCP3 decoder REVTs are mapped.\r
+ * (as per spec nysh_INTERNAL_1_0_7.pdf)\r
+ */\r
+#define TCP3D_A_REVT0_CH_NUMBER 0\r
+#define TCP3D_A_REVT1_CH_NUMBER 1\r
+\r
+INLINE UInt32 getHostIntrNum(UInt32 dspCoreID)\r
+{\r
+ /* Host Interrupts for CPINTC0 (per spec - 0.0.1) */\r
+ UInt32 hostIntr[] = {6u, 26u, 46u, 66u};\r
+\r
+ return hostIntr[dspCoreID];\r
+}\r
+\r
+INLINE UInt32 getNotifyEventNum(UInt8 instNum)\r
+{\r
+ return TCP3D_A_TEST_EVENT;\r
+}\r
+\r
+INLINE UInt32 getRevt0ChannelNum(UInt8 instNum)\r
+{\r
+ return TCP3D_A_REVT0_CH_NUMBER;\r
+}\r
+\r
+INLINE UInt32 getRevt1ChannelNum(UInt8 instNum)\r
+{\r
+ return TCP3D_A_REVT1_CH_NUMBER;\r
+}\r
+\r
+INLINE UInt8 getTcp3dInstNum(UInt32 dspCoreID)\r
+{\r
+ return CSL_TCP3D_A;\r
+}\r
+\r
+INLINE UInt32 getTcp3dCfgRegsBase(UInt8 instNum)\r
+{\r
+ return CSL_TCP3D_A_CFG_REGS;\r
+}\r
+\r
+INLINE UInt32 getTcp3dDataRegsBase(UInt8 instNum)\r
+{\r
+ return CSL_TCP3D_A_DATA_REGS;\r
+}\r
+\r
+#endif /* _TCP3D_SINGLE_INST_H_ */\r
+\r
diff --git a/example/src/tcp3d_testset_functions.c b/example/src/tcp3d_testset_functions.c
--- /dev/null
@@ -0,0 +1,681 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+#include "tcp3d_main.h"\r
+\r
+#define READ_BINARY_TEST_VECTORS 1 /* Read .bin test vector files */\r
+\r
+UInt32 morePrints = 0;\r
+extern Char *strMode[4];\r
+extern Char testvectFolderBase[];\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * @brief Bit reverse in 32-bit word\r
+ */\r
+UInt32 bitr(UInt32 src)\r
+{\r
+ UInt32 a,c;\r
+ UInt32 i;\r
+ UInt32 sa;\r
+\r
+ a = src;\r
+ c = 0;\r
+ for (i = 0,sa=31; i < 16; i++,sa-=2) {\r
+ c |= (a & (0x1 << i)) << sa;\r
+ }\r
+ for (i = 16,sa=1; i < 32; i++,sa+=2) {\r
+ c |= (a & (0x1 << i)) >> (sa);\r
+ }\r
+ return c;\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * @brief Swap bytes in 32-bit word\r
+ */\r
+UInt32 swapBytes(UInt32 src)\r
+{\r
+ UInt32 a,c;\r
+\r
+ a = src;\r
+ c = (a & 0x000000ff) << 24;\r
+ c |= (a & 0x0000ff00) << 8;\r
+ c |= (a & 0x00ff0000) >> 8;\r
+ c |= (a & 0xff000000) >> 24;\r
+ return c;\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Int getTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet, Char *testFolder)\r
+{\r
+ cbDataDesc *cbPtr;\r
+ cbConfig tempCbConfig;\r
+ Int i, cbCnt;\r
+ Int32 numBytes;\r
+\r
+ Char fileName[300];\r
+ FILE *fid;\r
+ Int cbCfgStrSize=(sizeof(cbConfig)>>2);\r
+ Int32 *tmp32 = (Int32 *) &tempCbConfig;\r
+ /* Note: Temporary pointer used for writing\r
+ into the tempCbConfig Structure memory */\r
+ Int32 stmp[3];\r
+#if !READ_BINARY_TEST_VECTORS\r
+ Int8 *syspar;\r
+ UInt32 inSize;\r
+#endif\r
+ UInt32 tmp;\r
+\r
+ /* Get number of blocks */\r
+ strcpy(fileName, testFolder);\r
+ strcat(fileName, "\\number_of_blocks.dat");\r
+ if(!(fid = fopen(fileName,"r")))\r
+ {\r
+ System_printf("\t!!! Error in Number of blocks file : %s !!!\n", fileName);\r
+ System_printf("\n***********************************************************\n");\r
+ System_printf(" It means the test vectors are not available in the folder: \n\t %s \n\n", testFolder);\r
+ System_printf(" Do the following: \n");\r
+ System_printf(" 1) Check the variable named \"testvectFolderBase\" in the corresponding main.c file. \n");\r
+ System_printf(" a) It is set to \"%s\" \n", testvectFolderBase);\r
+ System_printf(" b) Make sure the \"testvectFolderBase\" variable is set to correct folder for testvectors. \n");\r
+ System_printf(" 2) For test project, make sure to run the batch file before running tests: \n");\r
+ System_printf(" %s \n", "\\tcp3d\\test\\gen_test_vectors\\genTestVect.bat");\r
+ System_printf("***********************************************************\n");\r
+ System_exit(0);\r
+ }\r
+ cbCnt = 0;\r
+ fscanf(fid, "%d", &cbTestSet->maxNumCB);\r
+ fclose(fid);\r
+\r
+ /* Allocate memory for code blocks */\r
+ numBytes = cbTestSet->maxNumCB * sizeof(cbDataDesc *);\r
+ cbTestSet->cbData = (cbDataDesc **) Memory_alloc(dataHeap, numBytes, 64, NULL); \r
+\r
+ /* Load code blocks */\r
+ for(cbCnt=0; cbCnt < cbTestSet->maxNumCB; cbCnt++)\r
+ {\r
+ /* Allocate memory for code block set and update the local pointer */\r
+ cbTestSet->cbData[cbCnt] = (cbDataDesc *) Memory_alloc ( dataHeap,\r
+ sizeof(cbDataDesc),\r
+ 64,\r
+ NULL);\r
+ cbPtr = cbTestSet->cbData[cbCnt];\r
+ if ( cbPtr == NULL )\r
+ {\r
+ System_printf("\tMemory allocation failed for Code Block Set %d!\n", cbCnt);\r
+ }\r
+\r
+ /* Open the block parameters file */\r
+ sprintf(fileName, "%s\\block%d_cfgreg.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tConfig file open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ /* Load block parameters */\r
+ for(i=0;i<cbCfgStrSize;i++)\r
+ {\r
+ fscanf(fid, "%d", &stmp[0]);\r
+ tmp32[i] = stmp[0]; /* tmp32 points to tempCbConfig address */ \r
+ }\r
+ fclose(fid);\r
+\r
+ /* Set the Code Block specific values from Config Read */\r
+ cbPtr->blockSize = tempCbConfig.NumInfoBits;\r
+ cbPtr->mode = tempCbConfig.mode_sel;\r
+ cbPtr->crcInitVal = tempCbConfig.lte_crc_init_sel;\r
+ cbPtr->sw0LengthUsed = tempCbConfig.SW0_length;\r
+\r
+ /* Set the code block set value with the first one block config */\r
+ if (cbCnt == 0)\r
+ {\r
+ cbTestSet->mode = cbPtr->mode;\r
+ cbTestSet->lteCrcSel = cbPtr->crcInitVal;\r
+ }\r
+\r
+ /* Check if the mode is different from the first one in the group */\r
+ /* Force the mode value to be same as first one */\r
+ if ( cbPtr->mode != cbTestSet->mode )\r
+ {\r
+ if ( !((cbPtr->mode+cbTestSet->mode) % 3) )\r
+ {\r
+ System_printf("\tBlock = %d, Mode changed from %s to %s\n", cbCnt,\r
+ strMode[cbPtr->mode],\r
+ strMode[cbTestSet->mode]);\r
+ cbPtr->mode = cbTestSet->mode;\r
+ }\r
+ else\r
+ {\r
+ System_exit(0);\r
+ }\r
+ }\r
+\r
+ /* Check for LTE CRC Init Value Change */\r
+ if ( ( cbPtr->mode == TEST_MODE_LTE ) &&\r
+ ( cbPtr->crcInitVal != cbTestSet->lteCrcSel ) )\r
+ {\r
+ System_printf("\tLTE CRC Initial Value is different\n");\r
+ System_printf("\tSet Value is %d\n", cbTestSet->lteCrcSel);\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Allocate Memory for Input LLR data */\r
+ if ( cbPtr->mode == TEST_MODE_SPLIT )\r
+ { /* 3GPP - Split Mode */\r
+ cbPtr->llrOffset = COMPUTE_KOUT(cbPtr->blockSize);\r
+ }\r
+ else\r
+ {\r
+ cbPtr->llrOffset = cbPtr->blockSize;\r
+ }\r
+ cbPtr->sizeLLR = 3 * cbPtr->llrOffset; /* three streams (sys, par0, par1) */\r
+ cbPtr->inLLR = (Int8 *) Memory_alloc(dataHeap, cbPtr->sizeLLR, 64, NULL);\r
+ if(cbPtr->inLLR == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (LLR)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Input LLR streams */\r
+ /* This mode value is set with the value read from cfgreg file */\r
+ if ( cbPtr->mode == TEST_MODE_SPLIT ) /* 3GPP - split mode */\r
+ {\r
+#if READ_BINARY_TEST_VECTORS\r
+ /* Fill syspar with data bits */\r
+ sprintf(fileName, "%s\\block%d_llrs.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->inLLR, 1, cbPtr->llrOffset, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset], 1, cbPtr->llrOffset, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset<<1], 1, cbPtr->llrOffset, fid);\r
+ fclose(fid);\r
+\r
+ /* Fill syspar with tail bits */\r
+ sprintf(fileName, "%s\\block%d_tail_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tTail Bits file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < 6; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d", &stmp[0], &stmp[1]);\r
+ cbPtr->tailBits[i] = (Int8) stmp[0];\r
+ cbPtr->tailBits[6+i] = (Int8) stmp[1];\r
+ }\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ /* set loop count for LLR file read */\r
+ inSize = cbPtr->blockSize*3;\r
+\r
+ /* Allocate memory for syspar temp Buffer for WCDMA case \r
+ syspar = (Int8 *) Memory_alloc(dataHeap, inSize+12, 0, NULL); \r
+ if(syspar == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (SysPar)\n");\r
+ System_exit(0);\r
+ }*/\r
+\r
+ /* Fill syspar with data bits */\r
+ sprintf(fileName, "%s\\block%d_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<inSize;i+=3)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1],&stmp[2]);\r
+ //syspar[i] = (Int8) stmp[0];\r
+ //syspar[i+1] = (Int8) stmp[1];\r
+ //syspar[i+2] = (Int8) stmp[2];\r
+ cbPtr->inLLR[i] = (Int8) stmp[0];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset] = (Int8) stmp[1];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset<<1] = (Int8) stmp[2];\r
+ }\r
+ fclose(fid);\r
+ \r
+ /* Fill syspar with tail bits */\r
+ sprintf(fileName, "%s\\block%d_tail_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tTail Bits file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < 6; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d", &stmp[0], &stmp[1]);\r
+ //syspar[inSize+i] = (Int8) stmp[0];\r
+ //syspar[inSize+6+i] = (Int8) stmp[1];\r
+ cbPtr->tailBits[i] = (Int8) stmp[0];\r
+ cbPtr->tailBits[6+i] = (Int8) stmp[1];\r
+ }\r
+ fclose(fid);\r
+ \r
+ /* Prepare the sys, par1, par2 streams \r
+ TCP3D_WCDMA_dataPrep ( syspar,\r
+ cbPtr->blockSize,\r
+ NULL, // No sign change\r
+ cbPtr->inLLR,\r
+ cbPtr->inLLR+cbPtr->llrOffset,\r
+ cbPtr->inLLR+2*cbPtr->llrOffset,\r
+ betaMap0,\r
+ betaMap1);*/\r
+ \r
+ /* Free syspar Memory \r
+ Memory_free(dataHeap, syspar, inSize+12);*/ \r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_LTE ) /* LTE mode */\r
+ {\r
+ /* Fill syspar with data bits */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->inLLR, 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset], 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset<<1], 1, cbPtr->blockSize, fid);\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<cbPtr->blockSize;i++)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1],&stmp[2]);\r
+ cbPtr->inLLR[i] = (Int8) stmp[0];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset] = (Int8) stmp[1];\r
+ cbPtr->inLLR[i+2*cbPtr->llrOffset]= (Int8) stmp[2];\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ \r
+ /* Fill syspar with tail bits */\r
+ sprintf(fileName, "%s\\block%d_tail_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tTail Bits file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < 6; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d", &stmp[0], &stmp[1]);\r
+ cbPtr->tailBits[i] = (Int8) stmp[0];\r
+ cbPtr->tailBits[6+i] = (Int8) stmp[1];\r
+ }\r
+ fclose(fid);\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_WIMAX ) /* WIMAX mode */\r
+ {\r
+ /* Fill syspar with data bits */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->inLLR, 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset], 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset<<1], 1, cbPtr->blockSize, fid);\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<cbPtr->blockSize;i++)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1],&stmp[2]);\r
+ cbPtr->inLLR[i] = (Int8) stmp[0];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset] = (Int8) stmp[1];\r
+ cbPtr->inLLR[i+2*cbPtr->llrOffset]= (Int8) stmp[2];\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+\r
+ /* Allocate Memory for Ouput & Reference Hard Decisions */\r
+ cbPtr->sizeHD = COMPUTE_HD_BYTE_SIZE(cbPtr->blockSize);\r
+ cbPtr->outHD = (UInt32 *) Memory_calloc(dataHeap,\r
+ cbPtr->sizeHD,\r
+ 64,\r
+ NULL);\r
+ if(cbPtr->outHD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Out HD)\n");\r
+ System_exit(0);\r
+ }\r
+ cbPtr->refHD = (UInt32 *) Memory_calloc(dataHeap,\r
+ cbPtr->sizeHD,\r
+ 64,\r
+ NULL);\r
+ if(cbPtr->refHD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Ref HD)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Reference Hard Decisions */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_hard_dec.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tHard Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->refHD, 4, (cbPtr->sizeHD>>2), fid);\r
+ \r
+ for(i=0;i<(cbPtr->sizeHD>>2);i++)\r
+ {\r
+#ifdef _BIG_ENDIAN\r
+ tmp = swapBytes(cbPtr->refHD[i]);\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+#else\r
+ tmp = cbPtr->refHD[i];\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+#endif\r
+ }\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_hard_dec.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tHard Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<(cbPtr->sizeHD>>2);i++)\r
+ {\r
+ fscanf(fid, "%x", &tmp);\r
+#ifdef _BIG_ENDIAN\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+#else\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+#endif\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+\r
+ /* Allocate Memory for Interleaver Table */\r
+ /* Interleaver flag is cleared - no external interleaver table */\r
+ cbPtr->interFlag = 0;\r
+ cbPtr->sizeINTER = 0;\r
+ cbPtr->inInter = NULL;\r
+\r
+ /* Allocate Memory for Ouput & Reference Soft Decisions */\r
+ cbPtr->sdFlag = 0;\r
+ cbPtr->sizeSD = 0;\r
+ cbPtr->sdOffset = 0;\r
+ cbPtr->outSD = NULL;\r
+ cbPtr->refSD = NULL;\r
+// tempCbConfig.soft_out_flag_en = 0;\r
+ if ( tempCbConfig.soft_out_flag_en )\r
+ {\r
+ cbPtr->sdFlag = 1;\r
+\r
+ if ( cbPtr->mode == TEST_MODE_SPLIT ) /* SPLIT MODE */\r
+ {\r
+ cbPtr->sizeSD = cbPtr->blockSize;\r
+ cbPtr->sdOffset = NULL;\r
+ }\r
+ else\r
+ {\r
+ cbPtr->sizeSD = 3 * cbPtr->blockSize;\r
+ cbPtr->sdOffset = cbPtr->blockSize;\r
+ }\r
+ cbPtr->outSD = (Int8 *) Memory_calloc(dataHeap, cbPtr->sizeSD, 64, NULL);\r
+ if(cbPtr->outSD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Out SD)\n");\r
+ System_exit(0);\r
+ }\r
+ cbPtr->refSD = (Int8 *) Memory_calloc(dataHeap, cbPtr->sizeSD, 64, NULL);\r
+ if(cbPtr->refSD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Ref SD)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Reference Soft Decisions */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_soft_dec.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tSoft Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->refSD, 1, cbPtr->blockSize, fid);\r
+ if ( cbPtr->sdOffset )\r
+ {\r
+ fread(&cbPtr->refSD[cbPtr->sdOffset], 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->refSD[cbPtr->sdOffset<<1], 1, cbPtr->blockSize, fid);\r
+ }\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_soft_dec.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tSoft Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < cbPtr->blockSize; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1], &stmp[2]);\r
+ cbPtr->refSD[i] = (Int8) stmp[0];\r
+ if (cbPtr->sdOffset)\r
+ {\r
+ cbPtr->refSD[i+cbPtr->sdOffset] = (Int8) stmp[1];\r
+ cbPtr->refSD[i+2*cbPtr->sdOffset] = (Int8) stmp[2];\r
+ }\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+\r
+ /* Allocate Memory for Ouput & Reference Status Registers */\r
+ cbPtr->stsFlag = 0;\r
+ cbPtr->sizeSTS = 0;\r
+ cbPtr->outSts = NULL;\r
+ cbPtr->refSts = NULL;\r
+ if ( tempCbConfig.out_flag_en )\r
+ {\r
+ cbPtr->stsFlag = 1;\r
+ /* allocate outSts memory */\r
+ cbPtr->sizeSTS = 3 * sizeof(UInt32);\r
+ cbPtr->outSts = (UInt32 *) Memory_calloc(dataHeap, cbPtr->sizeSTS, 64, NULL);\r
+ if(cbPtr->outSts == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Out STS)\n");\r
+ System_exit(0);\r
+ }\r
+ cbPtr->refSts = (UInt32 *) Memory_calloc(dataHeap, cbPtr->sizeSTS, 64, NULL);\r
+ if(cbPtr->refSts == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Ref STS)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Reference Status Registers */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_status.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tStatus File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->refSts, sizeof(UInt32), 3, fid);\r
+#ifdef _BIG_ENDIAN\r
+ cbPtr->refSts[0] = swapBytes(cbPtr->refSts[0]);\r
+ cbPtr->refSts[1] = swapBytes(cbPtr->refSts[1]);\r
+ cbPtr->refSts[2] = swapBytes(cbPtr->refSts[2]);\r
+#endif\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_status.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tStatus File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<3;i++)\r
+ {\r
+ fscanf(fid, "%x", &tmp);\r
+ cbPtr->refSts[i] = (UInt32) tmp;\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+// else\r
+// tempCbConfig.out_flag_en = 1;\r
+\r
+ /* Allocate Memory for Input Config Registers */\r
+ cbPtr->sizeCFG = 15 * sizeof(UInt32);\r
+ cbPtr->inCfg = (UInt32 *) Memory_calloc(dataHeap, cbPtr->sizeCFG, 64, NULL);\r
+ if(cbPtr->inCfg == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (CFG)\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Allocate Memory for Tcp3d_InCfgParams structure */\r
+ cbPtr->inCfgParams = (Tcp3d_InCfgParams *) Memory_alloc(dataHeap,\r
+ sizeof(Tcp3d_InCfgParams),\r
+ 64,\r
+ NULL);\r
+ if (cbPtr->inCfgParams == NULL)\r
+ {\r
+ System_printf("Memory allocation failed !!! (inCfgParams)\n");\r
+ System_exit(0);\r
+ }\r
+ /* Update the input config params structure */\r
+ fillICParams(cbPtr->inCfgParams, &tempCbConfig);\r
+\r
+ if ( (morePrints) && ((cbCnt+1) % 5) == 0 )\r
+ System_printf("\tCode block prepared : %d \n", cbCnt+1);\r
+\r
+ } /* for(cbCnt=0; cbCnt < cbTestSet->maxNumCB; cbCnt++) */\r
+\r
+ /* Set the double buffer value based on mode value */\r
+ if ( ( cbTestSet->mode == TEST_MODE_SINGLE ) || ( cbTestSet->mode == TEST_MODE_SPLIT ) ) \r
+ cbTestSet->doubleBuffer = 0; //CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_DISABLE\r
+ else\r
+ cbTestSet->doubleBuffer = 1; //CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE\r
+\r
+ return (cbCnt);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void freeTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet)\r
+{\r
+ Int32 i;\r
+ \r
+ /* Free memory allocated for Code Block sets */\r
+ for(i=0; i< cbTestSet->maxNumCB; i++)\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inCfg, cbTestSet->cbData[i]->sizeCFG); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inLLR, cbTestSet->cbData[i]->sizeLLR); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->outHD, cbTestSet->cbData[i]->sizeHD); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->refHD, cbTestSet->cbData[i]->sizeHD); \r
+ if ( cbTestSet->cbData[i]->sdFlag )\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->outSD, cbTestSet->cbData[i]->sizeSD); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->refSD, cbTestSet->cbData[i]->sizeSD);\r
+ }\r
+ if ( cbTestSet->cbData[i]->stsFlag )\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->outSts, cbTestSet->cbData[i]->sizeSTS); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->refSts, cbTestSet->cbData[i]->sizeSTS);\r
+ }\r
+ if ( cbTestSet->cbData[i]->interFlag )\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inInter, cbTestSet->cbData[i]->sizeINTER);\r
+ }\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inCfgParams, sizeof(Tcp3d_InCfgParams)); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i], sizeof(cbDataDesc)); \r
+ }\r
+ Memory_free(dataHeap, cbTestSet->cbData, cbTestSet->maxNumCB * sizeof(cbDataDesc *));\r
+}\r
+\r
+/* end of file */\r
diff --git a/example/testvectors/lte/block0_cfgreg.dat b/example/testvectors/lte/block0_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+1024\r
+64\r
+0\r
+1\r
+0\r
+1\r
+1\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/example/testvectors/lte/block0_hard_dec.bin b/example/testvectors/lte/block0_hard_dec.bin
--- /dev/null
@@ -0,0 +1,2 @@
+tT¹\17Ç|\8d|Ú\rLµ\182æµK\13|\18ù?7\v?íÏ÷ȱ\94Û|ºýV-\ 2D7ÐÝ\f5м{O\1d°¿C\85~4PòÔÿÜU<ªï\84ða@wñ4\88è÷o/\8ab\8fÆUÖU»IK\e<\12-t\ e¯\11Ñ2È0B\vm'7¢\98ÁU
+¢\eØÛ\95¨Ì÷Qmµ\84nCXÛËu\1e
\ No newline at end of file
diff --git a/example/testvectors/lte/block0_hard_dec.dat b/example/testvectors/lte/block0_hard_dec.dat
--- /dev/null
@@ -0,0 +1,32 @@
+17b95474\r
+7c8d7cc7\r
+b54c0dda\r
+b5e63218\r
+187c134b\r
+0b373ff9\r
+f7cfed3f\r
+db94b1c8\r
+56fdba7c\r
+3744022d\r
+350cddd0\r
+4f7bbcd0\r
+43bfb01d\r
+50347e85\r
+dcffd4f2\r
+efaa3c55\r
+4061f084\r
+8834f177\r
+2f6ff7e8\r
+c68f628a\r
+bb55d655\r
+3c1b4b49\r
+0e742d12\r
+32d111af\r
+0b4230c8\r
+a237276d\r
+0a55c198\r
+dbd81ba2\r
+f7cca895\r
+84b56d51\r
+58436ead\r
+1e75cbdb\r
diff --git a/example/testvectors/lte/block0_llrs.bin b/example/testvectors/lte/block0_llrs.bin
new file mode 100644 (file)
index 0000000..084bedd
Binary files /dev/null and b/example/testvectors/lte/block0_llrs.bin differ
index 0000000..084bedd
Binary files /dev/null and b/example/testvectors/lte/block0_llrs.bin differ
diff --git a/example/testvectors/lte/block0_llrs.dat b/example/testvectors/lte/block0_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block0_soft_dec.bin b/example/testvectors/lte/block0_soft_dec.bin
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index 0000000..fe73f67
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diff --git a/example/testvectors/lte/block0_soft_dec.dat b/example/testvectors/lte/block0_soft_dec.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block0_status.bin b/example/testvectors/lte/block0_status.bin
new file mode 100644 (file)
index 0000000..2fe1627
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index 0000000..2fe1627
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diff --git a/example/testvectors/lte/block0_status.dat b/example/testvectors/lte/block0_status.dat
--- /dev/null
@@ -0,0 +1,3 @@
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diff --git a/example/testvectors/lte/block0_tail_llrs.dat b/example/testvectors/lte/block0_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/lte/block1_cfgreg.dat b/example/testvectors/lte/block1_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
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diff --git a/example/testvectors/lte/block1_hard_dec.bin b/example/testvectors/lte/block1_hard_dec.bin
--- /dev/null
@@ -0,0 +1 @@
+nÄø\9dǼÚì\12{O#yÞ®ÿÓ°H9¹H\93xþ-\7fÇ\81\87±ëí',\98\89óÞ\97|\15\84\16\84Yß\e-ÏþA\e\12î\91·T°m»r®\17ë¹ðiö\7fØ#l\ 1g\9e¢ÊÏ>µ\ 6ý\ ehl½rbÌ\7f_º-\b:\ 3@Ü´í ·ê¾ÔQÿÖ)Ö\9f¼\18\8e\8c\88i¿9\97.jû\8b®|îJ¿m\97
\ No newline at end of file
diff --git a/example/testvectors/lte/block1_hard_dec.dat b/example/testvectors/lte/block1_hard_dec.dat
--- /dev/null
@@ -0,0 +1,33 @@
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diff --git a/example/testvectors/lte/block1_llrs.bin b/example/testvectors/lte/block1_llrs.bin
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index 0000000..7caa00e
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diff --git a/example/testvectors/lte/block1_llrs.dat b/example/testvectors/lte/block1_llrs.dat
--- /dev/null
@@ -0,0 +1,1056 @@
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diff --git a/example/testvectors/lte/block1_soft_dec.bin b/example/testvectors/lte/block1_soft_dec.bin
new file mode 100644 (file)
index 0000000..b14c353
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index 0000000..b14c353
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diff --git a/example/testvectors/lte/block1_soft_dec.dat b/example/testvectors/lte/block1_soft_dec.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block1_status.bin b/example/testvectors/lte/block1_status.bin
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index 0000000..b9a34f6
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diff --git a/example/testvectors/lte/block1_status.dat b/example/testvectors/lte/block1_status.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block1_tail_llrs.dat b/example/testvectors/lte/block1_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block2_cfgreg.dat b/example/testvectors/lte/block2_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block2_hard_dec.bin b/example/testvectors/lte/block2_hard_dec.bin
--- /dev/null
@@ -0,0 +1 @@
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diff --git a/example/testvectors/lte/block2_hard_dec.dat b/example/testvectors/lte/block2_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block2_llrs.bin b/example/testvectors/lte/block2_llrs.bin
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index 0000000..5b8c741
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diff --git a/example/testvectors/lte/block2_llrs.dat b/example/testvectors/lte/block2_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block2_tail_llrs.dat b/example/testvectors/lte/block2_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/lte/block3_cfgreg.dat b/example/testvectors/lte/block3_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block3_hard_dec.bin b/example/testvectors/lte/block3_hard_dec.bin
--- /dev/null
@@ -0,0 +1 @@
+N\ e\19\1eãt\ 3¢·\89\ fýús\952ì\80©uf\ 2£:\r»©j{þXÄ\1c=\11zÚàTî#\93xÝ«ÉAóãmvFï"\1eüiÿYI\98\89EêÒ\8b>Æ¿\a\1cÁs\8a/\10{Wdຳ\9b\13·\83UÕ\97ÿµ5(\fº$îϪÈÌwW9æN\84H6`ý\9bE\91Ûç¦rè\99\98\93.\82ó\1f\ f\86³\1f\r§»\1a=7yÅ»\9e
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diff --git a/example/testvectors/lte/block3_hard_dec.dat b/example/testvectors/lte/block3_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block3_llrs.bin b/example/testvectors/lte/block3_llrs.bin
new file mode 100644 (file)
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index 0000000..d7ca62d
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diff --git a/example/testvectors/lte/block3_llrs.dat b/example/testvectors/lte/block3_llrs.dat
--- /dev/null
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\ No newline at end of file
diff --git a/example/testvectors/lte/block3_soft_dec.dat b/example/testvectors/lte/block3_soft_dec.dat
--- /dev/null
@@ -0,0 +1,1120 @@
+ -127 -127 -127\r
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diff --git a/example/testvectors/lte/block3_status.bin b/example/testvectors/lte/block3_status.bin
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diff --git a/example/testvectors/lte/block3_status.dat b/example/testvectors/lte/block3_status.dat
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diff --git a/example/testvectors/lte/block3_tail_llrs.dat b/example/testvectors/lte/block3_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/lte/block4_cfgreg.dat b/example/testvectors/lte/block4_cfgreg.dat
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diff --git a/example/testvectors/lte/block4_llrs.bin b/example/testvectors/lte/block4_llrs.bin
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diff --git a/example/testvectors/lte/block5_tail_llrs.dat b/example/testvectors/lte/block5_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/lte/number_of_blocks.dat b/example/testvectors/lte/number_of_blocks.dat
--- /dev/null
@@ -0,0 +1 @@
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diff --git a/example/testvectors/lte/reference/block0_coded_bits.dat b/example/testvectors/lte/reference/block0_coded_bits.dat
--- /dev/null
@@ -0,0 +1,99 @@
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diff --git a/example/testvectors/lte/reference/block0_info_bits.dat b/example/testvectors/lte/reference/block0_info_bits.dat
--- /dev/null
@@ -0,0 +1,32 @@
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diff --git a/example/testvectors/lte/reference/block5_info_bits.dat b/example/testvectors/lte/reference/block5_info_bits.dat
--- /dev/null
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diff --git a/example/testvectors/lte/reference/block5_inp_cfg.dat b/example/testvectors/lte/reference/block5_inp_cfg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block0_cfgreg.dat b/example/testvectors/wcdma/block0_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block0_hard_dec.bin b/example/testvectors/wcdma/block0_hard_dec.bin
new file mode 100644 (file)
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index 0000000..1c0428a
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diff --git a/example/testvectors/wcdma/block0_hard_dec.dat b/example/testvectors/wcdma/block0_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block0_llrs.bin b/example/testvectors/wcdma/block0_llrs.bin
--- /dev/null
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/example/testvectors/wcdma/block0_llrs.dat b/example/testvectors/wcdma/block0_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block0_soft_dec.bin b/example/testvectors/wcdma/block0_soft_dec.bin
new file mode 100644 (file)
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index 0000000..8c662ea
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diff --git a/example/testvectors/wcdma/block0_soft_dec.dat b/example/testvectors/wcdma/block0_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block0_status.bin b/example/testvectors/wcdma/block0_status.bin
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diff --git a/example/testvectors/wcdma/block0_status.dat b/example/testvectors/wcdma/block0_status.dat
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diff --git a/example/testvectors/wcdma/block0_tail_llrs.dat b/example/testvectors/wcdma/block0_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block10_cfgreg.dat b/example/testvectors/wcdma/block10_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block10_hard_dec.dat b/example/testvectors/wcdma/block10_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block10_llrs.dat b/example/testvectors/wcdma/block10_llrs.dat
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diff --git a/example/testvectors/wcdma/block10_soft_dec.bin b/example/testvectors/wcdma/block10_soft_dec.bin
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index 0000000..6ac118f
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diff --git a/example/testvectors/wcdma/block10_soft_dec.dat b/example/testvectors/wcdma/block10_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block10_status.bin b/example/testvectors/wcdma/block10_status.bin
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diff --git a/example/testvectors/wcdma/block10_status.dat b/example/testvectors/wcdma/block10_status.dat
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diff --git a/example/testvectors/wcdma/block10_tail_llrs.dat b/example/testvectors/wcdma/block10_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block11_cfgreg.dat b/example/testvectors/wcdma/block11_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block11_hard_dec.dat b/example/testvectors/wcdma/block11_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block11_soft_dec.bin b/example/testvectors/wcdma/block11_soft_dec.bin
new file mode 100644 (file)
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index 0000000..9761053
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diff --git a/example/testvectors/wcdma/block11_soft_dec.dat b/example/testvectors/wcdma/block11_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block11_status.bin b/example/testvectors/wcdma/block11_status.bin
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diff --git a/example/testvectors/wcdma/block11_status.dat b/example/testvectors/wcdma/block11_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block11_tail_llrs.dat b/example/testvectors/wcdma/block11_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block12_cfgreg.dat b/example/testvectors/wcdma/block12_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block12_hard_dec.dat b/example/testvectors/wcdma/block12_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block12_status.dat b/example/testvectors/wcdma/block12_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block12_tail_llrs.dat b/example/testvectors/wcdma/block12_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block13_cfgreg.dat b/example/testvectors/wcdma/block13_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block13_hard_dec.dat b/example/testvectors/wcdma/block13_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block13_llrs.bin b/example/testvectors/wcdma/block13_llrs.bin
--- /dev/null
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\ No newline at end of file
diff --git a/example/testvectors/wcdma/block13_llrs.dat b/example/testvectors/wcdma/block13_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block13_soft_dec.dat b/example/testvectors/wcdma/block13_soft_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block13_status.dat b/example/testvectors/wcdma/block13_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block13_tail_llrs.dat b/example/testvectors/wcdma/block13_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block14_cfgreg.dat b/example/testvectors/wcdma/block14_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block14_hard_dec.dat b/example/testvectors/wcdma/block14_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block14_llrs.dat b/example/testvectors/wcdma/block14_llrs.dat
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diff --git a/example/testvectors/wcdma/block14_tail_llrs.dat b/example/testvectors/wcdma/block14_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block15_cfgreg.dat b/example/testvectors/wcdma/block15_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block15_tail_llrs.dat b/example/testvectors/wcdma/block15_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block16_cfgreg.dat b/example/testvectors/wcdma/block16_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block17_cfgreg.dat b/example/testvectors/wcdma/block17_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block19_tail_llrs.dat b/example/testvectors/wcdma/block19_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block1_cfgreg.dat b/example/testvectors/wcdma/block1_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block1_tail_llrs.dat b/example/testvectors/wcdma/block1_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block20_cfgreg.dat b/example/testvectors/wcdma/block20_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block20_tail_llrs.dat b/example/testvectors/wcdma/block20_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block21_llrs.bin b/example/testvectors/wcdma/block21_llrs.bin
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diff --git a/example/testvectors/wcdma/block21_llrs.dat b/example/testvectors/wcdma/block21_llrs.dat
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diff --git a/example/testvectors/wcdma/block21_soft_dec.bin b/example/testvectors/wcdma/block21_soft_dec.bin
new file mode 100644 (file)
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index 0000000..28c6f7b
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diff --git a/example/testvectors/wcdma/block21_soft_dec.dat b/example/testvectors/wcdma/block21_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block21_status.dat b/example/testvectors/wcdma/block21_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block21_tail_llrs.dat b/example/testvectors/wcdma/block21_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block22_cfgreg.dat b/example/testvectors/wcdma/block22_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block22_hard_dec.bin b/example/testvectors/wcdma/block22_hard_dec.bin
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diff --git a/example/testvectors/wcdma/block22_hard_dec.dat b/example/testvectors/wcdma/block22_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block22_llrs.bin b/example/testvectors/wcdma/block22_llrs.bin
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diff --git a/example/testvectors/wcdma/block22_soft_dec.bin b/example/testvectors/wcdma/block22_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block22_soft_dec.dat b/example/testvectors/wcdma/block22_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block22_status.bin b/example/testvectors/wcdma/block22_status.bin
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diff --git a/example/testvectors/wcdma/block22_status.dat b/example/testvectors/wcdma/block22_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block22_tail_llrs.dat b/example/testvectors/wcdma/block22_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block23_cfgreg.dat b/example/testvectors/wcdma/block23_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block23_hard_dec.bin b/example/testvectors/wcdma/block23_hard_dec.bin
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diff --git a/example/testvectors/wcdma/block23_hard_dec.dat b/example/testvectors/wcdma/block23_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block23_llrs.bin b/example/testvectors/wcdma/block23_llrs.bin
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diff --git a/example/testvectors/wcdma/block23_llrs.dat b/example/testvectors/wcdma/block23_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block23_soft_dec.bin b/example/testvectors/wcdma/block23_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block23_soft_dec.dat b/example/testvectors/wcdma/block23_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block23_status.bin b/example/testvectors/wcdma/block23_status.bin
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diff --git a/example/testvectors/wcdma/block23_status.dat b/example/testvectors/wcdma/block23_status.dat
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diff --git a/example/testvectors/wcdma/block23_tail_llrs.dat b/example/testvectors/wcdma/block23_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block24_hard_dec.dat b/example/testvectors/wcdma/block24_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block24_soft_dec.bin b/example/testvectors/wcdma/block24_soft_dec.bin
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index 0000000..ac4bbcf
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diff --git a/example/testvectors/wcdma/block24_soft_dec.dat b/example/testvectors/wcdma/block24_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block24_tail_llrs.dat b/example/testvectors/wcdma/block24_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block25_cfgreg.dat b/example/testvectors/wcdma/block25_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block25_tail_llrs.dat b/example/testvectors/wcdma/block25_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block26_cfgreg.dat b/example/testvectors/wcdma/block26_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block26_status.dat b/example/testvectors/wcdma/block26_status.dat
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diff --git a/example/testvectors/wcdma/block26_tail_llrs.dat b/example/testvectors/wcdma/block26_tail_llrs.dat
--- /dev/null
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--- /dev/null
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diff --git a/example/testvectors/wcdma/block27_hard_dec.dat b/example/testvectors/wcdma/block27_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block27_soft_dec.bin b/example/testvectors/wcdma/block27_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block27_soft_dec.dat b/example/testvectors/wcdma/block27_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block27_status.bin b/example/testvectors/wcdma/block27_status.bin
new file mode 100644 (file)
index 0000000..b2e8440
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index 0000000..b2e8440
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diff --git a/example/testvectors/wcdma/block27_status.dat b/example/testvectors/wcdma/block27_status.dat
--- /dev/null
@@ -0,0 +1,3 @@
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diff --git a/example/testvectors/wcdma/block27_tail_llrs.dat b/example/testvectors/wcdma/block27_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/wcdma/block28_cfgreg.dat b/example/testvectors/wcdma/block28_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
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diff --git a/example/testvectors/wcdma/block28_hard_dec.bin b/example/testvectors/wcdma/block28_hard_dec.bin
--- /dev/null
@@ -0,0 +1,2 @@
+¦\10¹\11l\9a¸_¯¢\12Ý\eý\81yù&Yç÷1,<¨æ¾Î\88eDR#k$=¤f\8eÈ
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\ No newline at end of file
diff --git a/example/testvectors/wcdma/block28_hard_dec.dat b/example/testvectors/wcdma/block28_hard_dec.dat
--- /dev/null
@@ -0,0 +1,25 @@
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diff --git a/example/testvectors/wcdma/block28_llrs.bin b/example/testvectors/wcdma/block28_llrs.bin
new file mode 100644 (file)
index 0000000..2c6fc95
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index 0000000..2c6fc95
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diff --git a/example/testvectors/wcdma/block28_llrs.dat b/example/testvectors/wcdma/block28_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block28_soft_dec.bin b/example/testvectors/wcdma/block28_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block28_soft_dec.dat b/example/testvectors/wcdma/block28_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block28_status.bin b/example/testvectors/wcdma/block28_status.bin
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diff --git a/example/testvectors/wcdma/block28_status.dat b/example/testvectors/wcdma/block28_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block28_tail_llrs.dat b/example/testvectors/wcdma/block28_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block29_cfgreg.dat b/example/testvectors/wcdma/block29_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block29_hard_dec.bin b/example/testvectors/wcdma/block29_hard_dec.bin
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diff --git a/example/testvectors/wcdma/block29_hard_dec.dat b/example/testvectors/wcdma/block29_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block29_llrs.bin b/example/testvectors/wcdma/block29_llrs.bin
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diff --git a/example/testvectors/wcdma/block29_llrs.dat b/example/testvectors/wcdma/block29_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block29_soft_dec.bin b/example/testvectors/wcdma/block29_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block29_soft_dec.dat b/example/testvectors/wcdma/block29_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block29_status.bin b/example/testvectors/wcdma/block29_status.bin
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diff --git a/example/testvectors/wcdma/block29_status.dat b/example/testvectors/wcdma/block29_status.dat
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diff --git a/example/testvectors/wcdma/block29_tail_llrs.dat b/example/testvectors/wcdma/block29_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block2_cfgreg.dat b/example/testvectors/wcdma/block2_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block2_hard_dec.bin b/example/testvectors/wcdma/block2_hard_dec.bin
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diff --git a/example/testvectors/wcdma/block2_llrs.bin b/example/testvectors/wcdma/block2_llrs.bin
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diff --git a/example/testvectors/wcdma/block2_llrs.dat b/example/testvectors/wcdma/block2_llrs.dat
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diff --git a/example/testvectors/wcdma/block2_soft_dec.bin b/example/testvectors/wcdma/block2_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block2_status.bin b/example/testvectors/wcdma/block2_status.bin
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diff --git a/example/testvectors/wcdma/block2_status.dat b/example/testvectors/wcdma/block2_status.dat
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diff --git a/example/testvectors/wcdma/block2_tail_llrs.dat b/example/testvectors/wcdma/block2_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block30_soft_dec.bin b/example/testvectors/wcdma/block30_soft_dec.bin
new file mode 100644 (file)
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diff --git a/example/testvectors/wcdma/block30_soft_dec.dat b/example/testvectors/wcdma/block30_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block30_tail_llrs.dat b/example/testvectors/wcdma/block30_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/wcdma/block31_cfgreg.dat b/example/testvectors/wcdma/block31_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
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diff --git a/example/testvectors/wcdma/block31_hard_dec.bin b/example/testvectors/wcdma/block31_hard_dec.bin
new file mode 100644 (file)
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index 0000000..2f9f1c6
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diff --git a/example/testvectors/wcdma/block31_hard_dec.dat b/example/testvectors/wcdma/block31_hard_dec.dat
--- /dev/null
@@ -0,0 +1,4 @@
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diff --git a/example/testvectors/wcdma/block31_llrs.bin b/example/testvectors/wcdma/block31_llrs.bin
--- /dev/null
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/example/testvectors/wcdma/block31_llrs.dat b/example/testvectors/wcdma/block31_llrs.dat
--- /dev/null
@@ -0,0 +1,100 @@
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diff --git a/example/testvectors/wcdma/block31_soft_dec.bin b/example/testvectors/wcdma/block31_soft_dec.bin
new file mode 100644 (file)
index 0000000..4054cb6
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diff --git a/example/testvectors/wcdma/block31_soft_dec.dat b/example/testvectors/wcdma/block31_soft_dec.dat
--- /dev/null
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new file mode 100644 (file)
index 0000000..45961e8
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diff --git a/example/testvectors/wcdma/block31_status.dat b/example/testvectors/wcdma/block31_status.dat
--- /dev/null
@@ -0,0 +1,3 @@
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diff --git a/example/testvectors/wcdma/block31_tail_llrs.dat b/example/testvectors/wcdma/block31_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/wcdma/block3_cfgreg.dat b/example/testvectors/wcdma/block3_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
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diff --git a/example/testvectors/wcdma/block3_hard_dec.bin b/example/testvectors/wcdma/block3_hard_dec.bin
new file mode 100644 (file)
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diff --git a/example/testvectors/wcdma/block3_hard_dec.dat b/example/testvectors/wcdma/block3_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block3_llrs.bin b/example/testvectors/wcdma/block3_llrs.bin
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diff --git a/example/testvectors/wcdma/block3_llrs.dat b/example/testvectors/wcdma/block3_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block3_soft_dec.bin b/example/testvectors/wcdma/block3_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block3_soft_dec.dat b/example/testvectors/wcdma/block3_soft_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block3_status.bin b/example/testvectors/wcdma/block3_status.bin
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diff --git a/example/testvectors/wcdma/block3_status.dat b/example/testvectors/wcdma/block3_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block3_tail_llrs.dat b/example/testvectors/wcdma/block3_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block4_cfgreg.dat b/example/testvectors/wcdma/block4_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block4_hard_dec.bin b/example/testvectors/wcdma/block4_hard_dec.bin
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diff --git a/example/testvectors/wcdma/block4_hard_dec.dat b/example/testvectors/wcdma/block4_hard_dec.dat
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diff --git a/example/testvectors/wcdma/block4_llrs.dat b/example/testvectors/wcdma/block4_llrs.dat
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diff --git a/example/testvectors/wcdma/block4_tail_llrs.dat b/example/testvectors/wcdma/block4_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block5_cfgreg.dat b/example/testvectors/wcdma/block5_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block5_tail_llrs.dat b/example/testvectors/wcdma/block5_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block6_cfgreg.dat b/example/testvectors/wcdma/block6_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block6_tail_llrs.dat b/example/testvectors/wcdma/block6_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block7_cfgreg.dat b/example/testvectors/wcdma/block7_cfgreg.dat
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diff --git a/example/testvectors/wcdma/block7_hard_dec.bin b/example/testvectors/wcdma/block7_hard_dec.bin
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diff --git a/example/testvectors/wcdma/block7_tail_llrs.dat b/example/testvectors/wcdma/block7_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/block8_soft_dec.bin b/example/testvectors/wcdma/block8_soft_dec.bin
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diff --git a/example/testvectors/wcdma/block8_soft_dec.dat b/example/testvectors/wcdma/block8_soft_dec.dat
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diff --git a/example/testvectors/wcdma/block8_status.bin b/example/testvectors/wcdma/block8_status.bin
new file mode 100644 (file)
index 0000000..61c8b23
Binary files /dev/null and b/example/testvectors/wcdma/block8_status.bin differ
index 0000000..61c8b23
Binary files /dev/null and b/example/testvectors/wcdma/block8_status.bin differ
diff --git a/example/testvectors/wcdma/block8_status.dat b/example/testvectors/wcdma/block8_status.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block8_tail_llrs.dat b/example/testvectors/wcdma/block8_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/wcdma/block9_cfgreg.dat b/example/testvectors/wcdma/block9_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block9_hard_dec.bin b/example/testvectors/wcdma/block9_hard_dec.bin
--- /dev/null
@@ -0,0 +1 @@
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diff --git a/example/testvectors/wcdma/block9_hard_dec.dat b/example/testvectors/wcdma/block9_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block9_llrs.bin b/example/testvectors/wcdma/block9_llrs.bin
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index 0000000..3fa37f7
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index 0000000..3fa37f7
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diff --git a/example/testvectors/wcdma/block9_llrs.dat b/example/testvectors/wcdma/block9_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wcdma/block9_status.bin b/example/testvectors/wcdma/block9_status.bin
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diff --git a/example/testvectors/wcdma/block9_status.dat b/example/testvectors/wcdma/block9_status.dat
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diff --git a/example/testvectors/wcdma/block9_tail_llrs.dat b/example/testvectors/wcdma/block9_tail_llrs.dat
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diff --git a/example/testvectors/wcdma/number_of_blocks.dat b/example/testvectors/wcdma/number_of_blocks.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block0_cfgreg.dat b/example/testvectors/wimax/block0_cfgreg.dat
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diff --git a/example/testvectors/wimax/block0_hard_dec.bin b/example/testvectors/wimax/block0_hard_dec.bin
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diff --git a/example/testvectors/wimax/block0_hard_dec.dat b/example/testvectors/wimax/block0_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block0_llrs.bin b/example/testvectors/wimax/block0_llrs.bin
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diff --git a/example/testvectors/wimax/block0_llrs.dat b/example/testvectors/wimax/block0_llrs.dat
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diff --git a/example/testvectors/wimax/block0_soft_dec.bin b/example/testvectors/wimax/block0_soft_dec.bin
--- /dev/null
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diff --git a/example/testvectors/wimax/block0_soft_dec.dat b/example/testvectors/wimax/block0_soft_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block0_status.bin b/example/testvectors/wimax/block0_status.bin
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diff --git a/example/testvectors/wimax/block0_status.dat b/example/testvectors/wimax/block0_status.dat
--- /dev/null
@@ -0,0 +1,3 @@
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diff --git a/example/testvectors/wimax/block0_tail_llrs.dat b/example/testvectors/wimax/block0_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/wimax/block1_cfgreg.dat b/example/testvectors/wimax/block1_cfgreg.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block1_hard_dec.bin b/example/testvectors/wimax/block1_hard_dec.bin
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diff --git a/example/testvectors/wimax/block1_hard_dec.dat b/example/testvectors/wimax/block1_hard_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block1_llrs.bin b/example/testvectors/wimax/block1_llrs.bin
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diff --git a/example/testvectors/wimax/block1_llrs.dat b/example/testvectors/wimax/block1_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block1_tail_llrs.dat b/example/testvectors/wimax/block1_tail_llrs.dat
--- /dev/null
@@ -0,0 +1,6 @@
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diff --git a/example/testvectors/wimax/block2_cfgreg.dat b/example/testvectors/wimax/block2_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
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diff --git a/example/testvectors/wimax/block2_hard_dec.bin b/example/testvectors/wimax/block2_hard_dec.bin
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index 0000000..42dc702
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index 0000000..42dc702
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diff --git a/example/testvectors/wimax/block2_hard_dec.dat b/example/testvectors/wimax/block2_hard_dec.dat
--- /dev/null
@@ -0,0 +1,2 @@
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diff --git a/example/testvectors/wimax/block2_llrs.bin b/example/testvectors/wimax/block2_llrs.bin
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--- /dev/null
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diff --git a/example/testvectors/wimax/block3_hard_dec.dat b/example/testvectors/wimax/block3_hard_dec.dat
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--- /dev/null
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--- /dev/null
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diff --git a/example/testvectors/wimax/block4_soft_dec.bin b/example/testvectors/wimax/block4_soft_dec.bin
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diff --git a/example/testvectors/wimax/block4_soft_dec.dat b/example/testvectors/wimax/block4_soft_dec.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block4_status.bin b/example/testvectors/wimax/block4_status.bin
new file mode 100644 (file)
index 0000000..224341d
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index 0000000..224341d
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diff --git a/example/testvectors/wimax/block4_status.dat b/example/testvectors/wimax/block4_status.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/block4_tail_llrs.dat b/example/testvectors/wimax/block4_tail_llrs.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/number_of_blocks.dat b/example/testvectors/wimax/number_of_blocks.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/reference/block0_coded_bits.dat b/example/testvectors/wimax/reference/block0_coded_bits.dat
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diff --git a/example/testvectors/wimax/reference/block0_info_bits.dat b/example/testvectors/wimax/reference/block0_info_bits.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/reference/block0_inp_cfg.dat b/example/testvectors/wimax/reference/block0_inp_cfg.dat
--- /dev/null
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diff --git a/example/testvectors/wimax/reference/block1_coded_bits.dat b/example/testvectors/wimax/reference/block1_coded_bits.dat
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diff --git a/example/testvectors/wimax/reference/block1_info_bits.dat b/example/testvectors/wimax/reference/block1_info_bits.dat
--- /dev/null
@@ -0,0 +1,120 @@
+0d810e68\r
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diff --git a/example/testvectors/wimax/reference/block1_inp_cfg.dat b/example/testvectors/wimax/reference/block1_inp_cfg.dat
--- /dev/null
@@ -0,0 +1,15 @@
+0eff000d\r
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diff --git a/example/testvectors/wimax/reference/block2_coded_bits.dat b/example/testvectors/wimax/reference/block2_coded_bits.dat
--- /dev/null
@@ -0,0 +1,6 @@
+14490e5a\r
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diff --git a/example/testvectors/wimax/reference/block2_info_bits.dat b/example/testvectors/wimax/reference/block2_info_bits.dat
--- /dev/null
@@ -0,0 +1,2 @@
+14490e5a\r
+000075a3\r
diff --git a/example/testvectors/wimax/reference/block2_inp_cfg.dat b/example/testvectors/wimax/reference/block2_inp_cfg.dat
--- /dev/null
@@ -0,0 +1,15 @@
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diff --git a/example/testvectors/wimax/reference/block3_coded_bits.dat b/example/testvectors/wimax/reference/block3_coded_bits.dat
--- /dev/null
@@ -0,0 +1,9 @@
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diff --git a/example/testvectors/wimax/reference/block3_info_bits.dat b/example/testvectors/wimax/reference/block3_info_bits.dat
--- /dev/null
@@ -0,0 +1,3 @@
+1e190e4e\r
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diff --git a/example/testvectors/wimax/reference/block3_inp_cfg.dat b/example/testvectors/wimax/reference/block3_inp_cfg.dat
--- /dev/null
@@ -0,0 +1,15 @@
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diff --git a/example/testvectors/wimax/reference/block4_coded_bits.dat b/example/testvectors/wimax/reference/block4_coded_bits.dat
--- /dev/null
@@ -0,0 +1,21 @@
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diff --git a/example/testvectors/wimax/reference/block4_info_bits.dat b/example/testvectors/wimax/reference/block4_info_bits.dat
--- /dev/null
@@ -0,0 +1,7 @@
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diff --git a/example/testvectors/wimax/reference/block4_inp_cfg.dat b/example/testvectors/wimax/reference/block4_inp_cfg.dat
--- /dev/null
@@ -0,0 +1,15 @@
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diff --git a/install/tcp3d.mpi b/install/tcp3d.mpi
--- /dev/null
+++ b/install/tcp3d.mpi
@@ -0,0 +1,1842 @@
+array set info {
+AllowLanguageSelection
+Yes
+
+AppName
+tcp3d
+
+ShortAppName
+tcp3d
+
+Uninstaller
+uninstall_tcp3d_<%Version%>.exe
+
+ApplicationID
+08292447-1685-4FD9-BBE3-CCBBF48436A0
+
+ApplicationURL
+{}
+
+AutoRefreshFiles
+Yes
+
+BuildFailureAction
+{Fail (recommended)}
+
+CancelledInstallAction
+{Rollback and Stop}
+
+CleanupCancelledInstall
+Yes
+
+CommandLineFailureAction
+{Fail (recommended)}
+
+Company
+{Texas Instruments}
+
+CompressionLevel
+6
+
+CompressionMethod
+zlib
+
+Copyright
+{}
+
+DefaultLanguage
+English
+
+Ext
+.exe
+
+ExtractSolidArchivesOnStartup
+No
+
+Icon
+Modern/Small/SetupModernSmall01.gif
+
+Image
+Modern/SetupModern01.gif
+
+IncludeDebugging
+Yes
+
+InstallPassword
+{}
+
+InstallVersion
+1.00.00
+
+Language,de
+Yes
+
+Language,en
+Yes
+
+Language,es
+Yes
+
+Language,fr
+Yes
+
+Language,hu
+Yes
+
+Language,it
+Yes
+
+Language,nl
+Yes
+
+Language,pl
+Yes
+
+Language,pt_br
+Yes
+
+PackageDescription
+{}
+
+PackageLicense
+{}
+
+PackageMaintainer
+{}
+
+PackageName
+<%ShortAppName%>
+
+PackagePackager
+{}
+
+PackageRelease
+<%PatchVersion%>
+
+PackageSummary
+{}
+
+PackageVersion
+<%MajorVersion%>.<%MinorVersion%>
+
+PreserveFilePermissions
+Yes
+
+ProjectID
+7411AF15-11B6-4788-A724-5593C23D1A85
+
+ProjectVersion
+1.2.5.1
+
+SaveOnlyToplevelDirs
+No
+
+ScriptExt
+.bat
+
+SkipUnusedFileGroups
+Yes
+
+Theme
+Modern_Wizard
+
+ThemeDir
+Modern_Wizard
+
+ThemeVersion
+1
+
+UpgradeApplicationID
+{}
+
+Version
+1.00.00
+
+}
+
+array set ::InstallJammer::InstallCommandLineOptions {
+debug
+{Debugging Switch Yes No {} {run installer in debug mode}}
+
+debugconsole
+{ShowConsole Switch Yes No {} {run installer with a debug console open}}
+
+mode
+{InstallMode Choice No No {Console Default Silent Standard} {set the mode to run the installer in}}
+
+prefix
+{InstallDir String No No {} {set the installation directory}}
+
+test
+{Testing Switch Yes No {} {run installer without installing any files}}
+
+}
+array set ::InstallJammer::UninstallCommandLineOptions {
+debugconsole
+{ShowConsole Switch Yes No {} {run uninstaller with a debug console open}}
+
+mode
+{UninstallMode Choice No No {Console Silent Standard} {set the mode to run the uninstaller in}}
+
+test
+{Testing Switch Yes No {} {run uninstaller without uninstalling any files}}
+
+}
+FileGroup ::9C2BD124-0063-45FA-B2A1-C07E95BD54A1 -setup Install -active Yes -platforms {AIX-ppc FreeBSD-4-x86 FreeBSD-x86 HPUX-hppa Linux-x86 MacOS-X Solaris-sparc Windows TarArchive ZipArchive} -name {Program Files} -parent FileGroups
+File ::FE37B907-83B3-438F-9B8B-A82F07506482 -type dir -directory <%InstallDir%> -name <%PackageBaseDir%> -parent 9C2BD124-0063-45FA-B2A1-C07E95BD54A1
+Component ::4A7B5960-702D-4678-8533-D085CF653F0E -setup Install -active Yes -platforms {AIX-ppc FreeBSD-4-x86 FreeBSD-x86 HPUX-hppa Linux-x86 MacOS-X Solaris-sparc Windows} -name {Default Component} -parent Components
+SetupType ::88F9D095-410E-4CF2-80DB-1423246F8E42 -setup Install -active Yes -platforms {AIX-ppc FreeBSD-4-x86 FreeBSD-x86 HPUX-hppa Linux-x86 MacOS-X Solaris-sparc Windows} -name Typical -parent SetupTypes
+SetupType ::B1323B62-5067-4380-9E19-A2F6DFE8F186 -setup Install -active Yes -platforms {AIX-ppc FreeBSD-4-x86 FreeBSD-x86 HPUX-hppa Linux-x86 MacOS-X Solaris-sparc Windows} -name Custom -parent SetupTypes
+
+InstallComponent 4833AC49-ACAD-4F73-9DCA-5117D5C142A5 -setup Install -type pane -title {Welcome Screen} -component Welcome -active Yes -parent StandardInstall
+InstallComponent ED5A5BCE-2833-4247-A114-51E972369F26 -setup Install -type pane -conditions {42CE5801-5679-4E0A-B2D6-BF04187F6D6D 7B57D332-CFA8-4B68-AC63-2AA9DE785606} -title {Select Destination} -component SelectDestination -command insert -active Yes -parent StandardInstall
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+Condition 7B57D332-CFA8-4B68-AC63-2AA9DE785606 -active Yes -parent ED5A5BCE-2833-4247-A114-51E972369F26 -title {File Permission Condition} -component FilePermissionCondition
+InstallComponent 498D9EBC-6F70-4CCC-8A88-B3F019A2B880 -setup Install -type pane -title {Start Copying Files} -component StartCopyingFiles -active Yes -parent StandardInstall
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+Condition 318C333C-A42B-4001-954A-DCC1EB64CE38 -active Yes -parent 2E8052B5-4C1E-45E5-8C6E-5021E7D9835A -title {String Is Condition} -component StringIsCondition
+Condition C6028DBC-6E23-4643-9B0F-4F7524BA11E5 -active Yes -parent 2E8052B5-4C1E-45E5-8C6E-5021E7D9835A -title {String Is Condition} -component StringIsCondition
+InstallComponent 13317AAD-0D0A-4D0A-9BEA-922810029FE5 -setup Install -type pane -title {Copying Files} -component CopyFiles -active Yes -parent StandardInstall
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+InstallComponent AAF9B489-84A3-4C35-A9CB-BBA9130F22F7 -setup Install -type action -title {Execute Action} -component ExecuteAction -active Yes -parent 13317AAD-0D0A-4D0A-9BEA-922810029FE5
+InstallComponent 648469D4-E8C8-4AFC-9AE3-F3BC6252F8CE -setup Install -type action -title {Move Forward} -component MoveForward -active Yes -parent 13317AAD-0D0A-4D0A-9BEA-922810029FE5
+InstallComponent CEC0D285-9438-4659-94E5-AC4B5F753CDB -setup Install -type pane -title {Setup Complete} -component SetupComplete -active Yes -parent StandardInstall
+InstallComponent E0654B3D-6ABE-4640-9503-3DCE15658FEE -setup Install -type pane -title {Copying Files} -component CopyFiles -active Yes -parent DefaultInstall
+InstallComponent 0FF988B2-BC2F-4F17-BE70-28D7FE7846C9 -setup Install -type action -title {Disable Buttons} -component ModifyWidget -active Yes -parent E0654B3D-6ABE-4640-9503-3DCE15658FEE
+InstallComponent 836D6530-DC39-4773-BE74-19D0B2B54492 -setup Install -type action -title {Execute Action} -component ExecuteAction -active Yes -parent E0654B3D-6ABE-4640-9503-3DCE15658FEE
+InstallComponent 01720202-EE2E-4FE8-897F-E7F5D4445E2B -setup Install -type action -title {Move Forward} -component MoveForward -active Yes -parent E0654B3D-6ABE-4640-9503-3DCE15658FEE
+InstallComponent 6428BA12-614A-4569-8D06-E7F83657F0F1 -setup Install -type pane -title {Setup Complete} -component SetupComplete -active Yes -parent DefaultInstall
+InstallComponent FF7E9736-C092-4E83-8CA7-634DAEBB819A -setup Install -type action -title {Console Ask Yes Or No} -component ConsoleAskYesOrNo -active Yes -parent ConsoleInstall
+InstallComponent A7800E5F-F3E8-41B2-BE9F-8C7B3BC59209 -setup Install -type action -conditions 5F91FDFD-757E-48E1-A71E-A886EACEFEA2 -title Exit -component Exit -command insert -active Yes -parent ConsoleInstall
+Condition 5F91FDFD-757E-48E1-A71E-A886EACEFEA2 -active Yes -parent A7800E5F-F3E8-41B2-BE9F-8C7B3BC59209 -title {String Is Condition} -component StringIsCondition
+InstallComponent 16772531-4012-4BDA-946C-64DA3926C388 -setup Install -type action -conditions 2358DAA5-293A-4A4D-91F8-5F48B2F85AD6 -title {Console Get User Input} -component ConsoleGetUserInput -command insert -active Yes -parent ConsoleInstall
+Condition 2358DAA5-293A-4A4D-91F8-5F48B2F85AD6 -active Yes -parent 16772531-4012-4BDA-946C-64DA3926C388 -title {File Permission Condition} -component FilePermissionCondition
+InstallComponent EFC3A89B-C0AB-441F-9AF0-420E66AE1431 -setup Install -type action -title {Console Message} -component ConsoleMessage -active Yes -parent ConsoleInstall
+InstallComponent 10512CB0-772F-47B7-A58B-61B920D94C1F -setup Install -type action -title {Execute Action} -component ExecuteAction -active Yes -parent ConsoleInstall
+InstallComponent A116668A-21D1-4E54-A590-9E523E6CF807 -setup Install -type action -title {Console Message} -component ConsoleMessage -active Yes -parent ConsoleInstall
+InstallComponent 4A6B20C7-EEA3-4C05-A9FA-7234E3DBE91E -setup Install -type action -title Exit -component Exit -active Yes -parent ConsoleInstall
+InstallComponent 5442E77A-E443-4D83-8FE8-0D4FED32E57A -setup Install -type action -title {Execute Action} -component ExecuteAction -active Yes -parent SilentInstall
+InstallComponent 76F4FED5-0F82-4FE4-A14C-0DD5392B9BBF -setup Install -type action -title Exit -component Exit -active Yes -parent SilentInstall
+InstallComponent 52CA7D36-64EE-4764-94D3-B6A39AC459FE -setup Install -type actiongroup -title {Setup Actions} -alias {Setup Actions} -active Yes -parent ActionGroupsInstall
+InstallComponent 20725B89-270C-423C-A0E6-A7632A296664 -setup Install -type actiongroup -title {Startup Actions} -alias {Startup Actions} -active Yes -parent ActionGroupsInstall
+InstallComponent 2C2E1A2C-CB1E-49A3-A557-82185D2F1B9A -setup Install -type action -conditions {60B1FD97-331A-4F0D-8CA9-4EA1F08E7FC8 1F9C9836-090E-4017-95FD-C4F288FD3A99} -title Exit -component Exit -command insert -active Yes -parent 20725B89-270C-423C-A0E6-A7632A296664
+Condition 60B1FD97-331A-4F0D-8CA9-4EA1F08E7FC8 -active Yes -parent 2C2E1A2C-CB1E-49A3-A557-82185D2F1B9A -title {String Is Condition} -component StringIsCondition
+Condition 1F9C9836-090E-4017-95FD-C4F288FD3A99 -active Yes -parent 2C2E1A2C-CB1E-49A3-A557-82185D2F1B9A -title {Ask Yes or No} -component AskYesOrNo
+InstallComponent FF789AC3-26B4-42DD-824B-E49A00C4777B -setup Install -type action -title {Create Install Panes} -component CreateInstallPanes -active Yes -parent 20725B89-270C-423C-A0E6-A7632A296664
+InstallComponent 9D397587-6063-49F6-9BA4-E43087E1FB87 -setup Install -type actiongroup -title {Install Actions} -alias {Install Actions} -active Yes -parent ActionGroupsInstall
+InstallComponent 62C46726-ACBB-4E99-8A2F-DD5BFB8E6DCD -setup Install -type action -title {Install Selected Files} -component InstallSelectedFiles -active Yes -parent 9D397587-6063-49F6-9BA4-E43087E1FB87
+InstallComponent CF6BE1B7-08AA-4981-814E-20DDC4DD857C -setup Install -type action -conditions BD8849A8-F751-4F23-960A-81E257F72CAB -title {Install Uninstaller} -component InstallUninstaller -command insert -active Yes -parent 9D397587-6063-49F6-9BA4-E43087E1FB87
+Condition BD8849A8-F751-4F23-960A-81E257F72CAB -active Yes -parent CF6BE1B7-08AA-4981-814E-20DDC4DD857C -title {String Is Condition} -component StringIsCondition
+InstallComponent F700A731-92D7-4A9A-91AB-71A5AFCB2E5E -setup Install -type action -conditions 969091FA-E868-4D96-8A8E-5F1E210773ED -title {Windows Uninstall Registry} -component AddWindowsUninstallEntry -command insert -active Yes -parent 9D397587-6063-49F6-9BA4-E43087E1FB87
+Condition 969091FA-E868-4D96-8A8E-5F1E210773ED -active Yes -parent F700A731-92D7-4A9A-91AB-71A5AFCB2E5E -title {String Is Condition} -component StringIsCondition
+InstallComponent 0402CF48-EBA5-47C5-A284-9D3E54108FD3 -setup Install -type action -conditions 1174CE7D-A448-4E31-8816-3A25BD3B73D9 -title {Uninstall Shortcut} -component InstallProgramFolderShortcut -command insert -active Yes -parent 9D397587-6063-49F6-9BA4-E43087E1FB87
+Condition 1174CE7D-A448-4E31-8816-3A25BD3B73D9 -active Yes -parent 0402CF48-EBA5-47C5-A284-9D3E54108FD3 -title {String Is Condition} -component StringIsCondition
+InstallComponent A026EF93-0A9B-4999-A486-955C04DCFB09 -setup Install -type actiongroup -title {Finish Actions} -alias {Finish Actions} -active Yes -parent ActionGroupsInstall
+InstallComponent 0370AA35-7C4C-4E74-8F5E-C66476F94086 -setup Install -type actiongroup -title {Cancel Actions} -alias {Cancel Actions} -active Yes -parent ActionGroupsInstall
+InstallComponent 5FEBB1BD-3149-4C74-A78B-371B77E1FB9F -setup Uninstall -type pane -title Uninstall -component Uninstall -active Yes -parent StandardUninstall
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+HPUX-hppa,Active
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+Solaris-sparc,RootInstallDir
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+
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+}
+
+::msgcat::mcmset de {
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+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+
+EFC3A89B-C0AB-441F-9AF0-420E66AE1431,Message
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+
+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
+
+}
+::msgcat::mcmset en {
+0A802EE9-DF59-4623-91FC-CB9765D8F9B3,Text
+{Software Evaluation Agreement
+
+IMPORTANT - THIS IS A LEGALLY BINDING AGREEMENT. PLEASE READ IT CAREFULLY.
+IF YOU DO NOT AGREE WITH THE FOLLOWING PROVISIONS, YOU MAY NOT USE THE
+ENCLOSED MATERIALS. AFTER YOU READ THIS LICENSE AGREEMENT, YOU WILL BE ASKED
+WHETHER YOU ACCEPT AND AGREE TO THE TERMS OF THIS LICENSE AGREEMENT. DO NOT
+CLICK "I HAVE READ AND AGREE" UNLESS: (1) YOU ARE AUTHORIZED TO ACCEPT AND AGREE TO THE TERMS OF THIS LICENSE AGREEMENT ON BEHALF OF YOURSELF AND YOUR COMPANY; AND (2) YOU INTEND TO ENTER INTO AND TO BE BOUND BY THE TERMS OF THIS LEGALLY BINDING AGREEMENT ON BEHALF OF YOURSELF AND YOUR COMPANY.
+
+This Software Evaluation Agreement (or "Agreement") is a legal agreement
+between you ("You," either an individual or entity) and Texas Instruments
+Incorporated ("TI"). The "Evaluation Materials" subject to this Agreement
+include the enclosed or downloaded software programs and documentation that
+accompany this Agreement and any "on-line" or electronic documentation
+associated with the software programs. The "Evaluation Materials" include
+certain TI proprietary software programs that are specifically designed and
+licensed for execution solely and exclusively on or with TI Devices. For the
+purposes of this Agreement the term "TI Devices" means a TI EVM or DSK manufactured by or for TI. By installing, copying or otherwise using the Evaluation Materials, you agree to abide by the following provisions.
+
+This Agreement is displayed for You to read prior to using the Evaluation Materials. If You do not accept or agree with these provisions then:
+
+(1) do not unzip, download, copy, install or otherwise use the Evaluation Materials; and
+
+(2) return the Evaluation Materials to TI's designated representative.
+
+Intellectual Property, Title and Limited License Grants - The Evaluation Materials contain copyrighted material, trade secrets and other proprietary information of TI and its licensors and are protected by copyright laws, international copyright treaties, and trade secret laws, as well as other intellectual property laws and treaties. The Evaluation Materials are licensed, not sold to You, and can only be used in accordance with the terms of this Agreement. You agree that You will not mortgage, pledge or encumber the Evaluation Materials in any way. TI and its licensors retain all title and ownership of the Evaluation Materials, including all intellectual property rights in the Evaluation Materials and all copies of the Evaluation Materials.
+
+a. Limited Evaluation License. Subject to the terms of this Agreement, TI
+grants to You a fully paid-up, royalty free, non-transferable,
+non-sub-licensable, non-exclusive, non-assignable, site-specific, temporary,
+limited license to use the Evaluation Materials solely and exclusively with or
+on TI Devices and solely for testing and evaluation purposes in accordance
+with the terms of this Agreement. You agree that upon termination of this
+Agreement, this license expires and that You will destroy any and all copies
+of the Evaluation Materials, including any portions or derivatives thereof, in
+your possession, custody or control and will provide to TI's designated representative a written statement signed by You or Your companyÆs authorized representative certifying such destruction.
+
+b. Limited Demonstration License. Subject to the terms of this Agreement, TI
+grants to You a free, non-transferable, non-exclusive, non-assignable,
+worldwide, non-sub-licensable, temporary, limited license to demonstrate the
+Evaluation Materials as they are used in a product that includes a TI Device
+and consists of both hardware and software components, including executable
+versions of the software programs included with the Evaluation Materials that
+execute solely and exclusively on a TI Device and not on a device manufactured
+by or for an entity other than TI, provided that such software programs are
+demonstrated solely in object or executable versions only and such hardware
+and software programs are not left with or retained by any third party and
+remain in your possession and under your control at all times. You agree that
+upon termination of this Agreement, this license expires and that You will
+destroy any and all copies of the Evaluation Materials, including any portions
+or derivatives thereof, in your possession, custody or control and will
+provide to TI's designated representative a written statement signed by You or your companyÆs authorized representative certifying such destruction.
+
+c. No Development, Production or Distribution License. You acknowledge and agree that this license is limited to testing, evaluation and limited demonstration purposes only and You specifically agree not to use or distribute the Evaluation Materials, or any portion or derivative thereof, to any third party for any commercial purpose. NOTWITHSTANDING ANYTHING TO THE CONTRARY, THIS AGREEMENT DOES NOT CONVEY ANY LICENSE TO USE THE EVALUATION MATERIALS, OR ANY PORTION OR DERIVATIVE THEREOF, IN PRODUCTION, OR TO DISTRIBUTE THE EVALUATION MATERIALS, OR ANY PORTION OR DERIVATIVE THEREOF, TO ANY THIRD PARTY. YOU ARE REQUIRED TO EXECUTE A SEPARATE LICENSE AGREEMENT WITH TI BEFORE MANUFACTURING OR DISTRIBUTING THE EVALUATION MATERIALS, OR ANY PORTION OR DERIVATIVE THEREOF, OR ANY PRODUCTS THAT CONTAIN THE EVALUATION MATERIALS, OR ANY PORTION OR DERIVATIVE THEREOF.
+
+d. No Other License. Notwithstanding anything to the contrary, nothing in this Agreement shall be construed as a license to any intellectual property rights of TI or its licensors other than those rights embodied in the software programs provided to You by TI as part of the Evaluation Materials. EXCEPT AS PROVIDED HEREIN, NO OTHER LICENSE, WHETHER EXPRESS, IMPLIED, OR STATUTORY, BY ESTOPPEL OR OTHERWISE, TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHTS IS GRANTED HEREIN.
+
+e. Use Restrictions. You will not disclose the Evaluation Materials, or
+any portion or derivative thereof, to any person other than those employees,
+consultants and contractors whose job performance directly requires access to
+the Evaluation Materials. You will use the Evaluation Materials solely for
+testing, evaluation and limited demonstration purposes and will not use or
+distribute the Evaluation Materials, or any portion thereof, to any third
+party for any commercial purpose. You will not copy, publish, disclose,
+provide, transfer or make available the Evaluation Materials, or any portion
+thereof, to any third party. You will not sub-license, transfer or assign the
+Evaluation Materials or Your rights under this Agreement to any third party.
+You will not (a) incorporate, combine, or distribute the Evaluation Materials,
+or any portions or derivatives thereof, with any Public Software, or (b) use
+Public Software in the development of any derivatives of the Evaluation
+Materials, in such a way that would cause the Evaluation Materials, or any
+portions or derivatives thereof, to be subject to all or part of the license
+obligations or other intellectual property related terms with respect to such
+Public Software, including but not limited to, the obligations that the
+Evaluation Materials, or any portions or derivatives thereof, incorporated
+into, combined, or distributed with such Public Software (i) be disclosed or
+distributed in source code form, be licensed for the purpose of making
+derivatives of such software, or be redistributed free of charge, contrary to
+the terms and conditions of this Agreement, (ii) be used with devices other
+than TI Devices, or (iii) be otherwise used or distributed in a manner
+contrary to the terms and conditions of this Agreement. As used herein,
+"Public Software" means any software that contains, or is derived in whole or
+in part from, any software distributed as open source software, including but
+not limited to software licensed under the following or similar models: (a)
+GNU's General Public License (GPL) or Lesser/Library GPL (LGPL), (b) the Artistic License (e.g., PERL), (c) the Mozilla Public License, (d) the Netscape Public License, (e) the Sun Community Source License (SCSL), (f) the Sun Industry Standards Source License (SISL), (g) the Apache Server license, (h) QT Free Edition License, (i) IBM Public License, and (j) BitKeeper.
+
+f. Intellectual Property Rights. You acknowledge and agree that the
+Evaluation Materials contain copyrighted material, trade secrets and other
+proprietary information of TI or its licensors. To protect TI and its
+licensors' rights in the Evaluation Materials, You agree that You will not decompile, reverse engineer, disassemble or otherwise translate any of the software programs included with the Evaluation Materials to a human-perceivable form nor permit any person or entity under Your employ or control to do so. In no event will You alter, remove or destroy any copyright or proprietary notice of TI or its licensors included in the Evaluation Materials. TI and its licensors reserve all rights not specifically granted under this Agreement. You further acknowledge and agree that all fixes, modifications and improvements to the Evaluation Materials conceived of or made by TI that are based, either in whole or in part, on Your feedback, suggestions or recommendations are the exclusive property of TI and all right, title and interest in and to all such fixes, modifications and improvements to the Evaluation Materials will vest solely in TI.
+
+Warranties and Disclaimers.
+
+a. No Warranty of Production or Support. Nothing contained in this
+Agreement will be construed as a warranty or representation by TI to maintain
+production of any TI semiconductor device or other hardware or software with
+which the Evaluation Materials may be used or to otherwise support the
+Evaluation Materials in any manner. You acknowledge and agree that the
+Evaluation Materials are provided to You "AS-IS" and that TI is under no obligation to maintain or support the Evaluation Materials or to assist You in Your use of the Evaluation Materials.
+
+b. Disclaimers. TI does not warrant that operation of the Evaluation
+Materials will be error-free, or that the Evaluation Materials will meet Your
+individual requirements. THE EVALUATION MATERIALS ARE PROVIDED "AS IS" AND WITH ALL FAULTS. TI MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE EVALUATION MATERIALS, INCLUDING, BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE EVALUATION MATERIALS OR YOUR USE OF THOSE MATERIALS. YOU AGREE TO USE YOUR INDEPENDENT ANALYSIS, EVALUATION, AND JUDGMENT IN THE EVALUATION OF THE EVALUATION MATERIALS. FURTHER, THE EVALUATION MATERIALS ARE NOT FAULT TOLERANT AND ARE NOT DESIGNED, MANUFACTURED, OR INTENDED FOR USE IN OR WITH ONLINE CONTROL EQUIPMENT IN HAZARDOUS ENVIRONMENTS REQUIRING FAIL-SAFE PERFORMANCE, SUCH AS IN THE OPERATION OF NUCLEAR FACILITIES, AIRCRAFT FLIGHT CONTROL, AIRCRAFT NAVIGATION OR COMMUNICATIONS SYSTEMS, AIR TRAFFIC CONTROL, DIRECT LIFE SUPPORT MACHINES, OR WEAPONS SYSTEMS, IN WHICH THE MALFUNCTION OR FAILURE OF THE EVALUATION MATERIALS COULD LEAD DIRECTLY TO DEATH, PERSONAL INJURY, OR SEVERE PHYSICAL OR ENVIRONMENTAL DAMAGE.
+
+Evaluation Reports and Access. At TI's request, You will provide to TI,
+evaluation reports concerning performance of the Evaluation Materials that
+include Your evaluation of the strengths and weaknesses of the Evaluation
+Materials, any benchmarking results relating to a comparison of the Evaluation
+Materials with competitive products, and any recommended improvements. In
+performing this evaluation, You agree that You will use the Evaluation
+Materials under normal conditions. TI's designated representative for such discussions regarding any evaluations, benchmarking, malfunctions or needed improvements to the Evaluation Materials is:
+
+ Texas Instruments Incorporated
+ Catalog Software Operations
+ 12203 Southwest Freeway
+ Mail Station 722
+ Stafford, Texas 77477
+ 281-274-5888
+
+Confidential Information.
+
+The term "Confidential Information" shall mean the Evaluation Materials,
+whether so marked or not, and any benchmarking results for the Evaluation
+Materials. You agree that You will (i) use the Evaluation Materials only in
+connection with fulfilling Your rights and obligations under this Agreement,
+and (ii) implement reasonable procedures to prohibit the disclosure,
+unauthorized duplication, misuse or removal of TI's Confidential Information
+and will not disclose such Confidential Information to any third party, except
+as may be necessary and required in connection with the rights and obligations
+under this Agreement. Without limiting the foregoing, You agree to hold TI's
+Confidential Information in confidence and to use at least the same procedures
+and degree of care that You use to prevent disclosure of Your own confidential
+information of like importance, but in no instance less than reasonable degree
+of care. You agree to obtain executed confidentiality agreements with Your
+employees, consultants and contractors having access to TI's Confidential Information and to diligently take steps to enforce such agreements or be responsible for the actions of such employees, consultants and contractors in this respect. Employment agreements used in the normal course of business that include confidentiality provisions shall satisfy the requirements of this section. The obligations set forth in this Section (Confidential Information) will survive any termination of this Agreement for three (3) years after such termination.
+
+Intellectual Property Indemnification Disclaimer.
+
+You acknowledge and agree that the Evaluation Materials are based on industry recognized standards, including, but not limited to, the ITU and ITU-T standards, the TCP/IP standard, the ISO MPEG and JPEG standards, and the SMPTE standard, and software programs published by industry recognized standards bodies and that certain third parties claim to own patents, copyrights or other intellectual property rights that cover implementation of those standards. You acknowledge and agree that this Agreement does not convey any license to any such third party patents, copyrights, and other intellectual property rights and that You are solely responsible for any intellectual property infringement claims made by such third parties that relate to Your use of the Evaluation Materials.
+
+YOU AGREE THAT TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY
+YOU AGAINST ANY THIRD PARTY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON
+YOUR USE OF THE EVALUATION MATERIALS IN ANY MANNER. THE FOREGOING STATES TI'S ENTIRE LIABILITY WITH RESPECT TO INFRINGEMENT OF ANY PATENT OR OTHER INTELLECTUAL PROPERTY RIGHT UNDER THIS AGREEMENT AND IS IN LIEU OF ALL WARRANTIES, EXPRESS, IMPLIED OR STATUTORY, IN REGARD THERETO.
+
+Termination.
+
+The Agreement is effective until terminated and begins on the date you accept
+this Agreement's terms and conditions. You may terminate this Agreement at any time by written notice to TI. Without prejudice to any other rights, if You fail to comply with any of the terms or conditions of this Agreement, TI may terminate this Agreement. Upon any termination, all licenses granted under this Agreement expire.
+
+Further, TI may terminate this Agreement on thirty (30) days written notice to
+You, at any time, for TI's convenience. Upon termination of this Agreement,
+all licenses granted under this Agreement expire, and You will destroy any and
+all copies of the Evaluation Materials or any portions or derivatives thereof,
+in Your possession, custody or control, and provide to TI a written statement
+signed by You, or Your company's authorized representative, certifying such destruction.
+
+Liability Limitations.
+
+IN NO EVENT SHALL TI, OR ANY APPLICABLE LICENSOR, BE LIABLE FOR ANY SPECIAL, INDIRECT, COLLATERAL, INCIDENTAL, PUNATIVE, OR CONSEQUENTIAL DAMAGES HOWEVER CAUSED, ON ANY THEORY OF LIABILITY, IN CONNECTION WITH OR ARISING OUT OF THE LICENSES GRANTED HEREIN, THIS AGREEMENT OR USE OF THE EVALUATION MATERIALS, REGARDLESS OF WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. THESE EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF DATA, OR LOSS OF USE OR INTERRUPTION OF BUSINESS.
+
+IN NO EVENT SHALL TI'S AGGREGATE LIABILITY UNDER THIS AGREEMENT EXCEED FIVE HUNDRED DOLLARS ($500). The existence of more than one claim will not enlarge or extend these limits.
+
+Governing Law, Jurisdiction and Severability. This Agreement will be governed by and interpreted in accordance with the laws of the State of Texas, U.S.A., without reference to that stateÆs conflict-of-laws principles. This Agreement shall not be governed by the United Nations Convention on Contracts for the International Sale of Goods, nor shall it be governed by the Uniform Computer Information Transactions Act. Any dispute arising out of or related to this Agreement will be brought in, and each party consents to non-exclusive jurisdiction and venue in, the state and federal courts sitting in Dallas County, Texas, U.S.A. Each party waives all defenses of lack of personal jurisdiction and forum non-conveniens and agrees that process may be served on either party in a manner authorized by applicable law or court rule. If for any reason a court of competent jurisdiction finds any provision of the Agreement to be unenforceable, that provision will be enforced to the maximum extent possible to effectuate the intent of the parties and the remainder of the Agreement shall continue in full force and effect.
+
+Export Control. You hereby acknowledge and agree that unless prior
+authorization is obtained from the United States Department of Commerce,
+neither You nor your agents will export, re-export, or release, directly or
+indirectly, any technology, software, or software source code (as defined in
+Part 772 of the Export Administration Regulations of the U.S. Department of
+Commerce ("EAR")), received from TI, or export, directly or indirectly, any
+direct product of such technology, software, or software source code (as
+defined in Part 734 of the EAR), to any destination or country to which the
+export, re-export or release of the technology, software, software source
+code, or direct product is prohibited by the EAR. You agree that none of the
+Licensed Materials may be downloaded or otherwise exported or re-exported (i)
+into (or to a national or resident of) Cuba, Iran, Iraq, Libya, North Korea,
+Sudan and Syria or any other country for which the U.S. has embargoed goods;
+or (ii) to anyone on the U.S. Treasury Department's List of Specially Designated Nationals or the U.S. Commerce DepartmentÆs Denied Person List or Entity List. You represent and warrant that you are not located in, under the control of, or a national or resident of any such country or on any such list and you will not use or transfer the Licensed Materials for use in any sensitive nuclear, chemical or biological weapons, or missile technology end-uses unless authorized by the U.S. Government by regulation or specific license. The assurances provided for herein are furnished to TI by You in compliance with Part 740 (Technology and Software Under Restriction) of the EAR. You also understand and acknowledge that products, technology (regardless of the form in which it is provided), software or software source code, received from TI under this Agreement may be under export control of the United States or other countries. You shall comply with the United States and other applicable non-U.S. laws and regulations governing the export, re-export and release of any products, technology, software, or software source code received under this Agreement from TI. You shall not undertake any action that is prohibited by the EAR. Without limiting the generality of the foregoing, You specifically agrees that You shall not transfer or release products, technology, software, or software source code of TI to, or for use by, military end users or for use in military, missile, nuclear, biological, or chemical weapons end uses.
+You shall secure at Your own expense, such licenses and export and import documents as are necessary for You to fulfill its obligations under this Agreement. If such licenses or government approvals cannot be obtained, TI may terminate this Agreement, or shall otherwise be excused from the performance of any obligations it may have under this Agreement for which the licenses or government approvals are required.
+
+Governing Language. This Agreement is written and executed in the English language. If a translation of this Agreement is required for any purpose, including but not limited to registration of the Agreement pursuant to any governmental laws, regulations or rules, You warrant and represent that You will be solely responsible for creating such translation. It is understood and agreed that any translation of this Agreement into a language other than English is intended solely in order to comply with such laws or for reference purposes, and the English language version shall be authoritative and controlling.
+
+Registration Requirements. If required, You agree that You will be solely responsible for performing all acts and obtaining all approvals that may beárequired in connection with this Agreement by the government of the People's Republic of China, including but not limited to registering pursuant to, and otherwise complying with, the PRC Measures on the Administration of Software Products, Management Regulations on Technology Import-Export, and Technology Import and Export Contract Registration Management Rules. Upon receipt of such approvals from the government authorities, You will forward evidence of all such approvals to TI for its records. In the event that You fail to obtain any such approval or registration, You shall be solely responsible for any and all losses, damages or costs resulting therefrom, and shall indemnify TI for all such losses, damages or costs.
+
+Entire Agreement. This is the entire Agreement between You and TI and supersedes any prior and contemporaneous agreements, understandings, negotiations and discussions between the parties related to the subject matter of this Agreement. Neither party shall be bound by any conditions, definitions, warranties, understandings, nor representations with respect to the subject matter hereof other than as expressly provided herein. These terms and conditions will prevail notwithstanding any different, conflicting or additional terms and conditions that may appear in any purchase order, acknowledgement or other writing not expressly incorporated into this Agreement. No amendment or modification of this Agreement will be effective unless in writing and signed by a duly authorized representative of TI. You hereby warrant and represent that You have obtained all authorizations and other applicable consents required empowering you to enter into this Agreement and use the Evaluation Materials.
+
+
+
+}
+
+114852AB-A479-460A-B139-F9C6E555725A,Message
+<%UninstallCompleteText%>
+
+1F9C9836-090E-4017-95FD-C4F288FD3A99,Message
+<%InstallStartupText%>
+
+1F9C9836-090E-4017-95FD-C4F288FD3A99,Title
+<%InstallApplicationText%>
+
+2555563F-1BC1-4F42-8413-82FBC0DBEB72,Caption
+{Installing CSL Libraries}
+
+2555563F-1BC1-4F42-8413-82FBC0DBEB72,Message
+{Installation of the CSL Libraries in progress}
+
+4141B0E2-5A8A-423C-9823-6B01CF4DAA01,Message
+<%UninstallStartupText%>
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+4141B0E2-5A8A-423C-9823-6B01CF4DAA01,Title
+<%UninstallApplicationText%>
+
+4A7B5960-702D-4678-8533-D085CF653F0E,Description
+<%ProgramFilesDescription%>
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+88F9D095-410E-4CF2-80DB-1423246F8E42,Description
+<%TypicalInstallDescription%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
+<%InstallationCompleteText%>
+
+B1323B62-5067-4380-9E19-A2F6DFE8F186,Description
+<%CustomInstallDescription%>
+
+CFC03BF9-B5A7-4504-85AF-FE5AEA67EC4A,Message
+Testing
+
+EFC3A89B-C0AB-441F-9AF0-420E66AE1431,Message
+<%InstallingApplicationText%>
+
+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
+
+}
+::msgcat::mcmset es {
+114852AB-A479-460A-B139-F9C6E555725A,Message
+<%UninstallCompleteText%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+<%InstallingApplicationText%>
+
+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
+
+}
+::msgcat::mcmset fr {
+114852AB-A479-460A-B139-F9C6E555725A,Message
+<%UninstallCompleteText%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+<%InstallingApplicationText%>
+
+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
+
+}
+::msgcat::mcmset hu {
+114852AB-A479-460A-B139-F9C6E555725A,Message
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+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+<%InstallingApplicationText%>
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+<%UninstallingApplicationText%>
+
+}
+::msgcat::mcmset it {
+114852AB-A479-460A-B139-F9C6E555725A,Message
+<%UninstallCompleteText%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+EFC3A89B-C0AB-441F-9AF0-420E66AE1431,Message
+<%InstallingApplicationText%>
+
+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
+
+}
+::msgcat::mcmset nl {
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+<%UninstallCompleteText%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+<%InstallingApplicationText%>
+
+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
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+}
+::msgcat::mcmset pl {
+114852AB-A479-460A-B139-F9C6E555725A,Message
+<%UninstallCompleteText%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+EFC3A89B-C0AB-441F-9AF0-420E66AE1431,Message
+<%InstallingApplicationText%>
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+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
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+}
+::msgcat::mcmset pt_br {
+114852AB-A479-460A-B139-F9C6E555725A,Message
+<%UninstallCompleteText%>
+
+A116668A-21D1-4E54-A590-9E523E6CF807,Message
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+<%InstallingApplicationText%>
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+F864D537-DF36-457D-BE7D-A5E6F2EB0CC3,Message
+<%UninstallingApplicationText%>
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+}
+
diff --git a/package.bld b/package.bld
--- /dev/null
+++ b/package.bld
@@ -0,0 +1,212 @@
+/******************************************************************************\r
+ * FILE PURPOSE: Build description for the TCP3D Driver\r
+ ******************************************************************************\r
+ * FILE NAME: package.bld\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the build specification and description for the TCP3D driver\r
+ * \r
+ * The file takes the following parameters from the command line through the\r
+ * XDCARGS variable.\r
+ * XDCARGS[0] = TCP3D Driver Install Type \r
+ * Valid Values are "TAR" or "SETUP"\r
+ * DEFAULT is "TAR"\r
+ *\r
+ * Example for a valid command:\r
+ * xdc XDCARGS=SETUP release \r
+ *\r
+ * Copyright (C) 2011, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* List of all subdirectories that combine to make the TCP3D Driver Package. */\r
+var subDirectories = [ "src", "docs", "example", "test" ];\r
+\r
+/* Determine if we need to create the InstallJammer Application or not? \r
+ * TCP3D Driver deliverables be either of the following formats:\r
+ * - TAR Ball Package\r
+ * - Setup Executable \r
+ * DEFAULT is a TAR package. */\r
+if ((arguments[0] != "TAR") && (arguments[0] != "SETUP"))\r
+ tcp3dDriverInstallType = Pkg.attrs.archiver;\r
+else\r
+ tcp3dDriverInstallType = arguments[0];\r
+\r
+/* Irrespective of the InstallType we always create a TAR Ball Package as a part\r
+ * of the RTSC Build. Here we determine the name of the TAR Ball Package\r
+ * Format is as follows:\r
+ * tcp3d_<version> */\r
+var tcp3dRTSCFileName = "tcp3d" + "_" +\r
+ tcp3dPartNumber + "_" + \r
+ tcp3dDriverReleaseVersion[0] + "_" +\r
+ tcp3dDriverReleaseVersion[1] + "_" + \r
+ tcp3dDriverReleaseVersion[2] + "_" +\r
+ tcp3dDriverReleaseVersion[3];\r
+\r
+/******************************************************************\r
+ ************************ Release Banner **************************\r
+ ******************************************************************/\r
+\r
+print ("************* TCP3D Driver Build Information *************");\r
+print ("TCP3D Driver Install : " + tcp3dDriverInstallType);\r
+print ("TCP3D Driver Version : " + tcp3dDriverReleaseVersion);\r
+print ("Tools Directory : " + toolsBaseDir);\r
+print ("RTSC File Name : " + tcp3dRTSCFileName);\r
+print ("TCP3D Driver Path : " + tcp3dDriverPath);\r
+print ("Coverity Analysis : " + (coverityAnalysis == "ON" ? "ON" : "OFF"));\r
+print ("CC LE opts : " + C66LE.ccOpts.prefix);\r
+print ("CC BE opts : " + C66BE.ccOpts.prefix);\r
+print ("**********************************************************");\r
+\r
+/* Create the release package for the TCP3D Driver */\r
+Pkg.defaultRelease = Pkg.addRelease (tcp3dRTSCFileName, {prefix: "./packages/"});\r
+\r
+/* Cycle through all the sub-directories and build all the files */\r
+for (var i = 0; i < subDirectories.length; i++) \r
+{\r
+ /* Load the capsule in the sub directory. */\r
+ var caps = xdc.loadCapsule (subDirectories[i]+"/Module.xs");\r
+\r
+ print ("Building directory " + subDirectories[i]);\r
+\r
+ /* Build the capsule. */\r
+ caps.modBuild();\r
+\r
+ /* Package the module.xs files for building via package */\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = subDirectories[i]+"/Module.xs";\r
+}\r
+\r
+/* Package the remaining files */\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "config.bld";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "package.bld";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "package.xdc";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "package.xs";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "Settings.xdc";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "Settings.xdc.xdt";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "tcp3d_drv.h";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "tcp3d_osal.h";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "tcp3d_drv_types.h";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "tcp3dver.h";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "tcp3dver.h.xdt";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/TCP3D_DRV_doxconfig";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "docs/TCP3D_DRV_doxconfig.xdt";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "build/buildlib.xs";\r
+Pkg.otherFiles[Pkg.otherFiles.length++] = "makefile";\r
+\r
+/* Generate Users Manual Doxyfile */\r
+var tplt = xdc.loadTemplate("./docs/TCP3D_DRV_doxconfig.xdt");\r
+tplt.genFile("./docs/TCP3D_DRV_doxconfig",tcp3dDriverReleaseVersion); \r
+\r
+/* Generate Settings.xdc */\r
+var tplt = xdc.loadTemplate("./Settings.xdc.xdt");\r
+tplt.genFile("./Settings.xdc",tcp3dDriverReleaseVersion); \r
+\r
+/* Generate paver.h */\r
+var tplt = xdc.loadTemplate("./tcp3dver.h.xdt");\r
+tplt.genFile("./tcp3dver.h",tcp3dDriverReleaseVersion); \r
+\r
+/* Generate eclipse sample file */\r
+var tplt = xdc.loadTemplate("./docs/eclipse/sample.xml.xdt");\r
+tplt.genFile("./docs/eclipse/sample.xml",tcp3dDriverReleaseVersion); \r
+\r
+\r
+/***************************************************************************\r
+ ********************************* MINI Package ****************************\r
+ ***************************************************************************/\r
+/* Check if we need to create the mini package? */\r
+var miniBuild = java.lang.System.getenv("MINI_PACKAGE");\r
+\r
+if (miniBuild == "ON")\r
+{\r
+ /* Create the MINI RTSC Package */\r
+ var additionalFiles = [];\r
+\r
+ var libUtility = xdc.loadCapsule ("build/buildlib.xs");\r
+ libUtility.createMiniPkg(tcp3dRTSCFileName, additionalFiles);\r
+}\r
+\r
+/********************************************************************* \r
+ *********************** INSTALL-JAMMER Support **********************\r
+ * In order to create the InstallJammer Application; we need to UNTAR\r
+ * the package into a temporary directory. This is required because \r
+ * currently the InstallJammer does not support the TAR Files and thus\r
+ * creating an UNTAR of the file. So to work-around the problem we will\r
+ * do the following in the EPILOGUE Section:-\r
+ * (a) Create a temporary directory called 'tmp'\r
+ * (b) UNTAR the package into 'tmp'\r
+ * (c) Run the INSTALL Jammer on 'tmp'\r
+ * (d) Remove the 'tmp' directory.\r
+ *\r
+ * This can be done only after the 'release' package has been created.\r
+ * Thus all of this work is being done in the EPILOGUE.\r
+ *********************************************************************/\r
+if (tcp3dDriverInstallType == "SETUP")\r
+{\r
+ /* Create the Install Jammer Version Variable. This is used inside the \r
+ * MPI File to create the Final executable. \r
+ * The format supported is as follows:-\r
+ * - setupwin32_tcp3d_<device>_<version>.exe \r
+ */\r
+ var InstallJammerVersion = "-DVersion " +\r
+ tcp3dPartNumber + "_" + \r
+ tcp3dDriverReleaseVersion[0] + "_" +\r
+ tcp3dDriverReleaseVersion[1] + "_" + \r
+ tcp3dDriverReleaseVersion[2] + "_" +\r
+ tcp3dDriverReleaseVersion[3];\r
+\r
+ /* This is the location where the tmp directory is located; this is used as \r
+ * the input directory for the Install Jammer. */ \r
+ var PackageBaseDir = " -DPackageBaseDir " + tcp3dDriverPath + "./tmp";\r
+\r
+ /* This is the location where the TCP3D Driver will be installed by default. */\r
+ var WinInstallDir = " -DWinInstallDir " + \r
+ "C:/ti/tcp3d" + "_" + \r
+ tcp3dPartNumber + "_" + \r
+ tcp3dDriverReleaseVersion[0] + "_" +\r
+ tcp3dDriverReleaseVersion[1] + "_" + \r
+ tcp3dDriverReleaseVersion[2] + "_" +\r
+ tcp3dDriverReleaseVersion[3];\r
+\r
+ /* Create the actual EPILOGUE Section for the INSTALLER */\r
+ Pkg.makeEpilogue += "release: install_application\n";\r
+ Pkg.makeEpilogue += "install_application:\n";\r
+ Pkg.makeEpilogue += "\t @echo -------------------------------------------------------\n";\r
+ Pkg.makeEpilogue += "\t @echo Creating the Install\n";\r
+ Pkg.makeEpilogue += "\t @echo -------------------------------------------------------\n";\r
+ Pkg.makeEpilogue += "\t -$(MKDIR) tmp\n";\r
+ Pkg.makeEpilogue += "\t -$(MKDIR) tmp/packages\n";\r
+ Pkg.makeEpilogue += "\t -$(MKDIR) tmp/eclipse\n";\r
+ Pkg.makeEpilogue += "\t -$(CP) -R eclipse tmp\n";\r
+ Pkg.makeEpilogue += "\t tar -xf ./packages/" + tcp3dRTSCFileName + ".tar" + " -Ctmp/packages \n";\r
+ Pkg.makeEpilogue += "\t installjammer " + InstallJammerVersion + PackageBaseDir + WinInstallDir + \r
+ " --output-dir packages/ --build install/tcp3d.mpi\n";\r
+ Pkg.makeEpilogue += "\t -$(RMDIR) tmp\n\n";\r
+}\r
+\r
+/* We need to clean after ourselves; extend the 'clean' target to take care of this. */\r
+Pkg.makeEpilogue += "clean::\n";\r
+Pkg.makeEpilogue += "\t -$(RM) .xdcenv.mak\n";\r
+Pkg.makeEpilogue += "\t -$(RM) tcp3dver.h\n";\r
+Pkg.makeEpilogue += "\t -$(RM) Settings.xdc\n";\r
+Pkg.makeEpilogue += "\t -$(RM) makefile\n";\r
+Pkg.makeEpilogue += "\t -$(RM) docs/TCP3D_DRV_APIIF.chm\n";\r
+Pkg.makeEpilogue += "\t -$(RM) docs/TCP3D_DRV_doxconfig\n";\r
+Pkg.makeEpilogue += "\t -$(RM) docs/eclipse/sample.xml\n";\r
+Pkg.makeEpilogue += "\t -$(RMDIR) docs/doxy/rtf\n";\r
+Pkg.makeEpilogue += "\t -$(RMDIR) docs/doxy/html\n";\r
+Pkg.makeEpilogue += "\t -$(RMDIR) lib\n";\r
+// for (var i = 0; i < devices.length; i++)\r
+// {\r
+ // Pkg.makeEpilogue += "\t -$(RMDIR) lib/" + devices[i].split("/")[0] + "\n";\r
+// }\r
+if (tcp3dDriverInstallType == "SETUP")\r
+{\r
+ Pkg.makeEpilogue += "\t -$(RM) packages/*.exe\n";\r
+ Pkg.makeEpilogue += "\t -$(RM) packages/*.bin\n";\r
+ Pkg.makeEpilogue += "\t -$(RMDIR) eclipse\n";\r
+ Pkg.makeEpilogue += "\t -$(RMDIR) tmp\n";\r
+}\r
+if (miniBuild == "ON")\r
+{\r
+ Pkg.makeEpilogue += "\t -$(RM) simpleC66LE.mak\n";\r
+ Pkg.makeEpilogue += "\t -$(RM) simpleC66BE.mak\n";\r
+}\r
diff --git a/package.xdc b/package.xdc
--- /dev/null
+++ b/package.xdc
@@ -0,0 +1,15 @@
+/******************************************************************************\r
+ * FILE PURPOSE: Package specification file \r
+ ******************************************************************************\r
+ * FILE NAME: package.xdc\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the package specification for the TCP3D Driver\r
+ *\r
+ * Copyright (C) 2012, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+package ti.drv.tcp3d[2, 00, 00, 01] {\r
+ module Settings;\r
+}\r
+\r
diff --git a/package.xs b/package.xs
--- /dev/null
+++ b/package.xs
@@ -0,0 +1,53 @@
+/*\r
+ * ======== package.xs ========\r
+ *\r
+ */\r
+\r
+\r
+/*\r
+ * ======== Package.getLibs ========\r
+ * This function is called when a program's configuration files are\r
+ * being generated and it returns the name of a library appropriate\r
+ * for the program's configuration.\r
+ */\r
+\r
+function getLibs(prog)\r
+{\r
+ var suffix = prog.build.target.suffix;\r
+\r
+ var name = this.$name + ".a" + suffix;\r
+\r
+ /* Read LIBDIR variable */\r
+ var lib = java.lang.System.getenv("LIBDIR");\r
+\r
+ /* If NULL, default to "lib" folder */\r
+ if (lib == null)\r
+ {\r
+ lib = "./lib";\r
+ } else {\r
+ print ("\tSystem environment LIBDIR variable defined : " + lib);\r
+ }\r
+\r
+ /* Get target folder, if applicable */\r
+ if ( java.lang.String(suffix).contains('66') )\r
+ lib = lib + "/c66";\r
+\r
+ /* Get library name with path */\r
+ lib = lib + "/" + name;\r
+ if (java.io.File(this.packageBase + lib).exists()) {\r
+ return lib;\r
+ }\r
+\r
+ /* Could not find any library, throw exception */\r
+ throw new Error("\tLibrary not found: " + this.packageBase + lib);\r
+}\r
+\r
+/*\r
+ * ======== package.close ========\r
+ */\r
+function close()\r
+{ \r
+ if (xdc.om.$name != 'cfg') {\r
+ return;\r
+ }\r
+}\r
diff --git a/projectCreate.bat b/projectCreate.bat
--- /dev/null
+++ b/projectCreate.bat
@@ -0,0 +1,150 @@
+@REM ******************************************************************************\r
+@REM * FILE PURPOSE: Unit Test and Example Project Creator\r
+@REM ******************************************************************************\r
+@REM * FILE NAME: projectCreate.bat\r
+@REM *\r
+@REM * DESCRIPTION: \r
+@REM * The script file is used to create the test and example projects for\r
+@REM * TCP3D. These projects are available in the specified workspace.\r
+@REM *\r
+@REM * USAGE:\r
+@REM * projectCreate.bat big\r
+@REM * --- OR ---\r
+@REM * projectCreate.bat\r
+@REM *\r
+@REM * DEPENDENCIES:\r
+@REM * "C:\Program Files\Texas Instruments\pdk_C6657_1_0_0_1001\packages"\r
+@REM *\r
+@REM * Copyright (C) 2011, Texas Instruments, Inc.\r
+@REM *****************************************************************************\r
+@echo OFF\r
+\r
+REM skip checking as done for PDK\r
+REM @call setupenv.bat\r
+\r
+REM *****************************************************************************\r
+REM *****************************************************************************\r
+REM Customer Modifiable Section\r
+REM *****************************************************************************\r
+REM *****************************************************************************\r
+\r
+REM This is to control the CCS version specific project create command\r
+REM Set to 'no' when using CCSv5 or set to 'yes' when using CCSv4\r
+set IS_CCS_VERSION_4=no\r
+\r
+REM Set to 'no' when using QT, EVM, VDB, or other hardware. Set to 'yes' only when using the simulator.\r
+set IS_SIMULATOR_SUPPORT_NEEDED=yes\r
+\r
+REM Install Location for CCS. Ensure the PATH here is in compliance with the 'IS_CCS_VERSION_4' variable\r
+REM defined above.\r
+set CCS_INSTALL_PATH=c:\ti\ccsv5\r
+\r
+REM Workspace where the projects will be created in "example" and "test" folders.\r
+set MY_WORKSPACE=.\r
+\r
+REM This is Endianess of the Projects being created.\r
+REM Valid Values are 'little' and 'big'\r
+if "%1" == "big" (\r
+set ENDIAN=big\r
+) else (\r
+set ENDIAN=little\r
+)\r
+\r
+REM This is the format of the executable being created\r
+REM Valid Values are 'ELF' and 'COFF'\r
+set OUTPUT_FORMAT=ELF\r
+\r
+REM Version of CG-Tools\r
+set CGT_VERSION=7.3.1\r
+\r
+REM Version of XDC\r
+set XDC_VERSION=3.23.03.53\r
+\r
+REM Version of BIOS\r
+set BIOS_VERSION=6.33.05.46\r
+\r
+REM Version of the IPC\r
+set IPC_VERSION=1.24.02.27\r
+\r
+REM Version of the PDK\r
+set PDK_VERSION=1.00.00.1003\r
+\r
+REM Version of the EDMA\r
+set EDMA_VERSION=02.11.05\r
+\r
+REM RTSC Platform Name\r
+set RTSC_PLATFORM_NAME=ti.platforms.simKepler\r
+\r
+REM RTSC Target \r
+REM - Please ensure that you select this taking into account the\r
+REM OUTPUT_FORMAT and the RTSC_PLATFORM_NAME \r
+if "%ENDIAN%" == "big" (\r
+set RTSC_TARGET=ti.targets.elf.C66_big_endian\r
+) else ( \r
+set RTSC_TARGET=ti.targets.elf.C66\r
+)\r
+\r
+REM *****************************************************************************\r
+REM *****************************************************************************\r
+REM Please do NOT change anything below this\r
+REM *****************************************************************************\r
+REM *****************************************************************************\r
+\r
+REM Batch file execution location\r
+set WORKDIR_SHORT=%~sdp0\r
+\r
+REM Set auto create command by default for use with CCSv5\r
+set AUTO_CREATE_COMMAND=eclipse\eclipsec -noSplash \r
+\r
+REM If is CCS version 4 then set auto create command for use with CCSv4\r
+If .%IS_CCS_VERSION_4% == .yes set AUTO_CREATE_COMMAND=eclipse\jre\bin\java -jar %CCS_INSTALL_PATH%\eclipse\startup.jar\r
+\r
+REM Set project for Silicon or QT by default\r
+set SIMULATOR_SUPPORT_DEFINE=\r
+\r
+REM If simulator support is needed then set the define\r
+If .%IS_SIMULATOR_SUPPORT_NEEDED% == .yes set SIMULATOR_SUPPORT_DEFINE=-ccs.setCompilerOptions "--define SIMULATOR_SUPPORT"\r
+\r
+echo *****************************************************************************\r
+echo Detecting UnitTest Projects in PDK and importing them in the workspace %MY_WORKSPACE%\r
+\r
+set listFile=testpjtlist.txt\r
+dir /b /s *testproject.txt | findstr "tcp3" > %listFile%\r
+REM Search for all the test Project Files in the PDK.\r
+for /F %%I IN (%listFile%) do (\r
+echo Detected Test Project: %%~nI\r
+\r
+REM Goto each directory where the test project file is located and create the projects.\r
+pushd test\r
+\r
+REM Execute the command to create the project using the parameters specified above.\r
+%CCS_INSTALL_PATH%\%AUTO_CREATE_COMMAND% -data %MY_WORKSPACE% -application com.ti.ccstudio.apps.projectCreate -ccs.name %%~nI_%ENDIAN% -ccs.outputFormat %OUTPUT_FORMAT% -ccs.device com.ti.ccstudio.deviceModel.C6000.GenericC64xPlusDevice -ccs.endianness %ENDIAN% -ccs.kind executable -ccs.cgtVersion %CGT_VERSION% -rtsc.xdcVersion %XDC_VERSION% -rtsc.enableDspBios -rtsc.biosVersion %BIOS_VERSION% -rtsc.buildProfile "debug" -rtsc.products "com.ti.rtsc.IPC:%IPC_VERSION%;com.ti.rtsc.SYSBIOS:%BIOS_VERSION%;ti.csl_lld:%PDK_VERSION%;com.ti.sdo.edma3:%EDMA_VERSION%" -rtsc.platform "%RTSC_PLATFORM_NAME%" -rtsc.target %RTSC_TARGET% -ccs.rts libc.a -ccs.args %%I %SIMULATOR_SUPPORT_DEFINE% -ccs.overwrite full\r
+\r
+REM copy the macros.ini to project location\r
+copy %WORKDIR_SHORT%test\macros.ini %MY_WORKSPACE%\%%~nI_%ENDIAN%\macros.ini\r
+\r
+popd\r
+)\r
+@del /q %listFile%\r
+\r
+echo *****************************************************************************\r
+echo Detecting Example Projects in PDK and importing them in the workspace %MY_WORKSPACE%\r
+\r
+set listFile=examplepjtlist.txt\r
+dir /b /s *exampleproject.txt | findstr "tcp3" > %listFile%\r
+REM Search for all the Example Project Files in the PDK.\r
+for /F %%I IN (%listFile%) do (\r
+echo Detected Example Project: %%~nI\r
+\r
+REM Goto each directory where the example project file is located and create the projects.\r
+pushd example\r
+\r
+REM Execute the command to create the project using the parameters specified above.\r
+%CCS_INSTALL_PATH%\%AUTO_CREATE_COMMAND% -data %MY_WORKSPACE% -application com.ti.ccstudio.apps.projectCreate -ccs.name %%~nI_%ENDIAN% -ccs.outputFormat %OUTPUT_FORMAT% -ccs.device com.ti.ccstudio.deviceModel.C6000.GenericC64xPlusDevice -ccs.endianness %ENDIAN% -ccs.kind executable -ccs.cgtVersion %CGT_VERSION% -rtsc.xdcVersion %XDC_VERSION% -rtsc.enableDspBios -rtsc.biosVersion %BIOS_VERSION% -rtsc.buildProfile "debug" -rtsc.products "com.ti.rtsc.IPC:%IPC_VERSION%;com.ti.rtsc.SYSBIOS:%BIOS_VERSION%;ti.csl_lld:%PDK_VERSION%;com.ti.sdo.edma3:%EDMA_VERSION%" -rtsc.platform "%RTSC_PLATFORM_NAME%" -rtsc.target %RTSC_TARGET% -ccs.rts libc.a -ccs.args %%I %SIMULATOR_SUPPORT_DEFINE% -ccs.overwrite full\r
+\r
+REM copy the macros.ini to project location\r
+copy %WORKDIR_SHORT%test\macros.ini %MY_WORKSPACE%\%%~nI_%ENDIAN%\macros.ini\r
+\r
+popd\r
+)\r
+@del /q %listFile%\r
diff --git a/setupenv.bat b/setupenv.bat
--- /dev/null
+++ b/setupenv.bat
@@ -0,0 +1,87 @@
+@REM ***************************************************************************\r
+@REM * FILE PURPOSE: Environment Setup for building TCP3D driver\r
+@REM ***************************************************************************\r
+@REM * FILE NAME: setupenv.bat\r
+@REM *\r
+@REM * DESCRIPTION: \r
+@REM * Configures and sets up the Build Environment\r
+@REM *\r
+@REM * Copyright (C) 2012, Texas Instruments, Inc.\r
+@REM ***************************************************************************\r
+\r
+@echo ------------------------------------------------\r
+@echo Configuring TCP3D Driver Build Environment\r
+@echo off\r
+\r
+REM Set CCS Installation Root directory\r
+REM ============================================================================\r
+if exist "c:\ti" (\r
+set CCS_ROOT="c:/ti"\r
+) else if exist "C:\Program Files (x86)\Texas Instruments" (\r
+set CCS_ROOT="C:/Program Files (x86)/Texas Instruments"\r
+) else if exist "C:\Program Files\Texas Instruments" (\r
+set CCS_ROOT="C:/Program Files/Texas Instruments"\r
+) else (\r
+echo. ********************************************\r
+echo. CCS_ROOT is not defined, check the script\r
+echo. ********************************************\r
+)\r
+REM Print message about the CCS base path detected\r
+echo. ********************************************\r
+echo. Detected CCS_ROOT is set to %CCS_ROOT%\r
+echo. ********************************************\r
+REM ============================================================================\r
+REM Get XDC utililty path and set to path to use 'path2dos'\r
+for /f "tokens=1* delims=" %%a in ('dir /b %CCS_ROOT:/=\%\xdctools_3_23*') do (\r
+set XDC_UTIL_PATH=%CCS_ROOT:/=\%\%%a\packages\xdc\services\io\release\r
+)\r
+set PATH=%PATH%;%XDC_UTIL_PATH%\r
+set XDC_UTIL_PATH=\r
+\r
+REM Covert variables for short path\r
+for /f "tokens=1* delims=" %%a in ('cmd /q/c path2dos %CCS_ROOT%') do (set CCS_ROOT=%%a)\r
+REM ============================================================================\r
+\r
+@REM EDMA3 LLD installation path variables\r
+set EDMA3LLD_BIOS6_INSTALLDIR=%CCS_ROOT%/edma3_lld_02_11_05_02\r
+\r
+@REM PDK installation path\r
+set PDK_INSTALL_PATH=%CCS_ROOT:/=\%\csl_lld_keystone2_1_0_0_3\packages\r
+\r
+@REM Specify the XDC Tool Path\r
+REM set XDC_INSTALL_PATH=T:/gen/xdc/xdctools_3_20_07_86\r
+set XDC_INSTALL_PATH=%CCS_ROOT%/xdctools_3_23_03_53\r
+\r
+@REM Third Party Tools: Coverity \r
+set STATIC_ANALYZE_PATH=T:\gen\coverity\prevent-mingw-3.8.0\r
+set COVERITY_INSTALL_PATH=%STATIC_ANALYZE_PATH:\=/%\r
+\r
+@REM Eclipse Help Plugin (Not required by customers)\r
+set XDC_ECLIPSE_PLUGIN_INSTALL_PATH=T:/gen/xdc/xdc_eclipse_plugin_gen/20091203\r
+\r
+@REM XDC filete for creating simple makefile\r
+set XDC_FILTER_INSTALL_PATH=T:/gen/xdc/xdcFilter/20100428\r
+\r
+@REM set the Code Gen tools\r
+set C6X_GEN_INSTALL_PATH=T:/c6xx/cgen7_2_02/c6000/cgtools\r
+\r
+@REM set the CG XML path\r
+set CG_XML_BIN_INSTALL_PATH=T:/SDOApps/cg_xml/cg_xml_v2_20_00/bin\r
+\r
+@REM Third Party Tools: Doxygen\r
+set DOXYGEN_INSTALL_PATH=T:\Doxygen\doxygen\1.5.1-p1\bin\r
+\r
+@REM Third Party Tools: Install-Jammer (Not required by customers)\r
+set INSTALL_JAMMER_DIR=T:\gen\InstallJammer\v1_2_05\r
+\r
+@REM Third Party Tools: HTML Help compiler.\r
+set HTML_HELP_WORKSHOP_INSTALL_PATH=T:\Doxygen\HTML_Help_Workshop\10-01-2007\r
+\r
+@REM PDK Environment Setup:\r
+@call %PDK_INSTALL_PATH%\pdksetupenv.bat\r
+\r
+@REM set XDCPATH with necessary packages\r
+set XDCPATH=%XDCPATH%;%COVERITY_INSTALL_PATH%\r
+\r
+@echo TCP3D Driver Build Environment Configured \r
+@echo ------------------------------------------------\r
diff --git a/src/Module.xs b/src/Module.xs
--- /dev/null
+++ b/src/Module.xs
@@ -0,0 +1,54 @@
+/******************************************************************************\r
+ * FILE PURPOSE: TCP3D Driver Source Module specification file.\r
+ ******************************************************************************\r
+ * FILE NAME: module.xs\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the module specification for the TCP3D Driver\r
+ *\r
+ * Copyright (C) 2009, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Load the library utility. */\r
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");\r
+\r
+/* List of all the TCP3D Files for library building */\r
+var tcp3dLibFiles = [\r
+ "src/tcp3d_drv.c",\r
+ "src/tcp3d_reg.c",\r
+ "src/tcp3d_utils.c",\r
+ "src/tcp3d_betaState.c",\r
+];\r
+\r
+/* Other files for packaging */\r
+var tcp3dOtherFiles = [\r
+ "src/tcp3d_drv_priv.h",\r
+ "src/tcp3d_utils.h",\r
+];\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : modBuild\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * The function is used to build the TCP3D Driver and to add the core\r
+ * driver files to the package. \r
+ **************************************************************************/\r
+function modBuild() \r
+{\r
+ /* Build the libraries for all the targets specified. */\r
+ for (var targets=0; targets < Build.targets.length; targets++)\r
+ {\r
+ var libOptions = { incs: tcp3dIncludePath, };\r
+ \r
+ libUtility.buildLibrary (libOptions, Pkg.name, Build.targets[targets], tcp3dLibFiles);\r
+ }\r
+\r
+ /* Add all the .c files to the release package. */\r
+ for (var k = 0 ; k < tcp3dLibFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = tcp3dLibFiles[k];\r
+\r
+ /* Add all the .h files to the release package. */\r
+ for (var k = 0 ; k < tcp3dOtherFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = tcp3dOtherFiles[k];\r
+}\r
+\r
diff --git a/src/tcp3d_betaState.c b/src/tcp3d_betaState.c
--- /dev/null
+++ b/src/tcp3d_betaState.c
@@ -0,0 +1,323 @@
+/** \r
+ * \file tcp3d_betaState.c\r
+ *\r
+ * \brief Beta State calculations functions from the tail bits for TCP3D pre-process.\r
+ *\r
+ * Copyright (c) Texas Instruments Incorporated 2008\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#include <tcp3d_drv_types.h>\r
+\r
+/** \r
+ * \brief Calculates initial beta states using the tail bits for use with the\r
+ * TCP3D input configuration registers.\r
+ */\r
+void Tcp3d_betaStates(\r
+ IN int8_t * const RESTRICT tailBits,\r
+ IN int32_t signChange,\r
+ IN int32_t Kt,\r
+ OUT int8_t * const RESTRICT beta0Ptr,\r
+ OUT int8_t * const RESTRICT beta1Ptr)\r
+{\r
+ int32_t Tmp0,Tmp1,Tmp2;\r
+ int64_t llRes, llFin;\r
+ int32_t bit10, bit32, bit54, bit76, bit98, bitba;\r
+\r
+ int32_t scale;\r
+ int32_t beta0,beta1,beta2,beta3,beta4,beta5,beta6,beta7,betaMax;\r
+\r
+ if(signChange)\r
+ {\r
+ scale = 0x00800080; //+128\r
+ }\r
+ else\r
+ {\r
+ scale = 0xff80ff80; //-128\r
+ }\r
+\r
+ //Load 12 tail samples\r
+ Tmp0 = _mem4(&tailBits[0]);\r
+ Tmp1 = _mem4(&tailBits[4]);\r
+ Tmp2 = _mem4(&tailBits[8]);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ Tmp0 = _rotl(_swap4(Tmp0), 16);\r
+ Tmp1 = _rotl(_swap4(Tmp1), 16);\r
+ Tmp2 = _rotl(_swap4(Tmp2), 16);\r
+#endif\r
+\r
+ //***************************************************\r
+ //Initial Beta States Calculation for MAP 0 and MAP1\r
+ //***************************************************\r
+ //Process 4 samples\r
+ llRes = _mpysu4ll(Tmp0, 0x01010101);\r
+ llFin = _smpy2ll(_loll(llRes), scale);\r
+ bit10 = _shr2(_spack2(_hill(llFin),_loll(llFin)), 8);\r
+ llFin = _smpy2ll(_hill(llRes), scale);\r
+ bit32 = _shr2(_spack2(_hill(llFin),_loll(llFin)), 8);\r
+\r
+ //Process 4 samples\r
+ //llRes = _mpysu4ll(_hill(llTmp), 0x01010101);\r
+ llRes = _mpysu4ll(Tmp1, 0x01010101);\r
+ llFin = _smpy2ll(_loll(llRes), scale);\r
+ bit54 = _shr2(_spack2(_hill(llFin),_loll(llFin)), 8);\r
+ llFin = _smpy2ll(_hill(llRes), scale);\r
+ bit76 = _shr2(_spack2(_hill(llFin),_loll(llFin)), 8);\r
+\r
+ //Process 4 samples\r
+ llRes = _mpysu4ll(Tmp2, 0x01010101);\r
+ llFin = _smpy2ll(_loll(llRes), scale);\r
+ bit98 = _shr2(_spack2(_hill(llFin),_loll(llFin)), 8);\r
+ llFin = _smpy2ll(_hill(llRes), scale);\r
+ bitba = _shr2(_spack2(_hill(llFin),_loll(llFin)), 8);\r
+\r
+ //Compute beta state values based on the Kt (# of trellis stages)\r
+ if(Kt==3)\r
+ {\r
+ //Beta MAP0\r
+ beta0 = 0;\r
+ beta1 = _ext(bit10,16,16) + _ext(bit10,0,16); //xt0[0] + xt0[1];\r
+ beta2 = _ext(bit10,16,16) + _ext(bit32,16,16) + _ext(bit32,0,16); //xt0[0] + xt0[2] + xt0[3];\r
+ beta3 = _ext(bit10,0,16) + _ext(bit32,16,16) + _ext(bit32,0,16); //xt0[1] + xt0[2] + xt0[3];\r
+ beta4 = _ext(bit10,0,16) + _ext(bit32,16,16) + _ext(bit54,16,16) + _ext(bit54,0,16); //xt0[1] + xt0[2]+ xt0[4] + xt0[5];\r
+ beta5 = _ext(bit10,16,16) + _ext(bit32,16,16) + _ext(bit54,16,16) + _ext(bit54,0,16);//xt0[0]+ xt0[2]+ xt0[4] + xt0[5];\r
+ beta6 = _ext(bit10,16,16) + _ext(bit10,0,16) + _ext(bit32,0,16) + _ext(bit54,16,16) + _ext(bit54,0,16); //xt0[0] + xt0[1]+ xt0[3] + xt0[4] + xt0[5];\r
+ beta7 = _ext(bit32,0,16) + _ext(bit54,16,16) + _ext(bit54,0,16);// xt0[3] + xt0[4] + xt0[5];\r
+\r
+ betaMax = _max2(beta0,beta1);\r
+ betaMax = _max2(betaMax,beta2);\r
+ betaMax = _max2(betaMax,beta3);\r
+ betaMax = _max2(betaMax,beta4);\r
+ betaMax = _max2(betaMax,beta5);\r
+ betaMax = _max2(betaMax,beta6);\r
+ betaMax = _max2(betaMax,beta7);\r
+ betaMax = _ext(betaMax,16,16);\r
+ betaMax = 127 - betaMax;\r
+\r
+ beta0 = beta0 + betaMax;\r
+ beta1 = beta1 + betaMax;\r
+ beta2 = beta2 + betaMax;\r
+ beta3 = beta3 + betaMax;\r
+ beta4 = beta4 + betaMax;\r
+ beta5 = beta5 + betaMax;\r
+ beta6 = beta6 + betaMax;\r
+ beta7 = beta7 + betaMax;\r
+\r
+ beta0 = _max2(0x8000ff81, beta0);\r
+ beta1 = _max2(0x8000ff81, beta1);\r
+ beta2 = _max2(0x8000ff81, beta2);\r
+ beta3 = _max2(0x8000ff81, beta3);\r
+ beta4 = _max2(0x8000ff81, beta4);\r
+ beta5 = _max2(0x8000ff81, beta5);\r
+ beta6 = _max2(0x8000ff81, beta6);\r
+ beta7 = _max2(0x8000ff81, beta7);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta0Ptr[0]) = _packl4(_pack2(beta0,beta1),_pack2(beta2,beta3));\r
+ _mem4(&beta0Ptr[4]) = _packl4(_pack2(beta4,beta5),_pack2(beta6,beta7));\r
+#else\r
+ _mem4(&beta0Ptr[0]) = _packl4(_pack2(beta3,beta2),_pack2(beta1,beta0));\r
+ _mem4(&beta0Ptr[4]) = _packl4(_pack2(beta7,beta6),_pack2(beta5,beta4));\r
+#endif\r
+\r
+ //Beta MAP1\r
+ beta0 = 0;\r
+ beta1 = _ext(bit76,16,16) + _ext(bit76,0,16); //xt1[0] + xt1[1];\r
+ beta2 = _ext(bit76,16,16) + _ext(bit98,16,16) + _ext(bit98,0,16); //xt1[0] + xt1[2] + xt1[3];\r
+ beta3 = _ext(bit76,0,16) + _ext(bit98,16,16) + _ext(bit98,0,16); //xt1[1] + xt1[2] + xt1[3];\r
+ beta4 = _ext(bit76,0,16) + _ext(bit98,16,16) + _ext(bitba,16,16) + _ext(bitba,0,16); //xt1[1] + xt1[2]+ xt1[4] + xt1[5];\r
+ beta5 = _ext(bit76,16,16) + _ext(bit98,16,16) + _ext(bitba,16,16) + _ext(bitba,0,16);//xt1[0]+ xt1[2]+ xt1[4] + xt1[5];\r
+ beta6 = _ext(bit76,16,16) + _ext(bit76,0,16) + _ext(bit98,0,16) + _ext(bitba,16,16) + _ext(bitba,0,16); //xt1[0] + xt1[1]+ xt1[3] + xt1[4] + xt1[5];\r
+ beta7 = _ext(bit98,0,16) + _ext(bitba,16,16) + _ext(bitba,0,16);// xt1[3] + xt1[4] + xt1[5];\r
+\r
+ betaMax = _max2(beta0,beta1);\r
+ betaMax = _max2(betaMax,beta2);\r
+ betaMax = _max2(betaMax,beta3);\r
+ betaMax = _max2(betaMax,beta4);\r
+ betaMax = _max2(betaMax,beta5);\r
+ betaMax = _max2(betaMax,beta6);\r
+ betaMax = _max2(betaMax,beta7);\r
+ betaMax = _ext(betaMax,16,16);\r
+ betaMax = 127 - betaMax;\r
+\r
+ beta0 = beta0 + betaMax;\r
+ beta1 = beta1 + betaMax;\r
+ beta2 = beta2 + betaMax;\r
+ beta3 = beta3 + betaMax;\r
+ beta4 = beta4 + betaMax;\r
+ beta5 = beta5 + betaMax;\r
+ beta6 = beta6 + betaMax;\r
+ beta7 = beta7 + betaMax;\r
+\r
+ beta0 = _max2(0x8000ff81, beta0);\r
+ beta1 = _max2(0x8000ff81, beta1);\r
+ beta2 = _max2(0x8000ff81, beta2);\r
+ beta3 = _max2(0x8000ff81, beta3);\r
+ beta4 = _max2(0x8000ff81, beta4);\r
+ beta5 = _max2(0x8000ff81, beta5);\r
+ beta6 = _max2(0x8000ff81, beta6);\r
+ beta7 = _max2(0x8000ff81, beta7);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta1Ptr[0]) = _packl4(_pack2(beta0,beta1),_pack2(beta2,beta3));\r
+ _mem4(&beta1Ptr[4]) = _packl4(_pack2(beta4,beta5),_pack2(beta6,beta7));\r
+#else\r
+ _mem4(&beta1Ptr[0]) = _packl4(_pack2(beta3,beta2),_pack2(beta1,beta0));\r
+ _mem4(&beta1Ptr[4]) = _packl4(_pack2(beta7,beta6),_pack2(beta5,beta4));\r
+#endif\r
+ }\r
+ else if(Kt==2)\r
+ {\r
+ //Beta MAP0\r
+ beta0 = 0;\r
+ beta1 = _ext(bit32,16,16) + _ext(bit32,0,16); //xt0[0] + xt0[1];\r
+ beta2 = _ext(bit32,16,16) + _ext(bit54,16,16) + _ext(bit54,0,16); //xt0[0] + xt0[2] + xt0[3];\r
+ beta3 = _ext(bit32,0,16) + _ext(bit54,16,16) + _ext(bit54,0,16); //xt0[1] + xt0[2] + xt0[3];\r
+\r
+ betaMax = _max2(beta0,beta1);\r
+ betaMax = _max2(betaMax,beta2);\r
+ betaMax = _max2(betaMax,beta3);\r
+ betaMax = _ext(betaMax,16,16);\r
+ betaMax = 127 - betaMax;\r
+\r
+ beta0 = beta0 + betaMax;\r
+ beta1 = beta1 + betaMax;\r
+ beta2 = beta2 + betaMax;\r
+ beta3 = beta3 + betaMax;\r
+\r
+ beta0 = _max2(0x8000ff81, beta0);\r
+ beta1 = _max2(0x8000ff81, beta1);\r
+ beta2 = _max2(0x8000ff81, beta2);\r
+ beta3 = _max2(0x8000ff81, beta3);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta0Ptr[0]) = _packl4(_pack2(beta0,beta1),_pack2(beta2,beta3));\r
+#else\r
+ _mem4(&beta0Ptr[0]) = _packl4(_pack2(beta3,beta2),_pack2(beta1,beta0));\r
+#endif\r
+ _mem4(&beta0Ptr[4]) = 0x81818181;\r
+\r
+ //Beta MAP1\r
+ //temp\r
+ beta0 = _ext(bit98,16,16);\r
+ beta0 = _ext(bit98,0,16);\r
+ beta0 = _ext(bitba,16,16);\r
+ beta0 = _ext(bitba,0,16);\r
+\r
+ //temp\r
+ beta0 = 0;\r
+ beta1 = _ext(bit98,16,16) + _ext(bit98,0,16); //xt1[0] + xt1[1];\r
+ beta2 = _ext(bit98,16,16) + _ext(bitba,16,16) + _ext(bitba,0,16); //xt1[0] + xt1[2] + xt1[3];\r
+ beta3 = _ext(bit98,0,16) + _ext(bitba,16,16) + _ext(bitba,0,16); //xt1[1] + xt1[2] + xt1[3];\r
+\r
+ betaMax = _max2(beta0,beta1);\r
+ betaMax = _max2(betaMax,beta2);\r
+ betaMax = _max2(betaMax,beta3);\r
+ betaMax = _ext(betaMax,16,16);\r
+ betaMax = 127 - betaMax;\r
+\r
+ beta0 = beta0 + betaMax;\r
+ beta1 = beta1 + betaMax;\r
+ beta2 = beta2 + betaMax;\r
+ beta3 = beta3 + betaMax;\r
+\r
+ beta0 = _max2(0x8000ff81, beta0);\r
+ beta1 = _max2(0x8000ff81, beta1);\r
+ beta2 = _max2(0x8000ff81, beta2);\r
+ beta3 = _max2(0x8000ff81, beta3);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta1Ptr[0]) = _packl4(_pack2(beta0,beta1),_pack2(beta2,beta3));\r
+#else\r
+ _mem4(&beta1Ptr[0]) = _packl4(_pack2(beta3,beta2),_pack2(beta1,beta0));\r
+#endif\r
+ _mem4(&beta1Ptr[4]) = 0x81818181;\r
+ }\r
+ else if(Kt==1)\r
+ {\r
+ //Beta MAP0\r
+ beta0 = 0;\r
+ beta1 = _ext(bit54,16,16) + _ext(bit54,0,16); //xt0[0] + xt0[1];\r
+\r
+ betaMax = _max2(beta0,beta1);\r
+ betaMax = _ext(betaMax,16,16);\r
+ betaMax = 127 - betaMax;\r
+\r
+ beta0 = beta0 + betaMax;\r
+ beta1 = beta1 + betaMax;\r
+\r
+ beta0 = _max2(0x8000ff81, beta0);\r
+ beta1 = _max2(0x8000ff81, beta1);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta0Ptr[0]) = _packl4(_pack2(beta0,beta1),0x81818181);\r
+#else\r
+ _mem4(&beta0Ptr[0]) = _packl4(0x81818181,_pack2(beta1,beta0));\r
+#endif\r
+ _mem4(&beta0Ptr[4]) = 0x81818181;\r
+\r
+ //Beta MAP1\r
+ beta0 = 0;\r
+ beta1 = _ext(bitba,16,16) + _ext(bitba,0,16); //xt1[0] + xt1[1];\r
+\r
+ betaMax = _max2(beta0,beta1);\r
+ betaMax = _ext(betaMax,16,16);\r
+ betaMax = 127 - betaMax;\r
+\r
+ beta0 = beta0 + betaMax;\r
+ beta1 = beta1 + betaMax;\r
+\r
+ beta0 = _max2(0x8000ff81, beta0);\r
+ beta1 = _max2(0x8000ff81, beta1);\r
+\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta1Ptr[0]) = _packl4(_pack2(beta0,beta1),0x81818181);\r
+#else\r
+ _mem4(&beta1Ptr[0]) = _packl4(0x81818181,_pack2(beta1,beta0));\r
+#endif\r
+ _mem4(&beta1Ptr[4]) = 0x81818181;\r
+\r
+ }\r
+ else if(Kt==0)\r
+ {\r
+#ifdef _BIG_ENDIAN\r
+ _mem4(&beta0Ptr[0]) = 0x7f818181;\r
+ _mem4(&beta1Ptr[0]) = 0x7f818181;\r
+#else\r
+ _mem4(&beta0Ptr[0]) = 0x8181817f;\r
+ _mem4(&beta1Ptr[0]) = 0x8181817f;\r
+#endif\r
+ _mem4(&beta0Ptr[4]) = 0x81818181;\r
+ _mem4(&beta1Ptr[4]) = 0x81818181;\r
+ }\r
+}\r
+\r
+/* nothing past this line */\r
diff --git a/src/tcp3d_drv.c b/src/tcp3d_drv.c
--- /dev/null
+++ b/src/tcp3d_drv.c
@@ -0,0 +1,2297 @@
+/**\r
+ * \file tcp3d_drv.c\r
+ *\r
+ * \brief TCP3D Driver functions.\r
+ *\r
+ * Copyright (C) Texas Instruments Incorporated 2009\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/**\r
+ * Include Files\r
+ */\r
+/* TCP3D driver includes */\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+#include <ti/drv/tcp3d/src/tcp3d_drv_priv.h>\r
+\r
+/* TCP3D Types and OSAL defintions: These files can be overriden by customers\r
+ * to point to their copies. Because of this the files have not been explicitly \r
+ * specified to include the driver path.*/\r
+#include <tcp3d_drv_types.h>\r
+#include <tcp3d_osal.h>\r
+\r
+#define TWO_PATHS 0\r
+\r
+#define TPCC_REVT_REGS 0\r
+#define TPCC_L2P_REGS 1\r
+\r
+#define PING_INDEX 0\r
+#define PONG_INDEX 1\r
+\r
+/** @brief Global Variable which describes the TCP3D Driver Version Information */\r
+const char Tcp3dDrvVersionStr[] = TCP3D_DRV_VERSION_STR ":" __DATE__ ":" __TIME__;\r
+\r
+/****************************************************************************\r
+ * TCP3D Driver Functions *\r
+ ****************************************************************************/\r
+/*******************************************************************************\r
+ * Enables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
+ * in the TPCC_IESR/TPCC_IESRH.\r
+ ******************************************************************************/\r
+static void Tcp3d_enableEdmaL2pIntr(Tcp3d_Instance *inst)\r
+{\r
+#if UNTESTED_CODE\r
+ *inst->intEnSetReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong);\r
+#ifdef SIM_WORKAROUND\r
+ /**\r
+ * WORKAROUND: Current Simulator does not generate interrupt\r
+ * when there is a pending IPR bit and we enable the IER in the\r
+ * EDMA register space. So, We are forcing the EDMA to generate\r
+ * the interrupt if the IPR has valid bits. \r
+ */\r
+ if ( inst->intPendReg[TPCC_L2P_REGS] &&\r
+ (inst->l2pChMaskPing | inst->l2pChMaskPong) )\r
+ {\r
+ inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
+ }\r
+#endif\r
+#else\r
+ /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
+ inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
+ inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
+ inst->pingPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
+ inst->pongPtrL2p->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
+#endif\r
+ inst->pingL2pEnCntr++;\r
+}\r
+\r
+/*******************************************************************************\r
+ * Disables interrupt generation by EDMA CC. Sets two bits of L2P channels \r
+ * in the TPCC_IECR/TPCC_IECRH.\r
+ ******************************************************************************/\r
+static void Tcp3d_disableEdmaL2pIntr(Tcp3d_Instance *inst)\r
+{\r
+#if UNTESTED_CODE\r
+ *inst->intEnClrReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong); \r
+#else\r
+ /* Set/Clear ITCINT bit in OPT field based on drvCtrl->intrFlag */\r
+ inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
+ inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_ITCINTEN_SHIFT);\r
+ inst->pingPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
+ inst->pongPtrL2p->opt &= ~(1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
+#endif\r
+ inst->pingL2pEnCntr--;\r
+}\r
+\r
+/*******************************************************************************\r
+ * Clears pending interrupt generated by EDMA CC. Sets two bits of L2P channels \r
+ * in the TPCC_ICR/TPCC_ICRH.\r
+ ******************************************************************************/\r
+static void Tcp3d_clearEdmaL2pIntr(Tcp3d_Instance *inst)\r
+{\r
+#if UNTESTED_CODE\r
+ *inst->clrIntPendReg[TPCC_L2P_REGS] = (inst->l2pChMaskPing | inst->l2pChMaskPong); \r
+#endif\r
+ inst->pingL2pEnCntr=0;\r
+}\r
+\r
+/*******************************************************************************\r
+ * Enables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
+ * in the TPCC_IESR/TPCC_IESRH.\r
+ ******************************************************************************/\r
+static void Tcp3d_enableEdmaPauseIntr(Tcp3d_Instance *inst)\r
+{\r
+ *inst->intEnSetReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong);\r
+#ifdef SIM_WORKAROUND\r
+ /**\r
+ * WORKAROUND: Current Simulator does not generate interrupt\r
+ * when there is a pending IPR bit and we enable the IER in the\r
+ * EDMA register space. So, We are forcing the EDMA to generate\r
+ * the interrupt if the IPR has valid bits. \r
+ */\r
+ if ( inst->intPendReg[TPCC_REVT_REGS] &&\r
+ (inst->pauseChMaskPing | inst->pauseChMaskPong) )\r
+ {\r
+ inst->tpccShadowRegs->TPCC_IEVAL = 1;\r
+ }\r
+#endif\r
+ inst->pingPauseEnCntr++;\r
+}\r
+\r
+/*******************************************************************************\r
+ * Disables interrupt generation by EDMA CC. Sets two bits of REVT channels \r
+ * in the TPCC_IECR/TPCC_IECRH.\r
+ ******************************************************************************/\r
+static void Tcp3d_disableEdmaPauseIntr(Tcp3d_Instance *inst)\r
+{\r
+ *inst->intEnClrReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong); \r
+ inst->pingPauseEnCntr--;\r
+}\r
+\r
+/*******************************************************************************\r
+ * Clears pending interrupt generated by EDMA CC. Sets two bits of REVT channels \r
+ * in the TPCC_ICR/TPCC_ICRH.\r
+ ******************************************************************************/\r
+static void Tcp3d_clearEdmaPauseIntr(Tcp3d_Instance *inst)\r
+{\r
+ *inst->clrIntPendReg[TPCC_REVT_REGS] = (inst->pauseChMaskPing | inst->pauseChMaskPong); \r
+ inst->pingPauseEnCntr=0;\r
+}\r
+\r
+/**\r
+ * @brief TCP3D Driver function for providing the number of buffers\r
+ * required.\r
+ */\r
+Tcp3d_Result Tcp3d_getNumBuf (IN Tcp3d_SizeCfg *cfg,\r
+ OUT int16_t *nbufs)\r
+{\r
+ *nbufs = TCP3D_DRV_NUM_BUF;\r
+\r
+ return ( TCP3D_DRV_NO_ERR );\r
+}\r
+\r
+/**\r
+ * @brief TCP3D Driver function for providing the attributes of all the\r
+ * number of buffers requested through the structure of type\r
+ * Tcp3d_MemBuffer provided.\r
+ */\r
+Tcp3d_Result Tcp3d_getBufDesc ( IN Tcp3d_SizeCfg *cfg,\r
+ OUT Tcp3d_MemBuffer bufs[])\r
+{\r
+ bufs[TCP3D_DRV_INST_BUFN].size = sizeof(Tcp3d_Instance);\r
+ bufs[TCP3D_DRV_INST_BUFN].log2align = 2;\r
+ bufs[TCP3D_DRV_INST_BUFN].mclass = Tcp3d_BufClass_L2RAM;\r
+ bufs[TCP3D_DRV_INST_BUFN].volat = TRUE;\r
+\r
+ bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].size = (cfg->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
+ bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].log2align = 2;\r
+ bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].mclass = Tcp3d_BufClass_L2RAM;\r
+ bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].volat = TRUE;\r
+\r
+ return ( TCP3D_DRV_NO_ERR );\r
+}\r
+\r
+/**\r
+ * @brief TCP3D Driver Initialization function which must be called only\r
+ * once to initialize the driver instance and other required\r
+ * resources needed for the driver functionality.\r
+ */\r
+Tcp3d_Result Tcp3d_init( IN Tcp3d_MemBuffer bufs[],\r
+ IN Tcp3d_InitParams *drvInitParams)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ Tcp3d_Instance *tcp3dInst;\r
+ uint32_t modeReg = 0, endReg = 0, exeRegP0 = 0, exeRegP1 =0;\r
+ int32_t idx, locBufSize[TCP3D_DRV_NUM_BUF];\r
+ CSL_Tcp3d_cfgRegs *tcp3dCfgRegs;\r
+\r
+ /* Check for valid instance number */\r
+ if ( drvInitParams->instNum > TCP3D_DRV_MAX_NUM_INSTANCES )\r
+ {\r
+ /* Return error */\r
+ tcp3dResult = TCP3D_DRV_INVALID_INSTANCE_NUMBER;\r
+\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ /* compute the buffer sizes table */\r
+ locBufSize[TCP3D_DRV_INST_BUFN] = sizeof(Tcp3d_Instance);\r
+ locBufSize[TCP3D_DRV_PSEUDO_PARAM_BUFN] = (drvInitParams->maxCodeBlocks<<5)*TCP3D_DRV_LINK_CB;\r
+\r
+ /* Check if all buffers have valid addresses and sizes */\r
+ for ( idx = 0; idx < TCP3D_DRV_NUM_BUF; idx++)\r
+ {\r
+ if ( bufs[idx].base == NULL || bufs[idx].size < locBufSize[idx] )\r
+ tcp3dResult = TCP3D_DRV_INVALID_BUFF;\r
+ }\r
+\r
+ /* Initialize the instance if the buffer addresses are not NULL */\r
+ if ( tcp3dResult == TCP3D_DRV_NO_ERR )\r
+ {\r
+ /* Initialize the driver Instance */\r
+ tcp3dInst = (Tcp3d_Instance *) bufs[TCP3D_DRV_INST_BUFN].base;\r
+\r
+ /* Initialize the pseudo PaRAM array pointer */\r
+ tcp3dInst->pseudoParamBufPtr = (EDMA3_DRV_PaRAMRegs *) bufs[TCP3D_DRV_PSEUDO_PARAM_BUFN].base;\r
+ }\r
+ else\r
+ {\r
+ /* Return the error */\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ /* Get the address of TCP3D configuration registers base address */\r
+ tcp3dCfgRegs = drvInitParams->tcp3dCfgRegs;\r
+\r
+ /* Update the instace with the input parameters */\r
+ tcp3dInst->mode = drvInitParams->ctrlParams.mode;\r
+ tcp3dInst->doubleBuffer = drvInitParams->ctrlParams.doubleBuf;\r
+ tcp3dInst->edmaHnd = drvInitParams->edmaHnd;\r
+ tcp3dInst->edmaRegionId = drvInitParams->edmaRegionId;\r
+ tcp3dInst->maxCodeBlocks = drvInitParams->maxCodeBlocks;\r
+ tcp3dInst->notificationEventNum = drvInitParams->notificationEventNum;\r
+ tcp3dInst->instNum = drvInitParams->instNum;\r
+ tcp3dInst->coreId = drvInitParams->coreID;\r
+\r
+ /* Verify the REVT channels */\r
+ if ( ( drvInitParams->pingCh[0] != drvInitParams->pingConfig.revtCh ) ||\r
+ ( drvInitParams->pongCh[0] != drvInitParams->pongConfig.revtCh ) )\r
+ {\r
+ /* Return error */\r
+ tcp3dResult = TCP3D_DRV_INVALID_EDMA_CH;\r
+\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ for ( idx = 0; idx < TCP3D_DRV_MAX_CH_PER_PATH; idx++ )\r
+ {\r
+ /* Copy PING Channels */\r
+ tcp3dInst->pingCh[idx] = drvInitParams->pingCh[idx];\r
+\r
+ /* Copy PONG Channels */\r
+ tcp3dInst->pongCh[idx] = drvInitParams->pongCh[idx];\r
+ }\r
+\r
+ for ( idx = 0; idx < (TCP3D_DRV_MAX_LINK_CH>>1); idx++ )\r
+ {\r
+ /* Copy PING Channels */\r
+ tcp3dInst->pingLinkCh[idx] = drvInitParams->linkCh[idx];\r
+\r
+ /* Copy PONG Channels */\r
+ tcp3dInst->pongLinkCh[idx] = drvInitParams->linkCh[idx+(TCP3D_DRV_MAX_LINK_CH>>1)];\r
+ }\r
+\r
+ /* Set the Driver variables to defaults */\r
+ tcp3dInst->constantOne = 1;\r
+ tcp3dInst->pauseState = TCP3D_DRV_STATE_PAUSE;\r
+\r
+ /* Initialize the driver variables */\r
+ tcp3dInst->maxPingCbCnt = (tcp3dInst->maxCodeBlocks >> 1);\r
+ tcp3dInst->maxPongCbCnt = (tcp3dInst->maxCodeBlocks >> 1);\r
+ tcp3dInst->maxPingCbIdx = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
+ tcp3dInst->maxPongCbIdx = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
+\r
+ /* Reset run-time variables */\r
+ Tcp3d_resetRuntimeVariables(tcp3dInst);\r
+\r
+ /* EDMA3 - get PaRAM addresses of all physical channels */\r
+ if ( EDMA3_DRV_SOK != Tcp3d_getEdmaChParamAddr(tcp3dInst) )\r
+ {\r
+ tcp3dResult = TCP3D_DRV_FAIL_EDMA_GET_PARAM_ADDR;\r
+\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ /* Initialize the EDMA PaRAM memory for the physical channels */\r
+ if ( EDMA3_DRV_SOK != Tcp3d_initEdmaChParam(tcp3dInst) )\r
+ {\r
+ tcp3dResult = TCP3D_DRV_FAIL_EDMA_PARAM_INIT;\r
+\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ /* EDMA3 - Enable the EVENT triggered channels */\r
+ if ( EDMA3_DRV_SOK != Tcp3d_enableEdmaChannels(tcp3dInst) )\r
+ {\r
+ tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
+\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ /* Initialize the pseudo PaRAM memory */\r
+ Tcp3d_initPseudoParam ( tcp3dInst,\r
+ tcp3dInst->maxCodeBlocks,\r
+ &drvInitParams->pingConfig,\r
+ &drvInitParams->pongConfig);\r
+\r
+ /* Prepare the control registers for both P0 and P1 processes */\r
+ Tcp3d_prepControlRegs ( &drvInitParams->ctrlParams,\r
+ &modeReg,\r
+ &endReg,\r
+ &exeRegP0,\r
+ &exeRegP1);\r
+\r
+ /* \r
+ * Soft Reset the TCP3D.\r
+ * Insert NOPs b/w the reset calls in HW to work properly.\r
+ */\r
+ tcp3dCfgRegs->TCP3_SOFT_RESET = 1;\r
+ tcp3dCfgRegs->TCP3_SOFT_RESET = 0;\r
+\r
+ /**\r
+ * Write to the Control registers with the prepared values to start\r
+ * the TCP3D state machine.\r
+ */\r
+ tcp3dCfgRegs->TCP3_MODE = modeReg;\r
+ tcp3dCfgRegs->TCP3_END = endReg;\r
+ tcp3dCfgRegs->TCP3_EXE_P0 = exeRegP0;\r
+ if ( tcp3dInst->doubleBuffer != CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
+ tcp3dCfgRegs->TCP3_EXE_P1 = exeRegP1;\r
+\r
+ /* Set Local Variables used in the runtime APIs */\r
+ Tcp3d_setLocalVariables(tcp3dInst);\r
+\r
+ /* Disable the interrupts */\r
+ Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
+ Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
+\r
+ /* Clear pending interrupts */\r
+ Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
+ Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
+\r
+ /* Reset the EDMA Channels */\r
+ Tcp3d_resetEdmaChParam (tcp3dInst,\r
+ tcp3dInst->maxPingCbCnt,\r
+ tcp3dInst->maxPongCbCnt);\r
+\r
+ /* Change the state */\r
+ tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
+\r
+ return ( tcp3dResult );\r
+\r
+} /* end of - Tcp3d_init() function */\r
+\r
+/**\r
+ * @brief TCP3D Driver Deinitialization function.\r
+ */\r
+Tcp3d_Result Tcp3d_deInit ( IN Tcp3d_Instance *inst )\r
+{\r
+ /* Disable interrupts */\r
+ Tcp3d_disableEdmaL2pIntr(inst); \r
+ Tcp3d_disableEdmaPauseIntr(inst); \r
+\r
+ /* Clear pending interrupts */\r
+ Tcp3d_clearEdmaL2pIntr(inst);\r
+ Tcp3d_clearEdmaPauseIntr(inst);\r
+\r
+ return ( TCP3D_DRV_NO_ERR );\r
+}\r
+\r
+/**\r
+ * @brief TCP3D Driver function called to reset the driver at sub-frame\r
+ * boundary. This function does the following:\r
+ * 1) Set the instance with the passed values - for example number\r
+ * of blocks for decoding in this subframe which is needed to\r
+ * for checking the boundary and a new status array pointer\r
+ * where the status register values for each code block are\r
+ * trasferred.\r
+ * 2) Initialize all the run-time instance variables to default.\r
+ * 3) Initialize the pseudo PaRAM memory with all the defaults\r
+ * based on mode.\r
+ * 4) Reset the EDMA channels with default values. \r
+ */\r
+Tcp3d_Result Tcp3d_reset ( IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t codeBlocks)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+\r
+ /* First check for valid statte */\r
+ if ( ( tcp3dInst->pingStop != 1 ) && ( tcp3dInst->pongStop != 1) )\r
+ tcp3dResult = TCP3D_DRV_INVALID_STATE;\r
+\r
+ /* Check if the codeblocks value is valid */\r
+ if ( ( codeBlocks > tcp3dInst->maxCodeBlocks ) || ( codeBlocks < 2 ) )\r
+ tcp3dResult = TCP3D_DRV_INVALID_PARAMETER;\r
+\r
+ /* Return if any error found */\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
+ return ( tcp3dResult );\r
+\r
+ /* update the maxCodeBlocks and dependent variables, if needed */\r
+ if ( codeBlocks != NULL )\r
+ {\r
+ tcp3dInst->maxCodeBlocks = codeBlocks;\r
+ tcp3dInst->maxPingCbCnt = (codeBlocks >> 1);\r
+ tcp3dInst->maxPongCbCnt = (codeBlocks >> 1);\r
+ /* max position index in pseudo Param Buffer */\r
+ tcp3dInst->maxPingCbIdx = ((tcp3dInst->maxPingCbCnt - 1) << 1);\r
+ tcp3dInst->maxPongCbIdx = ((tcp3dInst->maxPongCbCnt << 1) - 1);\r
+ }\r
+\r
+ /* Reset run-time variables */\r
+ Tcp3d_resetRuntimeVariables(tcp3dInst);\r
+\r
+ /* Reset the pseudo PaRAM memory */\r
+ Tcp3d_resetPseudoParam(tcp3dInst, tcp3dInst->maxCodeBlocks);\r
+\r
+ /* Reset the EDMA Channels */\r
+ Tcp3d_resetEdmaChParam (tcp3dInst,\r
+ tcp3dInst->maxPingCbCnt,\r
+ tcp3dInst->maxPongCbCnt);\r
+\r
+ /* Disable the interrupts */\r
+ Tcp3d_disableEdmaL2pIntr(tcp3dInst);\r
+ Tcp3d_disableEdmaPauseIntr(tcp3dInst);\r
+\r
+ /* Clear pending interrupts */\r
+ Tcp3d_clearEdmaL2pIntr(tcp3dInst);\r
+ Tcp3d_clearEdmaPauseIntr(tcp3dInst);\r
+\r
+ /* Change the state */\r
+ tcp3dInst->state = TCP3D_DRV_STATE_INIT;\r
+\r
+ return ( tcp3dResult );\r
+} /* end of - Tcp3d_reset() function */\r
+\r
+/**\r
+ * @brief TCP3D Driver function for enqueuing the code blocks to the input\r
+ * list. Here the input list is a pseudo PaRAM list consisting of\r
+ * actual PaRAM entries for INCFG, LLR, HD, SD & STS transfers.\r
+ */\r
+Tcp3d_Result Tcp3d_enqueueCodeBlock(IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t blockLength,\r
+ IN uint32_t *inputConfigPtr,\r
+ IN int8_t *llrPtr,\r
+ IN uint32_t llrOffset,\r
+ IN uint32_t *hdPtr,\r
+ IN int8_t *sdPtr,\r
+ IN uint32_t sdOffset,\r
+ IN uint32_t *statusPtr,\r
+ IN uint8_t ntfEventFlag)\r
+{\r
+ EDMA3_DRV_PaRAMRegs *lastOutPrm;\r
+ int32_t blockIndex;\r
+ int32_t pathFlag;\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ Tcp3d_Result tcp3dResult2 = TCP3D_DRV_NO_ERR;\r
+ EDMA3_DRV_PaRAMRegs *prmCfg;\r
+ EDMA3_DRV_PaRAMRegs *prmLlr;\r
+ EDMA3_DRV_PaRAMRegs *prmHd;\r
+ EDMA3_DRV_PaRAMRegs *prmSts;\r
+ EDMA3_DRV_PaRAMRegs *prmSd;\r
+ EDMA3_DRV_PaRAMRegs *prevLastPrmPtr;\r
+ EDMA3_DRV_PaRAMRegs *prmWrap;\r
+ uint32_t l2pCh[2];\r
+ uint16_t revtLink[2];\r
+ uint16_t ntfdLink[2];\r
+ uint16_t ntfLink[2];\r
+ uint16_t stsLink[2];\r
+ uint16_t sdLink[2];\r
+ uint32_t wrapLink[2];\r
+\r
+ l2pCh[PING_INDEX] = tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P];\r
+ l2pCh[PONG_INDEX] = tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P];\r
+ revtLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT];\r
+ revtLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT];\r
+ ntfdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTFD];\r
+ ntfdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTFD];\r
+ ntfLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_NTF];\r
+ ntfLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_NTF];\r
+ stsLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_STS];\r
+ stsLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_STS];\r
+ sdLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_SD];\r
+ sdLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_SD];\r
+ wrapLink[PING_INDEX] = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_WRAP];\r
+ wrapLink[PONG_INDEX] = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_WRAP];\r
+\r
+#if TWO_PATHS\r
+ /* get next available path index */\r
+ pathFlag = tcp3dInst->nextCodeBlockIndex;\r
+ if ( pathFlag )\r
+ {\r
+ if ( tcp3dInst->pongFreeCnt )\r
+ {\r
+ blockIndex = tcp3dInst->nextPongInIdx;\r
+ }\r
+ else if ( tcp3dInst->pingFreeCnt )\r
+ {\r
+ blockIndex = tcp3dInst->nextPingInIdx;\r
+ pathFlag = 0;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ if ( tcp3dInst->pingFreeCnt )\r
+ {\r
+ blockIndex = tcp3dInst->nextPingInIdx;\r
+ }\r
+ else if ( tcp3dInst->pongFreeCnt )\r
+ {\r
+ blockIndex = tcp3dInst->nextPongInIdx;\r
+ pathFlag = 1;\r
+ }\r
+ }\r
+\r
+ /* update the next path flag */\r
+ if ( pathFlag )\r
+ tcp3dInst->nextCodeBlockIndex = 0;\r
+ else\r
+ tcp3dInst->nextCodeBlockIndex = 1;\r
+\r
+ /* add new block to the list until available capacity */\r
+ if ( tcp3dInst->pingFreeCnt || tcp3dInst->pongFreeCnt )\r
+#else\r
+ /* path flag from the blockIndex value */\r
+ blockIndex = tcp3dInst->nextCodeBlockIndex;\r
+ pathFlag = (blockIndex & 1);\r
+\r
+ /* add new block to the list until available capacity */\r
+ if ( ( ( pathFlag == 0 ) && tcp3dInst->pingFreeCnt ) ||\r
+ ( ( pathFlag == 1 ) && tcp3dInst->pongFreeCnt ) )\r
+#endif\r
+ {\r
+ /* Update the pointers */\r
+ prmCfg = &tcp3dInst->pseudoParamBufPtr[blockIndex*TCP3D_DRV_LINK_CB];\r
+ prmLlr = prmCfg + LINK_CH_IDX_LLR;\r
+ prmHd = prmCfg + LINK_CH_IDX_HD;\r
+ prmSts = prmCfg + LINK_CH_IDX_STS;\r
+ prmSd = prmCfg + LINK_CH_IDX_SD;\r
+ \r
+ /**\r
+ * Update addresses first\r
+ */\r
+ prmCfg->srcAddr = (uint32_t) inputConfigPtr;\r
+ prmLlr->srcAddr = (uint32_t) llrPtr;\r
+ prmHd->destAddr = (uint32_t) hdPtr;\r
+ prmSts->destAddr = (uint32_t) statusPtr;\r
+ prmSd->destAddr = (uint32_t) sdPtr;\r
+ /**\r
+ * Update counts for needed\r
+ */\r
+ prmSd->aCnt = blockLength;\r
+ if ( ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
+ ( tcp3dInst->mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
+ {\r
+ prmLlr->aCnt = (blockLength>>1);\r
+ prmLlr->srcBIdx = (blockLength>>1);\r
+ prmLlr->srcCIdx = llrOffset;\r
+ prmHd->aCnt = (blockLength>>3);\r
+ prmSd->destBIdx = sdOffset;\r
+ }\r
+ else\r
+ {\r
+ prmLlr->aCnt = COMPUTE_KOUT(blockLength);\r
+ prmLlr->srcBIdx = llrOffset;\r
+ prmHd->aCnt = COMPUTE_HD_BYTE_SIZE(blockLength);\r
+ }\r
+\r
+ /**\r
+ * Link Status & Soft decisions if avaiable.\r
+ * NOTE: For wrap-around case, load OPT & LINK fields with reset values\r
+ */\r
+ /* load HD OPT reset value */\r
+ prmHd->opt = tcp3dInst->resetHdOpt[pathFlag];\r
+ /* Check if STS is available */\r
+ if ( statusPtr != NULL )\r
+ {\r
+ /* update HD link */\r
+ prmHd->linkAddr = stsLink[pathFlag];\r
+ /* load STS OPT reset value */\r
+ prmSts->opt = tcp3dInst->resetStsOpt[pathFlag];\r
+ /* Check if SD is available */\r
+ if ( sdPtr != NULL )\r
+ {\r
+ /* load SD OPT reset value */\r
+ prmSd->opt = tcp3dInst->resetSdOpt[pathFlag];\r
+ /* update Status link */\r
+ prmSts->linkAddr = sdLink[pathFlag];\r
+ /* load SD link reset value */\r
+ prmSd->linkAddr = tcp3dInst->resetSdLink[pathFlag];\r
+ /* last param pointer */\r
+ lastOutPrm = prmSd;\r
+ }\r
+ else\r
+ {\r
+ /* link reset value */\r
+ prmSts->linkAddr = tcp3dInst->resetStsLink[pathFlag];\r
+ /* last param pointer */\r
+ lastOutPrm = prmSts;\r
+ }\r
+ }\r
+ else if ( sdPtr != NULL )\r
+ {\r
+ /* update HD link */\r
+ prmHd->linkAddr = sdLink[pathFlag];\r
+ /* load SD OPT reset value */\r
+ prmSd->opt = tcp3dInst->resetSdOpt[pathFlag];\r
+ /* load SD link reset value */\r
+ prmSd->linkAddr = tcp3dInst->resetSdLink[pathFlag];\r
+ /* last param pointer */\r
+ lastOutPrm = prmSd;\r
+ }\r
+ else\r
+ {\r
+ /* load HD link reset value */\r
+ prmHd->linkAddr = tcp3dInst->resetHdLink[pathFlag];\r
+ /* last param pointer */\r
+ lastOutPrm = prmHd;\r
+ }\r
+\r
+ /* Add the WRAP param at the end of the output PaRAM */\r
+ if ( blockIndex >= (tcp3dInst->maxCodeBlocks-2) )\r
+ {\r
+ /* get the pointer for the wrap param for the appropriate path */\r
+ prmWrap = (EDMA3_DRV_PaRAMRegs *) wrapLink[pathFlag];\r
+ /* link with last out param */\r
+ lastOutPrm->linkAddr = 0xFFFF & wrapLink[pathFlag];\r
+ /* change the last param pointer */\r
+ lastOutPrm = prmWrap;\r
+ }\r
+\r
+ /**\r
+ * If Interrupt nofication is requested, change the default link \r
+ * to LINK_CH_IDX_NTF for the last PaRAM.\r
+ */\r
+ if ( ntfEventFlag )\r
+ {\r
+ lastOutPrm->linkAddr = ntfLink[pathFlag];\r
+ }\r
+\r
+ /**\r
+ * Chain the block to previous one in each path. This is done for blocks\r
+ * starting from the second one in each path.\r
+ * \r
+ * Since the blockIndex is tracking linearly the pseudo param buffer\r
+ * and ping & pong lists are used as interleaved lists, chaining is\r
+ * done starting from index 2 onwards till max.\r
+ */\r
+ if ( blockIndex > 1 )\r
+ {\r
+ /* Get the previous last output PaRAM, used in chaining */\r
+ prevLastPrmPtr = tcp3dInst->lastParam[pathFlag];\r
+ \r
+ /* Change the TCC to L2P */\r
+ CSL_FINS(prevLastPrmPtr->opt, TPCC_PARAM_OPT_TCC, l2pCh[pathFlag]);\r
+\r
+ /**\r
+ * If previous block has notification, change the previous param\r
+ * link to NTFD, otherwise change to dummy REVT link PaRAM.\r
+ */\r
+ if ( tcp3dInst->prevNtfFlag[pathFlag] )\r
+ {\r
+ /* Change the LINK to interrupt Notify PaRAM */\r
+ prevLastPrmPtr->linkAddr = ntfdLink[pathFlag];\r
+ }\r
+ else\r
+ {\r
+ /* Change the LINK to dummy REVT PaRAM */\r
+ prevLastPrmPtr->linkAddr = revtLink[pathFlag];\r
+ }\r
+ }\r
+\r
+ /* Store ntfEventFlag, used in chaining next block */\r
+ tcp3dInst->prevNtfFlag[pathFlag] = ntfEventFlag;\r
+\r
+ /* Store the last output PaRAM, used in chaining next block */\r
+ tcp3dInst->lastParam[pathFlag] = lastOutPrm;\r
+\r
+ /* Increment the ping/pong load counter */\r
+ if ( pathFlag )\r
+ {\r
+ tcp3dInst->pongLoadCnt++;\r
+ tcp3dInst->pongFreeCnt--;\r
+ tcp3dInst->nextPongInIdx += 2;\r
+ }\r
+ else\r
+ {\r
+ tcp3dInst->pingLoadCnt++;\r
+ tcp3dInst->pingFreeCnt--;\r
+ tcp3dInst->nextPingInIdx += 2;\r
+ }\r
+\r
+ /* Reset index when reached maximum */\r
+ if ( tcp3dInst->nextPingInIdx > tcp3dInst->maxPingCbIdx )\r
+ {\r
+ tcp3dInst->nextPingInIdx = 0;\r
+ }\r
+ if ( tcp3dInst->nextPongInIdx > tcp3dInst->maxPongCbIdx )\r
+ {\r
+ tcp3dInst->nextPongInIdx = 1;\r
+ }\r
+\r
+#if !TWO_PATHS\r
+ /* Increment the index value until reaching the last block */\r
+ tcp3dInst->nextCodeBlockIndex++;\r
+\r
+ /* Reset index when reached maximum */\r
+ if ( tcp3dInst->nextCodeBlockIndex >= tcp3dInst->maxCodeBlocks )\r
+ {\r
+ tcp3dInst->nextCodeBlockIndex = 0;\r
+ }\r
+#endif\r
+ } /* if enqueue possible */\r
+ else\r
+ {\r
+ tcp3dResult = TCP3D_DRV_INPUT_LIST_FULL;\r
+ } /* if enqueue not possible */\r
+\r
+ /* Call Start function as needed */\r
+ if ( ( tcp3dInst->startFlag ) &&\r
+ ( (tcp3dInst->pingStop) || (tcp3dInst->pongStop) ) )\r
+ {\r
+ tcp3dResult2 = Tcp3d_start(tcp3dInst, TCP3D_DRV_START_AUTO);\r
+\r
+ /* If start returned an error, generate an error message. */\r
+ if ( TCP3D_DRV_NO_ERR != tcp3dResult2 )\r
+ {\r
+ Tcp3d_osalLog("Enqueue: Tcp3d_start function returned error with value : %d\n", tcp3dResult2);\r
+ }\r
+ }\r
+\r
+ return ( tcp3dResult );\r
+} /* end of - Tcp3d_enqueueCodeBlock() function */\r
+\r
+/**\r
+ * @brief This API could be used for starting the driver to start doing\r
+ * EDMA transfers to TCP3 decoder for decoding from the pseudo\r
+ * PaRAM list.\r
+ *\r
+ * This function is executed at the application task thread for\r
+ * starting either the PING or PONG path execution.\r
+ */\r
+Tcp3d_Result Tcp3d_start ( INOUT Tcp3d_Instance *inst,\r
+ IN uint8_t startMode)\r
+{\r
+ EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
+ EDMA3_DRV_PaRAMRegs *currPrmPtr1, *currPrmPtr2;\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ uint16_t startNeeded = 0; /* 0 - not started, 1 - started */ \r
+ int32_t pingOutIdx, pongOutIdx;\r
+\r
+ /* Set startFlag if first call to the function is made with AUTO mode */\r
+ if ( ( startMode == TCP3D_DRV_START_AUTO) && ( !inst->startFlag ) )\r
+ {\r
+ inst->startFlag = startMode;\r
+ }\r
+\r
+ /**\r
+ * Return immediately, if both stop flags are not set.\r
+ * This is possible in two scenarios\r
+ * 1) After the init and before calling start with AUTO mode.\r
+ * 2) In steady state when both ping and pong decoders are busy. \r
+ */\r
+ if ( ( ( inst->pingStop == NULL ) && ( inst->pongStop == NULL ) ) ||\r
+ ( !inst->startFlag ) )\r
+ {\r
+ return ( tcp3dResult );\r
+ }\r
+\r
+ /**\r
+ * Check startMode parameter to see if start needed\r
+ */\r
+ if ( startMode == TCP3D_DRV_START_AUTO )\r
+ {\r
+ /**\r
+ * Read the source address of L2P Channel PaRAM to get the current\r
+ * pseudo PaRAM pointer for PING/PONG paths. Then compare with the start\r
+ * pointer to get the out indexes.\r
+ */\r
+ currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
+ currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
+ pingOutIdx = GET_CB_IDX(currPrmPtr1 - inst->startPrmPtr);\r
+ pongOutIdx = GET_CB_IDX(currPrmPtr2 - inst->startPrmPtr);\r
+\r
+ /* Update the counters and indexes using the current out indexes */\r
+ Tcp3d_updateListVariables( inst, pingOutIdx, pongOutIdx );\r
+ \r
+ /**\r
+ * Start is needed in the following cases.\r
+ * - if the current out index is less than next in index\r
+ * - if not, in the wrap case when blocks are loaded from beginning\r
+ * of the list where out index could be greater than next in index.\r
+ * Here check for the load count.\r
+ * \r
+ * Two LSB bits of the variable startNeeded are used for indicating the\r
+ * need to do start. LSB0 is used for PING and LSB1 is used for PONG. \r
+ */\r
+ /* PING STOP */\r
+ if ( inst->pingStop )\r
+ {\r
+ if ( pingOutIdx < inst->nextPingInIdx )\r
+ {\r
+ startNeeded |= 1;\r
+ }\r
+ else if ( inst->pingLoadCnt > 0 )\r
+ {\r
+ startNeeded |= 1;\r
+ }\r
+ }\r
+\r
+ /* PING STOP */\r
+ if ( inst->pongStop )\r
+ {\r
+ if ( pongOutIdx < inst->nextPongInIdx )\r
+ {\r
+ startNeeded |= 2;\r
+ }\r
+ else if ( inst->pongLoadCnt > 0 )\r
+ {\r
+ startNeeded |= 2;\r
+ }\r
+ }\r
+ }\r
+ else if ( ( startMode == TCP3D_DRV_START_PING ) && ( inst->pingStop ) )\r
+ {\r
+ startNeeded |= 1;\r
+ }\r
+ else if ( ( startMode == TCP3D_DRV_START_PONG ) && ( inst->pongStop ) )\r
+ {\r
+ startNeeded |= 2;\r
+ }\r
+\r
+ /* If LSB0 is set, start PING */\r
+ if ( startNeeded & 0x1 )\r
+ {\r
+ /**\r
+ * Clear the wrap adjust flags,\r
+ * when the last block decoding in the ping list is detected.\r
+ */\r
+ if (inst->pingLastOutFlag)\r
+ {\r
+ inst->pingLastOutFlag = 0;\r
+ inst->pingWrapCheck = 1;\r
+ }\r
+\r
+ /* increment counter */\r
+ inst->pingStartCntr++;\r
+ /* Clear the stop flag */\r
+ inst->pingStop = 0;\r
+ /* Enable L2P channel in the PING path */\r
+ result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
+ inst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
+ EDMA3_DRV_TRIG_MODE_MANUAL);\r
+ }\r
+\r
+ /* If LSB1 is set, start PONG */\r
+ if ( startNeeded & 0x2 )\r
+ {\r
+ /**\r
+ * Clear the wrap adjust flags,\r
+ * when the last block decoding in the pong list is detected.\r
+ */\r
+ if (inst->pongLastOutFlag)\r
+ {\r
+ inst->pongLastOutFlag = 0;\r
+ inst->pongWrapCheck = 1;\r
+ }\r
+\r
+ /* increment counter */\r
+ inst->pongStartCntr++;\r
+ /* Clear the stop flag */\r
+ inst->pongStop = 0;\r
+\r
+ /* Enable L2P channel in the PONG path */\r
+ result |= EDMA3_DRV_enableTransfer( inst->edmaHnd,\r
+ inst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
+ EDMA3_DRV_TRIG_MODE_MANUAL);\r
+ }\r
+\r
+ /* Update the return status, if any EDMA starts fail */\r
+ if ( result != EDMA3_DRV_SOK )\r
+ {\r
+ tcp3dResult = TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL;\r
+ }\r
+\r
+ /* Change the state to RUNNING, if start successful */\r
+ if ( ( startNeeded ) && ( result == EDMA3_DRV_SOK ) )\r
+ {\r
+ inst->state = TCP3D_DRV_STATE_RUNNING;\r
+ }\r
+\r
+ return ( tcp3dResult );\r
+\r
+} /* end of - Tcp3d_start() function */\r
+\r
+/**\r
+ * @brief This API could be used for querying the TCP3D driver to get\r
+ * updates or take appropriate actions.\r
+ * \r
+ * \note This API is not fully scoped currently and the possible query\r
+ * commands and their actions are open as of now.\r
+ */\r
+Tcp3d_Result Tcp3d_status ( IN Tcp3d_Instance *inst,\r
+ INOUT Tcp3d_Sts *drvStatus )\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ EDMA3_DRV_PaRAMRegs *currPrmPtr1, *currPrmPtr2;\r
+\r
+ /* Check the control command */\r
+ switch ( drvStatus->cmd )\r
+ {\r
+ case TCP3D_DRV_GET_STATE :\r
+ /* Read state value from driver instance */\r
+ drvStatus->state = inst->state;\r
+ break;\r
+\r
+ case TCP3D_DRV_GET_MIN_OUT_IDX:\r
+ /**\r
+ * Get the L2P Channel PaRAM address and then read the source\r
+ * address from the PaRAM to get the index to the pseudo PaRAM\r
+ * current read pointer.\r
+ * \r
+ * Compute the minimum index by comparing the current indexes with\r
+ * the pseudo PaRAM start pointer.\r
+ */\r
+ currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
+ currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
+ drvStatus->prmOutIdx = (MIN(currPrmPtr1, currPrmPtr2) - inst->startPrmPtr)>>2;\r
+ break;\r
+\r
+ case TCP3D_DRV_GET_PING_OUT_IDX:\r
+ /**\r
+ * Read the source address of L2P Channel PaRAM to get the current\r
+ * pseudo PaRAM pointer for PING path. Then compare with the start\r
+ * pointer for the index.\r
+ */\r
+ currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
+ drvStatus->prmOutIdx = (currPrmPtr1 - inst->startPrmPtr)>>2;\r
+ break;\r
+\r
+ case TCP3D_DRV_GET_PONG_OUT_IDX:\r
+ /**\r
+ * Read the source address of L2P Channel PaRAM to get the current\r
+ * pseudo PaRAM pointer for PONG path. Then compare with the start\r
+ * pointer for the index.\r
+ */\r
+ currPrmPtr2 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
+ drvStatus->prmOutIdx = (currPrmPtr2 - inst->startPrmPtr)>>2;\r
+ break;\r
+\r
+ default:\r
+ /* If invalid command passed, flag error */\r
+ tcp3dResult = TCP3D_DRV_FAIL;\r
+ break;\r
+ }\r
+\r
+ return (tcp3dResult);\r
+\r
+} /* end of - Tcp3d_status() function */\r
+\r
+/**\r
+ * \brief This API could be used for change or update the TCP3D driver\r
+ * instance values which are set during the init time.\r
+ * \r
+ * Currently, there are few commands supported with some the\r
+ * limitation that they are allowed only when the driver is in\r
+ * IDLE state.\r
+ * \r
+ * \note -# This API is not fully scoped currently and the possible\r
+ * control commands and their actions are open as of now.\r
+ * -# We may need to protect the instance value updations, once\r
+ * they are allowed to change in any state.\r
+ */\r
+Tcp3d_Result Tcp3d_control (IN Tcp3d_Instance *inst,\r
+ IN Tcp3d_Ctrl *drvCtrl)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+\r
+ /* Check the control command */\r
+ switch ( drvCtrl->cmd )\r
+ {\r
+ case TCP3D_DRV_SET_L2P_INT :\r
+ if ( drvCtrl->intrFlag )\r
+ {\r
+ Tcp3d_enableEdmaL2pIntr(inst);\r
+ }\r
+ else\r
+ { \r
+ Tcp3d_disableEdmaL2pIntr(inst);\r
+ }\r
+ break;\r
+ case TCP3D_DRV_SET_REVT_INT :\r
+ if ( drvCtrl->intrFlag )\r
+ {\r
+ Tcp3d_enableEdmaPauseIntr(inst);\r
+ }\r
+ else\r
+ { \r
+ Tcp3d_disableEdmaPauseIntr(inst);\r
+ }\r
+ break;\r
+\r
+ case TCP3D_DRV_CLR_REVT_INT :\r
+ Tcp3d_clearEdmaPauseIntr(inst);\r
+ break;\r
+\r
+ case TCP3D_DRV_SET_PING_L2P_INT :\r
+ case TCP3D_DRV_SET_PONG_L2P_INT :\r
+ case TCP3D_DRV_SET_PING_PAUSE_INT :\r
+ case TCP3D_DRV_SET_PONG_PAUSE_INT :\r
+ default:\r
+ /* If invalid command passed, flag error */\r
+ tcp3dResult = TCP3D_DRV_FAIL;\r
+ break;\r
+ }\r
+\r
+ return (tcp3dResult);\r
+\r
+} /* end of - Tcp3d_control() function */\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+static void Tcp3d_setLocalVariables (IN Tcp3d_Instance *tcp3dInst)\r
+{\r
+ CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMACC_2_REGS;\r
+ EDMA3_DRV_PaRAMRegs *prm;\r
+\r
+ /* Set EDMA PaRAM pointers */\r
+ tcp3dInst->startPrmPtr = (EDMA3_DRV_PaRAMRegs *) L2GLBMAP(tcp3dInst->coreId, \\r
+ tcp3dInst->pseudoParamBufPtr);\r
+ tcp3dInst->pingPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pingChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
+ tcp3dInst->pongPtrL2p = (EDMA3_DRV_PaRAMRegs *) tcp3dInst->pongChParamAddr[TCP3D_DRV_CH_IDX_L2P];\r
+\r
+ /* Store pointers for the end of list (PING starts first in the list)*/\r
+ prm = &tcp3dInst->pseudoParamBufPtr[(tcp3dInst->maxCodeBlocks-2)*TCP3D_DRV_LINK_CB];\r
+ if ( tcp3dInst->maxCodeBlocks % 1 )\r
+ { /* even */\r
+ tcp3dInst->endListParam[PING_INDEX] = prm;\r
+ tcp3dInst->endListParam[PONG_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
+ }\r
+ else\r
+ { /* odd */\r
+ tcp3dInst->endListParam[PING_INDEX] = prm+TCP3D_DRV_LINK_CB;\r
+ tcp3dInst->endListParam[PONG_INDEX] = prm;\r
+ }\r
+\r
+ /**\r
+ * Set interrupt enable/disable mask for channels using the shadow region\r
+ * registers.\r
+ */\r
+ /* Get EDMA Controller shadow registers pointer */\r
+ tcp3dInst->tpccShadowRegs = &tpcc2Regs->SHADOW[tcp3dInst->edmaRegionId];\r
+ /* REVT channel mask and registers (for PAUSE interrupt) */\r
+ tcp3dInst->pauseChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
+ tcp3dInst->pauseChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT] & 0x1f);\r
+ if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT] < 32 )\r
+ {\r
+ tcp3dInst->intEnClrReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
+ tcp3dInst->intEnSetReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
+ tcp3dInst->clrIntPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
+ tcp3dInst->intPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
+ }\r
+ else\r
+ {\r
+ tcp3dInst->intEnClrReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
+ tcp3dInst->intEnSetReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
+ tcp3dInst->clrIntPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
+ tcp3dInst->intPendReg[TPCC_REVT_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
+ }\r
+ /* L2P channel mask and registers (for L2P interrupt) */\r
+ tcp3dInst->l2pChMaskPing = 1 << (tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
+ tcp3dInst->l2pChMaskPong = 1 << (tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P] & 0x1f);\r
+ if ( tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P] < 32 )\r
+ {\r
+ tcp3dInst->intEnClrReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECR;\r
+ tcp3dInst->intEnSetReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESR;\r
+ tcp3dInst->clrIntPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICR;\r
+ tcp3dInst->intPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPR;\r
+ }\r
+ else\r
+ {\r
+ tcp3dInst->intEnClrReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IECRH;\r
+ tcp3dInst->intEnSetReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IESRH;\r
+ tcp3dInst->clrIntPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_ICRH;\r
+ tcp3dInst->intPendReg[TPCC_L2P_REGS] = (uint32_t *) &tcp3dInst->tpccShadowRegs->TPCC_IPRH;\r
+ }\r
+\r
+ /* Clear countes */\r
+ tcp3dInst->pingStartCntr = 0;\r
+ tcp3dInst->pongStartCntr = 0;\r
+ tcp3dInst->pingPauseEnCntr = 0;\r
+ tcp3dInst->pingL2pEnCntr = 0;\r
+ tcp3dInst->pingIntr = 0;\r
+ tcp3dInst->pongIntr = 0;\r
+}\r
+\r
+static void Tcp3d_resetRuntimeVariables (IN Tcp3d_Instance *tcp3dInst)\r
+{\r
+ /* Initialize the driver instace run-time variables */\r
+ tcp3dInst->nextCodeBlockIndex = 0;\r
+ tcp3dInst->pingStop = 1;\r
+ tcp3dInst->pongStop = 1;\r
+ tcp3dInst->startFlag = 0;\r
+ tcp3dInst->prevNtfFlag[PING_INDEX] = 0;\r
+ tcp3dInst->prevNtfFlag[PONG_INDEX] = 0;\r
+ tcp3dInst->pingLoadCnt = 0;\r
+ tcp3dInst->pongLoadCnt = 0;\r
+ tcp3dInst->prevPingOutIdx = 0;\r
+ tcp3dInst->prevPongOutIdx = 1;\r
+ tcp3dInst->nextPingInIdx = 0;\r
+ tcp3dInst->nextPongInIdx = 1;\r
+ tcp3dInst->pingWrapCheck = 1;\r
+ tcp3dInst->pongWrapCheck = 1;\r
+ tcp3dInst->pingLastOutFlag = 0;\r
+ tcp3dInst->pongLastOutFlag = 0;\r
+ tcp3dInst->pingFreeCnt = tcp3dInst->maxPingCbCnt;\r
+ tcp3dInst->pongFreeCnt = tcp3dInst->maxPongCbCnt;\r
+}\r
+\r
+static void Tcp3d_updateListVariables ( INOUT Tcp3d_Instance *inst,\r
+ IN int32_t pingOutIdx,\r
+ IN int32_t pongOutIdx )\r
+{\r
+ int32_t indexDiff1, indexDiff2;\r
+\r
+ /**\r
+ * Load count adjustment is done following the steps described below.\r
+ * \r
+ * step1 : get index difference between current and previous indexes\r
+ * step2 : convert the index difference to count\r
+ * step3 : reduce the load count by index difference. It is possible that\r
+ * the diffrence could be negative, which gets corrected after\r
+ * step4 is completed.\r
+ * step4 : wrap is detected, reduce the load count by maximum one time.\r
+ * The wrap detection is done either of the cases.\r
+ * 1) when index difference is negative\r
+ * 2) the last block decoding is detected\r
+ * \r
+ * NOTES:\r
+ * - At reset/init, checking for wrap is enabled.\r
+ * - Once the adjustment is done, checking is disabled until the last\r
+ * block decoding is done.\r
+ */\r
+\r
+ /* Adjust the loaded count - PING */\r
+ /* step1 */\r
+ indexDiff1 = ( pingOutIdx - inst->prevPingOutIdx );\r
+ /* step2, step3 */\r
+ inst->pingLoadCnt -= (indexDiff1>>1);\r
+ /* step4 */\r
+ if ( ( (indexDiff1 < 0) || (inst->pingLastOutFlag) ) && (inst->pingWrapCheck) )\r
+ {\r
+ inst->pingLoadCnt -= inst->maxPingCbCnt;\r
+ inst->pingWrapCheck = 0;\r
+ }\r
+\r
+ /* Adjust the loaded count - PING */\r
+ /* step1 */\r
+ indexDiff2 = ( pongOutIdx - inst->prevPongOutIdx );\r
+ /* step2, step3 */\r
+ inst->pongLoadCnt -= (indexDiff2>>1);\r
+ /* step4 */\r
+ if ( ( (indexDiff2 < 0) || (inst->pongLastOutFlag) ) && (inst->pongWrapCheck) )\r
+ {\r
+ inst->pongLoadCnt -= inst->maxPongCbCnt;\r
+ inst->pongWrapCheck = 0;\r
+ }\r
+\r
+ /* update free counts - can be negative */\r
+ inst->pingFreeCnt = ( inst->maxPingCbCnt - inst->pingLoadCnt );\r
+ inst->pongFreeCnt = ( inst->maxPongCbCnt - inst->pongLoadCnt );\r
+\r
+ /* update previous out index */\r
+ inst->prevPingOutIdx = pingOutIdx;\r
+ inst->prevPongOutIdx = pongOutIdx;\r
+}\r
+\r
+/**\r
+ * @brief Function to get the physical addresses of all the EDMA3 channels\r
+ * used in TCP3D driver. \r
+ */\r
+static EDMA3_DRV_Result Tcp3d_getEdmaChParamAddr(IN Tcp3d_Instance *tcp3dInst)\r
+{ \r
+ EDMA3_DRV_Result result = EDMA3_DRV_SOK; \r
+ int32_t cnt;\r
+\r
+ for ( cnt = 0; cnt < TCP3D_DRV_MAX_CH_PER_PATH; cnt++ )\r
+ {\r
+ /* Get PaRAM address for PING physical channel */ \r
+ result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingCh[cnt],\r
+ &tcp3dInst->pingChParamAddr[cnt]);\r
+ \r
+ /* Get PaRAM address for PONG physical channel */ \r
+ result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongCh[cnt],\r
+ &tcp3dInst->pongChParamAddr[cnt]);\r
+ }\r
+\r
+ for ( cnt = 0; cnt < (TCP3D_DRV_MAX_LINK_CH>>1); cnt++ )\r
+ {\r
+ /* Get PaRAM address for PING Link channel */ \r
+ result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[cnt],\r
+ &tcp3dInst->pingLinkChParamAddr[cnt]);\r
+ \r
+ /* Get PaRAM address for PONG link channel */ \r
+ result |= EDMA3_DRV_getPaRAMPhyAddr(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[cnt],\r
+ &tcp3dInst->pongLinkChParamAddr[cnt]);\r
+ }\r
+\r
+ return ( result );\r
+\r
+} /* end of - Tcp3d_getEdmaChParamAddr() function */\r
+\r
+/**\r
+ * @brief Enabling the Event triggered EDMA3 channels \r
+ */\r
+static EDMA3_DRV_Result Tcp3d_enableEdmaChannels(Tcp3d_Instance *tcp3dInst)\r
+{\r
+ EDMA3_DRV_Result result = EDMA3_DRV_SOK;\r
+ \r
+ /* Enable PING channels */\r
+ result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ EDMA3_DRV_TRIG_MODE_EVENT);\r
+\r
+ /* Enable PoNG channels */\r
+ result |= EDMA3_DRV_enableTransfer( tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ EDMA3_DRV_TRIG_MODE_EVENT);\r
+\r
+ return ( result );\r
+} /* end of - Tcp3d_enableEdmaChannels() function */ \r
+\r
+/**\r
+ * @brief Initialize the EDMA channels PaRAM memory with default values\r
+ */\r
+static EDMA3_DRV_Result Tcp3d_initEdmaChParam (IN Tcp3d_Instance *tcp3dInst)\r
+{\r
+ EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0,0};\r
+ EDMA3_DRV_PaRAMRegs *prm = ¶mSet;\r
+ EDMA3_DRV_Result status = EDMA3_DRV_SOK;\r
+ CSL_CPINTC_RegsOvly cpintc0Regs = (CSL_CPINTC_RegsOvly) CSL_CIC_0_REGS;\r
+\r
+ /* Channel - REVT 0 (dummy PaRAM) */\r
+ /* chain to REVT 0\r
+ link to ping link cfg channel \r
+ A-sync\r
+ ACNT = 1\r
+ BCNT = 0\r
+ CCNT = 0\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ /* First set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_EARLY,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ prm->opt = 0;\r
+ /* Enable Final transfer completion chain */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Early Trasfer Completion */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ /* Src & Dest are in INCR modes */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+#endif\r
+ prm->srcAddr = NULL;\r
+ prm->destAddr = NULL;\r
+ prm->aCnt = 1;\r
+ prm->bCnt = 0;\r
+ prm->cCnt = 0;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ prm);\r
+\r
+ /* Link Channel - set the reload Link PaRAM */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_REVT],\r
+ prm);\r
+\r
+ /* Copy to use in reset function */\r
+ memcpy(&tcp3dInst->revtPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
+\r
+ /* Channel - REVT 1 (dummy PaRAM) */\r
+ /* chain to REVT 1\r
+ link to ping link cfg channel \r
+ A-sync\r
+ ACNT = 1\r
+ BCNT = 1\r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ prm);\r
+\r
+ /* Link Channel - set the reload Link PaRAM */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_REVT],\r
+ prm);\r
+\r
+ /* Copy to use in reset */\r
+ memcpy(&tcp3dInst->revtPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
+\r
+ /* Channel - L2P 0 */\r
+ /* chain to REVT 0\r
+ link to ping link l2p channel \r
+ AB-sync\r
+ ACNT = 32\r
+ BCNT = 4\r
+ CCNT = pingNumCBs\r
+ scrBIDX = 32\r
+ desBIDX = 32\r
+ scrCIDX = 32*4*2\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_EN,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_AB,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ prm->opt = 0;\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* AB Sync Transfer Mode */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ /* Src & Dest are in INCR modes */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+#endif\r
+ prm->srcAddr = NULL;\r
+ prm->destAddr = (uint32_t)(tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
+ prm->aCnt = 32;\r
+ prm->bCnt = TCP3D_DRV_LINK_CB;\r
+ prm->cCnt = NULL;\r
+ prm->bCntReload = TCP3D_DRV_LINK_CB;\r
+ prm->srcBIdx = 32;\r
+ prm->destBIdx = 32;\r
+ prm->srcCIdx = (32<<1)*TCP3D_DRV_LINK_CB;\r
+ prm->destCIdx = 0;\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_L2P]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
+ prm);\r
+\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
+ prm);\r
+\r
+ /* Copy to use in reset function */\r
+ memcpy(&tcp3dInst->l2pPrm[PING_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
+\r
+ /* Channel - L2P 1 */\r
+ /* chain to REVT 1\r
+ link to ping link l2p channel \r
+ AB-sync\r
+ ACNT = 32\r
+ BCNT = 4\r
+ CCNT = pingNumCBs\r
+ scrBIDX = 32\r
+ desBIDX = 32\r
+ scrCIDX = 32*4*2\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ prm->destAddr = (uint32_t)(tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG]);\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_L2P]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
+ prm);\r
+\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
+ prm);\r
+\r
+ /* Copy to use in reset function */\r
+ memcpy(&tcp3dInst->l2pPrm[PONG_INDEX], prm, sizeof(EDMA3_DRV_PaRAMRegs));\r
+\r
+ /* Link Channel - pause 0 */\r
+ /* chain to REVT 0\r
+ link to ping link revt channel \r
+ AB-sync\r
+ ACNT = 1\r
+ BCNT = 2\r
+ CCNT = 1 \r
+ scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
+ scrCIDX = 0\r
+ desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_DIS,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_EN,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_AB,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ prm->opt = 0;\r
+ /* Enable Intermediate & Final transfer completion interrupt */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCINTEN_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* AB Sync Transfer Mode */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ /* Src & Dest are in INCR modes */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+#endif\r
+ prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->constantOne);\r
+ prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingStop);\r
+ prm->aCnt = 1;\r
+ prm->bCnt = 2;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = ((uint8_t *)&tcp3dInst->pauseState - &tcp3dInst->constantOne);\r
+ prm->destBIdx = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pingStop);\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_REVT]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_PAUSE],\r
+ prm);\r
+\r
+ /* Link Channel - pause 1 */\r
+ /* chain to REVT 1\r
+ link to ping link revt channel \r
+ AB-sync\r
+ ACNT = 1\r
+ BCNT = 2\r
+ CCNT = 1 \r
+ scrBIDX = offset b/w tcp3dInst->pauseState & tcp3dInst->constantOne\r
+ scrCIDX = 0\r
+ desBIDX = offet b/w tcp3dInst->state & tcp3dInst->pingStop\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongStop);\r
+ prm->destBIdx = ((uint8_t *)&tcp3dInst->state - &tcp3dInst->pongStop);\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_REVT]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_PAUSE],\r
+ prm);\r
+\r
+ /* Link Channel - INT 0 (notification PaRAM) */\r
+ /* chain to REVT 0\r
+ link to ping link cfg channel \r
+ A-sync\r
+ ACNT = 4\r
+ BCNT = 1\r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ /* First set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_EARLY,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ prm->opt = 0;\r
+ /* Enable Final transfer completion chain */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Early Trasfer Completion */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCMOD_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ /* Src & Dest are in INCR modes */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+#endif\r
+ prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->notificationEventNum);\r
+ prm->destAddr = (uint32_t)(&cpintc0Regs->STATUS_SET_INDEX_REG);\r
+ prm->aCnt = 4;\r
+ prm->bCnt = 1;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+ prm->linkAddr = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_NTF],\r
+ prm);\r
+\r
+ prm->linkAddr = tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_INCFG];\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_NTFD],\r
+ prm);\r
+\r
+ /* Link Channel - INT 1 (notification PaRAM) */\r
+ /* chain to REVT 1\r
+ link to ping link cfg channel \r
+ A-sync\r
+ ACNT = 4\r
+ BCNT = 1\r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ prm->linkAddr = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE];\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_NTF],\r
+ prm);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ prm->linkAddr = tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_INCFG];\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_NTFD],\r
+ prm);\r
+\r
+ /* Link Channel - Wrap 0 */\r
+ /* chain to REVT 0\r
+ link to ping link l2p channel \r
+ A-sync\r
+ ACNT = 4\r
+ BCNT = 1\r
+ CCNT = 1 \r
+ scrBIDX = 0\r
+ scrCIDX = 0\r
+ desBIDX = 0\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ prm->opt = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ prm->opt = 0;\r
+ /* Enable Final transfer completion chain */\r
+ prm->opt |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* A Sync Transfer Mode */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ /* Src & Dest are in INCR modes */\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ prm->opt &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+#endif\r
+ prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPingCbCnt);\r
+ prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pingLastOutFlag);\r
+ prm->aCnt = 4;\r
+ prm->bCnt = 1;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_WRAP],\r
+ prm);\r
+\r
+ /* Link Channel - Wrap 1 */\r
+ /* chain to REVT 1\r
+ link to ping link l2p channel \r
+ A-sync\r
+ ACNT = 4\r
+ BCNT = 1\r
+ CCNT = 1 \r
+ scrBIDX = 0\r
+ scrCIDX = 0\r
+ desBIDX = 0\r
+ desCIDX = 0 */\r
+ /* Fill the PaRAM Set with transfer specific information */\r
+ CSL_FINS(prm->opt, TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->maxPongCbCnt);\r
+ prm->destAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pongLastOutFlag);\r
+ prm->linkAddr = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+\r
+ /* Now, write the PaRAM Set. */\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_WRAP],\r
+ prm);\r
+\r
+ return ( status );\r
+\r
+} /* end of - Tcp3d_initEdmaChParam() function */\r
+\r
+/**\r
+ * @brief Resets the the EDMA channels PaRAM memory with default values\r
+ */\r
+static EDMA3_DRV_Result Tcp3d_resetEdmaChParam( IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t pingNumCBs,\r
+ IN uint32_t pongNumCBs)\r
+{\r
+ EDMA3_DRV_Result status = EDMA3_DRV_SOK;\r
+ EDMA3_DRV_PaRAMRegs *prm;\r
+\r
+ /* L2P 0 */\r
+ prm = &tcp3dInst->l2pPrm[PING_INDEX];\r
+ prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[0]);\r
+ prm->cCnt = pingNumCBs;\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_L2P],\r
+ prm);\r
+\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingLinkCh[LINK_CH_IDX_L2P],\r
+ prm);\r
+\r
+ /* L2P 1 */\r
+ prm = &tcp3dInst->l2pPrm[PONG_INDEX];\r
+ prm->srcAddr = L2GLBMAP(tcp3dInst->coreId, &tcp3dInst->pseudoParamBufPtr[TCP3D_DRV_LINK_CB]);\r
+ prm->cCnt = pongNumCBs;\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_L2P],\r
+ prm);\r
+\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongLinkCh[LINK_CH_IDX_L2P],\r
+ prm);\r
+\r
+ /* REVT 0 */\r
+ prm = &tcp3dInst->revtPrm[PING_INDEX];\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ prm);\r
+\r
+ /* REVT 1 */\r
+ prm = &tcp3dInst->revtPrm[PONG_INDEX];\r
+ status |= EDMA3_DRV_setPaRAM(tcp3dInst->edmaHnd,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ prm);\r
+\r
+ return ( status );\r
+\r
+} /* end of - Tcp3d_resetEdmaChParam() function */\r
+\r
+/**\r
+ * @brief Initialize the Pseudo PaRAM memory with default values\r
+ */\r
+static void Tcp3d_initPseudoParam ( IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t codeBlocks,\r
+ IN Tcp3d_Config *pingConfig,\r
+ IN Tcp3d_Config *pongConfig)\r
+{\r
+ int32_t cnt, flag;\r
+ EDMA3_DRV_PaRAMRegs prmSet[TCP3D_DRV_LINK_CB];\r
+ EDMA3_DRV_PaRAMRegs *prm;\r
+ uint8_t mode = tcp3dInst->mode;\r
+ uint32_t incfgOpt[2];\r
+ uint32_t incfgLink[2];\r
+ uint32_t incfgStartAddress[2];\r
+ uint32_t stsOpt[2];\r
+ uint32_t stsLink[2];\r
+ uint32_t stsStartAddress[2];\r
+ uint32_t hdOpt[2];\r
+ uint32_t hdLink[2];\r
+ uint32_t hdStartAddress[2];\r
+ uint32_t llrOpt[2];\r
+ uint32_t llrLink[2];\r
+ uint32_t llrStartAddress[2];\r
+ uint32_t sdOpt[2];\r
+ uint32_t sdLink[2];\r
+ uint32_t sdStartAddress[2];\r
+\r
+ incfgStartAddress[PING_INDEX] = pingConfig->inCfgStart;\r
+ incfgStartAddress[PONG_INDEX] = pongConfig->inCfgStart;\r
+\r
+ incfgLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_LLR]);\r
+ incfgLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_LLR]);\r
+\r
+ llrStartAddress[PING_INDEX] = pingConfig->llrStart;\r
+ llrStartAddress[PONG_INDEX] = pongConfig->llrStart;\r
+\r
+ llrLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_HD]);\r
+ llrLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_HD]);\r
+\r
+ hdStartAddress[PING_INDEX] = pingConfig->hdStart;\r
+ hdStartAddress[PONG_INDEX] = pongConfig->hdStart;\r
+\r
+ hdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+ hdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+\r
+ stsStartAddress[PING_INDEX] = pingConfig->stsStart;\r
+ stsStartAddress[PONG_INDEX] = pongConfig->stsStart;\r
+\r
+ stsLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+ stsLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+\r
+ sdStartAddress[PING_INDEX] = pingConfig->sdStart;\r
+ sdStartAddress[PONG_INDEX] = pongConfig->sdStart;\r
+\r
+ sdLink[PING_INDEX] = (0xFFFFu) & (tcp3dInst->pingLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+ sdLink[PONG_INDEX] = (0xFFFFu) & (tcp3dInst->pongLinkChParamAddr[LINK_CH_IDX_PAUSE]);\r
+\r
+ /**\r
+ * INCFG Ping & Pong - fill all the initial values\r
+ */\r
+ /* chain to REVT\r
+ link to link llr channel \r
+ A-sync\r
+ ACNT = 60\r
+ BCNT = 1\r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ incfgOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+\r
+ incfgOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ incfgOpt[PING_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(incfgOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Final transfer completion chain */\r
+ incfgOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ incfgOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+\r
+ incfgOpt[PONG_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(incfgOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Final transfer completion chain */\r
+ incfgOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* AB Sync Transfer Mode */\r
+ incfgOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+#endif\r
+ prm = &prmSet[LINK_CH_IDX_INCFG];\r
+ prm->srcAddr = NULL;\r
+ prm->aCnt = 60;\r
+ prm->bCnt = 1;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+\r
+ /**\r
+ * LLR Ping & Pong - fill all the initial values\r
+ */\r
+ /* chain to REVT\r
+ link to link hd channel \r
+ AB-sync\r
+ ACNT = NULL (updated during enque operation)\r
+ BCNT = NULL (updated during enque operation)\r
+ CCNT = NULL (updated during enque operation)\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ llrOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_DIS,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_AB,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+\r
+ llrOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_DIS,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_AB,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ llrOpt[PING_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(llrOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
+ /* AB Sync Transfer Mode */\r
+ llrOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+\r
+ llrOpt[PONG_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(llrOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
+ /* AB Sync Transfer Mode */\r
+ llrOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+#endif\r
+ prm = &prmSet[LINK_CH_IDX_LLR];\r
+ prm->srcAddr = NULL;\r
+ prm->aCnt = NULL;\r
+ prm->bCntReload = 0;\r
+ if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
+ ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
+ {\r
+ prm->bCnt = 2;\r
+ prm->cCnt = 3;\r
+ prm->srcBIdx = NULL;\r
+ prm->destBIdx = 0x1000;\r
+ prm->srcCIdx = NULL;\r
+ prm->destCIdx = 0x2000;\r
+ }\r
+ else\r
+ {\r
+ prm->bCnt = 3;\r
+ prm->cCnt = 1;\r
+ prm->srcBIdx = NULL;\r
+ prm->destBIdx = 0x2000;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+ llrOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
+ llrOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_ITCCHEN_SHIFT);\r
+ }\r
+\r
+ /**\r
+ * HD Ping & Pong - fill all the initial values\r
+ */\r
+ /* chain to REVT\r
+ link to link pause channel \r
+ A-sync\r
+ ACNT = NULL (updated during enque operation)\r
+ BCNT = 1\r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ hdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+\r
+ hdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ hdOpt[PING_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(hdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ hdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ hdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+\r
+ hdOpt[PONG_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(hdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ hdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ hdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+#endif\r
+ prm = &prmSet[LINK_CH_IDX_HD];\r
+ prm->destAddr = NULL;\r
+ prm->aCnt = NULL;\r
+ prm->bCnt = 1;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+\r
+ /**\r
+ * STS Ping & Pong - fill all the initial values\r
+ */\r
+ /* chain to REVT\r
+ link to link sd channel \r
+ A-sync\r
+ ACNT = 12\r
+ BCNT = 1\r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ stsOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+\r
+ stsOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ stsOpt[PING_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(stsOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Final transfer completion chain */\r
+ stsOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ stsOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+\r
+ stsOpt[PONG_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(stsOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Final transfer completion chain */\r
+ stsOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ stsOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+#endif\r
+ prm = &prmSet[LINK_CH_IDX_STS];\r
+ prm->destAddr = NULL;\r
+ prm->aCnt = 12;\r
+ prm->bCnt = 1;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+\r
+ /**\r
+ * SD Ping & Pong - fill all the initial values\r
+ */\r
+ /* chain to REVT\r
+ link to link pause channel \r
+ A-sync / AB-sync based on mode\r
+ ACNT = NULL (updated during enque operation)\r
+ BCNT = 1/3 based on mode \r
+ CCNT = 1\r
+ scrBIDX = 0\r
+ desBIDX = 0\r
+ scrCIDX = 0\r
+ desCIDX = 0 */\r
+ /* Set OPT field with appropriate values */\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+ sdOpt[PING_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+\r
+ sdOpt[PONG_INDEX] = CSL_EDMA3_OPT_MAKE ( CSL_EDMA3_ITCCH_DIS,\r
+ CSL_EDMA3_TCCH_EN,\r
+ CSL_EDMA3_ITCINT_DIS,\r
+ CSL_EDMA3_TCINT_DIS,\r
+ tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT],\r
+ CSL_EDMA3_TCC_NORMAL,\r
+ CSL_EDMA3_FIFOWIDTH_NONE,\r
+ CSL_EDMA3_STATIC_DIS,\r
+ CSL_EDMA3_SYNC_A,\r
+ CSL_EDMA3_ADDRMODE_INCR,\r
+ CSL_EDMA3_ADDRMODE_INCR );\r
+#else\r
+ sdOpt[PING_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(sdOpt[PING_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pingCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ sdOpt[PING_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+\r
+ sdOpt[PONG_INDEX] = 0;\r
+ /* Src & Dest are in INCR modes */\r
+ sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SAM_SHIFT);\r
+ sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_DAM_SHIFT);\r
+ /* Program the TCC */\r
+ CSL_FINS(sdOpt[PONG_INDEX], TPCC_PARAM_OPT_TCC, tcp3dInst->pongCh[TCP3D_DRV_CH_IDX_REVT]);\r
+ /* Enable Intermediate & Final transfer completion chain */\r
+ sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_TCCHEN_SHIFT);\r
+ /* A Sync Transfer Mode */\r
+ sdOpt[PONG_INDEX] &= ~(1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+#endif\r
+ prm = &prmSet[LINK_CH_IDX_SD];\r
+ prm->destAddr = NULL;\r
+ prm->aCnt = NULL;\r
+ prm->cCnt = 1;\r
+ prm->bCntReload = 0;\r
+ prm->srcCIdx = 0;\r
+ prm->destCIdx = 0;\r
+ if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE) ||\r
+ ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
+ {\r
+ prm->bCnt = 3;\r
+ prm->srcBIdx = 0x2000;\r
+ prm->destBIdx = NULL;\r
+ sdOpt[PING_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ sdOpt[PONG_INDEX] |= (1 << CSL_TPCC_PARAM_OPT_SYNCDIM_SHIFT);\r
+ }\r
+ else\r
+ {\r
+ prm->bCnt = 1;\r
+ prm->srcBIdx = 0;\r
+ prm->destBIdx = 0;\r
+ }\r
+\r
+ for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
+ {\r
+ flag = cnt & 1;\r
+\r
+ prm = &prmSet[LINK_CH_IDX_INCFG];\r
+ prm->opt = incfgOpt[flag];\r
+ prm->destAddr = incfgStartAddress[flag];\r
+ prm->linkAddr = incfgLink[flag];\r
+\r
+ prm = &prmSet[LINK_CH_IDX_LLR];\r
+ prm->opt = llrOpt[flag];\r
+ prm->destAddr = llrStartAddress[flag];\r
+ prm->linkAddr = llrLink[flag];\r
+\r
+ prm = &prmSet[LINK_CH_IDX_STS];\r
+ prm->opt = stsOpt[flag];\r
+ prm->srcAddr = stsStartAddress[flag];\r
+ prm->linkAddr = stsLink[flag];\r
+\r
+ prm = &prmSet[LINK_CH_IDX_HD];\r
+ prm->opt = hdOpt[flag];\r
+ prm->srcAddr = hdStartAddress[flag];\r
+ prm->linkAddr = hdLink[flag];\r
+ \r
+ prm = &prmSet[LINK_CH_IDX_SD];\r
+ prm->opt = sdOpt[flag];\r
+ prm->srcAddr = sdStartAddress[flag];\r
+ prm->linkAddr = sdLink[flag];\r
+\r
+ memcpy(&tcp3dInst->pseudoParamBufPtr[cnt*TCP3D_DRV_LINK_CB], &prmSet[0], 32*TCP3D_DRV_LINK_CB);\r
+\r
+ } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
+\r
+ /* Store the lastOpt & lastLink values for use in enque function */\r
+ tcp3dInst->resetHdOpt[PING_INDEX] = hdOpt[PING_INDEX];\r
+ tcp3dInst->resetHdOpt[PONG_INDEX] = hdOpt[PONG_INDEX];\r
+ tcp3dInst->resetHdLink[PING_INDEX] = hdLink[PING_INDEX];\r
+ tcp3dInst->resetHdLink[PONG_INDEX] = hdLink[PONG_INDEX];\r
+\r
+ tcp3dInst->resetStsOpt[PING_INDEX] = stsOpt[PING_INDEX];\r
+ tcp3dInst->resetStsOpt[PONG_INDEX] = stsOpt[PONG_INDEX];\r
+ tcp3dInst->resetStsLink[PING_INDEX] = stsLink[PING_INDEX];\r
+ tcp3dInst->resetStsLink[PONG_INDEX] = stsLink[PONG_INDEX];\r
+\r
+ tcp3dInst->resetSdOpt[PING_INDEX] = sdOpt[PING_INDEX];\r
+ tcp3dInst->resetSdOpt[PONG_INDEX] = sdOpt[PONG_INDEX];\r
+ tcp3dInst->resetSdLink[PING_INDEX] = sdLink[PING_INDEX];\r
+ tcp3dInst->resetSdLink[PONG_INDEX] = sdLink[PONG_INDEX];\r
+} /* end of - Tcp3d_initPseudoParam() function */\r
+\r
+/**\r
+ * @brief Resets Pseudo PaRAM memory with default values\r
+ */\r
+static void Tcp3d_resetPseudoParam (IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t codeBlocks)\r
+{\r
+ int32_t cnt;\r
+ EDMA3_DRV_PaRAMRegs *prm1 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_HD];\r
+ EDMA3_DRV_PaRAMRegs *prm2 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_STS];\r
+ EDMA3_DRV_PaRAMRegs *prm3 = &tcp3dInst->pseudoParamBufPtr[LINK_CH_IDX_SD];\r
+\r
+ for ( cnt = 0; cnt < codeBlocks; cnt++ )\r
+ {\r
+ prm1->opt = tcp3dInst->resetHdOpt[cnt & 1];\r
+ prm1->linkAddr = tcp3dInst->resetHdLink[cnt & 1];\r
+ prm2->opt = tcp3dInst->resetStsOpt[cnt & 1];\r
+ prm2->linkAddr = tcp3dInst->resetStsLink[cnt & 1];\r
+ prm3->opt = tcp3dInst->resetSdOpt[cnt & 1];\r
+ prm3->linkAddr = tcp3dInst->resetSdLink[cnt & 1];\r
+\r
+ prm1 +=TCP3D_DRV_LINK_CB;\r
+ prm2 +=TCP3D_DRV_LINK_CB;\r
+ prm3 +=TCP3D_DRV_LINK_CB;\r
+ } /* end of - for ( cnt = 0; cnt < codeBlocks; cnt++ ) */\r
+} /* end of - Tcp3d_resetPseudoParam() function */\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to get the version information of the TCP3D Driver.\r
+ *\r
+ * @retval\r
+ * Version Information.\r
+ */\r
+uint32_t Tcp3d_getVersion (void)\r
+{\r
+ return TCP3D_DRV_VERSION_ID;\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to get the version string for the TCP3D Driver.\r
+ *\r
+ * @retval\r
+ * Version String.\r
+ */\r
+const char* Tcp3d_getVersionStr (void)\r
+{\r
+ return Tcp3dDrvVersionStr;\r
+}\r
+\r
+/* end of file */\r
diff --git a/src/tcp3d_drv_priv.h b/src/tcp3d_drv_priv.h
--- /dev/null
+++ b/src/tcp3d_drv_priv.h
@@ -0,0 +1,141 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_DRV_PRIV_H_\r
+#define _TCP3D_DRV_PRIV_H_\r
+\r
+/**\r
+ * Local Compile Flags\r
+ */\r
+#define TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE 0\r
+\r
+/**\r
+ * Local includes\r
+ */\r
+#include <tcp3d_drv_types.h>\r
+#include <ti/drv/tcp3d/src/tcp3d_utils.h>\r
+\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tpcc.h>\r
+#include <ti/csl/csl_cpIntcAux.h>\r
+\r
+#if TCP3D_DRV_USE_CSL_EDMA3_OPT_MAKE\r
+#include <ti/csl/csl_edma3.h>\r
+#else\r
+#include <ti/csl/cslr_tpcc.h>\r
+#endif\r
+\r
+/**\r
+ * Local Defines\r
+ */\r
+#define LINK_CH_IDX_INCFG 0\r
+#define LINK_CH_IDX_LLR 1\r
+#define LINK_CH_IDX_HD 2\r
+#define LINK_CH_IDX_STS 3\r
+#define LINK_CH_IDX_SD 4\r
+\r
+#define LINK_CH_IDX_LAST LINK_CH_IDX_SD\r
+\r
+#define LINK_CH_IDX_PAUSE (LINK_CH_IDX_LAST + 1)\r
+#define LINK_CH_IDX_REVT (LINK_CH_IDX_LAST + 2)\r
+#define LINK_CH_IDX_L2P (LINK_CH_IDX_LAST + 3)\r
+#define LINK_CH_IDX_NTF (LINK_CH_IDX_LAST + 4)\r
+#define LINK_CH_IDX_NTFD (LINK_CH_IDX_LAST + 5)\r
+#define LINK_CH_IDX_WRAP (LINK_CH_IDX_LAST + 6)\r
+\r
+#define ONE_OVER_LINK_CB_Q15 (32768/TCP3D_DRV_LINK_CB)\r
+\r
+/**\r
+ * Local Macros\r
+ */\r
+/**\r
+ * @brief Macro for getting the global map for L2 memory addresses \r
+ */\r
+#define L2GLBMAP(coreID, addr) \\r
+ ( ( ((uint32_t)(addr) >= 0x00800000) && ((uint32_t)(addr) < 0x00900000) ) ? \\r
+ ( (uint32_t)(addr) | (uint32_t)((0x10 | (coreID & 0x3)) << 24) ) : \\r
+ (uint32_t)(addr) )\r
+\r
+/**\r
+ * @brief Macro for getting the code block index using division by TCP3D_DRV_LINK_CB \r
+ */\r
+#define GET_CB_IDX(input) ((_smpy((input), ONE_OVER_LINK_CB_Q15) + 32768)>>16)\r
+\r
+/**\r
+ * Local Structures\r
+ */\r
+/**\r
+ * @brief Structure for keeping the local variables\r
+ */\r
+typedef struct Tcp3d_Internal\r
+{\r
+ uint8_t constantOne;/**< variable set to 1 at init time and\r
+ used by PAUSE channels */\r
+ Tcp3d_State pauseState; /**< variable set to TCP3D_DRV_STATE_PAUSE\r
+ and used by PAUSE channels */\r
+ uint32_t lastOpt[2];\r
+ uint32_t lastLink[2];\r
+ EDMA3_DRV_PaRAMRegs *startPrmPtr;\r
+ EDMA3_DRV_PaRAMRegs *pingPtrL2p;\r
+ EDMA3_DRV_PaRAMRegs *pongPtrL2p;\r
+ uint8_t pingVar[2];\r
+ uint8_t pongVar[2];\r
+ EDMA3_DRV_PaRAMRegs revtPrm[2];\r
+} Tcp3d_Internal;\r
+\r
+/**\r
+ * Local Functions\r
+ */\r
+static EDMA3_DRV_Result Tcp3d_getEdmaChParamAddr (IN Tcp3d_Instance *tcp3dInst);\r
+static EDMA3_DRV_Result Tcp3d_enableEdmaChannels (IN Tcp3d_Instance *tcp3dInst);\r
+static EDMA3_DRV_Result Tcp3d_initEdmaChParam (IN Tcp3d_Instance *tcp3dInst);\r
+static EDMA3_DRV_Result Tcp3d_resetEdmaChParam (IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t pingNumCBs,\r
+ IN uint32_t pongNumCBs);\r
+static void Tcp3d_initPseudoParam ( IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t codeBlocks,\r
+ IN Tcp3d_Config *pingConfig,\r
+ IN Tcp3d_Config *pongConfig);\r
+static void Tcp3d_resetPseudoParam (IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t codeBlocks);\r
+static void Tcp3d_setLocalVariables (IN Tcp3d_Instance *tcp3dInst);\r
+static void Tcp3d_resetRuntimeVariables (IN Tcp3d_Instance *tcp3dInst);\r
+static void Tcp3d_updateListVariables ( INOUT Tcp3d_Instance *inst,\r
+ IN int32_t pingOutIdx,\r
+ IN int32_t pongOutIdx );\r
+\r
+#endif /* _TCP3D_DRV_PRIV_H_ */\r
diff --git a/src/tcp3d_isr.c b/src/tcp3d_isr.c
--- /dev/null
+++ b/src/tcp3d_isr.c
@@ -0,0 +1,127 @@
+/**\r
+ * \file tcp3d_isr.c\r
+ *\r
+ * \brief TCP3D Driver ISR functions.\r
+ *\r
+ * Copyright (C) Texas Instruments Incorporated 2012\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/**\r
+ * Include Files\r
+ */\r
+/* TCP3D driver includes */\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+#include <ti/drv/tcp3d/src/tcp3d_drv_priv.h>\r
+\r
+/* TCP3D Types and OSAL defintions: These files can be overriden by customers\r
+ * to point to their copies. Because of this the files have not been explicitly \r
+ * specified to include the driver path.*/\r
+#include <tcp3d_drv_types.h>\r
+#include <tcp3d_osal.h>\r
+\r
+/****************************************************************************\r
+ * TCP3D Driver Functions *\r
+ ****************************************************************************/\r
+\r
+/**\r
+ * @brief TCP3D Driver ISR function for the channels associated with REVT0.\r
+ */\r
+static void Tcp3d_revt0ChannelIsr (Tcp3d_Instance *inst)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ uint32_t utmpIdx;\r
+ uint32_t pingOutIdx;\r
+ EDMA3_DRV_PaRAMRegs *currPrmPtr1;\r
+\r
+ utmpIdx = inst->maxCodeBlocks;\r
+\r
+ /* Increment the ISR counter */\r
+ inst->pingIntr++;\r
+\r
+ /* Check to see if restart needed before exit */\r
+ /**\r
+ * Read the source address of L2P Channel PaRAM to get the current\r
+ * pseudo PaRAM pointer for PING path. Then compare with the start\r
+ * pointer for the index.\r
+ */\r
+ currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pingPtrL2p->srcAddr;\r
+ pingOutIdx = GET_CB_IDX(currPrmPtr1 - inst->startPrmPtr);\r
+\r
+ /* Check if PING path completed decoding */\r
+ if ( pingOutIdx < utmpIdx )\r
+ {\r
+ tcp3dResult = Tcp3d_start(inst, TCP3D_DRV_START_AUTO);\r
+ \r
+ if ( TCP3D_DRV_NO_ERR != tcp3dResult )\r
+ {\r
+ Tcp3d_osalLog("REVT0 ISR: Tcp3d_start function returned error with value : %d\n", tcp3dResult);\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ * @brief TCP3D Driver ISR function for the channels associated with REVT1.\r
+ */\r
+static void Tcp3d_revt1ChannelIsr (Tcp3d_Instance *inst)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ uint32_t utmpIdx;\r
+ uint32_t pongOutIdx;\r
+ EDMA3_DRV_PaRAMRegs *currPrmPtr1;\r
+\r
+ utmpIdx = inst->maxCodeBlocks;\r
+\r
+ /* Increment the ISR counter */\r
+ inst->pongIntr++;\r
+\r
+ /* Check to see if restart needed before exit */\r
+ /**\r
+ * Read the source address of L2P Channel PaRAM to get the current\r
+ * pseudo PaRAM pointer for PONG path. Then compare with the start\r
+ * pointer for the index.\r
+ */\r
+ currPrmPtr1 = (EDMA3_DRV_PaRAMRegs *) inst->pongPtrL2p->srcAddr;\r
+ pongOutIdx = GET_CB_IDX(currPrmPtr1 - inst->startPrmPtr);\r
+\r
+ /* Check if PING path completed decoding */\r
+ if ( pongOutIdx < utmpIdx )\r
+ {\r
+ tcp3dResult = Tcp3d_start(inst, TCP3D_DRV_START_AUTO);\r
+ \r
+ if ( TCP3D_DRV_NO_ERR != tcp3dResult )\r
+ {\r
+ Tcp3d_osalLog("REVT1 ISR: Tcp3d_start function returned error with value : %d\n", tcp3dResult);\r
+ }\r
+ }\r
+}\r
+\r
+/* end of file */\r
diff --git a/src/tcp3d_reg.c b/src/tcp3d_reg.c
--- /dev/null
+++ b/src/tcp3d_reg.c
@@ -0,0 +1,349 @@
+/**\r
+ * \file tcp3d_reg.c\r
+ *\r
+ * \brief TCP3D Driver functions for TCP3D register preparation functions.\r
+ *\r
+ * Copyright (C) Texas Instruments Incorporated 2009\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/**\r
+ * Include Files\r
+ */\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+\r
+/**\r
+ * \brief TCP3D Driver function for preparing the common control registers\r
+ * from the input structure parameters using the CSL_FINS macro.\r
+ * \r
+ * The outputs could be used to write into the actual TCP3 decoder\r
+ * memory registers directly or DMAed to bring the TCP3 decoder\r
+ * state machine to WAIT for inputs state.\r
+ * \r
+ */\r
+void Tcp3d_prepControlRegs( IN Tcp3d_CtrlParams *ctrl,\r
+ OUT uint32_t *modeReg,\r
+ OUT uint32_t *endReg,\r
+ OUT uint32_t *exeRegP0,\r
+ OUT uint32_t *exeRegP1)\r
+{\r
+ /* Set MODE register parameters */\r
+ CSL_FINS (*modeReg, TCP3D_CFG_TCP3_MODE_MODE_SEL, ctrl->mode);\r
+ CSL_FINS (*modeReg, TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN, ctrl->doubleBuf);\r
+ CSL_FINS (*modeReg, TCP3D_CFG_TCP3_MODE_ITG_EN, ctrl->intTable);\r
+ CSL_FINS (*modeReg, TCP3D_CFG_TCP3_MODE_ERROR_IGNORE_EN, ctrl->errIgnore);\r
+ CSL_FINS (*modeReg, TCP3D_CFG_TCP3_MODE_AUTO_TRIG_EN, ctrl->autoTrig);\r
+ CSL_FINS (*modeReg, TCP3D_CFG_TCP3_MODE_LTE_CRC_ISEL, ctrl->lteCrcSel);\r
+\r
+ /* Set ENDIAN register parameters */\r
+ CSL_FINS (*endReg, TCP3D_CFG_TCP3_END_ENDIAN_INTR, ctrl->endInt);\r
+ CSL_FINS (*endReg, TCP3D_CFG_TCP3_END_ENDIAN_INDATA, ctrl->endInData);\r
+\r
+ /* Set EXECUTE P0 register parameters */\r
+ CSL_FINS (*exeRegP0, TCP3D_CFG_TCP3_EXE_P0_EXE_CMD, ctrl->exeP0cmd);\r
+\r
+ /* Set EXECUTE P1 register parameters */\r
+ CSL_FINS (*exeRegP1, TCP3D_CFG_TCP3_EXE_P1_EXE_CMD, ctrl->exeP1cmd);\r
+\r
+} /* end of Tcp3d_prepControlRegs() */\r
+\r
+/**\r
+ * \brief This is a utility function provided as part of TCP3D Driver for\r
+ * preparing a fixed set of input config registers that would be\r
+ * fixed for a typical configuration and will not vary from \r
+ * code block to code block.\r
+ * \r
+ * This function is used for preparing IC2, IC3, IC8-IC11 registers\r
+ * only out of 15 registers (IC0-IC14) using CSL_FINS macro.\r
+ * \r
+ * The output outICRegs could be used as template IC registers\r
+ * array when preparing the input config registers for code blocks.\r
+ * \r
+ */\r
+void Tcp3d_prepFixedConfigRegs(IN Tcp3d_InCfgParams * const RESTRICT param,\r
+ OUT uint32_t * const RESTRICT outICRegs)\r
+{\r
+ uint32_t *reg;\r
+\r
+ /* Prepare input config register 2 */\r
+ reg = &outICRegs[2];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL, param->intLoadSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_MAXST_EN, param->maxStar);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_FLAG_EN, param->outStsRead);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL, param->outOrderSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_EXT_SCALE_EN, param->extScale);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FLAG_EN, param->softOutRead);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL, param->softOutOrderSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FMT, param->softOutFrmtSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_MIN_ITR, param->minIter);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_MAX_ITR, param->maxIter);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_VAL, param->snrVal);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_REP, param->snrReport);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL, param->stopSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS, param->crcIterSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_SEL, param->crcPolySel);\r
+\r
+ /* Prepare input config register 3 */\r
+ reg = &outICRegs[3];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_THOLD, param->maxStarThres);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_VALUE, param->maxStarValue);\r
+\r
+ /* Prepare input config register 8 */\r
+ reg = &outICRegs[8];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_0, param->extrScale[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_1, param->extrScale[1]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_2, param->extrScale[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_3, param->extrScale[3]);\r
+\r
+ /* Prepare input config register 9 */\r
+ reg = &outICRegs[9];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_4, param->extrScale[4]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_5, param->extrScale[5]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_6, param->extrScale[6]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_7, param->extrScale[7]);\r
+\r
+ /* Prepare input config register 10 */\r
+ reg = &outICRegs[10];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_8, param->extrScale[8]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_9, param->extrScale[9]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_10, param->extrScale[10]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_11, param->extrScale[11]);\r
+\r
+ /* Prepare input config register 11 */\r
+ reg = &outICRegs[11];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_12, param->extrScale[12]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_13, param->extrScale[13]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_14, param->extrScale[14]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_15, param->extrScale[15]);\r
+\r
+} /* end of Tcp3d_prepFixedConfigRegs() */\r
+\r
+/**\r
+ * \brief This is a utility function provided as part of TCP3D Driver for\r
+ * preparing the input config registers that will be used for\r
+ * sending to TCP3 decoder IP memory before sending the LLR data.\r
+ * \r
+ * This function is used for preparing all the 15 input config\r
+ * registers (IC0-IC14) using CSL_FINS macro.\r
+ *\r
+ */\r
+void Tcp3d_prepConfigRegs( IN uint8_t mode,\r
+ IN Tcp3d_InCfgParams* const RESTRICT param,\r
+ OUT uint32_t * const RESTRICT outICRegs,\r
+ IN uint32_t * const RESTRICT tempICRegs,\r
+ IN uint8_t copyFixedReg)\r
+{\r
+ uint32_t *reg;\r
+\r
+ /* Prepare input config register 0 */\r
+ reg = &outICRegs[0];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG0_P0_NUM_SW0, param->numsw0);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG0_P0_BLK_LN, param->blockLen);\r
+\r
+ /* Prepare input config register 1 */\r
+ reg = &outICRegs[1];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL, param->sw0LenSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL, param->sw2LenSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG1_P0_SW1_LN, param->sw1Len);\r
+\r
+ /* Prepare input config register - 2,3,8-11 */\r
+ if (copyFixedReg)\r
+ {\r
+ /* Copy fixed registers from template IC */\r
+ outICRegs[2] = tempICRegs[2];\r
+ outICRegs[3] = tempICRegs[3];\r
+ outICRegs[8] = tempICRegs[8];\r
+ outICRegs[9] = tempICRegs[9];\r
+ outICRegs[10] = tempICRegs[10];\r
+ outICRegs[11] = tempICRegs[11];\r
+ }\r
+ else\r
+ {\r
+ /* Prepare fixed registers from inCfgParams */\r
+ Tcp3d_prepFixedConfigRegs ( param, outICRegs );\r
+ }\r
+\r
+ /* Prepare input config register 4 */\r
+ reg = &outICRegs[4];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST0_MAP0, param->betaMap0[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST1_MAP0, param->betaMap0[1]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST2_MAP0, param->betaMap0[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST3_MAP0, param->betaMap0[3]);\r
+\r
+ /* Prepare input config register 5 */\r
+ reg = &outICRegs[5];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST4_MAP0, param->betaMap0[4]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST5_MAP0, param->betaMap0[5]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST6_MAP0, param->betaMap0[6]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST7_MAP0, param->betaMap0[7]);\r
+\r
+ /* Prepare input config register 6 */\r
+ reg = &outICRegs[6];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST0_MAP1, param->betaMap1[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST1_MAP1, param->betaMap1[1]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST2_MAP1, param->betaMap1[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST3_MAP1, param->betaMap1[3]);\r
+\r
+ /* Prepare input config register 7 */\r
+ reg = &outICRegs[7];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST4_MAP1, param->betaMap1[4]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST5_MAP1, param->betaMap1[5]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST6_MAP1, param->betaMap1[6]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST7_MAP1, param->betaMap1[7]);\r
+\r
+ /* LTE or WIMAX */\r
+ if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE ) ||\r
+ ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
+ {\r
+ /* Prepare input config register 12 */\r
+ reg = &outICRegs[12];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM0, param->itgParam[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM1, param->itgParam[1]);\r
+\r
+ /* Prepare input config register 13 */\r
+ reg = &outICRegs[13];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM2, param->itgParam[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM3, param->itgParam[3]);\r
+\r
+ /* Prepare input config register 14 */\r
+ reg = &outICRegs[14];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG14_P0_ITG_PARAM4, param->itgParam[4]);\r
+ }\r
+ else\r
+ {\r
+ /* ITG Params are not required for 3GPP */\r
+ outICRegs[12] = 0;\r
+ outICRegs[13] = 0;\r
+ outICRegs[14] = 0;\r
+ }\r
+\r
+} /* end of Tcp3d_prepConfigRegs() */\r
+\r
+/**\r
+ * \brief This is a utility function is provided as part of TCP3D Driver\r
+ * for preparing the specific input config registers which depend\r
+ * on the block size.\r
+ *\r
+ * This function can be used for preparing IC0, IC1, IC12-IC14\r
+ * registers only out of 15 registers (IC0-IC14) using \r
+ * CSL_FINS macro.\r
+ *\r
+ */ \r
+void Tcp3d_prepBlockSizeDepConfigRegs ( IN uint8_t mode,\r
+ OUT uint32_t * const RESTRICT outICRegs,\r
+ IN uint8_t numsw0,\r
+ IN uint16_t blockLen,\r
+ IN uint8_t sw0LenSel,\r
+ IN uint8_t sw2LenSel,\r
+ IN uint8_t sw1Len,\r
+ IN uint16_t * const RESTRICT itgParam)\r
+{\r
+ uint32_t *reg;\r
+\r
+ /* Prepare input config register 0 */\r
+ reg = &outICRegs[0];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG0_P0_NUM_SW0, numsw0);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG0_P0_BLK_LN, blockLen);\r
+\r
+ /* Prepare input config register 1 */\r
+ reg = &outICRegs[1];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL, sw0LenSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL, sw2LenSel);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG1_P0_SW1_LN, sw1Len);\r
+\r
+ /* LTE or WIMAX */\r
+ if ( ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE ) ||\r
+ ( mode == CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX ) )\r
+ {\r
+ /* Prepare input config register 12 */\r
+ reg = &outICRegs[12];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM0, itgParam[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM1, itgParam[1]);\r
+\r
+ /* Prepare input config register 13 */\r
+ reg = &outICRegs[13];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM2, itgParam[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM3, itgParam[3]);\r
+\r
+ /* Prepare input config register 14 */\r
+ reg = &outICRegs[14];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG14_P0_ITG_PARAM4, itgParam[4]);\r
+ }\r
+\r
+} /* end of Tcp3d_prepBlockSizeDepConfigRegs() */\r
+\r
+/**\r
+ * \brief This is a utility function is provided as part of TCP3D Driver\r
+ * for preparing the beta state value dependent input config\r
+ * registers only.\r
+ *\r
+ * This function can be used for preparing IC4-IC7 registers only\r
+ * out of 15 registers (IC0-IC14) using CSL_FINS macro.\r
+ *\r
+ */ \r
+void Tcp3d_prepBetaStateConfigRegs( IN uint8_t mode,\r
+ OUT uint32_t * const RESTRICT outICRegs,\r
+ IN int8_t * const RESTRICT betaMap0,\r
+ IN int8_t * const RESTRICT betaMap1)\r
+{\r
+ uint32_t *reg;\r
+\r
+ /* Prepare input config register 4 */\r
+ reg = &outICRegs[4];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST0_MAP0, betaMap0[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST1_MAP0, betaMap0[1]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST2_MAP0, betaMap0[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST3_MAP0, betaMap0[3]);\r
+\r
+ /* Prepare input config register 5 */\r
+ reg = &outICRegs[5];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST4_MAP0, betaMap0[4]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST5_MAP0, betaMap0[5]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST6_MAP0, betaMap0[6]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST7_MAP0, betaMap0[7]);\r
+\r
+ /* Prepare input config register 6 */\r
+ reg = &outICRegs[6];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST0_MAP1, betaMap1[0]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST1_MAP1, betaMap1[1]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST2_MAP1, betaMap1[2]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST3_MAP1, betaMap1[3]);\r
+\r
+ /* Prepare input config register 7 */\r
+ reg = &outICRegs[7];\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST4_MAP1, betaMap1[4]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST5_MAP1, betaMap1[5]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST6_MAP1, betaMap1[6]);\r
+ CSL_FINS (*reg, TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST7_MAP1, betaMap1[7]);\r
+\r
+} /* end of Tcp3d_prepBetaStateConfigRegs() */\r
+\r
+/* end of file */\r
diff --git a/src/tcp3d_utils.c b/src/tcp3d_utils.c
--- /dev/null
+++ b/src/tcp3d_utils.c
@@ -0,0 +1,105 @@
+/**\r
+ * \file tcp3d_utils.c\r
+ *\r
+ * \brief TCP3D Driver utility functions.\r
+ *\r
+ * Copyright (C) Texas Instruments Incorporated 2009\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/**\r
+ * Include Files\r
+ */\r
+/* c99 types includes */\r
+#include <stdint.h>\r
+#include <stdlib.h>\r
+\r
+/**\r
+ * @brief This is a utility function provided as part of TCP3D Driver for\r
+ * converting the local address to the global address using the \r
+ * coreID.\r
+ * The address mapping will be done only if the address falls in\r
+ * the defined local L2 memory area. Otherwise, the address is\r
+ * returned as is.\r
+ */\r
+uint32_t Tcp3d_glbMap (uint8_t coreID, uint32_t addr)\r
+{\r
+ uint32_t upcastAddr = 0;\r
+\r
+ /*\r
+ * Address mapping is done based on the mapping shown below.\r
+ * \r
+ * L2SRAM : org = 0x00800000, len = 0x100000 (local)\r
+ * GEM0_L2_MEM : org = 0x10800000, len = 0x100000 (global)\r
+ * GEM1_L2_MEM : org = 0x11800000, len = 0x100000 (global)\r
+ * GEM2_L2_MEM : org = 0x12800000, len = 0x100000 (global)\r
+ * GEM3_L2_MEM : org = 0x13800000, len = 0x100000 (global)\r
+ *\r
+ * MSMCSRAM : org = 0x0c000000, len = 0x200000 (global)\r
+ */\r
+\r
+ /* Check if the address is in L2SRAM & a valid coreID */\r
+ if ( ( addr >= 0x00800000 ) && ( addr < 0x00900000 ) )\r
+ {\r
+ upcastAddr = (uint32_t)( (0x10 | ( coreID & 0x3 )) << 24 );\r
+ }\r
+\r
+ return ( addr | upcastAddr );\r
+}\r
+\r
+/* Division of (a/b) */\r
+uint32_t Tcp3d_div32by16(uint32_t num, uint16_t den)\r
+{\r
+ int32_t expn;\r
+ uint32_t normal;\r
+ uint32_t a, b;\r
+ int32_t i;\r
+ int32_t ret;\r
+\r
+ normal = _norm( den );\r
+ a = ( den << normal ) & 0x7fff0000;\r
+ b = 0x80000000; /* dividend = 1 */\r
+\r
+ #ifdef _TMS320C6X\r
+ #pragma MUST_ITERATE( 15,15 );\r
+ #endif\r
+ for(i = 15; i > 0; i--)\r
+ {\r
+ b = _subc( b, a ); /* divide */\r
+ }\r
+ b = b & 0x7fff;\r
+ expn = 30 - (int32_t) normal;\r
+ ret = _sshvr( _mpylir( b,num), expn );\r
+\r
+ return (ret);\r
+}\r
+\r
+/* end of file */\r
diff --git a/src/tcp3d_utils.h b/src/tcp3d_utils.h
--- /dev/null
+++ b/src/tcp3d_utils.h
@@ -0,0 +1,145 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_UTILS_H_\r
+#define _TCP3D_UTILS_H_\r
+\r
+/* c99 types includes */\r
+#include <stdint.h>\r
+#include <stdlib.h>\r
+\r
+/* ========================================================================= */\r
+/**\r
+ * @brief Macro for providing the address with the alignment requested\r
+ */\r
+#define ALIGN(Addr, Algnmt) ((Addr+(Algnmt)-1)&(0xFFFF-(Algnmt)+1))\r
+\r
+/**\r
+ * @brief Macro for computing minimum of the two values\r
+ */\r
+#define MIN(x,y) ((x) < (y) ? (x):(y))\r
+\r
+/**\r
+ * @brief Macro for computing maximum of the two values\r
+ */\r
+#define MAX(x,y) ((x) > (y) ? (x):(y))\r
+\r
+/**\r
+ * @brief Macro for computing hard decisions size in words \r
+ */\r
+#define COMPUTE_HD_WORD_SIZE(x) (((x)+31)>>5)\r
+\r
+/**\r
+ * @brief Macro for computing hard decisions size in bytes\r
+ */\r
+#define COMPUTE_HD_BYTE_SIZE(x) (COMPUTE_HD_WORD_SIZE(x)*4)\r
+\r
+/**\r
+ * @brief Macro for computing Kext value for WCDMA using the formula\r
+ * Kext=4*Ceil(K/4)\r
+ */\r
+#define COMPUTE_KEXT(a) (4*((a+3)>>2))\r
+\r
+/**\r
+ * @brief Macro for computing Kout value for WCDMA using the formula\r
+ * Kout = (2*KEXT-K).\r
+ * @ref COMPUTE_KEXT macro\r
+ */\r
+#define COMPUTE_KOUT(x) ((2*COMPUTE_KEXT(x))-(x))\r
+\r
+/**\r
+ * @brief Macro for computing Kt value for WCDMA using the formula\r
+ * Kt = 3 - (Kext-K)\r
+ * @ref COMPUTE_KOUT macro\r
+ */\r
+#define COMPUTE_KT(x) (3 -(COMPUTE_KEXT(x)-(x)))\r
+\r
+/* ========================================================================= */\r
+\r
+/* ========================================================================= */\r
+/**\r
+ * \fn uint32_t Tcp3d_glbMap (uint8_t coreID, uint32_t addr)\r
+ *\r
+ * \brief This is a utility function provided as part of TCP3D Driver for\r
+ * converting the local address to the global address using the \r
+ * coreID.\r
+ * The address mapping will be done only if the address falls in\r
+ * the defined local L2 memory area. Otherwise, the address is\r
+ * returned as is.\r
+ * \r
+ * \param[in] coreID\r
+ * Core ID value corresponding to the local core. If the coreID\r
+ * value is invalid, the address translation is not done.\r
+ * \r
+ * \param[in] addr\r
+ * Local address for which the global mapped address is required.\r
+ *\r
+ * \pre Pass the coreID value [0-3] depending on where test application\r
+ * is running.\r
+ *\r
+ * \post None\r
+ *\r
+ * \return Returns the global address value of the passed local address.\r
+ * \r
+ */\r
+uint32_t Tcp3d_glbMap (uint8_t coreID, uint32_t addr);\r
+\r
+/**\r
+ * \fn uint32_t Tcp3d_div32by16(uint32_t num, uint16_t den)\r
+ *\r
+ * \brief This is a utility function provided as part of TCP3D Driver for\r
+ * calculating the division of a 32-bit value by a 16-bit value.\r
+ * \r
+ * \param[in] num\r
+ * Numerator value.\r
+ * \r
+ * \param[in] den\r
+ * Denominator value.\r
+ *\r
+ * \pre Pass the coreID value [0-3] depending on where test application\r
+ * is running.\r
+ *\r
+ * \post None\r
+ *\r
+ * \return Returns the global address value of the passed local address.\r
+ * \r
+ */\r
+uint32_t Tcp3d_div32by16(uint32_t num, uint16_t den);\r
+\r
+/* ========================================================================= */\r
+\r
+#endif /* _TCP3D_UTILS_H_ */\r
diff --git a/tcp3d_drv.h b/tcp3d_drv.h
--- /dev/null
+++ b/tcp3d_drv.h
@@ -0,0 +1,1523 @@
+/**\r
+ * @file tcp3d_drv.h\r
+ *\r
+ * @brief\r
+ * Header file for the TCP3 Decoder Driver. The file exposes the data\r
+ * structures and exported API which are available for use by the driver\r
+ * users.\r
+ *\r
+ * \par\r
+ * NOTE:\r
+ * (C) Copyright 2011 Texas Instruments, Inc.\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/** @defgroup TCP3D_DRV_API TCP3 Decoder Driver\r
+ *\r
+ * @section Introduction\r
+ *\r
+ * @subsection xxx Overview\r
+ * The TCP3 decoder driver provides a well defined standard interface\r
+ * which allows application developers to send code blocks for decoding and\r
+ * receive hard decision and status via EDMA3 transfers. \r
+ */\r
+\r
+#ifndef _TCP3D_DRV_H_\r
+#define _TCP3D_DRV_H_\r
+\r
+/**\r
+@defgroup TCP3D_DRV_SYMBOL TCP3D Driver Symbols Defined\r
+@ingroup TCP3D_DRV_API\r
+*/\r
+/**\r
+@defgroup TCP3D_DRV_FUNCTION TCP3D Driver Functions\r
+@ingroup TCP3D_DRV_API\r
+*/\r
+/**\r
+@defgroup TCP3D_DRV_UTIL_FUNCTION TCP3D Driver Utility Functions\r
+@ingroup TCP3D_DRV_API\r
+*/\r
+/**\r
+@defgroup TCP3D_DRV_DATASTRUCT TCP3D Driver Data Structures\r
+@ingroup TCP3D_DRV_API\r
+*/\r
+/**\r
+@defgroup TCP3D_OSAL_API TCP3D Driver OSAL Functions\r
+@ingroup TCP3D_DRV_API\r
+*/\r
+\r
+/**\r
+ * Driver Includes\r
+ */\r
+/* Types include */\r
+#include <tcp3d_drv_types.h>\r
+\r
+/* EDMA3 LLD Driver include */\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/cslr_tpcc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+\r
+/* Version include */\r
+#include "tcp3dver.h"\r
+\r
+/* ========================================================================= */\r
+/** @addtogroup TCP3D_DRV_SYMBOL\r
+ @{ */\r
+\r
+/**\r
+ * @brief Used for indexing the Status Channel.\r
+ */\r
+#define TCP3D_DRV_MAX_NUM_INSTANCES (CSL_TCP3D_PER_CNT)\r
+\r
+/**\r
+ * @brief This is the TCP3D Driver maximum channels required per each PING\r
+ * and PONG paths. Channel Index values are defined to get references\r
+ * to the pingCh[] or pongCh[] arrays in the driver instance.\r
+ */\r
+#define TCP3D_DRV_MAX_CH_PER_PATH (2u)\r
+\r
+/**\r
+ * @brief Used for indexing the Status Channel.\r
+ */\r
+#define TCP3D_DRV_CH_IDX_REVT (0u)\r
+\r
+/**\r
+ * @brief Used for indexing the L2 to PaRAM Channel.\r
+ */\r
+#define TCP3D_DRV_CH_IDX_L2P (1u)\r
+\r
+/**\r
+ * @brief Maximum Link channels required per code block for swapping from\r
+ * pseudo PaRAM memory during run-time.\r
+ */\r
+#define TCP3D_DRV_LINK_CB (5u)\r
+\r
+/**\r
+ * @brief Number of Link channels used for control/reload operations.\r
+ */\r
+#define TCP3D_DRV_LINK_CTRL (4u)\r
+\r
+/**\r
+ * @brief Number of Link channels used for notification use.\r
+ */\r
+#define TCP3D_DRV_LINK_NOTIFY (2u)\r
+\r
+/**\r
+ * @brief This is the TCP3D Driver maximum link channels required for both\r
+ * PING and PONG paths.\r
+ */\r
+#define TCP3D_DRV_MAX_LINK_CH (((TCP3D_DRV_LINK_CB) + \\r
+ (TCP3D_DRV_LINK_CTRL) + \\r
+ (TCP3D_DRV_LINK_NOTIFY)) << 1) \r
+\r
+/**\r
+ * @brief This define gives the number of buffers required for TCP3D Driver.\r
+ */\r
+#define TCP3D_DRV_NUM_BUF (2u)\r
+\r
+/**\r
+ * @brief This is used for getting the instance buffer index.\r
+ */\r
+#define TCP3D_DRV_INST_BUFN (0u)\r
+\r
+/**\r
+ * @brief This is used for getting the pseudo param buffer index.\r
+ */\r
+#define TCP3D_DRV_PSEUDO_PARAM_BUFN (1u)\r
+\r
+/**\r
+ * @brief This is the start flag for PING.\r
+ */\r
+#define TCP3D_DRV_START_PING (1u)\r
+\r
+/**\r
+ * @brief This is the start flag for PONG.\r
+ */\r
+#define TCP3D_DRV_START_PONG (2u)\r
+\r
+/**\r
+ * @brief This is the start flag for AUTO.\r
+ */\r
+#define TCP3D_DRV_START_AUTO (3u)\r
+\r
+/**\r
+@}\r
+*/\r
+\r
+/* ========================================================================= */\r
+\r
+/* ========================================================================= */\r
+/** @addtogroup TCP3D_DRV_DATASTRUCT\r
+ @{ */\r
+\r
+/**\r
+ * @brief Memory Buffer class definitions.\r
+ */\r
+typedef enum Tcp3d_BufClass\r
+{\r
+ Tcp3d_BufClass_EXTERNAL = 0, /**< generic (bulk) external memory */\r
+ Tcp3d_BufClass_INTERNAL, /**< generic (bulk) internal memory */\r
+ Tcp3d_BufClass_L2RAM, /**< Local L2 Memory */\r
+ Tcp3d_BufClass_L2SRAM, /**< Shared L2 Memory (on another core) */\r
+ Tcp3d_BufClass_MSMC /**< Shared Memory */\r
+} Tcp3d_BufClass;\r
+\r
+/**\r
+ * @brief Driver return values to application.\r
+ */\r
+typedef enum Tcp3d_Result\r
+{\r
+ TCP3D_DRV_NO_ERR, /**< No Error, Success */\r
+ TCP3D_DRV_FAIL, /**< General Error */\r
+ TCP3D_DRV_INPUT_LIST_FULL, /**< Enqueue error message */\r
+ TCP3D_DRV_INVALID_INSTANCE_NUMBER, /**< Unsupported Instance number */\r
+ TCP3D_DRV_INVALID_PARAMETER, /**< Parameter value is not correct */\r
+ TCP3D_DRV_INVALID_STATE, /**< API called in invalid state */\r
+ TCP3D_DRV_INVALID_BUFF, /**< Invalid buffer pointer */\r
+ TCP3D_DRV_INVALID_EDMA_CH, /**< Invalid EDMA channel */\r
+ TCP3D_DRV_FAIL_EDMA_PARAM_INIT, /**< EDMA PaRAM initialization failed */\r
+ TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL, /**< EDMA enable channel failed */\r
+ TCP3D_DRV_FAIL_EDMA_GET_PARAM_ADDR /**< EDMA get PaRAM address failed */\r
+} Tcp3d_Result;\r
+\r
+/**\r
+ * @brief Driver state indication\r
+ */\r
+typedef enum Tcp3d_State\r
+{\r
+ /** This is the driver init state which is used to set in the state\r
+ * variables either at the end of initialization or after the reset. */\r
+ TCP3D_DRV_STATE_INIT = 0,\r
+ \r
+ /** This state indicates the driver is running in a steady state. This is\r
+ * used when ever the driver start is done. In this state, the code blocks\r
+ * are DMAed from input list to TCP3D for execution continuously. */\r
+ TCP3D_DRV_STATE_RUNNING,\r
+ \r
+ /** This state indicates the driver is halted from steady state execution.\r
+ * It could happen if chain to the next code block is not available when\r
+ * the time previous block was DMAed for execution or there are no more\r
+ * code blocks for decoding. If there are more blocks for decoding, restart\r
+ * is required for the driver to complete all decoding. */\r
+ TCP3D_DRV_STATE_PAUSE\r
+} Tcp3d_State;\r
+\r
+/**\r
+ * @brief Driver Control Commands.\r
+ */\r
+typedef enum Tcp3d_CtrlCmd\r
+{\r
+ /** Used for enabling or disbling the interrupt generation by REVT channels.\r
+ * This is done using the EDMA CC IER or IERH register. */\r
+ TCP3D_DRV_SET_REVT_INT, \r
+\r
+ /** Used for clearing the pending interrupts generated by REVT channels\r
+ * in the EDMA CC IPR or IPRH register. */\r
+ TCP3D_DRV_CLR_REVT_INT,\r
+\r
+ /** Used for enabling or disbling the interrupt generation by L2P channels.\r
+ * This is done by setting the corresponding PaRAM OPT field bit. \r
+ * \b Note that this will result in REVT Channel ISR as the TCC value on the\r
+ * L2P channel PaRAM is set with REVT channel number for chaining use. */\r
+ TCP3D_DRV_SET_L2P_INT,\r
+ \r
+ /** Set interrupt for PING Pause channel (depricated) */\r
+ TCP3D_DRV_SET_PING_PAUSE_INT,\r
+ \r
+ /** Set interrupt for PONG Pause channel (depricated) */\r
+ TCP3D_DRV_SET_PONG_PAUSE_INT,\r
+ \r
+ /** Set interrupt for PING L2P channel (depricated) */\r
+ TCP3D_DRV_SET_PING_L2P_INT,\r
+ \r
+ /** Set interrupt for PONG L2P channel (depricated) */\r
+ TCP3D_DRV_SET_PONG_L2P_INT\r
+} Tcp3d_CtrlCmd;\r
+\r
+/**\r
+ * @brief Driver Status query Commands\r
+ */\r
+typedef enum Tcp3d_StsCmd\r
+{\r
+ TCP3D_DRV_GET_STATE, /**< Get driver state information */\r
+ TCP3D_DRV_GET_PING_OUT_IDX, /**< To compute the PING output index in\r
+ the pseudo PaRAM list */\r
+ TCP3D_DRV_GET_PONG_OUT_IDX, /**< To compute the PONG output index in\r
+ the pseudo PaRAM list */\r
+ TCP3D_DRV_GET_MIN_OUT_IDX /**< To compute minimum output index in\r
+ the pseudo PaRAM list, used in the\r
+ wrap-around case */\r
+} Tcp3d_StsCmd;\r
+\r
+/**\r
+@}\r
+*/\r
+/* ========================================================================= */\r
+\r
+/* ========================================================================= */\r
+/** @addtogroup TCP3D_DRV_DATASTRUCT\r
+ @{ */\r
+\r
+/**\r
+ * @brief Parameters which determine buffer sizes.\r
+ *\r
+ * These are configured and passed with getNumBuf() & getBufDesc() funcitons\r
+ * to get the buffer requirement of the TCP3.\r
+ */\r
+typedef struct Tcp3d_SizeCfg\r
+{\r
+ uint32_t maxCodeBlocks; /**< Maximum code blocks for which driver will\r
+ be configured */\r
+ uint32_t mode; /**< TCP3 Decode mode for which the driver\r
+ instance will be used */\r
+} Tcp3d_SizeCfg;\r
+\r
+/**\r
+ * @brief Memory Buffer Structure.\r
+ *\r
+ * This structure is used to request and/or supply the \r
+ * dynamic memory to the components.\r
+ */\r
+typedef struct Tcp3d_MemBuffer\r
+{\r
+\r
+ Tcp3d_BufClass mclass; /**< Memory class. It is used to describe kind of \r
+ memory that is requested or returned. For \r
+ example: external, internal, or similar. One \r
+ should use MEM_CLASS_xxx constants. On RETURN, \r
+ class may be changed if original memory class \r
+ is exhausted. */\r
+ uint16_t log2align; /**< Alignment information (>= 0). If zero, no \r
+ alignment is required nor provided. Otherwise, \r
+ memory buffer is aligned on appropriate power \r
+ of 2 (e.g. if log2align=3, buffer is aligned \r
+ modulo-8). */\r
+ uint32_t size; /**< Number of 8 bit words that are requested or supplied. \r
+ Word length depends on the platform, and \r
+ corresponds to the shortest element that can be \r
+ addressed by the CPU. Word storage length in bits \r
+ is defined in types.h as TYP_TWORD_SIZE. The \r
+ maximum size depends on the platform. */\r
+ uint16_t volat; /**< TRUE: Memory buffer must be restored before and \r
+ saved after it is used.\r
+ FALSE: Save/restore are not necessary.\r
+ On RETURN, volatile flag may be changed if \r
+ original request could not be satisfied. */\r
+ void *base; /**< Base address of the requested buffer. */\r
+} Tcp3d_MemBuffer;\r
+\r
+/**\r
+ * @brief The TCP3 decoder initialization parameters structure holds all the\r
+ * information concerning the user channel. These values are used to\r
+ * generate the control configuration register values for the TCP3D.\r
+ * \r
+ * Valid values for each field are provided in the brackets in the\r
+ * comments following the field name.\r
+ */ \r
+typedef struct Tcp3d_CtrlParams\r
+{\r
+ /* Mode Control Register parameters */\r
+ uint8_t mode; /**< TCP3D mode (0 - 3) */\r
+ uint16_t doubleBuf; /**< Enable/disable the double buffer (0,1) */\r
+ uint16_t intTable; /**< Enable/disable the Interleaver Table\r
+ Generation (0,1) */\r
+ uint16_t errIgnore; /**< Enable/disable error detection to stop\r
+ TCP3D from running (0,1) */\r
+ uint16_t autoTrig; /**< Enable/disable auto trigger mode (0,1) */\r
+ uint8_t lteCrcSel; /**< LTE CRC initial value selection (0,1) */\r
+\r
+ /* Endian Control Register parameters */\r
+ uint8_t endInt; /**< Interleaver Table Endian mode (0,1) */\r
+ uint8_t endInData; /**< Input systematic and parity data Endian\r
+ mode (0,1) */\r
+\r
+ /* Emulation Control Register parameters */\r
+ uint8_t emuFreeRun; /**< Emulation suspend signal (0,1) */ \r
+ uint8_t emuSoftStop; /**< Emulation Soft or Hard Stop (0,1) */\r
+ uint8_t emuRtSel; /**< Maximum number of iterations (0,1) */\r
+\r
+ /* Process 0 Execution Register parameters */\r
+ uint8_t exeP0cmd; /**< Process 0 execution command (0,1,4,5,6,7)*/\r
+\r
+ /* Process 1 Execution Register parameters */\r
+ uint8_t exeP1cmd; /**< Process 1 execution command (0,1,4,5,6,7)*/\r
+\r
+} Tcp3d_CtrlParams;\r
+\r
+/**\r
+ * @brief The TCP3D runtime parameters structure holds all the information\r
+ * that could be changed per code block. These values are used to\r
+ * generate the appropriate input configuration register values for\r
+ * the TCP3D.\r
+ * \r
+ * Valid values for each field are provided in the brackets in the\r
+ * comments following the field name.\r
+ */ \r
+typedef struct Tcp3d_InCfgParams\r
+{\r
+ /* IC0 */\r
+ uint8_t numsw0; /**< number of SW0s (0 - 62) */\r
+ uint16_t blockLen; /**< code Block Length (39 - 8191) */\r
+\r
+ /* IC1 */\r
+ uint8_t sw0LenSel; /**< SW0 Length Selection value (0 - 5) */\r
+ uint8_t sw2LenSel; /**< SW2 Length Selection value (0,1,2) */\r
+ uint8_t sw1Len; /**< SW1 Length (9 - 127) */\r
+\r
+ /* IC2 */\r
+ uint8_t intLoadSel; /**< Interleaver Table load or generate\r
+ selection (0,1) */\r
+ uint16_t maxStar; /**< Enable/disable Max Star (0,1) */\r
+ uint16_t outStsRead; /**< Enable/disable Output Status registers\r
+ read via EDMA3 (0,1) */\r
+ uint8_t outOrderSel; /**< Output bit order swapping within 32-bit\r
+ word (0,1) */\r
+ uint16_t extScale; /**< Enable/disable Extrinsic scaling (0,1) */\r
+ uint16_t softOutRead; /**< Enable/disable Soft outputs read\r
+ via EDMA3 (0,1) */\r
+ uint8_t softOutOrderSel;/**< Soft output byte order (0,1)\r
+ used only in BIG ENDIAN mode */\r
+ uint8_t softOutFrmtSel; /**< Soft output bit format (0,1) */\r
+ uint8_t minIter; /**< Minumun iterations (0 - 15) */\r
+ uint8_t maxIter; /**< Maximum iterations (0 - 15) */\r
+ uint8_t snrVal; /**< SNR threshold value in dB used as stopping\r
+ criteria (0 - 20) */\r
+ uint16_t snrReport; /**< Enable/disable SNR reporting (0,1) */\r
+ uint8_t stopSel; /**< Stopping criteria selection (0 - 3) */\r
+ uint8_t crcIterSel; /**< LTE CRC consecutive matches for\r
+ stopping (0 - 3 ) */\r
+ uint8_t crcPolySel; /**< LTE CRC polynomial selection (0,1) */\r
+\r
+ /* IC3 */\r
+ uint8_t maxStarThres; /**< Max Star Threshold value (0 - 63) */\r
+ uint8_t maxStarValue; /**< Max Star Value (0 - 63) */\r
+\r
+ /* IC4-IC7 */\r
+ int8_t betaMap0[8]; /**< Beta state values for MAP0 decoder */\r
+ int8_t betaMap1[8]; /**< Beta state values for MAP1 decoder */\r
+\r
+ /* IC8-IC11 */\r
+ uint8_t extrScale[16]; /**< Extrinsic scale values */\r
+\r
+ /* IC12-IC14 */\r
+ uint16_t itgParam[5]; /**< Interleaver Table Generation init params */\r
+\r
+} Tcp3d_InCfgParams;\r
+\r
+/**\r
+ * @brief Structure to store TCP3 decoder specific values to identify its\r
+ * instance configuration information. This is created to facilitate\r
+ * the application to choose TCP3 decoder (either TCP3D_A or TCP3D_B)\r
+ * for which the driver will be configured.\r
+ * \r
+ * This structure could be used for both PING and PONG specific values.\r
+ */\r
+typedef struct Tcp3d_Config\r
+{\r
+ uint32_t inCfgStart; /**< input configuration registers start address */\r
+ uint32_t llrStart; /**< input data (LLR) start address */\r
+ uint32_t interStart; /**< inter leaver start address */\r
+ uint32_t hdStart; /**< output hard decision start address */\r
+ uint32_t sdStart; /**< output soft decision start address */\r
+ uint32_t stsStart; /**< output status registers start address */\r
+ uint32_t revtCh; /**< Channel number associated with REVT */\r
+}Tcp3d_Config;\r
+\r
+/**\r
+ * @brief TCP3D Driver instance structure\r
+ */\r
+typedef struct Tcp3d_Instance\r
+{\r
+ /** TCP3D Peripheral instance number */\r
+ uint8_t instNum;\r
+\r
+ /** Variable to keep the driver state */\r
+ volatile Tcp3d_State state;\r
+\r
+ /** Driver operating Mode for the given instance */\r
+ uint8_t mode;\r
+ \r
+ /** Double Buffer mode enable/disable */\r
+ uint16_t doubleBuffer;\r
+\r
+ /** If true, PING path is stopped */\r
+ volatile uint8_t pingStop;\r
+ \r
+ /** If true, PONG path is stopped */\r
+ volatile uint8_t pongStop;\r
+\r
+ /** TCP3D driver start mode flag. Set to NULL during init to disable the \r
+ * auto start function call from enqueue funciton until application\r
+ * initiates.\r
+ */\r
+ uint8_t startFlag;\r
+\r
+ /** CPU/DSP core ID on which this instance of driver is running */\r
+ uint8_t coreId;\r
+\r
+ /** Gives the number of free entries available in the input ping list for\r
+ * enqueue. This flag is decremented when a code block is enqueued into\r
+ * the ping list. It's value is updated in the start funciton. */\r
+ int32_t pingFreeCnt;\r
+\r
+ /** Gives the number of free entries available in the input pong list for\r
+ * enqueue. This flag is decremented when a code block is enqueued into\r
+ * the pong list. It's value is updated in the start funciton. */\r
+ int32_t pongFreeCnt;\r
+\r
+ /** Gives the Maximum number of code blocks that can be enqueued using the\r
+ * driver. This value is set during the init. */\r
+ uint32_t maxCodeBlocks;\r
+\r
+ /** Gives the next code block index for enqueue into the input list. */\r
+ uint32_t nextCodeBlockIndex;\r
+ \r
+ /** Pointer to the pseudo PaRAM buffer array base. */\r
+ EDMA3_DRV_PaRAMRegs *pseudoParamBufPtr;\r
+\r
+ /** CP_INTC0 input event number used for the output notification. Driver\r
+ * uses this value to write (using EDMA) into the STATUS_SET_INDEX_REG\r
+ * during run-time to cause system event/interrupt. */\r
+ uint32_t notificationEventNum;\r
+\r
+ /* EDMA Variables */\r
+ EDMA3_DRV_Handle edmaHnd; /**< EDMA3 LLD Driver Handle */\r
+ uint32_t edmaRegionId; /**< EDMA shadow region number*/\r
+ uint32_t pingCh[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ /**< Ping channels stored here */\r
+ uint32_t pongCh[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ /**< Pong channels stored here */\r
+ uint32_t pingChParamAddr[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ /**< Physical PaRAM addresses of the \r
+ Ping channels */\r
+ uint32_t pongChParamAddr[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ /**< Physical PaRAM addresses of the \r
+ Pong channels */\r
+ uint32_t pingLinkCh[TCP3D_DRV_MAX_LINK_CH>>1];\r
+ /**< Link channels for Ping path */\r
+ uint32_t pongLinkCh[TCP3D_DRV_MAX_LINK_CH>>1];\r
+ /**< Link channels for Pong path */\r
+ uint32_t pingLinkChParamAddr[TCP3D_DRV_MAX_LINK_CH>>1];\r
+ /**< Link channel PaRAM address for\r
+ Ping path */\r
+ uint32_t pongLinkChParamAddr[TCP3D_DRV_MAX_LINK_CH>>1];\r
+ /**< Link channel PaRAM address for\r
+ Pong path */\r
+\r
+ /** bit masks used for controlling interrupt generation by EDMA CC */\r
+ uint32_t l2pChMaskPing; /**< L2P Channel Mask for PING */\r
+ uint32_t l2pChMaskPong; /**< L2P Channel Mask for PONG */\r
+ uint32_t pauseChMaskPing; /**< REVT Channel Mask for PING */\r
+ uint32_t pauseChMaskPong; /**< REVT Channel Mask for PING */\r
+\r
+ /** EDMA shadow registers base address used during run-time */\r
+ CSL_TPCC_ShadowRegs *tpccShadowRegs;\r
+ /** Register address of TPCC_IECR used for clearing (diable) the IER bits */\r
+ uint32_t *intEnClrReg[2];\r
+ /** Register address of TPCC_IESR used for setting (enable) the IER bits */\r
+ uint32_t *intEnSetReg[2];\r
+ /** Register address of TPCC_ICR used for clearing the pending IPR bits */\r
+ uint32_t *clrIntPendReg[2];\r
+ /** Register address of TPCC_IPR used for checking pending interrupts */\r
+ uint32_t *intPendReg[2];\r
+\r
+ /* Internal Variables (most of the names are self explanatory) */\r
+ uint8_t constantOne;/**< variable set to 1 at init time and\r
+ used by PAUSE channels */\r
+ Tcp3d_State pauseState; /**< variable set to TCP3D_DRV_STATE_PAUSE\r
+ and used by PAUSE channels */\r
+ uint32_t resetHdOpt[2];\r
+ uint32_t resetHdLink[2];\r
+ uint32_t resetStsOpt[2];\r
+ uint32_t resetStsLink[2];\r
+ uint32_t resetSdOpt[2];\r
+ uint32_t resetSdLink[2];\r
+ EDMA3_DRV_PaRAMRegs *startPrmPtr;\r
+ EDMA3_DRV_PaRAMRegs *pingPtrL2p;\r
+ EDMA3_DRV_PaRAMRegs *pongPtrL2p;\r
+ EDMA3_DRV_PaRAMRegs revtPrm[2];\r
+ EDMA3_DRV_PaRAMRegs l2pPrm[2];\r
+ EDMA3_DRV_PaRAMRegs *lastParam[2];\r
+ EDMA3_DRV_PaRAMRegs *endListParam[2];\r
+ uint32_t prevNtfFlag[2];\r
+ uint32_t maxPingCbIdx;\r
+ uint32_t maxPongCbIdx;\r
+ uint32_t maxPingCbCnt;\r
+ uint32_t maxPongCbCnt;\r
+ uint32_t nextPingInIdx;\r
+ uint32_t nextPongInIdx;\r
+ uint32_t prevPingOutIdx;\r
+ uint32_t prevPongOutIdx;\r
+ int32_t pingLoadCnt;\r
+ int32_t pongLoadCnt;\r
+ volatile uint32_t pingLastOutFlag;\r
+ volatile uint32_t pongLastOutFlag;\r
+ uint8_t pingWrapCheck; \r
+ uint8_t pongWrapCheck; \r
+\r
+ /* Debug Flags */\r
+ volatile uint32_t pingStartCntr;\r
+ volatile uint32_t pongStartCntr;\r
+ volatile uint32_t pingPauseEnCntr;\r
+ volatile uint32_t pingL2pEnCntr;\r
+ volatile uint32_t pingIntr;\r
+ volatile uint32_t pongIntr;\r
+\r
+} Tcp3d_Instance;\r
+\r
+/**\r
+ * @brief TCP3D Driver Initialization parameters structure\r
+ */\r
+typedef struct Tcp3d_InitParams\r
+{\r
+ /** \r
+ * TCP3D Peripheral instance number to setup. Possible values are\r
+ * CSL_TCP3D_A or CSL_TCP3D_B.\r
+ */\r
+ uint8_t instNum;\r
+\r
+ /**\r
+ * Maximum code blocks for which the driver resources will be \r
+ * configured. This value is required to configure some parameters.\r
+ */\r
+ uint32_t maxCodeBlocks;\r
+\r
+ /**\r
+ * Core Index value [0,1,2,3]. Used for traslating local L2\r
+ * addresses into global addresses used in the EDMA transfers.\r
+ */\r
+ uint8_t coreID;\r
+\r
+ /**\r
+ * Control parameters for TCP3 decoder. All the elements in this\r
+ * structure must be filled with the required values with which\r
+ * the driver is intended to run.\r
+ * \r
+ * They are used to set the MODE, ENDIAN and EXECUTE control\r
+ * registers and also to control the driver code based on the\r
+ * configuration information like mode & double buffer.\r
+ */\r
+ Tcp3d_CtrlParams ctrlParams;\r
+\r
+ /**\r
+ * TCP3 decoder configuration registers start address. This is used\r
+ * only in the init function to start the TCP3 decoder state\r
+ * machine by writing into the control registers with the correct\r
+ * configuration values.\r
+ */\r
+ CSL_Tcp3d_cfgRegs *tcp3dCfgRegs;\r
+\r
+ /**\r
+ * Start addresses of PING (P0) memory area of TCP3 Decoder and\r
+ * the assiciated REVT channel number will be provided here. \r
+ * This structure values must be filled with appropriate addresses \r
+ * depending on the decoder instance.\r
+ */\r
+ Tcp3d_Config pingConfig;\r
+\r
+ /**\r
+ * Start addresses of PONG (P1) memory area of TCP3 Decoderand\r
+ * the assiciated REVT channel number will be provided here.\r
+ * This structure values must be filled with appropriate addresses \r
+ * depending on the decoder instance.\r
+ */\r
+ Tcp3d_Config pongConfig;\r
+\r
+ /**\r
+ * EDMA3 LLD Driver handle used in the driver to call EDMA LLD\r
+ * driver funcitons.\r
+ */\r
+ EDMA3_DRV_Handle edmaHnd;\r
+\r
+ /**\r
+ * EDMA3 shadow region ID through which all the resources are\r
+ * allocated.\r
+ */\r
+ uint32_t edmaRegionId;\r
+\r
+ /**\r
+ * Ping Channels Array. First channel must be "0" since it is tied \r
+ * to the event (REVT0) generated from TCP3D and used for reading\r
+ * outputs from the decoder memory. Total physical channels \r
+ * required is given by the define TCP3D_DRV_MAX_CH_PER_PATH.\r
+ * \r
+ * This arrary could be accesssed with the index values provided\r
+ * as define names starting with TCP3D_DRV_CH_IDX. This is useful\r
+ * for the application when it needs to setup a callback with\r
+ * specific Channel (TCC).\r
+ */\r
+ uint32_t pingCh[TCP3D_DRV_MAX_CH_PER_PATH];\r
+\r
+ /**\r
+ * Pong Channels Array. First channel must be "1" since it is tied \r
+ * to the event (REVT1) generated from TCP3D and used for reading\r
+ * outputs from the decoder memory.\r
+ *\r
+ * Total physical channels required is given by the define \r
+ * TCP3D_DRV_MAX_CH_PER_PATH.\r
+ * \r
+ * This arrary could be accesssed with the index values provided\r
+ * as define names starting with TCP3D_DRV_CH_IDX. This is useful\r
+ * for the application when it needs to setup a callback with\r
+ * specific Channel (TCC).\r
+ */\r
+ uint32_t pongCh[TCP3D_DRV_MAX_CH_PER_PATH];\r
+\r
+ /**\r
+ * Link Channels Array.\r
+ * \r
+ * Total physical channels required is given by the define\r
+ * TCP3D_DRV_MAX_LINK_CH.\r
+ * \r
+ * @note It is required that all these link channels be consecutive in\r
+ * their PaRAM memory. \r
+ */\r
+ uint32_t linkCh[TCP3D_DRV_MAX_LINK_CH];\r
+\r
+ /**\r
+ * CP_INTC0 input event used for the output notification.\r
+ */\r
+ uint32_t notificationEventNum;\r
+\r
+} Tcp3d_InitParams;\r
+\r
+/**\r
+ * @brief TCP3D Driver Status structure.\r
+ */ \r
+typedef struct Tcp3d_Sts\r
+{\r
+ Tcp3d_StsCmd cmd; /**< Command flag for Status query */\r
+ Tcp3d_State state; /**< to keep the Driver state value */\r
+ uint32_t prmOutIdx; /**< to keep the queried input pseudo PaRAM\r
+ index value */\r
+} Tcp3d_Sts;\r
+\r
+/**\r
+ * @brief TCP3D Driver Control structure.\r
+ */ \r
+typedef struct Tcp3d_Ctrl\r
+{\r
+ Tcp3d_CtrlCmd cmd; /**< Command flag for control operation */\r
+ uint32_t intrFlag; /**< interrupt flag to enable or disable\r
+ 1 - for enable\r
+ 0 - for disable */\r
+} Tcp3d_Ctrl;\r
+\r
+/**\r
+@}\r
+*/\r
+/* ========================================================================= */\r
+\r
+/* ========================================================================= */\r
+/**\r
+ * Driver Function definitions\r
+ */\r
+/** @addtogroup TCP3D_DRV_FUNCTION\r
+ @{ */\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * TCP3D Driver function for providing the number of buffers\r
+ * required.\r
+ * \r
+ * \param[in] *cfg\r
+ * Pointer to the structure of type Tcp3d_SizeCfg which has\r
+ * specific information used for determining the buffer\r
+ * requirements.\r
+ *\r
+ * For Example, TCP3D could use one field maxCodeBlocks to\r
+ * determine number of buffers required.\r
+ * \r
+ * \param[out] *nbufs\r
+ * Pointer of a variable to which TCP3D Driver proveds the number\r
+ * of buffers required.\r
+ * \r
+ * \pre Set the cfg->maxCodeBlocks value before calling this API.\r
+ *\r
+ * \post \r
+ *\r
+ * \return Status reported as either TCP3D_DRV_NO_ERR or TCP3D_DRV_FAIL.\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_getNumBuf (IN Tcp3d_SizeCfg *cfg,\r
+ OUT int16_t *nbufs);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * TCP3D Driver function for providing the attributes of all the\r
+ * number of buffers requested through the structure of type\r
+ * Tcp3d_MemBuffer provided.\r
+ * \r
+ * \param[in] *cfg\r
+ * Pointer to the structure of type Tcp3d_SizeCfg which has\r
+ * specific information used for determining the buffer\r
+ * requirements.\r
+ *\r
+ * TCP3D Driver uses the field maxCodeBlocks for determining\r
+ * the buffer sizes required.\r
+ * \r
+ * \param[out] **bufs\r
+ * Pointer to the array of Tcp3d_MemBuffer structure of size\r
+ * provided through the Tcp3d_getNumBuf() API.\r
+ *\r
+ * TCP3D Driver fills all the fileds of the structure except the\r
+ * base which application fills after allocating the memory as per\r
+ * the attributes requested.\r
+ * \r
+ * \pre Set the cfg->maxCodeBlocks value before calling this API.\r
+ *\r
+ * \post \r
+ *\r
+ * \return Status reported as either TCP3D_DRV_NO_ERR or TCP3D_DRV_FAIL.\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_getBufDesc ( IN Tcp3d_SizeCfg *cfg,\r
+ OUT Tcp3d_MemBuffer bufs[]);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * TCP3D Driver function called to reset the driver at any time\r
+ * after init and only if both PING & PONG decoders have nothing\r
+ * in the input list for decoding.\r
+ * \r
+ * This API checks if it is called in a correct state and returns\r
+ * appropriate error message.\r
+ *\r
+ * This function does the following:\r
+ * 1) Set the instance with the passed values - for example number\r
+ * of blocks for decoding in the current subframe which is\r
+ * needed for boundary checks and to setup the EDMA channels\r
+ * and a new status array pointer where the status register\r
+ * values for each code block are to be DMAed.\r
+ * 2) Initialize all the run-time instance variables to default.\r
+ * 3) Initialize the pseudo PaRAM memory with all the defaults\r
+ * based on mode.\r
+ * 4) Reset the EDMA channels with default values.\r
+ * 5) Change the state to TCP3D_DRV_STATE_INIT.\r
+ * \r
+ * \param[in] *tcp3dInst\r
+ * This is the driver instance.\r
+ * \r
+ * \param[in] codeBlocks\r
+ * Number of code blocks to be decoded for the current sub-frame.\r
+ * This value should be equal to the maxCodeBlocks.\r
+ *\r
+ * For saving cycles, you can set to lower value that should be\r
+ * multiple of 2.\r
+ *\r
+ * \pre Allocation of the statusBuf arrary must be big enough to fit\r
+ * all the register trasfers for the given codeBlocks. If the size\r
+ * is small, there will be memory step-over.\r
+ *\r
+ * \post \r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR \r
+ * \retVal Failure - TCP3D_DRV_INVALID_STATE\r
+ * \retVal Failure - TCP3D_DRV_INVALID_PARAMETER\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_reset ( IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t codeBlocks);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * TCP3D Driver Initialization function which must be called only\r
+ * once to initialize the driver instance and other required\r
+ * resources needed for the driver functionality.\r
+ * \r
+ * This funciton does the following:\r
+ * -# First this function reads the bufs structure to get the base\r
+ * addresses to set the instance and other strucures. If any\r
+ * base address is NULL, driver exits immediately with error.\r
+ * -# Initializes all the run-time instance variables to default\r
+ * values.\r
+ * -# All init-time variables are set either from the drvInitParams\r
+ * input structure or set directly.\r
+ * -# Copies all the EDMA resource information into the instance.\r
+ * - Does some sanity check on the channel numbers associated\r
+ * with REVTs. \r
+ * - Enables all the EVENT triggered channels.\r
+ * - Pre-fill most of the PaRAM entries for both the physical\r
+ * and linked channels which will be used in run-time in\r
+ * the enqueue funciton.\r
+ * -# Initializes the pseudo PaRAM buffer with fixed values.\r
+ * -# All required reset funcitons are called from this function\r
+ * to eliminate the need to call the reset API immediately.\r
+ * -# Finally before exit, starts the TCP3 Decoder state machine by\r
+ * writing into the control registers from the values provided\r
+ * in the drvInitParams->ctrlParams structure.\r
+ * \r
+ * \param[in] **bufs\r
+ * Pointer to the array of Tcp3d_MemBuffer structure of size\r
+ * provided through the Tcp3d_getNumBuf() API. This strucure must\r
+ * have all the fields filled by now. The bufs[0]->base value will\r
+ * be used for initializing the driver instance.\r
+ *\r
+ * \param[in] drvInitParams\r
+ * Driver initialization parameters structure. This structure is\r
+ * used for getting all the required resources for the driver to\r
+ * initialize the instance. Look into the description of the \r
+ * Tcp3d_InitParams structure elements for details. \r
+ * \r
+ * \pre \r
+ *\r
+ * \post \r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR \r
+ * \retVal Failure - TCP3D_DRV_INVALID_BUFF\r
+ * \retVal Failure - TCP3D_DRV_INVALID_EDMA_CH \r
+ * \retVal Failure - TCP3D_DRV_FAIL_EDMA_GET_PARAM_ADDR\r
+ * \retVal Failure - TCP3D_DRV_FAIL_EDMA_PARAM_INIT\r
+ * \retVal Failure - TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_init(IN Tcp3d_MemBuffer bufs[],\r
+ IN Tcp3d_InitParams *drvInitParams);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * TCP3D Driver De-Initialization function which must be called\r
+ * to close the corresponding instance.\r
+ * \r
+ * This funciton does the following:\r
+ * -# First this function clears any EDMA specific registers set.\r
+ * \r
+ * \param [in] *tcp3dInst\r
+ * This is the driver instance.\r
+ *\r
+ * \pre \r
+ *\r
+ * \post Application can free the resources and memory allocated for this\r
+ * instance after this function.\r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR \r
+ * \retVal Failure - TCP3D_DRV_FAIL\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_deInit(IN Tcp3d_Instance *tcp3dInst);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This is a run-time API for appending the codeblocks to the\r
+ * pseudo PaRAM list as the blocks arrive. This function updates\r
+ * the pseudo PaRAM set entries and chains to the previous block\r
+ * in the corresponding list (PING or PONG).\r
+ * \r
+ * Enqueuing is done alternately between the two lists until the\r
+ * current list is full. The no room case is indicated with return\r
+ * error TCP3D_DRV_INPUT_LIST_FULL.\r
+ * \r
+ * On each succeesful enqueue, the corresponding load counter for\r
+ * the path is incremented. This funciton updates some run-time\r
+ * varaibles which keeps track of ping and pong list indexes\r
+ * and counters.\r
+ * \r
+ * This function primarily does the following:\r
+ * -# Updates the pseudo PaRAM set with the addresses passed as \r
+ * paramters. Also, updates necessary count and index values\r
+ * within the pseudo PaRAM set which depend on the block size\r
+ * and are not pre-filled during init.\r
+ * -# Links the optional outputs, if present, to the HD param and\r
+ * sets necessary TCC values.\r
+ * -# If the ntfEventFlag is set for notification, the NTF Param is\r
+ * linked with the last param from the set.\r
+ * -# Chaining to the previous block in the corresponding list is\r
+ * done, execept for the first one in the list. This is done by\r
+ * - Changing the TCC field of the last param in the previous\r
+ * block to trigger the L2P channel.\r
+ * - Updating the link field with the dummy or NTFD depending\r
+ * on whether the previous block has notification or not.\r
+ * -# Calls the Tcp3d_start() function with auto mode as needed\r
+ * after the application initiated the first start.\r
+ *\r
+ * This function is executed at the application task thread for\r
+ * queueing the code blocks to the input pseudo PaRAM list. They\r
+ * will be copied to the actual PaRAM area using the L2P channel\r
+ * when the previous block is decoded and outputs are read as\r
+ * specified.\r
+ * \r
+ * Application need to check the return value to take appropriate\r
+ * action.\r
+ * -# If no error try enqueuing next block.\r
+ * -# If LIST FULL error, either wait for some time and try\r
+ * enqueuing or enable EDMA completion interrupts for L2P\r
+ * channels. Upon receiving the interrupt the enqueuing could\r
+ * be tried again.\r
+ * \r
+ * Since the TCC for L2P channels always point to REVT, enabling\r
+ * L2P channel interrupts would showup as REVT channel call backs.\r
+ *\r
+ * \param [in] *tcp3dInst\r
+ * This is the driver instance.\r
+ *\r
+ * \param [in] blockLength\r
+ * Code Block length value which is used for setting some of the\r
+ * PaRAM counts.\r
+ *\r
+ * \param [in] *inputConfigPtr\r
+ * Pointer to the input config registers prepared for the current\r
+ * code block.\r
+ *\r
+ * \param [in] *llrPtr\r
+ * Input data pointer where the systematic, parity 1 and parity 2\r
+ * streams are available.\r
+ *\r
+ * \param [in] llrOffset\r
+ * Input data offset between the three streams. Used for setting\r
+ * the EDMA trasfer type (A-Sync or AB-Sync) and also to set the\r
+ * source jump index.\r
+ *\r
+ * \param [in] *hdPtr\r
+ * Pointer to the memory where the decoded hard decision values to\r
+ * be DMAed.\r
+ *\r
+ * \param [in] *statusPtr\r
+ * Pointer to the memory to DMA the three status register values.\r
+ * \r
+ * This is a selective parameter which application uses only if the\r
+ * corresponding bit is set in the inputConfigRegs for reading the\r
+ * TCP3D output memory.\r
+ * \r
+ * If not used, set to @b NULL to avoid any undesired behaviour\r
+ * from the TCP3 decoder. This will also save the time for\r
+ * programming.\r
+ *\r
+ * \param [in] *sdPtr\r
+ * Pointer to the memory where the decoded soft decision values to\r
+ * be DMAed.\r
+ * \r
+ * This is a selective parameter which application uses only if the\r
+ * corresponding bit is set in the inputConfigRegs for reading the\r
+ * TCP3D output memory.\r
+ * \r
+ * If not used, set to @b NULL to avoid any undesired behaviour\r
+ * from the TCP3 decoder. This will also save the time for\r
+ * programming.\r
+ *\r
+ * \param [in] sdOffset\r
+ * Output data offset between the three streams. Not valid for\r
+ * split more, since there will be only one stream.\r
+ * \r
+ * If not used, set to @b NULL to avoid any undesired behaviour\r
+ * from the TCP3 decoder.\r
+ *\r
+ * \param [in] ntfEventFlag\r
+ * Flag for enabling the notification event to be generated at\r
+ * the end of output transfer completion of the code block. When\r
+ * set, the event number provided during the init.\r
+ * \r
+ * Useful for application to get notification after a specific\r
+ * code block is decoded to start the post-processing.\r
+ *\r
+ * \pre This driver API MUST be called only after the Tcp3d_init()\r
+ * function is called.\r
+ *\r
+ * \post Driver state value could be changed to TCP3D_DRV_STATE_RUNNING\r
+ * from TCP3D_DRV_STATE_PAUSE. This happens only if the startFlag\r
+ * was set by this time.\r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR\r
+ * \retVal Failure - TCP3D_DRV_INPUT_LIST_FULL\r
+ */\r
+Tcp3d_Result Tcp3d_enqueueCodeBlock(IN Tcp3d_Instance *tcp3dInst,\r
+ IN uint32_t blockLength,\r
+ IN uint32_t *inputConfigPtr,\r
+ IN int8_t *llrPtr,\r
+ IN uint32_t llrOffset,\r
+ IN uint32_t *hdPtr,\r
+ IN int8_t *sdPtr,\r
+ IN uint32_t sdOffset,\r
+ IN uint32_t *statusPtr,\r
+ IN uint8_t ntfEventFlag);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This API could be used for starting the driver to start doing\r
+ * EDMA transfers to TCP3 decoder for decoding from the pseudo\r
+ * PaRAM list.\r
+ * \r
+ * This function updates the load and free counts for both ping\r
+ * and pong lists.\r
+ *\r
+ * This function is executed at the application task thread for\r
+ * starting either the PING or PONG path execution.\r
+ * \r
+ * \param [in] *inst\r
+ * This is the driver instance. \r
+ *\r
+ * \param [in] startMode\r
+ * Flag tells the mode of operation.\r
+ * -# If set to TCP3D_DRV_START_AUTO, function checks both the paths\r
+ * (PING & PONG) and start the needed paths.\r
+ * -# If set with either TCP3D_DRV_START_PING or TCP3D_DRV_START_PONG,\r
+ * and the corresponding flag (pingStop or pongStop) is set then\r
+ * that path alone is started.\r
+ *\r
+ * \pre Application must have atleast one code block enqueued to the \r
+ * pseudo PaRAM list before calling this API so that driver will\r
+ * have something to start the EDMA trasfers and decoding before\r
+ * going to PAUSE state.\r
+ * \r
+ * This function should be called only after the Tcp3d_init()\r
+ * function is called.\r
+ *\r
+ * \post Driver state variable is updated, if any paths are started.\r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR\r
+ * \retVal Failure - TCP3D_DRV_FAIL_EDMA_ENABLE_CHANNEL\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_start ( IN Tcp3d_Instance *inst,\r
+ IN uint8_t startMode);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This API could be used for querying the TCP3D driver to get\r
+ * updates or take appropriate actions. The Tcp3d_StsCmd enum\r
+ * structure gives the supported commads.\r
+ * \r
+ * \note This API is not fully scoped and the possible query commands\r
+ * could be extended in future.\r
+ * \r
+ * \param[in] *inst\r
+ * This is the driver instance for which status query is made.\r
+ *\r
+ * \param[in,out] *drvStatus\r
+ * Structure used for keeping the status request command and \r
+ * for keeping the status query output.\r
+ *\r
+ * \pre Set appropriate command value before calling the function.\r
+ * \r
+ * \post \r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR (valid command)\r
+ * \retVal Failure - TCP3D_DRV_FAIL (invalid command)\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_status ( IN Tcp3d_Instance *inst,\r
+ INOUT Tcp3d_Sts *drvStatus );\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This API could be used to change or update the TCP3D driver\r
+ * instance values which are set during the init time. The\r
+ * Tcp3d_CtrlCmd enum structure gives the supported commads.\r
+ * \r
+ * \note -# This API is not fully scoped and the possible control\r
+ * commands could be extended in future.\r
+ * -# We may need to protect the instance value updations, once\r
+ * they are allowed to change in any state.\r
+ * \r
+ * \param[in] *inst\r
+ * This is the driver instance.\r
+ *\r
+ * \param[in] *drvCtrl\r
+ * Structure used for keeping the control request command and\r
+ * also for passing any input values along with as required. \r
+ *\r
+ * \pre Set appropriate command value before calling the function.\r
+ * \r
+ * \post Depending on the command the driver behaviour would be changed. \r
+ *\r
+ * \retVal Success - TCP3D_DRV_NO_ERR (valid command)\r
+ * \retVal Failure - TCP3D_DRV_FAIL (invalid command)\r
+ *\r
+ */\r
+Tcp3d_Result Tcp3d_control (IN Tcp3d_Instance *inst,\r
+ IN Tcp3d_Ctrl *drvCtrl );\r
+\r
+/**\r
+@}\r
+*/\r
+/* ========================================================================= */\r
+\r
+/* ========================================================================= */\r
+/**\r
+ * Utility Function definitions\r
+ * - Register Preparation Function definitions\r
+ * - Any other functions\r
+ */\r
+\r
+/** @addtogroup TCP3D_DRV_UTIL_FUNCTION\r
+ @{ */\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * TCP3D Driver function for preparing the common control registers\r
+ * from the input structure parameters using the CSL_FINS macro.\r
+ * \r
+ * The outputs could be used to write into the actual TCP3 decoder\r
+ * memory registers directly or DMAed to bring the TCP3 decoder\r
+ * state machine to WAIT for inputs state.\r
+ * \r
+ * \param[in] *ctrl\r
+ * Pointer to structure of type Tcp3d_CtrlParams for providing\r
+ * the input parameters for the control variables.\r
+ *\r
+ * \param[out] *modeReg\r
+ * Pointer to the mode register variable to put the prepared value. \r
+ * \r
+ * \param[out] *endReg\r
+ * Pointer to the endian register variable for placing the\r
+ * prepared value. \r
+ * \r
+ * \param[out] *exeRegP0\r
+ * Pointer to the process 0 execution register variable for\r
+ * placing the prepared value. \r
+ * \r
+ * \param[out] *exeRegP1\r
+ * Pointer to the process 1 execution register variable for\r
+ * placing the prepared value.\r
+ * \r
+ * \pre All the parameters in the input ctrl structure must be set\r
+ * before calling this API. Read the Tcp3d_CtrlParams structure\r
+ * description to see if some parameters are reserved for future\r
+ * use in which case they need not be set. \r
+ *\r
+ * \post \r
+ *\r
+ * \return \r
+ * \r
+ */\r
+void Tcp3d_prepControlRegs( IN Tcp3d_CtrlParams *ctrl,\r
+ OUT uint32_t *modeReg,\r
+ OUT uint32_t *endReg,\r
+ OUT uint32_t *exeRegP0,\r
+ OUT uint32_t *exeRegP1);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This is a utility function provided as part of TCP3D Driver for\r
+ * preparing a fixed set of input config registers that would be\r
+ * fixed for a typical configuration and will not vary from \r
+ * code block to code block.\r
+ * \r
+ * This function is used for preparing IC2, IC3, IC8-IC11 registers\r
+ * only of 15 registers (IC0-IC14) using CSL_FINS macro.\r
+ * \r
+ * The output outICRegs could be used as template IC registers\r
+ * array when preparing the input config registers for code blocks.\r
+ * \r
+ * \param[in] *inCfgParams\r
+ * Pointer to structure of input parameters of type\r
+ * Tcp3d_InCfgParams for preparing IC0-IC14 (15 registers).\r
+ *\r
+ * \param[out] *outICRegs\r
+ * Pointer to the array for holding the 15 registers memory.\r
+ * @b Note that only the relavent registers are updated. \r
+ * \r
+ * \pre Parameters required for preparing fixed registers (IC2, IC3,\r
+ * IC8-IC11) must be set in the input parameters structure\r
+ * before calling this API.\r
+ * \r
+ * Read the Tcp3d_InCfgParams structure description to see details\r
+ * on which parameters are needed.\r
+ *\r
+ * \post \r
+ *\r
+ * \return \r
+ * \r
+ */\r
+void Tcp3d_prepFixedConfigRegs ( \r
+ IN Tcp3d_InCfgParams * const RESTRICT inCfgParams,\r
+ OUT uint32_t * const RESTRICT outICRegs);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This is a utility function provided as part of TCP3D Driver for\r
+ * preparing the input config registers that will be used for\r
+ * sending to TCP3 decoder IP memory before sending the LLR data.\r
+ * \r
+ * This function is used for preparing all the 15 input config\r
+ * registers (IC0-IC14) using CSL_FINS macro.\r
+ * \r
+ * This function along with Tcp3d_prepFixedConfigRegs provides\r
+ * an otimization knowing that some of the registers will not\r
+ * change for each block in general. The last two paramaters are\r
+ * provided to use this feature. Once the fixed register fields\r
+ * are known, Tcp3d_prepFixedConfigRegs funciton could be\r
+ * called for preparing the fixed registers and get the tempICRegs\r
+ * array ready in advance sometime during init time. This array\r
+ * could be supplied with the Tcp3d_prepConfigRegs API along\r
+ * with a flag to copy the fixed registers from the array instead\r
+ * of preparing.\r
+ * \r
+ * \param[in] mode\r
+ * Mode of the TCP3D IP block used for determing what to fill in to\r
+ * IC12, IC13, IC14 registers (Initial ITG Param values).\r
+ * These registers must be prepared only for LTE and WIMAX case,\r
+ * otherwise set to ZERO always.\r
+ * \r
+ * \param[in] *inCfgParams\r
+ * Pointer to structure of input parameters of type\r
+ * Tcp3d_InCfgParams for preparing IC0-IC14 (15 registers).\r
+ *\r
+ * \param[out] *outICRegs\r
+ * Pointer to the memory array for holding the fully prepared\r
+ * registers, ready to be copied to TCP3 decoder IP memory.\r
+ * \r
+ * \param[in] *tempICRegs\r
+ * Template memory array pointer with fixed registers prepared.\r
+ * This array should have been prepared one time by calling the\r
+ * Tcp3d_prepFixedConfigRegs function well in advance.\r
+ * Part of this array will be used only if the copyFixedReg flag\r
+ * parameter is set to non-zero value. \r
+ * \r
+ * \param[in] copyFixedReg\r
+ * Flag to tell whether to use the tempICRegs array to copy the\r
+ * fixed input config registers or to prepare all of them in this\r
+ * function.\r
+ * \r
+ * \pre All the parameters in the input structure param must be set\r
+ * before calling this API.\r
+ *\r
+ * You can avoid setting some of the register parameters, if you\r
+ * use the optimization trick as described in the description. In\r
+ * that case, the fixed register parameterss need not be set.\r
+ *\r
+ * Read the Tcp3d_InCfgParams structure description to see details\r
+ * on which parameters are needed.\r
+ *\r
+ * \post \r
+ *\r
+ * \return \r
+ * \r
+ * \ref Tcp3d_prepFixedConfigRegs\r
+ *\r
+ */\r
+void Tcp3d_prepConfigRegs (\r
+ IN uint8_t mode,\r
+ IN Tcp3d_InCfgParams * const RESTRICT inCfgParams,\r
+ OUT uint32_t * const RESTRICT outICRegs,\r
+ IN uint32_t * const RESTRICT tempICRegs,\r
+ IN uint8_t copyFixedReg);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This is a utility function is provided as part of TCP3D Driver\r
+ * for preparing the specific input config registers which depend\r
+ * on the block size.\r
+ * \r
+ * This function can be used for preparing IC0, IC1, IC12-IC14\r
+ * registers only out of 15 registers (IC0-IC14) using \r
+ * CSL_FINS macro.\r
+ *\r
+ * This function is called per code block.\r
+ * \r
+ * \param[in] mode\r
+ * Driver mode of operation.\r
+ *\r
+ * \param[out] *outICRegs\r
+ * Pointer to the array for holding the 15 registers memory.\r
+ * @b Note that only the relavent registers are updated. \r
+ * \r
+ * \param[in] numsw0\r
+ * Number of SW0 used in the decoder.\r
+ *\r
+ * \param[in] blockLen\r
+ * Block length value as required to be populated in the registers.\r
+ *\r
+ * \param[in] sw0LenSel\r
+ * The value of this parameter depends on the actual SW0 length\r
+ * used and the possible values are described below.\r
+ * 0 \96 16 bits\r
+ * 1 \96 32 bits\r
+ * 2 \96 48 bits\r
+ * 3 \96 64 bits\r
+ * 4 \96 96 bits\r
+ * 5 \96 128 bits\r
+ *\r
+ * \param[in] sw1Len\r
+ * The value of this parameter depends on the actual SW1 length\r
+ * used and the possible values are described below.\r
+ * 9 \96 10 bits\r
+ * 10 \96 11 bits\r
+ * 11 \96 12 bits\r
+ * ...\r
+ * 127 \96 128 bits\r
+ *\r
+ * \param[in] sw2LenSel\r
+ * The value of this parameter depends on the actual SW1 length\r
+ * used and the possible values are described below.\r
+ * 0 \96 SW2 is not present\r
+ * 1 \96 SW2 length is same as SW1\r
+ * 2 \96 SW2 length is less by 2 bits from SW1\r
+ *\r
+ * \param[in] *itgParam\r
+ * Interleaver Table Generation init params.\r
+ *\r
+ * \pre Input Parameters required for this function must be computed\r
+ * as per the guildelines given in the user guide for preparing\r
+ * these specific registers (IC0, IC1, IC12-IC14).\r
+ * \r
+ * \Note The following rules must be followed when programming sliding\r
+ * window values, otherwise expect unpredictable results.\r
+ * 1. SW0 length >= SW1 length; If num_sw0 > 0\r
+ * 2. SW1 length >= 10\r
+ * 3. If (SW0 length - SW1 length < 4 and SW1 length != SW2 length )\r
+ * then SW2 length must = 0 (off)\r
+ * 4. K <= N * 128 * SW0 Nominal length\r
+ * \r
+ * where K = block Length and N = Number of MAP decoders\r
+ * ( 2 - LTE/WiMAX mode )\r
+ * ( 1 - WCDMA mode )\r
+ *\r
+ * \post \r
+ *\r
+ * \return \r
+ * \r
+ */\r
+void Tcp3d_prepBlockSizeDepConfigRegs ( IN uint8_t mode,\r
+ OUT uint32_t * const RESTRICT outICRegs,\r
+ IN uint8_t numsw0,\r
+ IN uint16_t blockLen,\r
+ IN uint8_t sw0LenSel,\r
+ IN uint8_t sw2LenSel,\r
+ IN uint8_t sw1Len,\r
+ IN uint16_t * const RESTRICT itgParam);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This is a utility function is provided as part of TCP3D Driver\r
+ * for preparing the beta state value dependent input config\r
+ * registers only.\r
+ * \r
+ * This function can be used for preparing IC4-IC7 registers only\r
+ * out of 15 registers (IC0-IC14) using CSL_FINS macro.\r
+ * \r
+ * \param[in] mode\r
+ * Driver mode of operation.\r
+ *\r
+ * \param[out] *outICRegs\r
+ * Pointer to the array for holding the 15 registers memory.\r
+ * @b Note that only the relavent registers are updated. \r
+ * \r
+ * \param[in] *betaMap0\r
+ * Beta state values for MAP0 decoder.\r
+ * \r
+ * \param[in] *betaMap1\r
+ * Beta state values for MAP1 decoder.\r
+ * \r
+ * \pre Input Parameters required for this function must be computed\r
+ * as per the guildelines given in the user guide for preparing\r
+ * these specific registers (IC4-IC7).\r
+ * \r
+ * \post \r
+ *\r
+ * \return \r
+ * \r
+ */\r
+void Tcp3d_prepBetaStateConfigRegs( IN uint8_t mode,\r
+ OUT uint32_t * const RESTRICT outICRegs,\r
+ IN int8_t * const RESTRICT betaMap0,\r
+ IN int8_t * const RESTRICT betaMap1);\r
+\r
+/** \r
+ * @b Description\r
+ * @n \r
+ * Calculates initial beta state values using the tail bits that\r
+ * could be used in preparing the TCP3D input configuration\r
+ * registers.\r
+ * \r
+ * \param[in] tailBits\r
+ * Tail Bits buffer of size 12. The tail bits are expected to be\r
+ * in the order Xt1[0],Pt1[0],Xt1[1],Pt1[1],Xt1[2],Pt1[2],Xt2[0],\r
+ * Pt2[0],Xt2[1],Pt2[1],Xt2[2],Pt2[2].\r
+ *\r
+ * \param[in] signChange\r
+ * For sign inversion information.\r
+ * 1 - the sign of the outputs changed\r
+ * 0 - the output sign is unchanged.\r
+ * \r
+ * \param[out] Kt\r
+ * Number of trellis stages used to calculate initial beta states.\r
+ * This values is computed using the formula [3 - (Kext-K)],\r
+ * where K is the code block length.\r
+ * \r
+ * \param[out] beta0Ptr\r
+ * Initial beta state values for the MAP0 decoder computed from\r
+ * the tail bits. The buffer size is 8.\r
+ *\r
+ * \param[out] beta1Ptr\r
+ * Initial beta state values for the MAP1 decoder computed from\r
+ * the tail bits. The buffer size is 8.\r
+ *\r
+ * \return\r
+ */\r
+void Tcp3d_betaStates( IN int8_t * const RESTRICT tailBits,\r
+ IN int32_t signChange,\r
+ IN int32_t Kt,\r
+ OUT int8_t * const RESTRICT beta0Ptr,\r
+ OUT int8_t * const RESTRICT beta1Ptr);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to get the version information of the TCP3D Driver.\r
+ *\r
+ * @retval\r
+ * Version Information.\r
+ */\r
+uint32_t Tcp3d_getVersion (void);\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to get the version string for the TCP3D Driver.\r
+ *\r
+ * @retval\r
+ * Version String.\r
+ */\r
+const char* Tcp3d_getVersionStr (void);\r
+\r
+/**\r
+@}\r
+*/\r
+/* ========================================================================= */\r
+\r
+#endif /* _TCP3D_DRV_H_ */\r
diff --git a/tcp3d_drv_types.h b/tcp3d_drv_types.h
--- /dev/null
+++ b/tcp3d_drv_types.h
@@ -0,0 +1,78 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_DRV_TYPES_H_\r
+#define _TCP3D_DRV_TYPES_H_\r
+\r
+/* c99 types includes */\r
+#include <stdint.h>\r
+#include <stdlib.h>\r
+\r
+/** @addtogroup TCP3D_DRV_MACRO\r
+ @{ */\r
+\r
+/**\r
+ * @brief Key work used with the function definitions to represent them as \r
+ * static and inline type functions.\r
+ */\r
+#define INLINE static inline\r
+\r
+/**\r
+ * @brief Key work for restrict abstracted to support various compilers.\r
+ */\r
+#define RESTRICT restrict\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as INPUT only.\r
+ */\r
+#define IN\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as OUTPUT only.\r
+ */\r
+#define OUT\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as both INPUT and OUTPUT.\r
+ */\r
+#define INOUT\r
+\r
+/**\r
+@}\r
+*/\r
+\r
+#endif /* _TCP3D_DRV_TYPES_H_ */\r
diff --git a/tcp3d_osal.h b/tcp3d_osal.h
--- /dev/null
+++ b/tcp3d_osal.h
@@ -0,0 +1,106 @@
+/**\r
+ * @file tcp3d_osal.h\r
+ *\r
+ * @brief \r
+ * This is the sample OS Adaptation layer which is used by the TCP3D\r
+ * driver. The OSAL layer can be ported in either of the following \r
+ * manners to a native OS:\r
+ *\r
+ * <b> Approach 1: </b>\r
+ * @n Use Prebuilt Libraries\r
+ * - Ensure that the provide an implementation of all \r
+ * Osal_XXX API for their native OS.\r
+ * - Link the prebuilt libraries with their application.\r
+ * - Refer to the "example" directory for an example of this\r
+ * @n <b> Pros: </b>\r
+ * - Customers can reuse prebuilt TI provided libraries\r
+ * @n <b> Cons: </b>\r
+ * - Level of indirection in the API to get to the actual OS call\r
+ * \r
+ * <b> Approach 2: </b>\r
+ * @n Rebuilt Library \r
+ * - Create a copy of this file and modify it to directly \r
+ * inline the native OS calls\r
+ * - Rebuild the TCP3D Driver library; ensure that the Include \r
+ * path points to the directory where the copy of this file \r
+ * has been provided.\r
+ * - Please refer to the "test" directory for an example of this \r
+ * @n <b> Pros: </b>\r
+ * - Optimizations can be done to remove the level of indirection\r
+ * @n <b> Cons: </b>\r
+ * - TCP3D Libraries need to be rebuilt by the customer.\r
+ *\r
+ * \par\r
+ * NOTE:\r
+ * (C) Copyright 2009 Texas Instruments, Inc.\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#ifndef __TCP3D_OSAL_H__\r
+#define __TCP3D_OSAL_H__\r
+\r
+/** @addtogroup TCP3D_OSAL_API\r
+ @{ */\r
+\r
+/**********************************************************************\r
+ ************************* Extern Declarations ************************\r
+ **********************************************************************/\r
+\r
+extern void* memset(void *_mem, int32_t _ch, size_t _n);\r
+extern void* memcpy(void *_s1, const void *_s2, size_t _n);\r
+\r
+extern void Osal_tcp3dLog( String fmt, ... );\r
+extern void Osal_tcp3dBeginMemAccess (void *ptr, uint32_t size);\r
+extern void Osal_tcp3dEndMemAccess (void *ptr, uint32_t size);\r
+\r
+/**\r
+ * @brief The macro is used by the TCP3D driver to log various messages.\r
+ *\r
+ * <b> Prototype: </b>\r
+ * The following is the C prototype for the expected OSAL API.\r
+ *\r
+ * @verbatim\r
+ void Osal_tcp3dLog( String fmt, ... ) \r
+ @endverbatim\r
+ *\r
+ * <b> Parameter </b>\r
+ * @n printf-style format string \r
+ *\r
+ * <b> Return Value </b>\r
+ * @n Not applicable.\r
+ */\r
+#define Tcp3d_osalLog Osal_tcp3dLog\r
+\r
+/**\r
+@}\r
+*/\r
+\r
+#endif /* __TCP3D_OSAL_H__ */\r
+\r
diff --git a/tcp3dver.h.xdt b/tcp3dver.h.xdt
--- /dev/null
+++ b/tcp3dver.h.xdt
@@ -0,0 +1,100 @@
+%%{\r
+/*!\r
+ * This template implements the tcp3dver.h\r
+ */ \r
+ /* Versioning */\r
+ var ver = this;\r
+ var ver1 = [00,00,00,00];\r
+ var ver2 = [00,00,00,00];\r
+ \r
+ for each(i=0;i<ver.length;i++)\r
+ {\r
+ if(String(ver[i]).length < 2)\r
+ {\r
+ ver1[i]="0"+ver[i];\r
+ }\r
+ else\r
+ {\r
+ ver1[i] = ver[i];\r
+ }\r
+ \r
+ ver2[i] = Number(ver[i]).toString(16).toUpperCase();\r
+ \r
+ if(String(ver2[i]).length < 2)\r
+ {\r
+ ver2[i]="0"+ver2[i];\r
+ }\r
+ }\r
+ \r
+ var versionStr = "\""+"TCP3D Driver Revision: "+ver1[0]+"."+ver1[1]+"."+ver1[2]+"."+ver1[3]+"\"";\r
+ var versionID = "(0x"+ver2[0]+ver2[1]+ver2[2]+ver2[3]+")";\r
+\r
+%%}\r
+#ifndef _TCP3DVER_H\r
+#define _TCP3DVER_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* ============================================================= */\r
+/**\r
+ * @file tcp3dver.h\r
+ *\r
+ * path ti/drv/tcp3d/tcp3dver.h\r
+ *\r
+ * @brief TCP3D Driver Version Definitions\r
+ *\r
+ * ============================================================\r
+ * Copyright (c) Texas Instruments Incorporated 2009-2011\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/**\r
+ * @brief This is the TCP3D Driver Version. Versions numbers are encoded in the following \r
+ * format:\r
+ * 0xAABBCCDD -> Arch (AA); API Changes (BB); Major (CC); Minor (DD)\r
+ */\r
+#define TCP3D_DRV_VERSION_ID `versionID`\r
+\r
+/**\r
+ * @brief This is the version string which describes the TCP3D Driver along with the\r
+ * date and build information.\r
+ */\r
+#define TCP3D_DRV_VERSION_STR `versionStr`\r
+\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+ \r
+\r
+#endif /* _TCP3DVER_H */\r
diff --git a/test/Module.xs b/test/Module.xs
--- /dev/null
+++ b/test/Module.xs
@@ -0,0 +1,73 @@
+/******************************************************************************\r
+ * FILE PURPOSE: TCP3D Test files.\r
+ ******************************************************************************\r
+ * FILE NAME: module.xs\r
+ *\r
+ * DESCRIPTION: \r
+ * This file contains the module specification for TCP3D Driver Unit Test\r
+ * Files\r
+ *\r
+ * Copyright (C) 2009, Texas Instruments, Inc.\r
+ *****************************************************************************/\r
+\r
+/* Load the library utility. */\r
+var libUtility = xdc.loadCapsule ("../build/buildlib.xs");\r
+\r
+var otherFiles = [\r
+ "test/gen_test_vectors/msvc/GenTestVectors.dsp",\r
+ "test/gen_test_vectors/msvc/Debug/GenTestVectors.exe",\r
+ "test/gen_test_vectors/simulator/debug/Test_c_model.exe",\r
+ "test/gen_test_vectors/cleanTestVect.bat",\r
+ "test/gen_test_vectors/genTestVect.bat",\r
+ "test/gen_test_vectors/genTestVect_200.bat",\r
+ "test/gen_test_vectors/GenConfig_wimax.m",\r
+ "test/gen_test_vectors/GenConfig_wcdma.m",\r
+ "test/gen_test_vectors/GenConfig_lte.m",\r
+ "test/gen_test_vectors/LTE_200/GenConfig_lte.m",\r
+ "test/gen_test_vectors/WCDMA_200/GenConfig_wcdma.m",\r
+ "test/gen_test_vectors/WIMAX_200/GenConfig_wimax.m",\r
+];\r
+\r
+/**************************************************************************\r
+ * FUNCTION NAME : modBuild\r
+ **************************************************************************\r
+ * DESCRIPTION :\r
+ * The function is used to add all the source files in the test \r
+ * directory into the package.\r
+ **************************************************************************/\r
+function modBuild() \r
+{\r
+ /* Add all the .c files to the release package. */\r
+ var testFiles = libUtility.listAllFiles (".c", "test");\r
+ for (var k = 0 ; k < testFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];\r
+\r
+ /* Add all the .h files to the release package. */\r
+ var testFiles = libUtility.listAllFiles (".h", "test");\r
+ for (var k = 0 ; k < testFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];\r
+\r
+ /* Add all the .cfg files to the release package. */\r
+ var testFiles = libUtility.listAllFiles (".cfg", "test");\r
+ for (var k = 0 ; k < testFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];\r
+\r
+ /* Add all the .cmd files to the release package. */\r
+ var testFiles = libUtility.listAllFiles (".cmd", "test");\r
+ for (var k = 0 ; k < testFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];\r
+\r
+ /* Add all the .txt files to the release package. */\r
+ var testFiles = libUtility.listAllFiles (".txt", "test");\r
+ for (var k = 0 ; k < testFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];\r
+\r
+ /* Add all the .ini files to the release package. */\r
+ var testFiles = libUtility.listAllFiles (".ini", "test");\r
+ for (var k = 0 ; k < testFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = testFiles[k];\r
+\r
+ /* Add all other files to the release package. */\r
+ for (var k = 0 ; k < otherFiles.length; k++)\r
+ Pkg.otherFiles[Pkg.otherFiles.length++] = otherFiles[k];\r
+}\r
diff --git a/test/gen_test_vectors/GenConfig_lte.m b/test/gen_test_vectors/GenConfig_lte.m
--- /dev/null
@@ -0,0 +1,58 @@
+rand('seed', 2006)\r
+\r
+sw0 = [ 32 48 64 96 128 ];\r
+\r
+fidL = fopen('config_list.cfg', 'w');\r
+\r
+for ind = 1:100\r
+ mode = 1;\r
+\r
+ frmSizeInd = round(rand*(187));\r
+ fprintf(fidL, '%s\n', sprintf('config_%d.cfg',ind));\r
+ \r
+ fid = fopen(sprintf('config_%d.cfg',ind), 'w');\r
+ fprintf(fid, 'Coding_standard = %d\n', mode);\r
+ fprintf(fid, 'Frame_size_index = %d\n', frmSizeInd);\r
+ fprintf(fid, 'Max_number_of_turbo_iterations = 8\n');\r
+ fprintf(fid, 'Min_number_of_turbo_iterations = 1\n');\r
+ fprintf(fid, 'Max_star_enable = 0\n');\r
+ fprintf(fid, 'Max_star_threshold = 4\n');\r
+ fprintf(fid, 'Max_star_value = 2\n');\r
+ fprintf(fid, 'tcp3_extrScaleEn = 1\n');\r
+ fprintf(fid, 'Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \n');\r
+ fprintf(fid, 'tcp3_SW0_length = %d\n', sw0(1+fix(rand*5)));\r
+ fprintf(fid, 'tcp3_stopSel = 0\n');\r
+ fprintf(fid, 'tcp3_SNR_Report = 1\n');\r
+ fprintf(fid, 'tcp3_SNR_stopVal = 14\n');\r
+ fprintf(fid, 'tcp3_intlvGenEn = 1\n');\r
+ fprintf(fid, 'tcp3_softOutBitFormat = 1\n');\r
+ fprintf(fid, 'tcp3_lteCrcInitSel = 0\n');\r
+ fprintf(fid, 'tcp3_lteCrcIterPass = 1\n');\r
+ fprintf(fid, 'tcp3_outStatusReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'tcp3_softOutBitsReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'Save_intermediate_data = 1\n');\r
+ fprintf(fid, 'Minimum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Maximum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Snr_increment_step = 0\n');\r
+ fprintf(fid, 'Frame_error_rate_limit = -4\n');\r
+ fprintf(fid, 'Snr_init_value = %d\n',round(rand*7)-3);\r
+ fprintf(fid, 'Add_noise = 1\n');\r
+ seed = round(rand*2^25);\r
+ if(seed<1000)\r
+ seed = seed+1000;\r
+ end\r
+ fprintf(fid, 'c_model_seed = %d\n', seed);\r
+ fprintf(fid, 'Bit_width_of_integer_part = 4\n');\r
+ fprintf(fid, 'Bit_width_of_fractional_part = 2\n');\r
+ fprintf(fid, 'Minimum_number_of_frame_errors = 0\n');\r
+ fprintf(fid, 'Store_info_bits_to_file = 1\n');\r
+ fprintf(fid, 'Load_info_bits_from_file = 0\n');\r
+ fprintf(fid, 'Info_bits_file_name = infobits_file.txt\n');\r
+ fprintf(fid, 'Info_bits_file_includes_CRC= 1\n');\r
+ fprintf(fid, 'Initial_process_index = 0\n');\r
+ fprintf(fid, 'Store_coded_bits_to_file = 0\n');\r
+ fprintf(fid, 'Coded_bits_file_name = codedbits_file.txt\n');\r
+ fclose(fid);\r
+ ind = ind + 1;\r
+end\r
+fclose(fidL);\r
diff --git a/test/gen_test_vectors/GenConfig_wcdma.m b/test/gen_test_vectors/GenConfig_wcdma.m
--- /dev/null
@@ -0,0 +1,58 @@
+rand('seed', 1213)\r
+\r
+sw0 = [ 48 64 96 128 ];\r
+\r
+fidL = fopen('config_list.cfg', 'w');\r
+\r
+for ind = 1:100\r
+ mode = 3;\r
+\r
+ frmSizeInd = round(40 + rand*(5114-40));\r
+ fprintf(fidL, '%s\n', sprintf('config_%d.cfg',ind));\r
+ \r
+ fid = fopen(sprintf('config_%d.cfg',ind), 'w');\r
+ fprintf(fid, 'Coding_standard = %d\n', mode);\r
+ fprintf(fid, 'Frame_size_index = %d\n', frmSizeInd);\r
+ fprintf(fid, 'Max_number_of_turbo_iterations = 8\n');\r
+ fprintf(fid, 'Min_number_of_turbo_iterations = 1\n');\r
+ fprintf(fid, 'Max_star_enable = 0\n');\r
+ fprintf(fid, 'Max_star_threshold = 4\n');\r
+ fprintf(fid, 'Max_star_value = 2\n');\r
+ fprintf(fid, 'tcp3_extrScaleEn = 1\n');\r
+ fprintf(fid, 'Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \n');\r
+ fprintf(fid, 'tcp3_SW0_length = %d\n', sw0(1+fix(rand*3)));\r
+ fprintf(fid, 'tcp3_stopSel = 0\n');\r
+ fprintf(fid, 'tcp3_SNR_Report = 1\n');\r
+ fprintf(fid, 'tcp3_SNR_stopVal = 14\n');\r
+ fprintf(fid, 'tcp3_intlvGenEn = 1\n');\r
+ fprintf(fid, 'tcp3_softOutBitFormat = 1\n');\r
+ fprintf(fid, 'tcp3_lteCrcInitSel = 0\n');\r
+ fprintf(fid, 'tcp3_lteCrcIterPass = 1\n');\r
+ fprintf(fid, 'tcp3_outStatusReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'tcp3_softOutBitsReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'Save_intermediate_data = 1\n');\r
+ fprintf(fid, 'Minimum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Maximum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Snr_increment_step = 0\n');\r
+ fprintf(fid, 'Frame_error_rate_limit = -4\n');\r
+ fprintf(fid, 'Snr_init_value = %d\n',round(rand*7)-3);\r
+ fprintf(fid, 'Add_noise = 1\n');\r
+ seed = round(rand*2^25);\r
+ if(seed<1000)\r
+ seed = seed+1000;\r
+ end\r
+ fprintf(fid, 'c_model_seed = %d\n', seed);\r
+ fprintf(fid, 'Bit_width_of_integer_part = 4\n');\r
+ fprintf(fid, 'Bit_width_of_fractional_part = 2\n');\r
+ fprintf(fid, 'Minimum_number_of_frame_errors = 0\n');\r
+ fprintf(fid, 'Store_info_bits_to_file = 1\n');\r
+ fprintf(fid, 'Load_info_bits_from_file = 0\n');\r
+ fprintf(fid, 'Info_bits_file_name = infobits_file.txt\n');\r
+ fprintf(fid, 'Info_bits_file_includes_CRC= 1\n');\r
+ fprintf(fid, 'Initial_process_index = 0\n');\r
+ fprintf(fid, 'Store_coded_bits_to_file = 0\n');\r
+ fprintf(fid, 'Coded_bits_file_name = codedbits_file.txt\n');\r
+ fclose(fid);\r
+ ind = ind + 1;\r
+end\r
+fclose(fidL);\r
diff --git a/test/gen_test_vectors/GenConfig_wimax.m b/test/gen_test_vectors/GenConfig_wimax.m
--- /dev/null
@@ -0,0 +1,58 @@
+rand('seed', 1976)\r
+\r
+sw0 = [ 32 48 64 96 128 ];\r
+\r
+fidL = fopen('config_list.cfg', 'w');\r
+\r
+for ind = 1:100\r
+ mode = 2;\r
+\r
+ frmSizeInd = round(rand*(16));\r
+ fprintf(fidL, '%s\n', sprintf('config_%d.cfg',ind));\r
+ \r
+ fid = fopen(sprintf('config_%d.cfg',ind), 'w');\r
+ fprintf(fid, 'Coding_standard = %d\n', mode);\r
+ fprintf(fid, 'Frame_size_index = %d\n', frmSizeInd);\r
+ fprintf(fid, 'Max_number_of_turbo_iterations = 8\n');\r
+ fprintf(fid, 'Min_number_of_turbo_iterations = 1\n');\r
+ fprintf(fid, 'Max_star_enable = 0\n');\r
+ fprintf(fid, 'Max_star_threshold = 4\n');\r
+ fprintf(fid, 'Max_star_value = 2\n');\r
+ fprintf(fid, 'tcp3_extrScaleEn = 1\n');\r
+ fprintf(fid, 'Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \n');\r
+ fprintf(fid, 'tcp3_SW0_length = %d\n', sw0(1+fix(rand*5)));\r
+ fprintf(fid, 'tcp3_stopSel = 0\n');\r
+ fprintf(fid, 'tcp3_SNR_Report = 1\n');\r
+ fprintf(fid, 'tcp3_SNR_stopVal = 14\n');\r
+ fprintf(fid, 'tcp3_intlvGenEn = 1\n');\r
+ fprintf(fid, 'tcp3_softOutBitFormat = 1\n');\r
+ fprintf(fid, 'tcp3_lteCrcInitSel = 0\n');\r
+ fprintf(fid, 'tcp3_lteCrcIterPass = 1\n');\r
+ fprintf(fid, 'tcp3_outStatusReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'tcp3_softOutBitsReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'Save_intermediate_data = 1\n');\r
+ fprintf(fid, 'Minimum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Maximum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Snr_increment_step = 0\n');\r
+ fprintf(fid, 'Frame_error_rate_limit = -4\n');\r
+ fprintf(fid, 'Snr_init_value = %d\n',round(rand*7)-3);\r
+ fprintf(fid, 'Add_noise = 1\n');\r
+ seed = round(rand*2^25);\r
+ if(seed<1000)\r
+ seed = seed+1000;\r
+ end\r
+ fprintf(fid, 'c_model_seed = %d\n', seed);\r
+ fprintf(fid, 'Bit_width_of_integer_part = 4\n');\r
+ fprintf(fid, 'Bit_width_of_fractional_part = 2\n');\r
+ fprintf(fid, 'Minimum_number_of_frame_errors = 0\n');\r
+ fprintf(fid, 'Store_info_bits_to_file = 1\n');\r
+ fprintf(fid, 'Load_info_bits_from_file = 0\n');\r
+ fprintf(fid, 'Info_bits_file_name = infobits_file.txt\n');\r
+ fprintf(fid, 'Info_bits_file_includes_CRC= 1\n');\r
+ fprintf(fid, 'Initial_process_index = 0\n');\r
+ fprintf(fid, 'Store_coded_bits_to_file = 0\n');\r
+ fprintf(fid, 'Coded_bits_file_name = codedbits_file.txt\n');\r
+ fclose(fid);\r
+ ind = ind + 1;\r
+end\r
+fclose(fidL);\r
diff --git a/test/gen_test_vectors/LTE/config_1.cfg b/test/gen_test_vectors/LTE/config_1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 167
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 24354030
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_10.cfg b/test/gen_test_vectors/LTE/config_10.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 20
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 13520376
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_100.cfg b/test/gen_test_vectors/LTE/config_100.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 7886149
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_11.cfg b/test/gen_test_vectors/LTE/config_11.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 35
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 19805099
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_12.cfg b/test/gen_test_vectors/LTE/config_12.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 24
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 15581787
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_13.cfg b/test/gen_test_vectors/LTE/config_13.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 135
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 24728032
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_14.cfg b/test/gen_test_vectors/LTE/config_14.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 181
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 29445162
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_15.cfg b/test/gen_test_vectors/LTE/config_15.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 134
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 33540583
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_16.cfg b/test/gen_test_vectors/LTE/config_16.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 17847336
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_17.cfg b/test/gen_test_vectors/LTE/config_17.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 95
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 30868114
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_18.cfg b/test/gen_test_vectors/LTE/config_18.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 85
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 32178489
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_19.cfg b/test/gen_test_vectors/LTE/config_19.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 151
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 12981063
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_2.cfg b/test/gen_test_vectors/LTE/config_2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 118
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 18382796
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_20.cfg b/test/gen_test_vectors/LTE/config_20.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 10
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 5191308
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_21.cfg b/test/gen_test_vectors/LTE/config_21.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 49
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 3260312
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_22.cfg b/test/gen_test_vectors/LTE/config_22.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 33400862
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_23.cfg b/test/gen_test_vectors/LTE/config_23.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 4939726
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_24.cfg b/test/gen_test_vectors/LTE/config_24.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 46
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 3996869
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_25.cfg b/test/gen_test_vectors/LTE/config_25.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 184
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 25042903
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_26.cfg b/test/gen_test_vectors/LTE/config_26.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 127
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 19210561
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_27.cfg b/test/gen_test_vectors/LTE/config_27.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 62
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 30187236
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_28.cfg b/test/gen_test_vectors/LTE/config_28.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 77
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 22270868
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_29.cfg b/test/gen_test_vectors/LTE/config_29.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 38
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 22627707
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_3.cfg b/test/gen_test_vectors/LTE/config_3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 134
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 23926213
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_30.cfg b/test/gen_test_vectors/LTE/config_30.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 176
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 15191395
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_31.cfg b/test/gen_test_vectors/LTE/config_31.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 34
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 10589991
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_32.cfg b/test/gen_test_vectors/LTE/config_32.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 74
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 13884362
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_33.cfg b/test/gen_test_vectors/LTE/config_33.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 94
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 28941592
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_34.cfg b/test/gen_test_vectors/LTE/config_34.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 91
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 11307578
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_35.cfg b/test/gen_test_vectors/LTE/config_35.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 154
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 32551466
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_36.cfg b/test/gen_test_vectors/LTE/config_36.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 117
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 3962448
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_37.cfg b/test/gen_test_vectors/LTE/config_37.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 139
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 21795968
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_38.cfg b/test/gen_test_vectors/LTE/config_38.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 62
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 28305603
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_39.cfg b/test/gen_test_vectors/LTE/config_39.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 173
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 20258023
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_4.cfg b/test/gen_test_vectors/LTE/config_4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 64
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 25289171
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_40.cfg b/test/gen_test_vectors/LTE/config_40.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 186
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 25557409
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_41.cfg b/test/gen_test_vectors/LTE/config_41.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 73
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 14086458
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_42.cfg b/test/gen_test_vectors/LTE/config_42.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 137
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 30775054
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_43.cfg b/test/gen_test_vectors/LTE/config_43.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 158
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 6806740
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_44.cfg b/test/gen_test_vectors/LTE/config_44.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 77
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 16904157
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_45.cfg b/test/gen_test_vectors/LTE/config_45.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 16
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 32163819
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_46.cfg b/test/gen_test_vectors/LTE/config_46.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 86
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 16195353
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_47.cfg b/test/gen_test_vectors/LTE/config_47.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 10
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 6732493
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_48.cfg b/test/gen_test_vectors/LTE/config_48.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 42
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 10097332
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_49.cfg b/test/gen_test_vectors/LTE/config_49.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 118
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 29939589
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_5.cfg b/test/gen_test_vectors/LTE/config_5.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 32072282
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_50.cfg b/test/gen_test_vectors/LTE/config_50.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 69
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 3451196
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_51.cfg b/test/gen_test_vectors/LTE/config_51.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 124
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 10641431
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_52.cfg b/test/gen_test_vectors/LTE/config_52.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 30
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 7140765
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_53.cfg b/test/gen_test_vectors/LTE/config_53.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 135
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 19741026
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_54.cfg b/test/gen_test_vectors/LTE/config_54.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 32444325
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_55.cfg b/test/gen_test_vectors/LTE/config_55.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 180
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 1974559
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_56.cfg b/test/gen_test_vectors/LTE/config_56.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 31565813
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_57.cfg b/test/gen_test_vectors/LTE/config_57.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 173
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 31089184
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_58.cfg b/test/gen_test_vectors/LTE/config_58.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 35
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 22267870
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_59.cfg b/test/gen_test_vectors/LTE/config_59.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 131
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 16284583
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_6.cfg b/test/gen_test_vectors/LTE/config_6.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 114
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 14655936
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_60.cfg b/test/gen_test_vectors/LTE/config_60.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 140
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 32393986
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_61.cfg b/test/gen_test_vectors/LTE/config_61.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 140
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 21277903
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_62.cfg b/test/gen_test_vectors/LTE/config_62.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 157
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 7532787
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_63.cfg b/test/gen_test_vectors/LTE/config_63.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 2695062
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_64.cfg b/test/gen_test_vectors/LTE/config_64.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 173
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 26550527
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_65.cfg b/test/gen_test_vectors/LTE/config_65.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 155
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 7016471
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_66.cfg b/test/gen_test_vectors/LTE/config_66.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 87
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 27758661
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_67.cfg b/test/gen_test_vectors/LTE/config_67.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 181
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 15758832
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_68.cfg b/test/gen_test_vectors/LTE/config_68.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 76
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 9164852
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_69.cfg b/test/gen_test_vectors/LTE/config_69.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 105
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 270762
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_7.cfg b/test/gen_test_vectors/LTE/config_7.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 183
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 20401148
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_70.cfg b/test/gen_test_vectors/LTE/config_70.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 116
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 28405582
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_71.cfg b/test/gen_test_vectors/LTE/config_71.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 1
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 7042586
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_72.cfg b/test/gen_test_vectors/LTE/config_72.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 102
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 1489241
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_73.cfg b/test/gen_test_vectors/LTE/config_73.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 176
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 16901004
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_74.cfg b/test/gen_test_vectors/LTE/config_74.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 94
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 21104385
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_75.cfg b/test/gen_test_vectors/LTE/config_75.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 173
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 3794878
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_76.cfg b/test/gen_test_vectors/LTE/config_76.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 151
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 1522925
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_77.cfg b/test/gen_test_vectors/LTE/config_77.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 152
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 5217501
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_78.cfg b/test/gen_test_vectors/LTE/config_78.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 71
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 16196608
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_79.cfg b/test/gen_test_vectors/LTE/config_79.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 127
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 29471748
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_8.cfg b/test/gen_test_vectors/LTE/config_8.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 128
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 25330404
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_80.cfg b/test/gen_test_vectors/LTE/config_80.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 30252473
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_81.cfg b/test/gen_test_vectors/LTE/config_81.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 17
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 8099319
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_82.cfg b/test/gen_test_vectors/LTE/config_82.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 159
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 16235519
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_83.cfg b/test/gen_test_vectors/LTE/config_83.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 32
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 25180841
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_84.cfg b/test/gen_test_vectors/LTE/config_84.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 144
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 10025764
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_85.cfg b/test/gen_test_vectors/LTE/config_85.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 146
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 32128982
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_86.cfg b/test/gen_test_vectors/LTE/config_86.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 6117373
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_87.cfg b/test/gen_test_vectors/LTE/config_87.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 22
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 22679004
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_88.cfg b/test/gen_test_vectors/LTE/config_88.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 118
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 23816281
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_89.cfg b/test/gen_test_vectors/LTE/config_89.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 52
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 3683419
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_9.cfg b/test/gen_test_vectors/LTE/config_9.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 128
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 4709850
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_90.cfg b/test/gen_test_vectors/LTE/config_90.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 183
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 16694402
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_91.cfg b/test/gen_test_vectors/LTE/config_91.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 4
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 14469549
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_92.cfg b/test/gen_test_vectors/LTE/config_92.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 116
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 15066912
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_93.cfg b/test/gen_test_vectors/LTE/config_93.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 155
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 10355584
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_94.cfg b/test/gen_test_vectors/LTE/config_94.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 184
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 28431638
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_95.cfg b/test/gen_test_vectors/LTE/config_95.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 10
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 2517471
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_96.cfg b/test/gen_test_vectors/LTE/config_96.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 181
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 26878243
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_97.cfg b/test/gen_test_vectors/LTE/config_97.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 183
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 27063671
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_98.cfg b/test/gen_test_vectors/LTE/config_98.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 160
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 8947472
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_99.cfg b/test/gen_test_vectors/LTE/config_99.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 127
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 625023
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/LTE/config_list.cfg b/test/gen_test_vectors/LTE/config_list.cfg
--- /dev/null
@@ -0,0 +1,80 @@
+config_1.cfg
+config_2.cfg
+config_3.cfg
+config_4.cfg
+config_5.cfg
+config_6.cfg
+config_7.cfg
+config_8.cfg
+config_9.cfg
+config_10.cfg
+config_11.cfg
+config_12.cfg
+config_13.cfg
+config_14.cfg
+config_15.cfg
+config_16.cfg
+config_17.cfg
+config_18.cfg
+config_19.cfg
+config_20.cfg
+config_21.cfg
+config_22.cfg
+config_23.cfg
+config_24.cfg
+config_25.cfg
+config_26.cfg
+config_27.cfg
+config_28.cfg
+config_29.cfg
+config_30.cfg
+config_31.cfg
+config_32.cfg
+config_33.cfg
+config_34.cfg
+config_35.cfg
+config_36.cfg
+config_37.cfg
+config_38.cfg
+config_39.cfg
+config_40.cfg
+config_41.cfg
+config_42.cfg
+config_43.cfg
+config_44.cfg
+config_45.cfg
+config_46.cfg
+config_47.cfg
+config_48.cfg
+config_49.cfg
+config_50.cfg
+config_51.cfg
+config_52.cfg
+config_53.cfg
+config_54.cfg
+config_55.cfg
+config_56.cfg
+config_57.cfg
+config_58.cfg
+config_59.cfg
+config_60.cfg
+config_61.cfg
+config_62.cfg
+config_63.cfg
+config_64.cfg
+config_65.cfg
+config_66.cfg
+config_67.cfg
+config_68.cfg
+config_69.cfg
+config_70.cfg
+config_71.cfg
+config_72.cfg
+config_73.cfg
+config_74.cfg
+config_75.cfg
+config_76.cfg
+config_77.cfg
+config_78.cfg
+config_79.cfg
+config_80.cfg
diff --git a/test/gen_test_vectors/LTE_200/GenConfig_lte.m b/test/gen_test_vectors/LTE_200/GenConfig_lte.m
--- /dev/null
@@ -0,0 +1,58 @@
+rand('seed', 040511)\r
+\r
+sw0 = [ 32 48 64 96 128 ];\r
+\r
+fidL = fopen('config_list.cfg', 'w');\r
+\r
+for ind = 1:180\r
+ mode = 1;\r
+\r
+ frmSizeInd = round(rand*(187));\r
+ fprintf(fidL, '%s\n', sprintf('config_%03d.cfg',ind));\r
+ \r
+ fid = fopen(sprintf('config_%03d.cfg',ind), 'w');\r
+ fprintf(fid, 'Coding_standard = %d\n', mode);\r
+ fprintf(fid, 'Frame_size_index = %d\n', frmSizeInd);\r
+ fprintf(fid, 'Max_number_of_turbo_iterations = 8\n');\r
+ fprintf(fid, 'Min_number_of_turbo_iterations = 1\n');\r
+ fprintf(fid, 'Max_star_enable = 0\n');\r
+ fprintf(fid, 'Max_star_threshold = 4\n');\r
+ fprintf(fid, 'Max_star_value = 2\n');\r
+ fprintf(fid, 'tcp3_extrScaleEn = 1\n');\r
+ fprintf(fid, 'Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \n');\r
+ fprintf(fid, 'tcp3_SW0_length = %d\n', sw0(1+fix(rand*5)));\r
+ fprintf(fid, 'tcp3_stopSel = 0\n');\r
+ fprintf(fid, 'tcp3_SNR_Report = 1\n');\r
+ fprintf(fid, 'tcp3_SNR_stopVal = 14\n');\r
+ fprintf(fid, 'tcp3_intlvGenEn = 1\n');\r
+ fprintf(fid, 'tcp3_softOutBitFormat = 1\n');\r
+ fprintf(fid, 'tcp3_lteCrcInitSel = 0\n');\r
+ fprintf(fid, 'tcp3_lteCrcIterPass = 1\n');\r
+ fprintf(fid, 'tcp3_outStatusReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'tcp3_softOutBitsReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'Save_intermediate_data = 1\n');\r
+ fprintf(fid, 'Minimum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Maximum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Snr_increment_step = 0\n');\r
+ fprintf(fid, 'Frame_error_rate_limit = -4\n');\r
+ fprintf(fid, 'Snr_init_value = %d\n',round(rand*7)-3);\r
+ fprintf(fid, 'Add_noise = 1\n');\r
+ seed = round(rand*2^25);\r
+ if(seed<1000)\r
+ seed = seed+1000;\r
+ end\r
+ fprintf(fid, 'c_model_seed = %d\n', seed);\r
+ fprintf(fid, 'Bit_width_of_integer_part = 4\n');\r
+ fprintf(fid, 'Bit_width_of_fractional_part = 2\n');\r
+ fprintf(fid, 'Minimum_number_of_frame_errors = 0\n');\r
+ fprintf(fid, 'Store_info_bits_to_file = 1\n');\r
+ fprintf(fid, 'Load_info_bits_from_file = 0\n');\r
+ fprintf(fid, 'Info_bits_file_name = infobits_file.txt\n');\r
+ fprintf(fid, 'Info_bits_file_includes_CRC= 1\n');\r
+ fprintf(fid, 'Initial_process_index = 0\n');\r
+ fprintf(fid, 'Store_coded_bits_to_file = 0\n');\r
+ fprintf(fid, 'Coded_bits_file_name = codedbits_file.txt\n');\r
+ fclose(fid);\r
+ ind = ind + 1;\r
+end\r
+fclose(fidL);\r
diff --git a/test/gen_test_vectors/WCDMA/config_1.cfg b/test/gen_test_vectors/WCDMA/config_1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 849
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 10143332
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_10.cfg b/test/gen_test_vectors/WCDMA/config_10.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4565
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 13193692
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_100.cfg b/test/gen_test_vectors/WCDMA/config_100.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3339
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 19371345
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_11.cfg b/test/gen_test_vectors/WCDMA/config_11.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2883
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 18817222
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_12.cfg b/test/gen_test_vectors/WCDMA/config_12.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1642
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 19893212
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_13.cfg b/test/gen_test_vectors/WCDMA/config_13.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1386
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 23466754
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_14.cfg b/test/gen_test_vectors/WCDMA/config_14.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1096
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 27807843
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_15.cfg b/test/gen_test_vectors/WCDMA/config_15.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3125
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 13573978
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_16.cfg b/test/gen_test_vectors/WCDMA/config_16.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 233
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 8249524
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_17.cfg b/test/gen_test_vectors/WCDMA/config_17.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 471
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 27480662
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_18.cfg b/test/gen_test_vectors/WCDMA/config_18.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3733
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 25412704
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_19.cfg b/test/gen_test_vectors/WCDMA/config_19.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4681
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 24325596
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_2.cfg b/test/gen_test_vectors/WCDMA/config_2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3457
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 25484341
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_20.cfg b/test/gen_test_vectors/WCDMA/config_20.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2031
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 3172565
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_21.cfg b/test/gen_test_vectors/WCDMA/config_21.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 544
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 26326027
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_22.cfg b/test/gen_test_vectors/WCDMA/config_22.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1987
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 26402762
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_23.cfg b/test/gen_test_vectors/WCDMA/config_23.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4209
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 29649877
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_24.cfg b/test/gen_test_vectors/WCDMA/config_24.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1349
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 10830549
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_25.cfg b/test/gen_test_vectors/WCDMA/config_25.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4572
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 5675590
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_26.cfg b/test/gen_test_vectors/WCDMA/config_26.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4290
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 10328375
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_27.cfg b/test/gen_test_vectors/WCDMA/config_27.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1853
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 7565222
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_28.cfg b/test/gen_test_vectors/WCDMA/config_28.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1704
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 27099414
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_29.cfg b/test/gen_test_vectors/WCDMA/config_29.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3926
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 4733693
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_3.cfg b/test/gen_test_vectors/WCDMA/config_3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4079
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 20339034
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_30.cfg b/test/gen_test_vectors/WCDMA/config_30.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 286
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 1424679
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_31.cfg b/test/gen_test_vectors/WCDMA/config_31.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3122
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 15419491
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_32.cfg b/test/gen_test_vectors/WCDMA/config_32.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2246
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 9934566
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_33.cfg b/test/gen_test_vectors/WCDMA/config_33.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 556
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 8518156
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_34.cfg b/test/gen_test_vectors/WCDMA/config_34.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3302
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 1066706
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_35.cfg b/test/gen_test_vectors/WCDMA/config_35.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1571
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 27729118
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_36.cfg b/test/gen_test_vectors/WCDMA/config_36.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 919
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 21130316
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_37.cfg b/test/gen_test_vectors/WCDMA/config_37.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4705
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 33252157
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_38.cfg b/test/gen_test_vectors/WCDMA/config_38.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3073
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 11897165
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_39.cfg b/test/gen_test_vectors/WCDMA/config_39.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 770
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 27738976
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_4.cfg b/test/gen_test_vectors/WCDMA/config_4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2952
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 15492730
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_40.cfg b/test/gen_test_vectors/WCDMA/config_40.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 601
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 1537313
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_41.cfg b/test/gen_test_vectors/WCDMA/config_41.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 147
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 1743434
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_42.cfg b/test/gen_test_vectors/WCDMA/config_42.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1391
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 8322116
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_43.cfg b/test/gen_test_vectors/WCDMA/config_43.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2311
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 7963158
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_44.cfg b/test/gen_test_vectors/WCDMA/config_44.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3345
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 285847
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_45.cfg b/test/gen_test_vectors/WCDMA/config_45.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 945
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 20820626
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_46.cfg b/test/gen_test_vectors/WCDMA/config_46.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4093
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 32859683
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_47.cfg b/test/gen_test_vectors/WCDMA/config_47.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 86
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 11765480
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_48.cfg b/test/gen_test_vectors/WCDMA/config_48.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 976
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 19554251
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_49.cfg b/test/gen_test_vectors/WCDMA/config_49.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2503
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 16866248
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_5.cfg b/test/gen_test_vectors/WCDMA/config_5.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 637
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 3536429
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_50.cfg b/test/gen_test_vectors/WCDMA/config_50.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 526
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 26357817
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_51.cfg b/test/gen_test_vectors/WCDMA/config_51.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1595
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 329356
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_52.cfg b/test/gen_test_vectors/WCDMA/config_52.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4993
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 9034944
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_53.cfg b/test/gen_test_vectors/WCDMA/config_53.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2550
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 19815554
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_54.cfg b/test/gen_test_vectors/WCDMA/config_54.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1908
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 14600517
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_55.cfg b/test/gen_test_vectors/WCDMA/config_55.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1153
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 20798073
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_56.cfg b/test/gen_test_vectors/WCDMA/config_56.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2580
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 29792706
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_57.cfg b/test/gen_test_vectors/WCDMA/config_57.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4112
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 22378778
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_58.cfg b/test/gen_test_vectors/WCDMA/config_58.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1332
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 6121900
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_59.cfg b/test/gen_test_vectors/WCDMA/config_59.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2000
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 178832
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_6.cfg b/test/gen_test_vectors/WCDMA/config_6.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1845
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 31861912
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_60.cfg b/test/gen_test_vectors/WCDMA/config_60.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2974
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 218282
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_61.cfg b/test/gen_test_vectors/WCDMA/config_61.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1748
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 20828518
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_62.cfg b/test/gen_test_vectors/WCDMA/config_62.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3852
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 27504463
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_63.cfg b/test/gen_test_vectors/WCDMA/config_63.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3333
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 30199442
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_64.cfg b/test/gen_test_vectors/WCDMA/config_64.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2729
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 22645182
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_65.cfg b/test/gen_test_vectors/WCDMA/config_65.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3570
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 11452113
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_66.cfg b/test/gen_test_vectors/WCDMA/config_66.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1173
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 10546088
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_67.cfg b/test/gen_test_vectors/WCDMA/config_67.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2108
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 32127368
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_68.cfg b/test/gen_test_vectors/WCDMA/config_68.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1067
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 406657
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_69.cfg b/test/gen_test_vectors/WCDMA/config_69.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3560
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 2722962
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_7.cfg b/test/gen_test_vectors/WCDMA/config_7.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1252
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 2383702
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_70.cfg b/test/gen_test_vectors/WCDMA/config_70.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4624
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 17895719
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_71.cfg b/test/gen_test_vectors/WCDMA/config_71.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3838
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 20216144
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_72.cfg b/test/gen_test_vectors/WCDMA/config_72.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 124
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 24034012
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_73.cfg b/test/gen_test_vectors/WCDMA/config_73.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1773
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 27013743
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_74.cfg b/test/gen_test_vectors/WCDMA/config_74.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4377
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 30191095
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_75.cfg b/test/gen_test_vectors/WCDMA/config_75.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1807
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 12431293
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_76.cfg b/test/gen_test_vectors/WCDMA/config_76.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3515
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 20809336
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_77.cfg b/test/gen_test_vectors/WCDMA/config_77.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 750
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 4810926
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_78.cfg b/test/gen_test_vectors/WCDMA/config_78.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3783
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 32659718
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_79.cfg b/test/gen_test_vectors/WCDMA/config_79.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4372
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 7634388
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_8.cfg b/test/gen_test_vectors/WCDMA/config_8.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4974
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 27410585
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_80.cfg b/test/gen_test_vectors/WCDMA/config_80.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4993
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 29918534
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_81.cfg b/test/gen_test_vectors/WCDMA/config_81.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4244
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 24049999
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_82.cfg b/test/gen_test_vectors/WCDMA/config_82.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1812
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 1905502
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_83.cfg b/test/gen_test_vectors/WCDMA/config_83.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2299
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 21131144
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_84.cfg b/test/gen_test_vectors/WCDMA/config_84.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1717
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 30734815
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_85.cfg b/test/gen_test_vectors/WCDMA/config_85.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3555
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 13356030
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_86.cfg b/test/gen_test_vectors/WCDMA/config_86.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4482
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 20894481
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_87.cfg b/test/gen_test_vectors/WCDMA/config_87.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4058
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 1954569
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_88.cfg b/test/gen_test_vectors/WCDMA/config_88.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 140
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 7426197
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_89.cfg b/test/gen_test_vectors/WCDMA/config_89.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3562
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 26832780
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_9.cfg b/test/gen_test_vectors/WCDMA/config_9.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3221
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 15242713
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_90.cfg b/test/gen_test_vectors/WCDMA/config_90.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1100
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 29314233
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_91.cfg b/test/gen_test_vectors/WCDMA/config_91.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 739
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 20107189
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_92.cfg b/test/gen_test_vectors/WCDMA/config_92.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 2298
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 8742755
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_93.cfg b/test/gen_test_vectors/WCDMA/config_93.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 743
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 8503299
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_94.cfg b/test/gen_test_vectors/WCDMA/config_94.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1047
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 26090994
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_95.cfg b/test/gen_test_vectors/WCDMA/config_95.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 3390
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 24990309
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_96.cfg b/test/gen_test_vectors/WCDMA/config_96.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 1759
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 20183749
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_97.cfg b/test/gen_test_vectors/WCDMA/config_97.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4073
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 11012370
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_98.cfg b/test/gen_test_vectors/WCDMA/config_98.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4939
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 11599413
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_99.cfg b/test/gen_test_vectors/WCDMA/config_99.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 54
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 15114461
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WCDMA/config_list.cfg b/test/gen_test_vectors/WCDMA/config_list.cfg
--- /dev/null
@@ -0,0 +1,80 @@
+config_1.cfg
+config_2.cfg
+config_3.cfg
+config_4.cfg
+config_5.cfg
+config_6.cfg
+config_7.cfg
+config_8.cfg
+config_9.cfg
+config_10.cfg
+config_11.cfg
+config_12.cfg
+config_13.cfg
+config_14.cfg
+config_15.cfg
+config_16.cfg
+config_17.cfg
+config_18.cfg
+config_19.cfg
+config_20.cfg
+config_21.cfg
+config_22.cfg
+config_23.cfg
+config_24.cfg
+config_25.cfg
+config_26.cfg
+config_27.cfg
+config_28.cfg
+config_29.cfg
+config_30.cfg
+config_31.cfg
+config_32.cfg
+config_33.cfg
+config_34.cfg
+config_35.cfg
+config_36.cfg
+config_37.cfg
+config_38.cfg
+config_39.cfg
+config_40.cfg
+config_41.cfg
+config_42.cfg
+config_43.cfg
+config_44.cfg
+config_45.cfg
+config_46.cfg
+config_47.cfg
+config_48.cfg
+config_49.cfg
+config_50.cfg
+config_51.cfg
+config_52.cfg
+config_53.cfg
+config_54.cfg
+config_55.cfg
+config_56.cfg
+config_57.cfg
+config_58.cfg
+config_59.cfg
+config_60.cfg
+config_61.cfg
+config_62.cfg
+config_63.cfg
+config_64.cfg
+config_65.cfg
+config_66.cfg
+config_67.cfg
+config_68.cfg
+config_69.cfg
+config_70.cfg
+config_71.cfg
+config_72.cfg
+config_73.cfg
+config_74.cfg
+config_75.cfg
+config_76.cfg
+config_77.cfg
+config_78.cfg
+config_79.cfg
+config_80.cfg
diff --git a/test/gen_test_vectors/WCDMA_200/GenConfig_wcdma.m b/test/gen_test_vectors/WCDMA_200/GenConfig_wcdma.m
--- /dev/null
@@ -0,0 +1,58 @@
+rand('seed', 040511)\r
+\r
+sw0 = [ 48 64 96 128 ];\r
+\r
+fidL = fopen('config_list.cfg', 'w');\r
+\r
+for ind = 1:180\r
+ mode = 3;\r
+\r
+ frmSizeInd = round(40 + rand*(5114-40));\r
+ fprintf(fidL, '%s\n', sprintf('config_%03d.cfg',ind));\r
+ \r
+ fid = fopen(sprintf('config_%03d.cfg',ind), 'w');\r
+ fprintf(fid, 'Coding_standard = %d\n', mode);\r
+ fprintf(fid, 'Frame_size_index = %d\n', frmSizeInd);\r
+ fprintf(fid, 'Max_number_of_turbo_iterations = 8\n');\r
+ fprintf(fid, 'Min_number_of_turbo_iterations = 1\n');\r
+ fprintf(fid, 'Max_star_enable = 0\n');\r
+ fprintf(fid, 'Max_star_threshold = 4\n');\r
+ fprintf(fid, 'Max_star_value = 2\n');\r
+ fprintf(fid, 'tcp3_extrScaleEn = 1\n');\r
+ fprintf(fid, 'Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \n');\r
+ fprintf(fid, 'tcp3_SW0_length = %d\n', sw0(1+fix(rand*3)));\r
+ fprintf(fid, 'tcp3_stopSel = 0\n');\r
+ fprintf(fid, 'tcp3_SNR_Report = 1\n');\r
+ fprintf(fid, 'tcp3_SNR_stopVal = 14\n');\r
+ fprintf(fid, 'tcp3_intlvGenEn = 1\n');\r
+ fprintf(fid, 'tcp3_softOutBitFormat = 1\n');\r
+ fprintf(fid, 'tcp3_lteCrcInitSel = 0\n');\r
+ fprintf(fid, 'tcp3_lteCrcIterPass = 1\n');\r
+ fprintf(fid, 'tcp3_outStatusReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'tcp3_softOutBitsReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'Save_intermediate_data = 1\n');\r
+ fprintf(fid, 'Minimum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Maximum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Snr_increment_step = 0\n');\r
+ fprintf(fid, 'Frame_error_rate_limit = -4\n');\r
+ fprintf(fid, 'Snr_init_value = %d\n',round(rand*7)-3);\r
+ fprintf(fid, 'Add_noise = 1\n');\r
+ seed = round(rand*2^25);\r
+ if(seed<1000)\r
+ seed = seed+1000;\r
+ end\r
+ fprintf(fid, 'c_model_seed = %d\n', seed);\r
+ fprintf(fid, 'Bit_width_of_integer_part = 4\n');\r
+ fprintf(fid, 'Bit_width_of_fractional_part = 2\n');\r
+ fprintf(fid, 'Minimum_number_of_frame_errors = 0\n');\r
+ fprintf(fid, 'Store_info_bits_to_file = 1\n');\r
+ fprintf(fid, 'Load_info_bits_from_file = 0\n');\r
+ fprintf(fid, 'Info_bits_file_name = infobits_file.txt\n');\r
+ fprintf(fid, 'Info_bits_file_includes_CRC= 1\n');\r
+ fprintf(fid, 'Initial_process_index = 0\n');\r
+ fprintf(fid, 'Store_coded_bits_to_file = 0\n');\r
+ fprintf(fid, 'Coded_bits_file_name = codedbits_file.txt\n');\r
+ fclose(fid);\r
+ ind = ind + 1;\r
+end\r
+fclose(fidL);\r
diff --git a/test/gen_test_vectors/WIMAX/config_1.cfg b/test/gen_test_vectors/WIMAX/config_1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 15057575
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_10.cfg b/test/gen_test_vectors/WIMAX/config_10.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 3014323
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_100.cfg b/test/gen_test_vectors/WIMAX/config_100.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 3285365
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_11.cfg b/test/gen_test_vectors/WIMAX/config_11.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 13
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 30515300
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_12.cfg b/test/gen_test_vectors/WIMAX/config_12.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 9059394
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_13.cfg b/test/gen_test_vectors/WIMAX/config_13.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 20745181
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_14.cfg b/test/gen_test_vectors/WIMAX/config_14.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 0
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 22782349
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_15.cfg b/test/gen_test_vectors/WIMAX/config_15.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 31600454
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_16.cfg b/test/gen_test_vectors/WIMAX/config_16.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 4
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 3563171
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_17.cfg b/test/gen_test_vectors/WIMAX/config_17.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 31543915
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_18.cfg b/test/gen_test_vectors/WIMAX/config_18.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 21259586
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_19.cfg b/test/gen_test_vectors/WIMAX/config_19.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 8036452
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_2.cfg b/test/gen_test_vectors/WIMAX/config_2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 13658488
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_20.cfg b/test/gen_test_vectors/WIMAX/config_20.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 24282854
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_21.cfg b/test/gen_test_vectors/WIMAX/config_21.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 16
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 33286762
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_22.cfg b/test/gen_test_vectors/WIMAX/config_22.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 15237599
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_23.cfg b/test/gen_test_vectors/WIMAX/config_23.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 15437338
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_24.cfg b/test/gen_test_vectors/WIMAX/config_24.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 9925373
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_25.cfg b/test/gen_test_vectors/WIMAX/config_25.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 2053432
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_26.cfg b/test/gen_test_vectors/WIMAX/config_26.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 2330046
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_27.cfg b/test/gen_test_vectors/WIMAX/config_27.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 1
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 28865976
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_28.cfg b/test/gen_test_vectors/WIMAX/config_28.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 10
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 31974025
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_29.cfg b/test/gen_test_vectors/WIMAX/config_29.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 11584004
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_3.cfg b/test/gen_test_vectors/WIMAX/config_3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 15539417
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_30.cfg b/test/gen_test_vectors/WIMAX/config_30.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 30453440
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_31.cfg b/test/gen_test_vectors/WIMAX/config_31.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 25920851
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_32.cfg b/test/gen_test_vectors/WIMAX/config_32.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 23043859
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_33.cfg b/test/gen_test_vectors/WIMAX/config_33.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 32188715
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_34.cfg b/test/gen_test_vectors/WIMAX/config_34.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 9566130
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_35.cfg b/test/gen_test_vectors/WIMAX/config_35.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 28518523
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_36.cfg b/test/gen_test_vectors/WIMAX/config_36.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 1226864
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_37.cfg b/test/gen_test_vectors/WIMAX/config_37.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 13809024
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_38.cfg b/test/gen_test_vectors/WIMAX/config_38.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 23834347
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_39.cfg b/test/gen_test_vectors/WIMAX/config_39.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 3361843
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_4.cfg b/test/gen_test_vectors/WIMAX/config_4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 5708332
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_40.cfg b/test/gen_test_vectors/WIMAX/config_40.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 14
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 3195870
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_41.cfg b/test/gen_test_vectors/WIMAX/config_41.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 7653337
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_42.cfg b/test/gen_test_vectors/WIMAX/config_42.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 24594163
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_43.cfg b/test/gen_test_vectors/WIMAX/config_43.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 30122793
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_44.cfg b/test/gen_test_vectors/WIMAX/config_44.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 27657742
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_45.cfg b/test/gen_test_vectors/WIMAX/config_45.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 12312898
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_46.cfg b/test/gen_test_vectors/WIMAX/config_46.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 29435139
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_47.cfg b/test/gen_test_vectors/WIMAX/config_47.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 19913074
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_48.cfg b/test/gen_test_vectors/WIMAX/config_48.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 3
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 31992557
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_49.cfg b/test/gen_test_vectors/WIMAX/config_49.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 24875177
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_5.cfg b/test/gen_test_vectors/WIMAX/config_5.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 4
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 5097014
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_50.cfg b/test/gen_test_vectors/WIMAX/config_50.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 2329052
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_51.cfg b/test/gen_test_vectors/WIMAX/config_51.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 18544718
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_52.cfg b/test/gen_test_vectors/WIMAX/config_52.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 13
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 25534074
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_53.cfg b/test/gen_test_vectors/WIMAX/config_53.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 20717051
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_54.cfg b/test/gen_test_vectors/WIMAX/config_54.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 8708537
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_55.cfg b/test/gen_test_vectors/WIMAX/config_55.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 16
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 27905388
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_56.cfg b/test/gen_test_vectors/WIMAX/config_56.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 24770923
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_57.cfg b/test/gen_test_vectors/WIMAX/config_57.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 1351930
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_58.cfg b/test/gen_test_vectors/WIMAX/config_58.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 3
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 25380621
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_59.cfg b/test/gen_test_vectors/WIMAX/config_59.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 13
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 12628730
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_6.cfg b/test/gen_test_vectors/WIMAX/config_6.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 0
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 23134813
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_60.cfg b/test/gen_test_vectors/WIMAX/config_60.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 5915718
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_61.cfg b/test/gen_test_vectors/WIMAX/config_61.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 19822251
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_62.cfg b/test/gen_test_vectors/WIMAX/config_62.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 4141635
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_63.cfg b/test/gen_test_vectors/WIMAX/config_63.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 32127793
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_64.cfg b/test/gen_test_vectors/WIMAX/config_64.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 7
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 10831496
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_65.cfg b/test/gen_test_vectors/WIMAX/config_65.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 27452337
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_66.cfg b/test/gen_test_vectors/WIMAX/config_66.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 9
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 25838094
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_67.cfg b/test/gen_test_vectors/WIMAX/config_67.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 16
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 29072054
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_68.cfg b/test/gen_test_vectors/WIMAX/config_68.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 13
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 2571155
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_69.cfg b/test/gen_test_vectors/WIMAX/config_69.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 14
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 7091343
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_7.cfg b/test/gen_test_vectors/WIMAX/config_7.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 4740628
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_70.cfg b/test/gen_test_vectors/WIMAX/config_70.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 20687786
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_71.cfg b/test/gen_test_vectors/WIMAX/config_71.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 4
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 23831568
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_72.cfg b/test/gen_test_vectors/WIMAX/config_72.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 19732891
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_73.cfg b/test/gen_test_vectors/WIMAX/config_73.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 9455623
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_74.cfg b/test/gen_test_vectors/WIMAX/config_74.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 3
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 8711847
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_75.cfg b/test/gen_test_vectors/WIMAX/config_75.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 7083532
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_76.cfg b/test/gen_test_vectors/WIMAX/config_76.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 1
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 5849179
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_77.cfg b/test/gen_test_vectors/WIMAX/config_77.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 13
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 31267101
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_78.cfg b/test/gen_test_vectors/WIMAX/config_78.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 15084580
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_79.cfg b/test/gen_test_vectors/WIMAX/config_79.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 13709031
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_8.cfg b/test/gen_test_vectors/WIMAX/config_8.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 25620666
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_80.cfg b/test/gen_test_vectors/WIMAX/config_80.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 30536032
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_81.cfg b/test/gen_test_vectors/WIMAX/config_81.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 26812834
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_82.cfg b/test/gen_test_vectors/WIMAX/config_82.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 3
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 29106710
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_83.cfg b/test/gen_test_vectors/WIMAX/config_83.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 3
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 2390031
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_84.cfg b/test/gen_test_vectors/WIMAX/config_84.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 3954457
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_85.cfg b/test/gen_test_vectors/WIMAX/config_85.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 12
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 3
+Add_noise = 1
+c_model_seed = 25325670
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_86.cfg b/test/gen_test_vectors/WIMAX/config_86.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 27536853
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_87.cfg b/test/gen_test_vectors/WIMAX/config_87.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 14
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 12035983
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_88.cfg b/test/gen_test_vectors/WIMAX/config_88.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 11
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 2885852
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_89.cfg b/test/gen_test_vectors/WIMAX/config_89.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 8
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 26477463
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_9.cfg b/test/gen_test_vectors/WIMAX/config_9.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 1
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 10058973
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_90.cfg b/test/gen_test_vectors/WIMAX/config_90.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 4
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 6508876
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_91.cfg b/test/gen_test_vectors/WIMAX/config_91.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 3
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 96
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 0
+Add_noise = 1
+c_model_seed = 29407848
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_92.cfg b/test/gen_test_vectors/WIMAX/config_92.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 0
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 5307174
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_93.cfg b/test/gen_test_vectors/WIMAX/config_93.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 48
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -1
+Add_noise = 1
+c_model_seed = 19467492
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_94.cfg b/test/gen_test_vectors/WIMAX/config_94.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 0
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 4
+Add_noise = 1
+c_model_seed = 26735184
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_95.cfg b/test/gen_test_vectors/WIMAX/config_95.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 5
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 1
+Add_noise = 1
+c_model_seed = 11110971
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_96.cfg b/test/gen_test_vectors/WIMAX/config_96.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 6
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 13930999
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_97.cfg b/test/gen_test_vectors/WIMAX/config_97.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 14
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 32
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -3
+Add_noise = 1
+c_model_seed = 13043123
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_98.cfg b/test/gen_test_vectors/WIMAX/config_98.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 2
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 128
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 1
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 31896969
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_99.cfg b/test/gen_test_vectors/WIMAX/config_99.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 13
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 1
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = -2
+Add_noise = 1
+c_model_seed = 5700695
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/WIMAX/config_list.cfg b/test/gen_test_vectors/WIMAX/config_list.cfg
--- /dev/null
@@ -0,0 +1,100 @@
+config_1.cfg
+config_2.cfg
+config_3.cfg
+config_4.cfg
+config_5.cfg
+config_6.cfg
+config_7.cfg
+config_8.cfg
+config_9.cfg
+config_10.cfg
+config_11.cfg
+config_12.cfg
+config_13.cfg
+config_14.cfg
+config_15.cfg
+config_16.cfg
+config_17.cfg
+config_18.cfg
+config_19.cfg
+config_20.cfg
+config_21.cfg
+config_22.cfg
+config_23.cfg
+config_24.cfg
+config_25.cfg
+config_26.cfg
+config_27.cfg
+config_28.cfg
+config_29.cfg
+config_30.cfg
+config_31.cfg
+config_32.cfg
+config_33.cfg
+config_34.cfg
+config_35.cfg
+config_36.cfg
+config_37.cfg
+config_38.cfg
+config_39.cfg
+config_40.cfg
+config_41.cfg
+config_42.cfg
+config_43.cfg
+config_44.cfg
+config_45.cfg
+config_46.cfg
+config_47.cfg
+config_48.cfg
+config_49.cfg
+config_50.cfg
+config_51.cfg
+config_52.cfg
+config_53.cfg
+config_54.cfg
+config_55.cfg
+config_56.cfg
+config_57.cfg
+config_58.cfg
+config_59.cfg
+config_60.cfg
+config_61.cfg
+config_62.cfg
+config_63.cfg
+config_64.cfg
+config_65.cfg
+config_66.cfg
+config_67.cfg
+config_68.cfg
+config_69.cfg
+config_70.cfg
+config_71.cfg
+config_72.cfg
+config_73.cfg
+config_74.cfg
+config_75.cfg
+config_76.cfg
+config_77.cfg
+config_78.cfg
+config_79.cfg
+config_80.cfg
+config_81.cfg
+config_82.cfg
+config_83.cfg
+config_84.cfg
+config_85.cfg
+config_86.cfg
+config_87.cfg
+config_88.cfg
+config_89.cfg
+config_90.cfg
+config_91.cfg
+config_92.cfg
+config_93.cfg
+config_94.cfg
+config_95.cfg
+config_96.cfg
+config_97.cfg
+config_98.cfg
+config_99.cfg
+config_100.cfg
diff --git a/test/gen_test_vectors/WIMAX_200/GenConfig_wimax.m b/test/gen_test_vectors/WIMAX_200/GenConfig_wimax.m
--- /dev/null
@@ -0,0 +1,58 @@
+rand('seed', 040511)\r
+\r
+sw0 = [ 32 48 64 96 128 ];\r
+\r
+fidL = fopen('config_list.cfg', 'w');\r
+\r
+for ind = 1:180\r
+ mode = 2;\r
+\r
+ frmSizeInd = round(rand*(16));\r
+ fprintf(fidL, '%s\n', sprintf('config_%03d.cfg',ind));\r
+ \r
+ fid = fopen(sprintf('config_%03d.cfg',ind), 'w');\r
+ fprintf(fid, 'Coding_standard = %d\n', mode);\r
+ fprintf(fid, 'Frame_size_index = %d\n', frmSizeInd);\r
+ fprintf(fid, 'Max_number_of_turbo_iterations = 8\n');\r
+ fprintf(fid, 'Min_number_of_turbo_iterations = 1\n');\r
+ fprintf(fid, 'Max_star_enable = 0\n');\r
+ fprintf(fid, 'Max_star_threshold = 4\n');\r
+ fprintf(fid, 'Max_star_value = 2\n');\r
+ fprintf(fid, 'tcp3_extrScaleEn = 1\n');\r
+ fprintf(fid, 'Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \n');\r
+ fprintf(fid, 'tcp3_SW0_length = %d\n', sw0(1+fix(rand*5)));\r
+ fprintf(fid, 'tcp3_stopSel = 0\n');\r
+ fprintf(fid, 'tcp3_SNR_Report = 1\n');\r
+ fprintf(fid, 'tcp3_SNR_stopVal = 14\n');\r
+ fprintf(fid, 'tcp3_intlvGenEn = 1\n');\r
+ fprintf(fid, 'tcp3_softOutBitFormat = 1\n');\r
+ fprintf(fid, 'tcp3_lteCrcInitSel = 0\n');\r
+ fprintf(fid, 'tcp3_lteCrcIterPass = 1\n');\r
+ fprintf(fid, 'tcp3_outStatusReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'tcp3_softOutBitsReadEn = %d\n', round(rand*1));\r
+ fprintf(fid, 'Save_intermediate_data = 1\n');\r
+ fprintf(fid, 'Minimum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Maximum_number_of_FEC_blocks = 1\n');\r
+ fprintf(fid, 'Snr_increment_step = 0\n');\r
+ fprintf(fid, 'Frame_error_rate_limit = -4\n');\r
+ fprintf(fid, 'Snr_init_value = %d\n',round(rand*7)-3);\r
+ fprintf(fid, 'Add_noise = 1\n');\r
+ seed = round(rand*2^25);\r
+ if(seed<1000)\r
+ seed = seed+1000;\r
+ end\r
+ fprintf(fid, 'c_model_seed = %d\n', seed);\r
+ fprintf(fid, 'Bit_width_of_integer_part = 4\n');\r
+ fprintf(fid, 'Bit_width_of_fractional_part = 2\n');\r
+ fprintf(fid, 'Minimum_number_of_frame_errors = 0\n');\r
+ fprintf(fid, 'Store_info_bits_to_file = 1\n');\r
+ fprintf(fid, 'Load_info_bits_from_file = 0\n');\r
+ fprintf(fid, 'Info_bits_file_name = infobits_file.txt\n');\r
+ fprintf(fid, 'Info_bits_file_includes_CRC= 1\n');\r
+ fprintf(fid, 'Initial_process_index = 0\n');\r
+ fprintf(fid, 'Store_coded_bits_to_file = 0\n');\r
+ fprintf(fid, 'Coded_bits_file_name = codedbits_file.txt\n');\r
+ fclose(fid);\r
+ ind = ind + 1;\r
+end\r
+fclose(fidL);\r
diff --git a/test/gen_test_vectors/cleanTestVect.bat b/test/gen_test_vectors/cleanTestVect.bat
--- /dev/null
@@ -0,0 +1,4 @@
+@echo off\r
+\r
+@del /s *.dat\r
+@del /s *.bin\r
diff --git a/test/gen_test_vectors/genTestVect.bat b/test/gen_test_vectors/genTestVect.bat
--- /dev/null
@@ -0,0 +1,60 @@
+@echo off\r
+\r
+REM set MSDEV_PATH="C:\Program Files\Microsoft Visual Studio\COMMON\MSDev98\Bin"\r
+REM if exist %MSDEV_PATH% (\r
+REM set path=%path%;%MSDEV_PATH%\r
+REM ) else (\r
+REM echo !!! MSDEV path not set. Not found at %MSDEV_PATH%. !!!\r
+REM goto end\r
+REM )\r
+\r
+REM Get the current directory\r
+@set CUR_DIR=%~sdp0\r
+\r
+REM build the executable first\r
+REM @msdev %CUR_DIR%\msvc\GenTestVectors.dsp /make "all - Win32 Debug"\r
+REM Set your Executable file path\r
+@set EXE_NAME=%CUR_DIR%\msvc\Debug\GenTestVectors.exe\r
+REM Set your Source list folder path\r
+@set SRC_PATH=%CUR_DIR%\r
+REM Set your Destination test vector folder path\r
+@set DST_PATH=%CUR_DIR%\r
+\r
+REM ~~~~~~~~~~~~~~~~~~~~~~ GENERATE TEST VECTORS ~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+REM GenTestVectors.exe <Source Folder> <List file name> [Destination Folder] [Out File Type]\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+\r
+REM ~~~~~~~~~~~~~~~ LTE TEST ~~~~~~~~~~~~~~~\r
+@%EXE_NAME% %SRC_PATH%\test0_lte config_list.cfg %DST_PATH%\test0_lte %1\r
+@%EXE_NAME% %SRC_PATH%\test1_lte test1_list.cfg %DST_PATH%\test1_lte %1\r
+@%EXE_NAME% %SRC_PATH%\test2_lte test2_list.cfg %DST_PATH%\test2_lte %1\r
+@%EXE_NAME% %SRC_PATH%\test3_lte test3_list.cfg %DST_PATH%\test3_lte %1\r
+@%EXE_NAME% %SRC_PATH%\test4_lte test4_list.cfg %DST_PATH%\test4_lte %1\r
+@%EXE_NAME% %SRC_PATH%\sim_config\LTE lte_list.cfg %DST_PATH%\sim_config\LTE %1\r
+@%EXE_NAME% %SRC_PATH%\LTE config_list.cfg %DST_PATH%\LTE %1\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+\r
+REM ~~~~~~~~~~~~~~~ WCDMA TEST ~~~~~~~~~~~~~~~\r
+@%EXE_NAME% %SRC_PATH%\test0_wcdma config_list.cfg %DST_PATH%\test0_wcdma %1\r
+@%EXE_NAME% %SRC_PATH%\test1_wcdma test1_list.cfg %DST_PATH%\test1_wcdma %1\r
+@%EXE_NAME% %SRC_PATH%\test2_wcdma test2_list.cfg %DST_PATH%\test2_wcdma %1\r
+@%EXE_NAME% %SRC_PATH%\test3_wcdma test3_list.cfg %DST_PATH%\test3_wcdma %1\r
+@%EXE_NAME% %SRC_PATH%\sim_config\WCDMA wcdma_list.cfg %DST_PATH%\sim_config\WCDMA %1\r
+@%EXE_NAME% %SRC_PATH%\WCDMA config_list.cfg %DST_PATH%\WCDMA %1\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+\r
+REM ~~~~~~~~~~~~~~~ WIMAX TEST ~~~~~~~~~~~~~~~\r
+@%EXE_NAME% %SRC_PATH%\test0_wimax config_list.cfg %DST_PATH%\test0_wimax %1\r
+@%EXE_NAME% %SRC_PATH%\test1_wimax test1_list.cfg %DST_PATH%\test1_wimax %1\r
+@%EXE_NAME% %SRC_PATH%\test2_wimax test2_list.cfg %DST_PATH%\test2_wimax %1\r
+@%EXE_NAME% %SRC_PATH%\test3_wimax test3_list.cfg %DST_PATH%\test3_wimax %1\r
+@%EXE_NAME% %SRC_PATH%\sim_config\WIMAX wimax_list.cfg %DST_PATH%\sim_config\WIMAX %1\r
+@%EXE_NAME% %SRC_PATH%\WIMAX config_list.cfg %DST_PATH%\WIMAX %1\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+\r
+REM @%EXE_NAME% %SRC_PATH%\WCDMA_200 config_list.cfg %DST_PATH%\WCDMA_200 %1\r
+REM @%EXE_NAME% %SRC_PATH%\LTE_200 config_list.cfg %DST_PATH%\LTE_200 %1\r
+REM @%EXE_NAME% %SRC_PATH%\WIMAX_200 config_list.cfg %DST_PATH%\WIMAX_200 %1\r
+\r
+:end\r
diff --git a/test/gen_test_vectors/genTestVect_200.bat b/test/gen_test_vectors/genTestVect_200.bat
--- /dev/null
@@ -0,0 +1,32 @@
+@echo off\r
+\r
+set MSDEV_PATH="C:\Program Files\Microsoft Visual Studio\COMMON\MSDev98\Bin"\r
+if exist %MSDEV_PATH% (\r
+set path=%path%;%MSDEV_PATH%\r
+) else (\r
+echo !!! MSDEV path not set. Not found at %MSDEV_PATH%. !!!\r
+goto end\r
+)\r
+\r
+REM Get the current directory\r
+@set CUR_DIR=%~sdp0\r
+\r
+REM build the executable first\r
+@msdev %CUR_DIR%\msvc\GenTestVectors.dsp /make "all - Win32 Debug"\r
+REM Set your Executable file path\r
+@set EXE_NAME=%CUR_DIR%\msvc\Debug\GenTestVectors.exe\r
+REM Set your Source list folder path\r
+@set SRC_PATH=%CUR_DIR%\r
+REM Set your Destination test vector folder path\r
+@set DST_PATH=%CUR_DIR%\r
+\r
+REM ~~~~~~~~~~~~~~~~~~~~~~ GENERATE TEST VECTORS ~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+REM GenTestVectors.exe <Source Folder> <List file name> [Destination Folder] [Out File Type]\r
+REM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\r
+\r
+@%EXE_NAME% %SRC_PATH%\WCDMA_200 config_list.cfg %DST_PATH%\WCDMA_200 %1\r
+@%EXE_NAME% %SRC_PATH%\LTE_200 config_list.cfg %DST_PATH%\LTE_200 %1\r
+@%EXE_NAME% %SRC_PATH%\WIMAX_200 config_list.cfg %DST_PATH%\WIMAX_200 %1\r
+\r
+:end\r
diff --git a/test/gen_test_vectors/include/cfg_param.h b/test/gen_test_vectors/include/cfg_param.h
--- /dev/null
@@ -0,0 +1,94 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef CFG_PARAM_H\r
+#define CFG_PARAM_H\r
+#include "typedefs.h"\r
+\r
+\r
+/** \r
+ * \struct _OUT_TCP3_REGS\r
+ * \r
+ * \brief The structure holds configuration parameters \r
+ * used by tcp3d driver test bench.\r
+ * \r
+ * \sa \r
+ * \r
+ */\r
+typedef struct _OUT_TCP3_REGS\r
+{\r
+ int32_t mode_sel; //TCP3_MODE\r
+ int32_t lte_crc_init_sel;\r
+ int32_t NumInfoBits; //Not part of tcp3 registers\r
+ int32_t SW0_length; //Not part of tcp3 registers\r
+ int32_t maxst_en;\r
+ int32_t out_flag_en;\r
+ int32_t out_order_sel;\r
+ int32_t ext_scale_en;\r
+ int32_t soft_out_flag_en;\r
+ int32_t soft_out_fmt;\r
+ int32_t min_itr;\r
+ int32_t max_itr;\r
+ int32_t snr_val;\r
+ int32_t snr_rep;\r
+ int32_t stop_sel;\r
+ int32_t crc_iter_pass;\r
+ int32_t crc_sel;\r
+ int32_t maxst_thold; //CFG3\r
+ int32_t maxst_value;\r
+ int32_t ext_scale_0; //CFG8\r
+ int32_t ext_scale_1;\r
+ int32_t ext_scale_2;\r
+ int32_t ext_scale_3;\r
+ int32_t ext_scale_4; //CFG9\r
+ int32_t ext_scale_5;\r
+ int32_t ext_scale_6;\r
+ int32_t ext_scale_7;\r
+ int32_t ext_scale_8; //CFG10\r
+ int32_t ext_scale_9;\r
+ int32_t ext_scale_10;\r
+ int32_t ext_scale_11;\r
+ int32_t ext_scale_12; //CFG11\r
+ int32_t ext_scale_13;\r
+ int32_t ext_scale_14;\r
+ int32_t ext_scale_15;\r
+} OUT_TCP3_REGS;\r
+\r
+\r
+\r
+\r
+#endif
\ No newline at end of file
diff --git a/test/gen_test_vectors/include/sim_param.h b/test/gen_test_vectors/include/sim_param.h
--- /dev/null
@@ -0,0 +1,272 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef SIM_PARAM_H\r
+#define SIM_PARAM_H\r
+#include "typedefs.h"\r
+\r
+\r
+/** \r
+ * \struct _TCP3_SIM_PARMS\r
+ * \r
+ * \brief The structure holds main simulation parameters that are read from the configuration file\r
+ * \r
+ * \sa \r
+ * \r
+ */\r
+typedef struct _TCP3_SIM_PARMS\r
+{\r
+ int32_t CodingStandard; /**< 0 - UMTS, 1 - LTE, 2 - WiMAX, 3 - HSUPA Split mode */ \r
+ int32_t frameLenInd; /**< For LTE and WiMAX: index of the block size (LTE: 0-187, Wimax: 0-16), For UMTS/HSUPA block size (40-5114) */ \r
+ int32_t MaxNumTurboIterations; /**< Maximum number of turbo iterations */ \r
+ int32_t MinNumTurboIterations; /**< Minimum number of turbo iterations */ \r
+ int32_t RateTimesOneTwenty; /**< Currently not used */ \r
+ int32_t mappingSign; /**< Currently hardcoded to 1 */ \r
+\r
+ int32_t NumInfoBits; /**< Number of info bits */ \r
+ int32_t NumInfoSymb; /**< Half of the number of info bits */\r
+ int32_t NumInfoBytes; /**< Number of info bytes */\r
+ int32_t NumCodedBits; /**< Number of coded bits at the output of turbo encoder */\r
+ int32_t NumTransmitBits; /**< Number of transmitted bits (after rate matching) */\r
+\r
+\r
+ int32_t MinNumFecBlocks; /**< For BER calculation - maximum number of FEC blocks at one SNR point */ \r
+ int32_t MaxNumFecBlocks; /**< For BER calculation - minimum number of FEC blocks at one SNR point */\r
+ int32_t MinNumFerErrors; /**< For BER calculation - minimum number of FEC erros at one SNR point */\r
+\r
+ int32_t PrevFerComputed; /**< FER calculated for the previous point*/\r
+ float PrevFer; /**< FER of the previous snr point*/\r
+ int32_t FrameErrorRateLimit; /**< Exponent value of the minimum frame error rate of the FER curve. For example -4 means stop curve computation when FER=10^-4 is reached. */ \r
+ float SnrInitValue; /**< Initial SNR value in dB */ \r
+ float SnrIncrementStep; /**< SNR increment steps for BER calculation */ \r
+ float SnrLimitValue; /**< Stop BER calculation if snr reaches this value */\r
+ float noiseSigma; /**< Noise RMS value */\r
+ float SnrPointValue; /**< Current SNR value during the calculation of BER/FER */\r
+ int32_t AdaptiveSnrStep; /**< =1 Enables adaptive SNR step. If the previous_FER/current_FER > 4 SNR step is divided in two */\r
+ int32_t seed; /**< Noise seed */\r
+ int32_t NoiseSwitch; /**< =1 nose addition to signal in the chanel enabled */\r
+ uint32_t Scr2318ShiftReg; /**< Initial value of the 23-bit scrambler shift register for info bit generation */\r
+\r
+\r
+ uint32_t SnrPointCounter; /**< Counts the SNR points during BER/FER curve calculation */\r
+ uint32_t FecBlockCntrLimit; /**< Maximum number of FEC blocks at the current SNR point */\r
+\r
+ uint32_t AccBitErrors; /**< Accumulated bit errors at the current SNR point */\r
+ uint32_t AccFrameErrors; /**< Accumulated frame errors at the current SNR point */\r
+ uint32_t FecBlockCounter; /**< FEC block counter at the current SNR point */\r
+ uint32_t AccParity0BitErrors; /**< Accumulated bit errors at the current SNR point */\r
+ uint32_t AccParity1BitErrors; /**< Accumulated bit errors at the current SNR point */\r
+\r
+ int32_t ErrorProcessingOption; /**< =1 coded error processing, =0 raw error processing */\r
+\r
+\r
+ int32_t simulationState; /**< simulaton state */\r
+\r
+ int32_t bitWidthInt; /**< Input LLR bit width integer part including sign bit */\r
+ int32_t bitWidthFrac; /**< Number of fractional bits of input LLR */\r
+ int32_t maxStarEn; /**< =1 MaxStar enabled */\r
+ int32_t maxStarThreshold; /**< MaxStar thershold - width of the step function that approximates MaxStar correction term*/\r
+ int32_t maxStarValue; /**< MaxStar value - hight of the step function that approximates MaxStar correction term */\r
+\r
+ int32_t alternateProcInd; /**< =1 alternates process index (0 or 1) during BER/FER computation */\r
+ int32_t initialProcInd; /**< (0or 1) initial process index */\r
+\r
+\r
+ int32_t extrinsicScales[16]; /**< Extrinsic scales for first 16 half iterations in Q5 format */\r
+ int32_t tcp3_SW0_length; /**< Sliding window 0 length in bits {16,32, 48, 64, 96 128} */\r
+ int32_t tcp3_SNR_stopVal; /**< SNR threshold in dB used as a stopping criterion (0-20) */\r
+ int32_t tcp3_SNR_Report; /**< =1 report SNR, =0 do not report SNR */\r
+ int32_t tcp3_stopSel; /**< Stopping criteria: =0 Max iter, =1 CRC, =2 or 3 SNR */\r
+ int32_t tcp3_crcSel; /**< CRC polynomial selector: =0 gCRC24B, =1 gCRC24A */\r
+ int32_t tcp3_intlvGenEn; /**< =0 Internal LTE interleaver table generation disabled, =1 enabled */\r
+ int32_t tcp3_intlvLoadSel; /**< =0 do not load or generate intlv table, =1 load or generate intlv table */\r
+ int32_t tcp3_extrScaleEn; /**< =0 Extrinsic scale disabled, =1 Extrinsics scale enabled */\r
+ int32_t tcp3_softOutBitFormat; /**< =0 - Soft output is truncated from 9 to 8-bits for storage in RAM (i.e. LSB truncated), =1 - Soft output is saturated from 9 to 8-bits for storage in RAM.*/\r
+ int32_t tcp3_outBitOrderSel; /**< =0 - LSB bit first in time, =1 - MSB bit first in time */\r
+ int32_t tcp3_lteCrcInitSel; /**< =0 Use 0x000000 as initial value, =1 Use 0xffffff as initial value */\r
+ int32_t tcp3_lteCrcIterPass; /**< Select number of consecutive LTE CRC matches as stopping criterion =0: 1 match, =1: 2 matches, =2: 3 matches, =3: 4 matches */\r
+ int32_t tcp3_softOutBitsReadEn; /**< =1 sends out soft output bits */\r
+ int32_t tcp3_outStatusReadEn; /**< =1 sends out output status */\r
+\r
+\r
+ /*For device verificaton*/\r
+ int32_t enableTopLvlDeviceVerification; /**< =1 Top level device verification enabled, =0 disabled */\r
+ int32_t enableDeviceVerification; /**< =1 Device verification enabled, =0 disabled */\r
+ int32_t disableBeliefPropagation; /**< =1 Belief propagation enabled, =0 disabled */\r
+ int32_t disableAlphaBeliefPropagation;/**< =1 Belief Alpha propagation enabled, =0 disabled */\r
+ int32_t disableBetaBeliefPropagation; /**< =1 Belief Beta propagation enabled, =0 disabled */\r
+\r
+ int32_t devVerAlphaBlockNumber; /**< Alpha block number used for comparison in device verification */\r
+ int32_t devVerBetaBlockNumber; /**< Beta block number used for comparison in device verification*/\r
+ int32_t devVerExtrBlockNumber; /**< Extrinsic block number used for comparison in device verification*/\r
+ int32_t devVerSendIntermediteInternalMemories; /**< =1 send, =0 do not send */\r
+ int32_t devVerUseLinearInterleaver; /**< =1 interleaver is linear (for testing) =0 regular interleaver*/\r
+ int32_t devVerZeroAprioriInHardDec; /**< Only for device verification, =1 : soft decision = extrinisc + systematic (no apriori) */\r
+\r
+ int32_t saveIntermediateData; /**< =1 Intermediate data recording to files enabled, =0 disabled */\r
+ int32_t beliefPropWithinTurboIterEnabled; /**< =1 Belief propagation within turbo iteration is enabled, =0 disabled, default = 0 */\r
+\r
+ int32_t punctureInterval; /**< Used for testing: punctures (punctureInterval-1) out of punctureInterval parity bits, =-1 puncturing disabled, default = -1 */\r
+ int32_t enableRateMatching; /**< =1 Rate matching enabled, =0 disabled, default = 0 */\r
+ float codingRate; /**< If rate matching is enabled, coding rate */\r
+ int32_t redundancyVersionNumber; /**< Reundancy version number for LTE rate matching */\r
+ int32_t loadInfoBitsFromFile; /**< =0 info bits generated internally, =1 info bits read from file */\r
+ int32_t infoBitsFileIncludesCRC; /**< =1 File with info bits includes crc, =0 crc not included */\r
+ char infoBitsFileName[128]; /**< File name with the input bits to the encoder, used if loadInfoBitsFromFile=1 or storeInfoBitsToFile=1 */\r
+ int32_t storeCodedBitsToFile; /**< =1 coded bits stored to file, =0 not stored */\r
+ int32_t storeInfoBitsToFile; /**< =1 info bits stored to file, =0 not stored */\r
+ char codedBitsFileName[128]; /**< File name with the coded bits, used if storeCodedBitsToFile=1 */\r
+ int32_t use_tcp3_encoder_c_model; /**< =1 Use TCP3 encoder C model, =0 use existing encoders within the transmitter */\r
+} TCP3_SIM_PARMS;\r
+\r
+\r
+/** \r
+ * \struct _TCP3_SIM_PARMS\r
+ * \r
+ * \brief The structure holds all tcp3d control and configuration register parameters\r
+ * \r
+ * \sa \r
+ * \r
+ */\r
+typedef struct _TCP3_REGS\r
+{\r
+ int32_t mode_sel; //TCP3_MODE\r
+ int32_t in_mem_db_en; \r
+ int32_t itg_en;\r
+ int32_t err_ignore_en;\r
+ int32_t auto_trig_en;\r
+ int32_t lte_crc_init_sel;\r
+ int32_t trig; //TRIGGER_REG\r
+ int32_t endian_intr; //TCP_ENDIAN\r
+ int32_t endian_indata;\r
+ int32_t exe_cmd; //TCP3_EXE\r
+ int32_t num_sw0; //CFG0 \r
+ int32_t blk_ln;\r
+ int32_t sw1_ln; //CFG1\r
+ int32_t sw2_ln_sel;\r
+ int32_t sw0_ln_sel;\r
+ int32_t inter_load_sel; //CFG2\r
+ int32_t maxst_en;\r
+ int32_t out_flag_en;\r
+ int32_t out_order_sel;\r
+ int32_t ext_scale_en;\r
+ int32_t soft_out_flag_en;\r
+ int32_t soft_out_order_sel;\r
+ int32_t soft_out_fmt;\r
+ int32_t min_itr;\r
+ int32_t max_itr;\r
+ int32_t snr_val;\r
+ int32_t snr_rep;\r
+ int32_t stop_sel;\r
+ int32_t crc_iter_pass;\r
+ int32_t crc_sel;\r
+ int32_t maxst_thold; //CFG3\r
+ int32_t maxst_value;\r
+ int32_t beta_st0_map0; //CFG4\r
+ int32_t beta_st1_map0;\r
+ int32_t beta_st2_map0;\r
+ int32_t beta_st3_map0;\r
+ int32_t beta_st4_map0; //CFG5\r
+ int32_t beta_st5_map0;\r
+ int32_t beta_st6_map0;\r
+ int32_t beta_st7_map0;\r
+ int32_t beta_st0_map1; //CFG6\r
+ int32_t beta_st1_map1;\r
+ int32_t beta_st2_map1;\r
+ int32_t beta_st3_map1;\r
+ int32_t beta_st4_map1; //CFG7\r
+ int32_t beta_st5_map1;\r
+ int32_t beta_st6_map1;\r
+ int32_t beta_st7_map1;\r
+ int32_t ext_scale_0; //CFG8\r
+ int32_t ext_scale_1;\r
+ int32_t ext_scale_2;\r
+ int32_t ext_scale_3;\r
+ int32_t ext_scale_4; //CFG9\r
+ int32_t ext_scale_5;\r
+ int32_t ext_scale_6;\r
+ int32_t ext_scale_7;\r
+ int32_t ext_scale_8; //CFG10\r
+ int32_t ext_scale_9;\r
+ int32_t ext_scale_10;\r
+ int32_t ext_scale_11;\r
+ int32_t ext_scale_12; //CFG11\r
+ int32_t ext_scale_13;\r
+ int32_t ext_scale_14;\r
+ int32_t ext_scale_15;\r
+ int32_t itg_param_0; //CFG12\r
+ int32_t itg_param_1;\r
+ int32_t itg_param_2; //CFG13\r
+ int32_t itg_param_3;\r
+ int32_t itg_param_4; //CFG14\r
+ //Not part of tcp3 registers:\r
+ int32_t proc_id; \r
+ int32_t ExtndNumInfoBits;\r
+ int32_t NumInfoBits;\r
+ int32_t IntlvLen;\r
+ int32_t SW0_length;\r
+} TCP3_REGS;\r
+\r
+\r
+\r
+\r
+typedef struct _CODE_BLOCK_PARMS\r
+{\r
+ TCP3_SIM_PARMS sparms;\r
+ TCP3_REGS reg;\r
+ int8_t sysLLR[8192];\r
+ int8_t par0LLR[8192];\r
+ int8_t par1LLR[8192];\r
+ int8_t tailLLRs[12];\r
+ int16_t interleaver[8192];\r
+ uint32_t ref_infoBits[256];\r
+ uint32_t ref_hardDecisions[256];\r
+ int8_t ref_softDecisions[3][8192];\r
+ uint32_t ref_outStatus[3];\r
+\r
+ uint32_t ssi_hardDecisions[256];\r
+ int8_t ssi_softDecisions[3][8192];\r
+ uint32_t ssi_outStatus[3];\r
+\r
+ int32_t codeBlockNumber; //block number read from the codeBlockList file\r
+\r
+ int32_t transferError;\r
+\r
+} CODE_BLOCK_PARMS;\r
+\r
+\r
+#endif
\ No newline at end of file
diff --git a/test/gen_test_vectors/include/typedefs.h b/test/gen_test_vectors/include/typedefs.h
--- /dev/null
@@ -0,0 +1,81 @@
+/*==========================================================================\r
+* Copyright (c) Texas Instruments Incorporated 2006, 2007, 2008, 2009, 2010\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _TYPEDEFS_H_\r
+#define _TYPEDEFS_H_\r
+#include <sys/types.h>\r
+\r
+#if (CC_VERSION == 42)\r
+ #ifdef bool\r
+ #undef bool\r
+ #endif\r
+ #define bool uint8_t\r
+ #define true 1\r
+ #define false 0\r
+#endif\r
+\r
+#if !defined(_SYS_INT_TYPES_H) && !defined(__BIT_TYPES_DEFINED__)\r
+typedef unsigned char uint8_t;\r
+typedef signed char int8_t;\r
+typedef unsigned short uint16_t;\r
+typedef short int16_t;\r
+typedef unsigned int uint32_t;\r
+typedef int int32_t;\r
+\r
+#ifdef _WIN32\r
+#ifndef GCC\r
+typedef unsigned __int64 uint64_t;\r
+typedef __int64 int64_t;\r
+#else\r
+typedef unsigned long long uint64_t;\r
+typedef long long int64_t;\r
+#endif\r
+#else\r
+typedef unsigned long long uint64_t;\r
+typedef long long int64_t;\r
+#endif/*WIN32*/\r
+\r
+#elif defined(__BIT_TYPES_DEFINED__)\r
+typedef u_int8_t uint8_t;\r
+typedef u_int16_t uint16_t;\r
+typedef u_int32_t uint32_t;\r
+typedef u_int64_t uint64_t;\r
+#endif /* !defined(_SYS_INT_TYPES_H) && !defined(__bit_types_defined__) */\r
+#if defined(__hpux)\r
+#define tid_t tid_t_t\r
+#endif\r
+\r
+#ifndef WIN32\r
+#define stricmp strcasecmp\r
+#endif\r
+#endif /*_TYPEDEFS_H_*/\r
diff --git a/test/gen_test_vectors/msvc/Debug/GenTestVectors.exe b/test/gen_test_vectors/msvc/Debug/GenTestVectors.exe
new file mode 100755 (executable)
index 0000000..3a94cc9
Binary files /dev/null and b/test/gen_test_vectors/msvc/Debug/GenTestVectors.exe differ
index 0000000..3a94cc9
Binary files /dev/null and b/test/gen_test_vectors/msvc/Debug/GenTestVectors.exe differ
diff --git a/test/gen_test_vectors/msvc/GenTestVectors.dsp b/test/gen_test_vectors/msvc/GenTestVectors.dsp
--- /dev/null
@@ -0,0 +1,112 @@
+# Microsoft Developer Studio Project File - Name="GenTestVectors" - Package Owner=<4>\r
+# Microsoft Developer Studio Generated Build File, Format Version 6.00\r
+# ** DO NOT EDIT **\r
+\r
+# TARGTYPE "Win32 (x86) Console Application" 0x0103\r
+\r
+CFG=GenTestVectors - Win32 Debug\r
+!MESSAGE This is not a valid makefile. To build this project using NMAKE,\r
+!MESSAGE use the Export Makefile command and run\r
+!MESSAGE \r
+!MESSAGE NMAKE /f "GenTestVectors.mak".\r
+!MESSAGE \r
+!MESSAGE You can specify a configuration when running NMAKE\r
+!MESSAGE by defining the macro CFG on the command line. For example:\r
+!MESSAGE \r
+!MESSAGE NMAKE /f "GenTestVectors.mak" CFG="GenTestVectors - Win32 Debug"\r
+!MESSAGE \r
+!MESSAGE Possible choices for configuration are:\r
+!MESSAGE \r
+!MESSAGE "GenTestVectors - Win32 Release" (based on "Win32 (x86) Console Application")\r
+!MESSAGE "GenTestVectors - Win32 Debug" (based on "Win32 (x86) Console Application")\r
+!MESSAGE \r
+\r
+# Begin Project\r
+# PROP AllowPerConfigDependencies 0\r
+# PROP Scc_ProjName "GenTestVectors"\r
+# PROP Scc_LocalPath ".."\r
+CPP=cl.exe\r
+RSC=rc.exe\r
+\r
+!IF "$(CFG)" == "GenTestVectors - Win32 Release"\r
+\r
+# PROP BASE Use_MFC 0\r
+# PROP BASE Use_Debug_Libraries 0\r
+# PROP BASE Output_Dir "Release"\r
+# PROP BASE Intermediate_Dir "Release"\r
+# PROP BASE Target_Dir ""\r
+# PROP Use_MFC 0\r
+# PROP Use_Debug_Libraries 0\r
+# PROP Output_Dir "Release"\r
+# PROP Intermediate_Dir "Release"\r
+# PROP Target_Dir ""\r
+# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c\r
+# ADD CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c\r
+# ADD BASE RSC /l 0x409 /d "NDEBUG"\r
+# ADD RSC /l 0x409 /d "NDEBUG"\r
+BSC32=bscmake.exe\r
+# ADD BASE BSC32 /nologo\r
+# ADD BSC32 /nologo\r
+LINK32=link.exe\r
+# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /machine:I386\r
+# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /machine:I386\r
+\r
+!ELSEIF "$(CFG)" == "GenTestVectors - Win32 Debug"\r
+\r
+# PROP BASE Use_MFC 0\r
+# PROP BASE Use_Debug_Libraries 1\r
+# PROP BASE Output_Dir "Debug"\r
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+# PROP Use_Debug_Libraries 1\r
+# PROP Output_Dir "Debug"\r
+# PROP Intermediate_Dir "Debug"\r
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+# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c\r
+# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "..\include" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /YX /FD /GZ /c\r
+# ADD BASE RSC /l 0x409 /d "_DEBUG"\r
+# ADD RSC /l 0x409 /d "_DEBUG"\r
+BSC32=bscmake.exe\r
+# ADD BASE BSC32 /nologo\r
+# ADD BSC32 /nologo\r
+LINK32=link.exe\r
+# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept\r
+# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept\r
+\r
+!ENDIF \r
+\r
+# Begin Target\r
+\r
+# Name "GenTestVectors - Win32 Release"\r
+# Name "GenTestVectors - Win32 Debug"\r
+# Begin Group "Source Files"\r
+\r
+# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat"\r
+# Begin Source File\r
+\r
+SOURCE=..\src\conv2bin.c\r
+# End Source File\r
+# Begin Source File\r
+\r
+SOURCE=..\src\GenTestVectorsMain.c\r
+# End Source File\r
+# Begin Source File\r
+\r
+SOURCE=..\src\load_config.c\r
+# End Source File\r
+# Begin Source File\r
+\r
+SOURCE=..\src\set_reg.c\r
+# End Source File\r
+# End Group\r
+# Begin Group "Header Files"\r
+\r
+# PROP Default_Filter "h;hpp;hxx;hm;inl"\r
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+# Begin Group "Resource Files"\r
+\r
+# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"\r
+# End Group\r
+# End Target\r
+# End Project\r
diff --git a/test/gen_test_vectors/sim_config/LTE/lte_list.cfg b/test/gen_test_vectors/sim_config/LTE/lte_list.cfg
--- /dev/null
@@ -0,0 +1,20 @@
+test1_config1.cfg\r
+test1_config2.cfg\r
+test1_config3.cfg\r
+test1_config4.cfg\r
+test1_config5.cfg\r
+test1_config6.cfg\r
+test4_config1.cfg\r
+test4_config2.cfg\r
+test4_config3.cfg\r
+test4_config4.cfg\r
+test7_config1.cfg\r
+test7_config2.cfg\r
+test7_config3.cfg\r
+test7_config4.cfg\r
+test10_config1.cfg\r
+test10_config2.cfg\r
+test10_config3.cfg\r
+test10_config4.cfg\r
+test10_config5.cfg\r
+test10_config6.cfg\r
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_config1.cfg b/test/gen_test_vectors/sim_config/LTE/test10_config1.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 1\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_config2.cfg b/test/gen_test_vectors/sim_config/LTE/test10_config2.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 2\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_config3.cfg b/test/gen_test_vectors/sim_config/LTE/test10_config3.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 3\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_config4.cfg b/test/gen_test_vectors/sim_config/LTE/test10_config4.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 4\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_config5.cfg b/test/gen_test_vectors/sim_config/LTE/test10_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 5\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_config6.cfg b/test/gen_test_vectors/sim_config/LTE/test10_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 6\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test10_list.cfg b/test/gen_test_vectors/sim_config/LTE/test10_list.cfg
--- /dev/null
@@ -0,0 +1,6 @@
+test10_config1.cfg\r
+test10_config2.cfg\r
+test10_config3.cfg\r
+test10_config4.cfg\r
+test10_config5.cfg\r
+test10_config6.cfg\r
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_config1.cfg b/test/gen_test_vectors/sim_config/LTE/test1_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -3 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_config2.cfg b/test/gen_test_vectors/sim_config/LTE/test1_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 92\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -10 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_config3.cfg b/test/gen_test_vectors/sim_config/LTE/test1_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 93\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#cp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_config4.cfg b/test/gen_test_vectors/sim_config/LTE/test1_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 94\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_config5.cfg b/test/gen_test_vectors/sim_config/LTE/test1_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 0\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_config6.cfg b/test/gen_test_vectors/sim_config/LTE/test1_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test1_list.cfg b/test/gen_test_vectors/sim_config/LTE/test1_list.cfg
--- /dev/null
@@ -0,0 +1,6 @@
+test1_config1.cfg\r
+test1_config2.cfg\r
+test1_config3.cfg\r
+test1_config4.cfg\r
+test1_config5.cfg\r
+test1_config6.cfg\r
diff --git a/test/gen_test_vectors/sim_config/LTE/test4_config1.cfg b/test/gen_test_vectors/sim_config/LTE/test4_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<======LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test4_config2.cfg b/test/gen_test_vectors/sim_config/LTE/test4_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 81\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 1; #<======LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test4_config3.cfg b/test/gen_test_vectors/sim_config/LTE/test4_config3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 0;\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test4_config4.cfg b/test/gen_test_vectors/sim_config/LTE/test4_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 81\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 0; #do not load interleaver\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test4_list.cfg b/test/gen_test_vectors/sim_config/LTE/test4_list.cfg
--- /dev/null
@@ -0,0 +1,4 @@
+test4_config1.cfg\r
+test4_config2.cfg\r
+test4_config3.cfg\r
+test4_config4.cfg\r
diff --git a/test/gen_test_vectors/sim_config/LTE/test7_config1.cfg b/test/gen_test_vectors/sim_config/LTE/test7_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<======LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test7_config2.cfg b/test/gen_test_vectors/sim_config/LTE/test7_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 81\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 1; #<======LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test7_config3.cfg b/test/gen_test_vectors/sim_config/LTE/test7_config3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 0;\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test7_config4.cfg b/test/gen_test_vectors/sim_config/LTE/test7_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 81\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 0; #do not load interleaver\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/LTE/test7_list.cfg b/test/gen_test_vectors/sim_config/LTE/test7_list.cfg
--- /dev/null
@@ -0,0 +1,4 @@
+test7_config1.cfg\r
+test7_config2.cfg\r
+test7_config3.cfg\r
+test7_config4.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config1.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config1.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config10.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config10.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 800\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config11.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config11.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 810\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config12.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config12.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 820\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config2.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config2.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 101\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config3.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config3.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 102\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config4.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config4.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 103\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579160 #1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config5.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 104\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579170 #1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config6.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 105\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config7.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config7.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 106\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config8.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config8.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 107\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_config9.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_config9.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 2000\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test11_list.cfg b/test/gen_test_vectors/sim_config/WCDMA/test11_list.cfg
--- /dev/null
@@ -0,0 +1,12 @@
+test11_config1.cfg\r
+test11_config2.cfg\r
+test11_config3.cfg\r
+test11_config4.cfg\r
+test11_config5.cfg\r
+test11_config6.cfg\r
+test11_config7.cfg\r
+test11_config8.cfg\r
+test11_config9.cfg\r
+test11_config10.cfg\r
+test11_config11.cfg\r
+test11_config12.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config1.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config1.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 10 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 0\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config10.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config10.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 800\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config11.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config11.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 810\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config12.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config12.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 820\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config2.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config2.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 101\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config3.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config3.cfg
--- /dev/null
@@ -0,0 +1,42 @@
+Coding_standard = 3\r
+Frame_size_index = 102\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config4.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config4.cfg
--- /dev/null
@@ -0,0 +1,42 @@
+Coding_standard = 3\r
+Frame_size_index = 103\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config5.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config5.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 104\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config6.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config6.cfg
--- /dev/null
@@ -0,0 +1,41 @@
+Coding_standard = 3\r
+Frame_size_index = 105\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config7.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config7.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 106\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config8.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config8.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 107\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_config9.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_config9.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 2000\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test3_list.cfg b/test/gen_test_vectors/sim_config/WCDMA/test3_list.cfg
--- /dev/null
@@ -0,0 +1,12 @@
+test3_config1.cfg\r
+test3_config2.cfg\r
+test3_config3.cfg\r
+test3_config4.cfg\r
+test3_config5.cfg\r
+test3_config6.cfg\r
+test3_config7.cfg\r
+test3_config8.cfg\r
+test3_config9.cfg\r
+test3_config10.cfg\r
+test3_config11.cfg\r
+test3_config12.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test6_config1.cfg b/test/gen_test_vectors/sim_config/WCDMA/test6_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 5113\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test6_config2.cfg b/test/gen_test_vectors/sim_config/WCDMA/test6_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 5114\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test6_list.cfg b/test/gen_test_vectors/sim_config/WCDMA/test6_list.cfg
--- /dev/null
@@ -0,0 +1,2 @@
+test6_config1.cfg\r
+test6_config2.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test9_config1.cfg b/test/gen_test_vectors/sim_config/WCDMA/test9_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 2001\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test9_config2.cfg b/test/gen_test_vectors/sim_config/WCDMA/test9_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 2002\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WCDMA/test9_list.cfg b/test/gen_test_vectors/sim_config/WCDMA/test9_list.cfg
--- /dev/null
@@ -0,0 +1,2 @@
+test9_config1.cfg\r
+test9_config2.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WCDMA/wcdma_list.cfg b/test/gen_test_vectors/sim_config/WCDMA/wcdma_list.cfg
--- /dev/null
@@ -0,0 +1,28 @@
+test3_config1.cfg\r
+test3_config2.cfg\r
+test3_config3.cfg\r
+test3_config4.cfg\r
+test3_config5.cfg\r
+test3_config6.cfg\r
+test3_config7.cfg\r
+test3_config8.cfg\r
+test3_config9.cfg\r
+test3_config10.cfg\r
+test3_config11.cfg\r
+test3_config12.cfg\r
+test6_config1.cfg\r
+test6_config2.cfg\r
+test9_config1.cfg\r
+test9_config2.cfg\r
+test11_config1.cfg\r
+test11_config2.cfg\r
+test11_config3.cfg\r
+test11_config4.cfg\r
+test11_config5.cfg\r
+test11_config6.cfg\r
+test11_config7.cfg\r
+test11_config8.cfg\r
+test11_config9.cfg\r
+test11_config10.cfg\r
+test11_config11.cfg\r
+test11_config12.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test2_config1.cfg b/test/gen_test_vectors/sim_config/WIMAX/test2_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test2_config2.cfg b/test/gen_test_vectors/sim_config/WIMAX/test2_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 15\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test2_config3.cfg b/test/gen_test_vectors/sim_config/WIMAX/test2_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 0\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test2_config4.cfg b/test/gen_test_vectors/sim_config/WIMAX/test2_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 1\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test2_config5.cfg b/test/gen_test_vectors/sim_config/WIMAX/test2_config5.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 5\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test2_list.cfg b/test/gen_test_vectors/sim_config/WIMAX/test2_list.cfg
--- /dev/null
@@ -0,0 +1,5 @@
+test2_config1.cfg\r
+test2_config2.cfg\r
+test2_config3.cfg\r
+test2_config4.cfg\r
+test2_config5.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test5_config1.cfg b/test/gen_test_vectors/sim_config/WIMAX/test5_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test5_config2.cfg b/test/gen_test_vectors/sim_config/WIMAX/test5_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test5_config3.cfg b/test/gen_test_vectors/sim_config/WIMAX/test5_config3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 0; #<======DO NOT LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test5_config4.cfg b/test/gen_test_vectors/sim_config/WIMAX/test5_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 0; #<======DO NOT LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test5_list.cfg b/test/gen_test_vectors/sim_config/WIMAX/test5_list.cfg
--- /dev/null
@@ -0,0 +1,4 @@
+test5_config1.cfg\r
+test5_config2.cfg\r
+test5_config3.cfg\r
+test5_config4.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test8_config1.cfg b/test/gen_test_vectors/sim_config/WIMAX/test8_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test8_config2.cfg b/test/gen_test_vectors/sim_config/WIMAX/test8_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test8_config3.cfg b/test/gen_test_vectors/sim_config/WIMAX/test8_config3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 0; #<======DO NOT LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test8_config4.cfg b/test/gen_test_vectors/sim_config/WIMAX/test8_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 0; #<======DO NOT LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/WIMAX/test8_list.cfg b/test/gen_test_vectors/sim_config/WIMAX/test8_list.cfg
--- /dev/null
@@ -0,0 +1,4 @@
+test8_config1.cfg\r
+test8_config2.cfg\r
+test8_config3.cfg\r
+test8_config4.cfg\r
diff --git a/test/gen_test_vectors/sim_config/WIMAX/wimax_list.cfg b/test/gen_test_vectors/sim_config/WIMAX/wimax_list.cfg
--- /dev/null
@@ -0,0 +1,13 @@
+test2_config1.cfg\r
+test2_config2.cfg\r
+test2_config3.cfg\r
+test2_config4.cfg\r
+test2_config5.cfg\r
+test5_config1.cfg\r
+test5_config2.cfg\r
+test5_config3.cfg\r
+test5_config4.cfg\r
+test8_config1.cfg\r
+test8_config2.cfg\r
+test8_config3.cfg\r
+test8_config4.cfg\r
diff --git a/test/gen_test_vectors/sim_config/test12_config1.cfg b/test/gen_test_vectors/sim_config/test12_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 0\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_softOutBitsReadEn = 1\r
+tcp3_outStatusReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config10.cfg b/test/gen_test_vectors/sim_config/test12_config10.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 800\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config11.cfg b/test/gen_test_vectors/sim_config/test12_config11.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 810\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config12.cfg b/test/gen_test_vectors/sim_config/test12_config12.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 820\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config2.cfg b/test/gen_test_vectors/sim_config/test12_config2.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 101\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config3.cfg b/test/gen_test_vectors/sim_config/test12_config3.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 102\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config4.cfg b/test/gen_test_vectors/sim_config/test12_config4.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 103\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config5.cfg b/test/gen_test_vectors/sim_config/test12_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 104\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config6.cfg b/test/gen_test_vectors/sim_config/test12_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 105\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config7.cfg b/test/gen_test_vectors/sim_config/test12_config7.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 106\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config8.cfg b/test/gen_test_vectors/sim_config/test12_config8.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 107\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_config9.cfg b/test/gen_test_vectors/sim_config/test12_config9.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 2000\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test12_list.cfg b/test/gen_test_vectors/sim_config/test12_list.cfg
--- /dev/null
@@ -0,0 +1,12 @@
+test12_config1.cfg\r
+test12_config2.cfg\r
+test12_config3.cfg\r
+test12_config4.cfg\r
+test12_config5.cfg\r
+test12_config6.cfg\r
+test12_config7.cfg\r
+test12_config8.cfg\r
+test12_config9.cfg\r
+test12_config10.cfg\r
+test12_config11.cfg\r
+test12_config12.cfg\r
diff --git a/test/gen_test_vectors/sim_config/test13_config1.cfg b/test/gen_test_vectors/sim_config/test13_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 0\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_softOutBitsReadEn = 1\r
+tcp3_outStatusReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test13_config2.cfg b/test/gen_test_vectors/sim_config/test13_config2.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 5555555555\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test13_config3.cfg b/test/gen_test_vectors/sim_config/test13_config3.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 102\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 2222222222\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test13_config4.cfg b/test/gen_test_vectors/sim_config/test13_config4.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 0\r
+Frame_size_index = 103\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 666666666\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/sim_config/test13_list.cfg b/test/gen_test_vectors/sim_config/test13_list.cfg
--- /dev/null
@@ -0,0 +1,5 @@
+test13_config1.cfg\r
+test13_config2.cfg\r
+test13_config3.cfg\r
+test13_config4.cfg\r
+\r
diff --git a/test/gen_test_vectors/simulator/config_list.cfg b/test/gen_test_vectors/simulator/config_list.cfg
--- /dev/null
@@ -0,0 +1 @@
+config.cfg\r
diff --git a/test/gen_test_vectors/simulator/debug/Test_c_model.exe b/test/gen_test_vectors/simulator/debug/Test_c_model.exe
new file mode 100755 (executable)
index 0000000..adc500a
Binary files /dev/null and b/test/gen_test_vectors/simulator/debug/Test_c_model.exe differ
index 0000000..adc500a
Binary files /dev/null and b/test/gen_test_vectors/simulator/debug/Test_c_model.exe differ
diff --git a/test/gen_test_vectors/src/GenTestVectorsMain.c b/test/gen_test_vectors/src/GenTestVectorsMain.c
--- /dev/null
@@ -0,0 +1,427 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <windows.h> \r
+#include <process.h>\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+#include <string.h>\r
+#include <math.h>\r
+//#include <sys/stat.h>\r
+//#include <sys/types.h>\r
+#include <direct.h>\r
+#include "typedefs.h"\r
+#include "sim_param.h"\r
+#include "cfg_param.h"\r
+\r
+char *folderName;\r
+char *folderNameOut;\r
+char *listFileName;\r
+char fullName[300];\r
+char **codeBlockList;\r
+int32_t numCodeBlocks;\r
+int32_t codeBlockCntr;\r
+char *outFileType = {"BOTH"};\r
+\r
+TCP3_SIM_PARMS sparms;\r
+TCP3_REGS reg;\r
+OUT_TCP3_REGS outReg;\r
+\r
+int32_t readCodeBlockList(char * blockListName);\r
+void freeCodeBlockList(void);\r
+void SetReg(TCP3_SIM_PARMS *sparms, TCP3_REGS *reg);\r
+void LoadConfig(char *cfgFileName, TCP3_SIM_PARMS *sparms);\r
+int32_t get_code_block(char *cfgFileName, int32_t Cntr);\r
+int32_t save_code_block_files(char *folderName, int32_t cntr);\r
+void SetOutReg(TCP3_REGS *reg, OUT_TCP3_REGS *outReg);\r
+void conv2bin(char *infile, char *outfile, int type);\r
+\r
+//********************************************************************\r
+//This program generates input test vectors for the TCP3d driver\r
+//Folder structure:\r
+//+---gen_test_vectors\r
+//¦ +---include\r
+//¦ +---msvc\r
+//¦ ¦ +---Debug\r
+//¦ +---simulator\r
+//¦ ¦ +---debug\r
+//¦ +---src\r
+//¦ ¦ +---Debug\r
+//¦ +---test1_split\r
+//¦ +---test2_split\r
+//¦ +---test3_split\r
+//\r
+// Program GenerateTestVectors.exe is executed from the folder gen_test_vectors.\r
+// Usage form dos prompt:\r
+// 1) Goto gen_test_vectors directory\r
+// 2) Then ./msvc/debug/GenerateTestVectors.exe folder_name list_file_name\r
+// Program arguments: \r
+// folder_name - Folder name with the configuration files in the gen_test_vectors.\r
+// Example folders: test1_split, test2_split,...\r
+// list_file_name - List file with the configuration file names to be processed. Configuration\r
+// files must be in the same folder. All configuration files in the folder \r
+// should be set for the same mode (lte, wimax or wcdma), and one code block\r
+// per file. \r
+// The following configuration parmeters must be set as:\r
+// Save_intermediate_data = 1\r
+// Minimum_number_of_FEC_blocks = 1\r
+// Maximum_number_of_FEC_blocks = 1\r
+// Snr_increment_step = 0\r
+// Minimum_number_of_frame_errors = 0\r
+// Program opens the the list file, reads configuration file names and\r
+// per each configuration file perfoms:\r
+// 1. Copies configuration file to config.cfg in the simulator folder,\r
+// 2. Runs the simulator executable from the simulator\debug folder,\r
+// 3. Copies generated files form simulator\debug folder to the folder_name.\r
+// \r
+//********************************************************************\r
+void main(int argc, char * argv[])\r
+{\r
+ int32_t isFound;\r
+ FILE *fid;\r
+\r
+ if(argc < 3)\r
+ {\r
+ printf("Program %s must be called with minimum 2 arguments:\n", argv[0]);\r
+ printf(" Syntax:\n\t%s folder_name list_file_name <dest_folder_name> <out_file_format>\n", argv[0]);\r
+ return;\r
+ }\r
+\r
+ folderName = argv[1];\r
+ listFileName = argv[2];\r
+ strcpy(fullName, folderName);\r
+ strcat(fullName, "\\");\r
+ strcat(fullName, listFileName);\r
+\r
+ if (argc == 4)\r
+ {\r
+ folderNameOut = argv[3];\r
+ }\r
+ else\r
+ {\r
+ folderNameOut = argv[1];\r
+ }\r
+\r
+ if (argc == 5)\r
+ {\r
+ outFileType = argv[4];\r
+ }\r
+\r
+ isFound = readCodeBlockList(fullName);\r
+ if(isFound == 0)\r
+ {\r
+ printf("List file %s is not found!\n", fullName);\r
+ return;\r
+ }\r
+\r
+\r
+ for(codeBlockCntr=0; codeBlockCntr<numCodeBlocks; codeBlockCntr++)\r
+ {\r
+ strcpy(fullName, folderName);\r
+ strcat(fullName, "\\");\r
+ strcat(fullName, codeBlockList[codeBlockCntr]);\r
+ printf("Config file[%d] = %s\n",codeBlockCntr, fullName);\r
+ isFound = get_code_block(fullName, codeBlockCntr);\r
+ if(isFound == 0)\r
+ {\r
+ printf("Config file not found!\n", codeBlockCntr);\r
+ break;\r
+ }\r
+ save_code_block_files(folderNameOut, codeBlockCntr);\r
+ }\r
+\r
+ //Write number of blocks\r
+ strcpy(fullName, folderName);\r
+ strcat(fullName, "\\number_of_blocks.dat");\r
+ fid = fopen(fullName,"w");\r
+ fprintf(fid, "%d\n", numCodeBlocks);\r
+ fclose(fid);\r
+\r
+ freeCodeBlockList();\r
+ \r
+}\r
+\r
+//********************************************************************\r
+// Reads the code block list. The list contains the TCP3 C model\r
+// configuratin file names. Allocates the memory for the list.\r
+// After the use it has to be freed using freeCodeBlockList().\r
+// \r
+//********************************************************************\r
+int32_t readCodeBlockList(char * blockListName)\r
+{\r
+ //Read the list of blocks to be processed\r
+ FILE *fid;\r
+ char *pb;\r
+ int32_t i;\r
+ char buffer[300];\r
+\r
+\r
+ if( (fid = fopen(blockListName, "r")) == NULL)\r
+ {\r
+ printf("Code block list file %s is not found!",blockListName);\r
+ return 0;\r
+ }\r
+\r
+ printf("*********************************************************\n");\r
+ printf("Test : %s \n", blockListName);\r
+ printf("*********************************************************\n");\r
+\r
+\r
+\r
+ //See how many config file names are in the list file\r
+ numCodeBlocks = 0;\r
+ while(fgets(buffer,300,fid) != NULL) \r
+ {\r
+ if(buffer[0] != '#')\r
+ {\r
+ if((pb = strtok(buffer, " \t=#\n\r")) != NULL)\r
+ {\r
+ numCodeBlocks ++;\r
+ }\r
+ }\r
+ }\r
+ fclose(fid);\r
+\r
+ codeBlockList = (char **) malloc(sizeof(char *) * numCodeBlocks);\r
+\r
+ fid = fopen(blockListName, "r");\r
+ i=0;\r
+ while(fgets(buffer,300,fid) != NULL) \r
+ {\r
+ if(buffer[0] != '#')\r
+ {\r
+ pb = strtok(buffer, " \t=#\n\r");\r
+ if(pb != NULL)\r
+ {\r
+ codeBlockList[i] = (char *) malloc(sizeof(char) * (strlen(pb)+1));\r
+ strcpy(codeBlockList[i], pb);\r
+ i++;\r
+ }\r
+ }\r
+ }\r
+ fclose(fid);\r
+\r
+ codeBlockCntr = 0;\r
+\r
+ return 1;\r
+}\r
+\r
+//********************************************************************\r
+//********************************************************************\r
+void freeCodeBlockList(void)\r
+{\r
+ int32_t i;\r
+\r
+ for(i=0; i<numCodeBlocks; i++)\r
+ {\r
+ free(codeBlockList[i]);\r
+ }\r
+ free(codeBlockList);\r
+\r
+}\r
+\r
+\r
+\r
+\r
+//********************************************************************\r
+//********************************************************************\r
+// 1. Read configuration file config.cfg into sparms structure\r
+// 2. Fill reg structure based on sparms structure\r
+// 3. Run simulator\r
+//********************************************************************\r
+//********************************************************************\r
+int32_t get_code_block(char *cfgFileName, int32_t Cntr)\r
+{\r
+ char buffer[301];\r
+ FILE *fidSrc;\r
+ FILE *fidDst;\r
+ char *pb,*pt;\r
+ uint32_t itemp;\r
+\r
+ if((fidSrc = fopen(cfgFileName, "r")) == NULL)\r
+ {\r
+ printf("\nConfig file %s named in list is not found!\n", cfgFileName);\r
+ return 0;\r
+ }\r
+ if((fidDst = fopen("simulator\\config.cfg", "w")) == NULL)\r
+ {\r
+ printf("\nCan not open config.cfg file!\n");\r
+ return 0;\r
+ }\r
+\r
+ //Copy config file from the list to config.cfg\r
+ while(fgets(buffer,300,fidSrc) != NULL) \r
+ {\r
+ if(strstr(buffer,"c_model_seed") != NULL) \r
+ {\r
+ pb = strtok(buffer, " \t=#"); /* position to parameter descriptor */\r
+ pt = strtok(NULL, " \t=#"); /* position to its value */\r
+ sscanf(pt, "%u", &itemp);\r
+ itemp += 10000*Cntr;\r
+ sprintf(buffer, "c_model_seed = %u\n", itemp);\r
+ }\r
+ fprintf(fidDst,"%s",buffer);\r
+ }\r
+ fclose(fidSrc);\r
+ fclose(fidDst);\r
+\r
+ //Read config.cfg file\r
+ LoadConfig("simulator\\config.cfg", &sparms);\r
+\r
+ //Fill register structure based on sparmas\r
+ SetReg(&sparms, ®);\r
+ //Copy from register structure to output structure only relevant data\r
+ SetOutReg(®, &outReg);\r
+\r
+ //Run Simulator according to config.cfg\r
+ SetCurrentDirectory("simulator\\debug");\r
+ system("Test_c_model.exe");\r
+ SetCurrentDirectory("..\\..\\");\r
+\r
+ return 1; \r
+}\r
+\r
+\r
+//********************************************************************\r
+//********************************************************************\r
+// 1. Create output file block#_cfgreg.dat in the folderName with \r
+// outReg parameters \r
+// 2. Copy llrs, tail llrs, hard decisions, soft decisions and status \r
+// from simulator\debug floder to folderName.\r
+//********************************************************************\r
+//********************************************************************\r
+int32_t save_code_block_files(char *folderName, int32_t cntr)\r
+{\r
+ FILE *fid;\r
+ char fileName[300];\r
+ char copyCmd[500];\r
+ int32_t *regPtr;\r
+ int32_t i;\r
+\r
+ sprintf(fileName, "%s\\block%d_cfgreg.dat",folderName, cntr);\r
+\r
+ fid = fopen(fileName, "w");\r
+ regPtr = (int32_t *) &outReg;\r
+ for(i=0; i<sizeof(outReg)/4; i++)\r
+ {\r
+ fprintf(fid,"%d\n", regPtr[i]);\r
+ }\r
+ fclose(fid);\r
+\r
+ //Input LLRs \r
+ sprintf(fileName, "%s\\block%d_llrs.bin", folderName, cntr);\r
+ conv2bin("simulator\\debug\\test_rx_llrs.dat", fileName, 0);\r
+\r
+ //tail LLRs \r
+ sprintf(copyCmd, "copy simulator\\debug\\test_rx_tail_llrs.dat %s\\block%d_tail_llrs.dat", folderName, cntr);\r
+ system(copyCmd);\r
+\r
+ //Interleaver\r
+ //sprintf(copyCmd, "copy simulator\\debug\\test_intlv_tx.dat %s\\block%d_intlv.dat", folderName, cntr);\r
+ //system(copyCmd);\r
+\r
+ //Hard decisions\r
+ sprintf(fileName, "%s\\block%d_hard_dec.bin", folderName, cntr);\r
+ conv2bin("simulator\\debug\\test_final_hard_out_info.dat", fileName, 1);\r
+\r
+ //Load soft decisions decisions\r
+ if(reg.soft_out_flag_en)\r
+ {\r
+ sprintf(fileName, "%s\\block%d_soft_dec.bin", folderName, cntr);\r
+ conv2bin("simulator\\debug\\test_final_soft_out_info.dat", fileName, 0);\r
+ }\r
+\r
+ //Load status bits\r
+ if(reg.out_flag_en)\r
+ {\r
+ sprintf(fileName, "%s\\block%d_status.bin", folderName, cntr);\r
+ conv2bin("simulator\\debug\\test_out_status.dat", fileName, 1);\r
+ }\r
+\r
+ //printf("outFileType = %s\n",outFileType);\r
+ //if ( outFileType == "BOTH" )\r
+ if ( !strcmp(outFileType,"BOTH") )\r
+ {\r
+ //Input LLRs \r
+ sprintf(copyCmd, "copy simulator\\debug\\test_rx_llrs.dat %s\\block%d_llrs.dat", folderName, cntr);\r
+ system(copyCmd);\r
+\r
+ //Hard decisions\r
+ sprintf(copyCmd, "copy simulator\\debug\\test_final_hard_out_info.dat %s\\block%d_hard_dec.dat", folderName, cntr);\r
+ system(copyCmd);\r
+\r
+ //Load soft decisions decisions\r
+ if(reg.soft_out_flag_en)\r
+ {\r
+ sprintf(copyCmd, "copy simulator\\debug\\test_final_soft_out_info.dat %s\\block%d_soft_dec.dat", folderName, cntr);\r
+ system(copyCmd);\r
+ }\r
+\r
+ //Load status bits\r
+ if(reg.out_flag_en)\r
+ {\r
+ sprintf(copyCmd, "copy simulator\\debug\\test_out_status.dat %s\\block%d_status.dat", folderName, cntr);\r
+ system(copyCmd);\r
+ }\r
+ }\r
+\r
+ //Create reference folder\r
+ sprintf(copyCmd, "%s\\reference", folderName);\r
+ mkdir(copyCmd);\r
+\r
+ //Get original encoded bits generated by tcp3 simulator \r
+ sprintf(copyCmd, "copy simulator\\debug\\test_inp_cfg.dat %s\\reference\\block%d_inp_cfg.dat", folderName, cntr);\r
+ system(copyCmd);\r
+\r
+\r
+ //Get original info bits generated by tcp3 simulator\r
+ sprintf(copyCmd, "copy simulator\\infobits_file.txt %s\\reference\\block%d_info_bits.dat", folderName, cntr);\r
+ system(copyCmd);\r
+ \r
+ //Get original encoded bits generated by tcp3 simulator\r
+ sprintf(copyCmd, "copy simulator\\codedbits_file.txt %s\\reference\\block%d_coded_bits.dat", folderName, cntr);\r
+ system(copyCmd);\r
+\r
+\r
+ return 1; \r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
diff --git a/test/gen_test_vectors/src/conv2bin.c b/test/gen_test_vectors/src/conv2bin.c
--- /dev/null
@@ -0,0 +1,124 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+#include <string.h>\r
+\r
+//#define DEBUG_CONV2BIN 0 - define in the compile options for prints\r
+\r
+#define DATA_LLRS 0\r
+#define DATA_BITS 1\r
+\r
+//Converts input formated data file to output binary file\r
+//Two type of input data files:\r
+// 1. LLR data file - file contains three columns of LLRs: systematic, parity0, parity1 LLRs ar signed 8-bit numbers\r
+// 2. Bits file - file with bits packed in 32-bit words in hex format\r
+//Output file is binary file\r
+//LLR data are stored in 32-bit words in three LSB bytes as [Byte3, Byte2,Byte1, Byte0] = [0, Sys, Par0, Par1] \r
+void conv2bin(char *infile, char *outfile, int type)\r
+{\r
+ \r
+ FILE *fidIn, *fidOut;\r
+ char buffer[300];\r
+ unsigned int val;\r
+ int cnt, LLRLen;\r
+ int sys, par0, par1;\r
+ char *sysPtr, *par0Ptr, *par1Ptr;\r
+\r
+ //Open input file, either bits in hex format, or 8-bit LLRs in 3 column integer format \r
+ if( (fidIn = fopen(infile,"r")) == NULL)\r
+ {\r
+ printf("File %s is not found!\n", infile);\r
+ return;\r
+ }\r
+\r
+ //Get the LLRs size\r
+ LLRLen = 0;\r
+ if(type == DATA_LLRS)\r
+ {\r
+ while(fgets(buffer,300,fidIn) != NULL)\r
+ {\r
+ LLRLen++;\r
+ }\r
+ }\r
+ fclose(fidIn);\r
+\r
+ //Open input file\r
+ fidIn = fopen(infile, "r");\r
+\r
+ //Open output binary file\r
+ fidOut = fopen(outfile, "wb");\r
+\r
+ //Read from input and write to output file\r
+ if(type == DATA_BITS)\r
+ {\r
+ cnt=0;\r
+ while(fgets(buffer,300,fidIn) != NULL) \r
+ {\r
+ sscanf(buffer, "%x", &val);\r
+ fwrite(&val, sizeof(int), 1, fidOut);\r
+ cnt++;\r
+ }\r
+#ifdef DEBUG_CONV2BIN\r
+ printf("Info bits file, converted %d lines!\n", cnt);\r
+#endif\r
+ }\r
+ else\r
+ {\r
+ cnt=0;\r
+ sysPtr = malloc(LLRLen); \r
+ par0Ptr = malloc(LLRLen); \r
+ par1Ptr = malloc(LLRLen); \r
+ while(fgets(buffer,300,fidIn) != NULL) \r
+ {\r
+ sscanf(buffer, "%d %d %d", &sys, &par0, &par1);\r
+ sysPtr[cnt] = sys;\r
+ par0Ptr[cnt] = par0;\r
+ par1Ptr[cnt] = par1;\r
+ cnt++;\r
+ }\r
+ fwrite(sysPtr, sizeof(char), LLRLen, fidOut);\r
+ fwrite(par0Ptr, sizeof(char), LLRLen, fidOut);\r
+ fwrite(par1Ptr, sizeof(char), LLRLen, fidOut);\r
+#ifdef DEBUG_CONV2BIN\r
+ printf("LLR data file, converted %d lines!\n", cnt);\r
+#endif\r
+ }\r
+ fclose(fidIn);\r
+ fclose(fidOut);\r
+}
\ No newline at end of file
diff --git a/test/gen_test_vectors/src/initial_beta_calc.c b/test/gen_test_vectors/src/initial_beta_calc.c
--- /dev/null
@@ -0,0 +1,266 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <math.h>\r
+#include "sim_param.h"\r
+\r
+//****************************************************************************\r
+//Calculates initial beta states for 3gpp and stores them into the register\r
+//structure. The 12 input tail bit LLRs are stored in array of 12 elements, first\r
+//six elements correspond to tail bits of encoder 1, next 6 elements correspond \r
+// to encoder 2.\r
+//****************************************************************************\r
+void Initial_beta_calc(TCP3_REGS *reg, int8_t tail_llrs[])\r
+{\r
+ int32_t xt0[6];\r
+ int32_t xt1[6];\r
+ int32_t i, Kt;\r
+ int32_t beta0[8];\r
+ int32_t beta1[8];\r
+ int32_t betaMax;\r
+ \r
+ \r
+ //Initial beta states (only for LTE and 3GPP)\r
+ if(reg->mode_sel != 2)\r
+ {\r
+ //In LTE or 3gpp handle tail bits:\r
+ Kt = 3 - (reg->ExtndNumInfoBits - reg->NumInfoBits); //number of tail stages\r
+ if(Kt==3)\r
+ {\r
+ for(i=0; i<6; i++)\r
+ {\r
+ xt0[i] = tail_llrs[i]; //MAP 0 tail bits\r
+ xt1[i] = tail_llrs[i+6]; //MAP 1 tail bits\r
+ }\r
+ beta0[0] = 0;\r
+ beta0[1] = xt0[0] + xt0[1];\r
+ beta0[2] = xt0[0] + xt0[2] + xt0[3];\r
+ beta0[3] = xt0[1] + xt0[2] + xt0[3];\r
+ beta0[4] = xt0[1] + xt0[2] + xt0[4] + xt0[5];\r
+ beta0[5] = xt0[0] + xt0[2] + xt0[4] + xt0[5];\r
+ beta0[6] = xt0[0] + xt0[1] + xt0[3] + xt0[4] + xt0[5];\r
+ beta0[7] = xt0[3] + xt0[4] + xt0[5];\r
+\r
+ betaMax = beta0[0];\r
+ for(i=1; i<8; i++)\r
+ {\r
+ if(beta0[i]>betaMax) \r
+ betaMax = beta0[i];\r
+ }\r
+ for(i=0; i<8; i++)\r
+ {\r
+ beta0[i] += 127 - betaMax;\r
+ }\r
+\r
+ beta1[0] = 0;\r
+ beta1[1] = xt1[0] + xt1[1];\r
+ beta1[2] = xt1[0] + xt1[2] + xt1[3];\r
+ beta1[3] = xt1[1] + xt1[2] + xt1[3];\r
+ beta1[4] = xt1[1] + xt1[2] + xt1[4] + xt1[5];\r
+ beta1[5] = xt1[0] + xt1[2] + xt1[4] + xt1[5];\r
+ beta1[6] = xt1[0] + xt1[1] + xt1[3] + xt1[4] + xt1[5];\r
+ beta1[7] = xt1[3] + xt1[4] + xt1[5];\r
+\r
+ betaMax = beta1[0];\r
+ for(i=1; i<8; i++)\r
+ {\r
+ if(beta1[i]>betaMax) \r
+ betaMax = beta1[i];\r
+ }\r
+ for(i=0; i<8; i++)\r
+ {\r
+ beta1[i] += 127 - betaMax;\r
+ }\r
+ }\r
+ else if(Kt==2)\r
+ {\r
+ for(i=0; i<4; i++)\r
+ {\r
+ xt0[i] = tail_llrs[i+2]; //MAP 0\r
+ xt1[i] = tail_llrs[i+2+6]; //MAP 1\r
+ }\r
+ beta0[0] = 0;\r
+ beta0[1] = xt0[0] + xt0[1];\r
+ beta0[2] = xt0[0] + xt0[2] + xt0[3];\r
+ beta0[3] = xt0[1] + xt0[2] + xt0[3];\r
+\r
+ betaMax = beta0[0];\r
+ for(i=1; i<4; i++)\r
+ {\r
+ if(beta0[i]>betaMax) \r
+ betaMax = beta0[i];\r
+ }\r
+ for(i=0; i<4; i++)\r
+ {\r
+ beta0[i] += 127 - betaMax;\r
+ }\r
+ for(i=4; i<8; i++)\r
+ {\r
+ beta0[i] = -127;\r
+ }\r
+\r
+ beta1[0] = 0;\r
+ beta1[1] = xt1[0] + xt1[1];\r
+ beta1[2] = xt1[0] + xt1[2] + xt1[3];\r
+ beta1[3] = xt1[1] + xt1[2] + xt1[3];\r
+\r
+ betaMax = beta1[0];\r
+ for(i=1; i<4; i++)\r
+ {\r
+ if(beta1[i]>betaMax) \r
+ betaMax = beta1[i];\r
+ }\r
+ for(i=0; i<4; i++)\r
+ {\r
+ beta1[i] += 127 - betaMax;\r
+ }\r
+ for(i=4; i<8; i++)\r
+ {\r
+ beta1[i] = -127;\r
+ }\r
+ }\r
+ else if(Kt==1)\r
+ {\r
+ for(i=0; i<2; i++)\r
+ {\r
+ xt0[i] = tail_llrs[i+4]; //MAP 0\r
+ xt1[i] = tail_llrs[i+4+6]; //MAP 1\r
+ }\r
+ beta0[0] = 0;\r
+ beta0[1] = xt0[0] + xt0[1];\r
+\r
+ betaMax = beta0[0];\r
+ for(i=1; i<2; i++)\r
+ {\r
+ if(beta0[i]>betaMax) \r
+ betaMax = beta0[i];\r
+ }\r
+ for(i=0; i<2; i++)\r
+ {\r
+ beta0[i] += 127 - betaMax;\r
+ }\r
+ for(i=2; i<8; i++)\r
+ {\r
+ beta0[i] = -127;\r
+ }\r
+\r
+ beta1[0] = 0;\r
+ beta1[1] = xt1[0] + xt1[1];\r
+\r
+ betaMax = beta1[0];\r
+ for(i=1; i<2; i++)\r
+ {\r
+ if(beta1[i]>betaMax) \r
+ betaMax = beta1[i];\r
+ }\r
+ for(i=0; i<2; i++)\r
+ {\r
+ beta1[i] += 127 - betaMax;\r
+ }\r
+ for(i=2; i<8; i++)\r
+ {\r
+ beta1[i] = -127;\r
+ }\r
+ }\r
+ else if(Kt==0)\r
+ {\r
+ beta0[0] = +127;\r
+ for(i=1; i<8; i++)\r
+ {\r
+ beta0[i] = -127;\r
+ }\r
+\r
+ beta1[0] = +127;\r
+ for(i=1; i<8; i++)\r
+ {\r
+ beta1[i] = -127;\r
+ }\r
+ }\r
+ \r
+ //CFG4\r
+ reg->beta_st0_map0 = beta0[0];\r
+ reg->beta_st1_map0 = beta0[1];\r
+ reg->beta_st2_map0 = beta0[2];\r
+ reg->beta_st3_map0 = beta0[3];\r
+ \r
+ //CFG5 \r
+ reg->beta_st4_map0 = beta0[4];\r
+ reg->beta_st5_map0 = beta0[5];\r
+ reg->beta_st6_map0 = beta0[6];\r
+ reg->beta_st7_map0 = beta0[7];\r
+ \r
+ //CFG6 \r
+ reg->beta_st0_map1 = beta1[0];\r
+ reg->beta_st1_map1 = beta1[1];\r
+ reg->beta_st2_map1 = beta1[2];\r
+ reg->beta_st3_map1 = beta1[3];\r
+ \r
+ //CFG7 \r
+ reg->beta_st4_map1 = beta1[4];\r
+ reg->beta_st5_map1 = beta1[5];\r
+ reg->beta_st6_map1 = beta1[6];\r
+ reg->beta_st7_map1 = beta1[7];\r
+ } \r
+ else\r
+ {\r
+ //WiMAX mode:\r
+ //CFG4 \r
+ reg->beta_st0_map0 = 0;\r
+ reg->beta_st1_map0 = 0;\r
+ reg->beta_st2_map0 = 0;\r
+ reg->beta_st3_map0 = 0;\r
+ \r
+ //CFG5 \r
+ reg->beta_st4_map0 = 0;\r
+ reg->beta_st5_map0 = 0;\r
+ reg->beta_st6_map0 = 0;\r
+ reg->beta_st7_map0 = 0;\r
+ \r
+ //CFG6 \r
+ reg->beta_st0_map1 = 0;\r
+ reg->beta_st1_map1 = 0;\r
+ reg->beta_st2_map1 = 0;\r
+ reg->beta_st3_map1 = 0;\r
+ \r
+ //CFG7 \r
+ reg->beta_st4_map1 = 0;\r
+ reg->beta_st5_map1 = 0;\r
+ reg->beta_st6_map1 = 0;\r
+ reg->beta_st7_map1 = 0; \r
+ \r
+ }\r
+}
\ No newline at end of file
diff --git a/test/gen_test_vectors/src/load_config.c b/test/gen_test_vectors/src/load_config.c
--- /dev/null
@@ -0,0 +1,531 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <stdio.h>\r
+#include<string.h>\r
+#include <math.h>\r
+\r
+#include "sim_param.h"\r
+#include "cfg_param.h"\r
+\r
+\r
+void SetDefaultConfig(TCP3_SIM_PARMS *sparms);\r
+\r
+//********************************************************************\r
+//Loads parameters from the configuration file into sparms structure\r
+//********************************************************************\r
+void LoadConfig(char *cfgFileName, TCP3_SIM_PARMS *sparms)\r
+{\r
+FILE *cfgFile;\r
+char buffer[300];\r
+char *pb,*pt;\r
+int32_t itemp;\r
+float ftemp;\r
+\r
+ //Set default values into sparms\r
+ SetDefaultConfig(sparms);\r
+\r
+ if( (cfgFile = fopen(cfgFileName,"r")) == NULL)\r
+ {\r
+ printf("Configuration file %s is not found!\n",cfgFileName);\r
+ return;\r
+ }\r
+ while(fgets(buffer,300,cfgFile) != NULL) \r
+ {\r
+ if(buffer[0] == '#') continue; /* skip the line if it begins with the comment */\r
+ if((pb = strchr(buffer,'=')) != NULL) /* process the line if it contains '=' */\r
+ { \r
+ pb = strtok(buffer, " \t=#"); /* position to parameter descriptor */\r
+ pt = strtok(NULL, " \t=#"); /* position to its value */\r
+\r
+ if(strcmp(pb,"Coding_standard") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->CodingStandard = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Frame_size_index") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->frameLenInd = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Minimum_number_of_FEC_blocks") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->MinNumFecBlocks = (uint32_t) itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Maximum_number_of_FEC_blocks") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->MaxNumFecBlocks = (uint32_t) itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Minimum_number_of_frame_errors") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->MinNumFerErrors = (uint32_t) itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Frame_error_rate_limit") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->FrameErrorRateLimit = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Coded_error_processing") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->ErrorProcessingOption = (uint32_t) itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Snr_init_value") == 0) {\r
+ sscanf(pt, "%f", &ftemp);\r
+ sparms->SnrInitValue = ftemp;\r
+ sparms->noiseSigma = (float) (1.0 / pow(10.0, (double)sparms->SnrInitValue/20.0));\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Snr_increment_step") == 0) {\r
+ sscanf(pt, "%f", &ftemp);\r
+ sparms->SnrIncrementStep = ftemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Snr_limit_value") == 0) {\r
+ sscanf(pt, "%f", &ftemp);\r
+ sparms->SnrLimitValue = ftemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Adaptive_snr_step") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->AdaptiveSnrStep = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Add_noise") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->NoiseSwitch = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"c_model_seed") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->seed = itemp;\r
+ if(itemp<512) itemp <<= 9;//Fix for 23 bit scrambler register. The register occupies upper 23 bits\r
+ sparms->Scr2318ShiftReg = itemp;\r
+\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Bit_width_of_integer_part") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->bitWidthInt = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Bit_width_of_fractional_part") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->bitWidthFrac = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Max_star_enable") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->maxStarEn = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Max_star_threshold") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->maxStarThreshold = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Max_star_value") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->maxStarValue = itemp;\r
+ continue;\r
+ }\r
+\r
+\r
+ if(strcmp(pb,"Max_number_of_turbo_iterations") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->MaxNumTurboIterations = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Min_number_of_turbo_iterations") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->MinNumTurboIterations = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Extrinsic_scales") == 0) {\r
+ {\r
+ int32_t i;\r
+ for(i=0; i<16; i++)\r
+ {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->extrinsicScales[i] = itemp;\r
+ pt = strtok(NULL, " \t=#,");\r
+ if(pt == NULL) \r
+ break;\r
+ }\r
+ }\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_SW0_length") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_SW0_length = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_stopSel") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_stopSel = itemp; //=0 Max iter, =1 CRC, =2 or 3 SNR \r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_crcSel") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_crcSel = itemp; //=0 gCRC24B, =1 gCRC24A\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_SNR_Report") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_SNR_Report = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_SNR_stopVal") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_SNR_stopVal = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_intlvGenEn") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_intlvGenEn = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_intlvLoadSel") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_intlvLoadSel = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_extrScaleEn") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_extrScaleEn = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_softOutBitFormat") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_softOutBitFormat = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_outBitOrderSel") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_outBitOrderSel = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_lteCrcInitSel") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_lteCrcInitSel = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_lteCrcIterPass") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_lteCrcIterPass = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"tcp3_softOutBitsReadEn") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_softOutBitsReadEn = itemp;\r
+ continue;\r
+ }\r
+\r
+\r
+ if(strcmp(pb,"tcp3_outStatusReadEn") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->tcp3_outStatusReadEn = itemp;\r
+ continue;\r
+ }\r
+\r
+\r
+ if(strcmp(pb,"Enable_top_level_device_verification") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->enableTopLvlDeviceVerification = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Enable_device_verification") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->enableDeviceVerification = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Belief_propagation_disabled") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->disableBeliefPropagation = itemp;\r
+ continue;\r
+ }\r
+ \r
+ if(strcmp(pb,"Alpha_belief_propagation_disabled") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->disableAlphaBeliefPropagation = itemp;\r
+ continue;\r
+ }\r
+ \r
+ if(strcmp(pb,"Beta_belief_propagation_disabled") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->disableBetaBeliefPropagation = itemp;\r
+ continue;\r
+ }\r
+ \r
+ if(strcmp(pb,"Dev_ver_alpha_block_number") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->devVerAlphaBlockNumber = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Dev_ver_extr_block_number") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->devVerExtrBlockNumber = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Dev_ver_beta_block_number") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->devVerBetaBlockNumber = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Dev_ver_use_linear_interleaver") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->devVerUseLinearInterleaver = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Dev_ver_zero_apriori_in_hard_dec") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->devVerZeroAprioriInHardDec = itemp;\r
+ continue;\r
+ }\r
+\r
+\r
+\r
+ if(strcmp(pb,"Send_intermedite_internal_memories") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->devVerSendIntermediteInternalMemories = itemp;\r
+ continue;\r
+ }\r
+\r
+\r
+ \r
+ if(strcmp(pb,"Save_intermediate_data") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->saveIntermediateData = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Initial_process_index") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->initialProcInd = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Alternate_process_index") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->alternateProcInd = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Belief_prop_within_turbo_iter_enabled") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->beliefPropWithinTurboIterEnabled = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Puncture_interval") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->punctureInterval = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Enable_rate_matching") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->enableRateMatching = itemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Redundancy_version_number") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->redundancyVersionNumber = itemp;\r
+ continue;\r
+ }\r
+\r
+\r
+\r
+ if(strcmp(pb,"Coding_rate") == 0) {\r
+ sscanf(pt, "%f", &ftemp);\r
+ sparms->codingRate = ftemp;\r
+ continue;\r
+ }\r
+\r
+ if(strcmp(pb,"Load_info_bits_from_file") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->loadInfoBitsFromFile = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Store_info_bits_to_file") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->storeInfoBitsToFile = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Info_bits_file_name") == 0) {\r
+ sscanf(pt, "%s", sparms->infoBitsFileName);\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Store_coded_bits_to_file") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->storeCodedBitsToFile = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Coded_bits_file_name") == 0) {\r
+ sscanf(pt, "%s", sparms->codedBitsFileName);\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Info_bits_file_includes_CRC") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->infoBitsFileIncludesCRC = itemp;\r
+ continue;\r
+ }\r
+ if(strcmp(pb,"Use_tcp3_encoder_c_model") == 0) {\r
+ sscanf(pt, "%d", &itemp);\r
+ sparms->use_tcp3_encoder_c_model = itemp;\r
+ continue;\r
+ }\r
+ \r
+\r
+ }\r
+ }\r
+ fclose(cfgFile);\r
+}\r
+\r
+//********************************************************************\r
+//********************************************************************\r
+void SetDefaultConfig(TCP3_SIM_PARMS *sparms){\r
+int32_t i;\r
+\r
+ sparms->CodingStandard = 0;\r
+ sparms->MaxNumTurboIterations = 8;\r
+ sparms->MinNumTurboIterations = 1;\r
+ sparms->frameLenInd = 0;\r
+ sparms->mappingSign = 1;\r
+ sparms->seed = 0x55555555;\r
+ sparms->Scr2318ShiftReg = 0xffffffff;\r
+ sparms->SnrInitValue = -2.;\r
+ sparms->SnrIncrementStep = 0.25;\r
+ sparms->AdaptiveSnrStep = 0;\r
+ sparms->SnrLimitValue = 10.;\r
+ sparms->noiseSigma = (float) (1.0 / pow(10.0, (double)sparms->SnrInitValue/20.0));\r
+ sparms->bitWidthInt = 4;\r
+ sparms->bitWidthInt = 2;\r
+ sparms->maxStarEn = 0; // =0 MaxLogMAP, =1 MAXStar \r
+\r
+ sparms->ErrorProcessingOption = 1;\r
+ sparms->FrameErrorRateLimit = -1;\r
+ sparms->MinNumFecBlocks = 100;\r
+ sparms->MaxNumFecBlocks = 1000;\r
+ sparms->MinNumFerErrors = 0;\r
+\r
+\r
+ for(i=0; i<16; i++)\r
+ {\r
+ sparms->extrinsicScales[i] = 32;\r
+ }\r
+ sparms->tcp3_SW0_length = 64;\r
+ \r
+ sparms->tcp3_stopSel = 0; //=0 Max iter, =1 CRC, =2 or 3 SNR\r
+ sparms->tcp3_crcSel = 0; //=0 gCRC24B, =1 gCRC24A\r
+ sparms->tcp3_SNR_stopVal = 20;\r
+ sparms->tcp3_SNR_Report = 0;\r
+ sparms->tcp3_intlvGenEn = 0;\r
+ sparms->tcp3_intlvLoadSel = 1;\r
+ sparms->tcp3_extrScaleEn = 1;\r
+ sparms->tcp3_softOutBitFormat = 1;\r
+ sparms->tcp3_outBitOrderSel = 0;\r
+ sparms->tcp3_lteCrcInitSel = 0;\r
+ sparms->tcp3_lteCrcIterPass = 0;\r
+ sparms->tcp3_softOutBitsReadEn = 0;\r
+ sparms->tcp3_outStatusReadEn = 0;\r
+ \r
+ \r
+ sparms->enableTopLvlDeviceVerification = 0;\r
+ sparms->enableDeviceVerification = 0;\r
+ sparms->disableBeliefPropagation = 0;\r
+ sparms->disableAlphaBeliefPropagation = 0;\r
+ sparms->disableBetaBeliefPropagation = 0;\r
+\r
+ sparms->devVerAlphaBlockNumber = 0;\r
+ sparms->devVerExtrBlockNumber = 0;\r
+ sparms->devVerBetaBlockNumber = 0;\r
+ sparms->devVerSendIntermediteInternalMemories = 0;\r
+ sparms->devVerUseLinearInterleaver = 0;\r
+ sparms->devVerZeroAprioriInHardDec = 0;\r
+\r
+\r
+ sparms->maxStarThreshold = 4;\r
+ sparms->maxStarValue = 2;\r
+ sparms->saveIntermediateData = 0;\r
+\r
+ sparms->alternateProcInd = 0;\r
+ sparms->initialProcInd = 0;\r
+\r
+ sparms->beliefPropWithinTurboIterEnabled = 0;\r
+\r
+ sparms->punctureInterval = -1;\r
+ sparms->enableRateMatching = 0;\r
+ sparms->redundancyVersionNumber = 0;\r
+ sparms->codingRate = 0;\r
+ sparms->loadInfoBitsFromFile = 0;\r
+ sparms->storeCodedBitsToFile = 0;\r
+ sparms->storeInfoBitsToFile = 0;\r
+ sparms->infoBitsFileIncludesCRC = 0;\r
+ sparms->infoBitsFileName[0] = 0;\r
+ sparms->codedBitsFileName[0] = 0;\r
+ sparms->use_tcp3_encoder_c_model = 0;\r
+}\r
+\r
diff --git a/test/gen_test_vectors/src/set_reg.c b/test/gen_test_vectors/src/set_reg.c
--- /dev/null
@@ -0,0 +1,653 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <math.h>\r
+#include "sim_param.h"\r
+#include "cfg_param.h"\r
+\r
+#define WCDMA_SINGLE_MAP_MODE 0\r
+#define LTE_DUAL_MAP_MODE 1\r
+#define WIMAX_DUAL_MAP_MODE 2\r
+#define WCDMA_SPLIT_DEC_MODE 3\r
+\r
+int32_t SW0_LN_Tab[] = {16, 32, 48, 64, 96, 128};\r
+\r
+/********************************************************************************/\r
+/*LTE interleaver block sizes */\r
+/********************************************************************************/\r
+int32_t LTE_FRAME_LENGTHS [] = {\r
+ 40, 48, 56, 64, 72, 80, 88, 96, \r
+ 104, 112, 120, 128, 136, 144, 152, 160, \r
+ 168, 176, 184, 192, 200, 208, 216, 224, \r
+ 232, 240, 248, 256, 264, 272, 280, 288, \r
+ 296, 304, 312, 320, 328, 336, 344, 352, \r
+ 360, 368, 376, 384, 392, 400, 408, 416, \r
+ 424, 432, 440, 448, 456, 464, 472, 480, \r
+ 488, 496, 504, 512, 528, 544, 560, 576, \r
+ 592, 608, 624, 640, 656, 672, 688, 704, \r
+ 720, 736, 752, 768, 784, 800, 816, 832, \r
+ 848, 864, 880, 896, 912, 928, 944, 960, \r
+ 976, 992, 1008, 1024, 1056, 1088, 1120, 1152, \r
+ 1184, 1216, 1248, 1280, 1312, 1344, 1376, 1408, \r
+ 1440, 1472, 1504, 1536, 1568, 1600, 1632, 1664, \r
+ 1696, 1728, 1760, 1792, 1824, 1856, 1888, 1920, \r
+ 1952, 1984, 2016, 2048, 2112, 2176, 2240, 2304, \r
+ 2368, 2432, 2496, 2560, 2624, 2688, 2752, 2816, \r
+ 2880, 2944, 3008, 3072, 3136, 3200, 3264, 3328, \r
+ 3392, 3456, 3520, 3584, 3648, 3712, 3776, 3840, \r
+ 3904, 3968, 4032, 4096, 4160, 4224, 4288, 4352, \r
+ 4416, 4480, 4544, 4608, 4672, 4736, 4800, 4864, \r
+ 4928, 4992, 5056, 5120, 5184, 5248, 5312, 5376, \r
+ 5440, 5504, 5568, 5632, 5696, 5760, 5824, 5888, \r
+ 5952, 6016, 6080, 6144,\r
+/*********FOLLOWING PART IS EXTENTION TO 8192 with step 64 TO TEST TCP3 *************/\r
+ 6208, 6272, 6336, 6400, 6464, 6528, 6592, 6656, \r
+ 6720, 6784, 6848, 6912, 6976, 7040, 7104, 7168, \r
+ 7232, 7296, 7360, 7424, 7488, 7552, 7616, 7680, \r
+ 7744, 7808, 7872, 7936, 8000, 8064, 8128, 8192\r
+ };\r
+/*WiMAX frame lengths*/\r
+int32_t WIMAX_FRAME_LENGTHS[] = {\r
+ 48, /* 0: 6 Bytes */\r
+ 72, /* 1: 9 Bytes */\r
+ 96, /* 2: 12 Bytes */\r
+ 144, /* 3: 18 Bytes */\r
+ 192, /* 4: 24 Bytes */\r
+ 216, /* 5: 27 Bytes */\r
+ 240, /* 6: 30 Bytes */\r
+ 288, /* 7: 36 Bytes */\r
+ 360, /* 8: 45 Bytes */\r
+ 384, /* 9: 48 Bytes */\r
+ 432, /* 10: 54 Bytes */\r
+ 480, /* 11: 60 Bytes */\r
+ 960, /* 12: 120 Bytes */\r
+ 1920, /* 13: 240 Bytes */\r
+ 2880, /* 14: 360 Bytes */\r
+ 3840, /* 15: 480 Bytes */\r
+ 4800 /* 16: 600 Bytes */\r
+};\r
+/***************************************************************************/\r
+/* LTE Interelaver table with the coefficients P0,P1,P2 and G0 needed for */\r
+/* internal LTE coefficient generation. */\r
+/* K f1 f2 P0 P1 P2 G0 */\r
+/* See matlab file rec_gen_parallel_v3_extend_to_8192.m */\r
+/***************************************************************************/\r
+int16_t TCP3_LteInterleaverTable [220][7] = {\r
+ 40, 3, 10, 30, 20, 10, 13, // 0\r
+ 48, 7, 12, 36, 24, 12, 19, // 1\r
+ 56, 19, 42, 42, 28, 14, 5, // 2\r
+ 64, 7, 16, 48, 32, 16, 23, // 3\r
+ 72, 7, 18, 54, 36, 18, 25, // 4\r
+ 80, 11, 20, 60, 40, 20, 31, // 5\r
+ 88, 5, 22, 22, 44, 66, 27, // 6\r
+ 96, 11, 24, 72, 48, 24, 35, // 7\r
+ 104, 7, 26, 78, 52, 26, 33, // 8\r
+ 112, 41, 84, 28, 56, 84, 13, // 9\r
+ 120, 103, 90, 90, 60, 30, 73, // 10\r
+ 128, 15, 32, 96, 64, 32, 47, // 11\r
+ 136, 9, 34, 34, 68, 102, 43, // 12\r
+ 144, 17, 108, 36, 72, 108, 125, // 13\r
+ 152, 9, 38, 38, 76, 114, 47, // 14\r
+ 160, 21, 120, 40, 80, 120, 141, // 15\r
+ 168, 101, 84, 42, 84, 126, 17, // 16\r
+ 176, 21, 44, 44, 88, 132, 65, // 17\r
+ 184, 57, 46, 46, 92, 138, 103, // 18\r
+ 192, 23, 48, 144, 96, 48, 71, // 19\r
+ 200, 13, 50, 50, 100, 150, 63, // 20\r
+ 208, 27, 52, 156, 104, 52, 79, // 21\r
+ 216, 11, 36, 162, 108, 54, 47, // 22\r
+ 224, 27, 56, 168, 112, 56, 83, // 23\r
+ 232, 85, 58, 58, 116, 174, 143, // 24\r
+ 240, 29, 60, 60, 120, 180, 89, // 25\r
+ 248, 33, 62, 62, 124, 186, 95, // 26\r
+ 256, 15, 32, 192, 128, 64, 47, // 27\r
+ 264, 17, 198, 66, 132, 198, 215, // 28\r
+ 272, 33, 68, 68, 136, 204, 101, // 29\r
+ 280, 103, 210, 210, 140, 70, 33, // 30\r
+ 288, 19, 36, 216, 144, 72, 55, // 31\r
+ 296, 19, 74, 222, 148, 74, 93, // 32\r
+ 304, 37, 76, 76, 152, 228, 113, // 33\r
+ 312, 19, 78, 234, 156, 78, 97, // 34\r
+ 320, 21, 120, 80, 160, 240, 141, // 35\r
+ 328, 21, 82, 82, 164, 246, 103, // 36\r
+ 336, 115, 84, 252, 168, 84, 199, // 37\r
+ 344, 193, 86, 86, 172, 258, 279, // 38\r
+ 352, 21, 44, 88, 176, 264, 65, // 39\r
+ 360, 133, 90, 90, 180, 270, 223, // 40\r
+ 368, 81, 46, 92, 184, 276, 127, // 41\r
+ 376, 45, 94, 94, 188, 282, 139, // 42\r
+ 384, 23, 48, 288, 192, 96, 71, // 43\r
+ 392, 243, 98, 294, 196, 98, 341, // 44\r
+ 400, 151, 40, 300, 200, 100, 191, // 45\r
+ 408, 155, 102, 306, 204, 102, 257, // 46\r
+ 416, 25, 52, 104, 208, 312, 77, // 47\r
+ 424, 51, 106, 318, 212, 106, 157, // 48\r
+ 432, 47, 72, 324, 216, 108, 119, // 49\r
+ 440, 91, 110, 330, 220, 110, 201, // 50\r
+ 448, 29, 168, 112, 224, 336, 197, // 51\r
+ 456, 29, 114, 114, 228, 342, 143, // 52\r
+ 464, 247, 58, 348, 232, 116, 305, // 53\r
+ 472, 29, 118, 118, 236, 354, 147, // 54\r
+ 480, 89, 180, 120, 240, 360, 269, // 55\r
+ 488, 91, 122, 366, 244, 122, 213, // 56\r
+ 496, 157, 62, 124, 248, 372, 219, // 57\r
+ 504, 55, 84, 378, 252, 126, 139, // 58\r
+ 512, 31, 64, 384, 256, 128, 95, // 59\r
+ 528, 17, 66, 132, 264, 396, 83, // 60\r
+ 544, 35, 68, 408, 272, 136, 103, // 61\r
+ 560, 227, 420, 420, 280, 140, 87, // 62\r
+ 576, 65, 96, 144, 288, 432, 161, // 63\r
+ 592, 19, 74, 444, 296, 148, 93, // 64\r
+ 608, 37, 76, 152, 304, 456, 113, // 65\r
+ 624, 41, 234, 156, 312, 468, 275, // 66\r
+ 640, 39, 80, 480, 320, 160, 119, // 67\r
+ 656, 185, 82, 164, 328, 492, 267, // 68\r
+ 672, 43, 252, 504, 336, 168, 295, // 69\r
+ 688, 21, 86, 172, 344, 516, 107, // 70\r
+ 704, 155, 44, 528, 352, 176, 199, // 71\r
+ 720, 79, 120, 540, 360, 180, 199, // 72\r
+ 736, 139, 92, 552, 368, 184, 231, // 73\r
+ 752, 23, 94, 564, 376, 188, 117, // 74\r
+ 768, 217, 48, 192, 384, 576, 265, // 75\r
+ 784, 25, 98, 196, 392, 588, 123, // 76\r
+ 800, 17, 80, 200, 400, 600, 97, // 77\r
+ 816, 127, 102, 612, 408, 204, 229, // 78\r
+ 832, 25, 52, 208, 416, 624, 77, // 79\r
+ 848, 239, 106, 636, 424, 212, 345, // 80\r
+ 864, 17, 48, 216, 432, 648, 65, // 81\r
+ 880, 137, 110, 220, 440, 660, 247, // 82\r
+ 896, 215, 112, 672, 448, 224, 327, // 83\r
+ 912, 29, 114, 228, 456, 684, 143, // 84\r
+ 928, 15, 58, 696, 464, 232, 73, // 85\r
+ 944, 147, 118, 708, 472, 236, 265, // 86\r
+ 960, 29, 60, 240, 480, 720, 89, // 87\r
+ 976, 59, 122, 732, 488, 244, 181, // 88\r
+ 992, 65, 124, 248, 496, 744, 189, // 89\r
+1008, 55, 84, 756, 504, 252, 139, // 90\r
+1024, 31, 64, 768, 512, 256, 95, // 91\r
+1056, 17, 66, 264, 528, 792, 83, // 92\r
+1088, 171, 204, 816, 544, 272, 375, // 93\r
+1120, 67, 140, 840, 560, 280, 207, // 94\r
+1152, 35, 72, 864, 576, 288, 107, // 95\r
+1184, 19, 74, 888, 592, 296, 93, // 96\r
+1216, 39, 76, 912, 608, 304, 115, // 97\r
+1248, 19, 78, 936, 624, 312, 97, // 98\r
+1280, 199, 240, 960, 640, 320, 439, // 99\r
+1312, 21, 82, 328, 656, 984, 103, // 100\r
+1344, 211, 252, 1008, 672, 336, 463, // 101\r
+1376, 21, 86, 344, 688, 1032, 107, // 102\r
+1408, 43, 88, 1056, 704, 352, 131, // 103\r
+1440, 149, 60, 360, 720, 1080, 209, // 104\r
+1472, 45, 92, 368, 736, 1104, 137, // 105\r
+1504, 49, 846, 376, 752, 1128, 895, // 106\r
+1536, 71, 48, 1152, 768, 384, 119, // 107\r
+1568, 13, 28, 392, 784, 1176, 41, // 108\r
+1600, 17, 80, 400, 800, 1200, 97, // 109\r
+1632, 25, 102, 408, 816, 1224, 127, // 110\r
+1664, 183, 104, 1248, 832, 416, 287, // 111\r
+1696, 55, 954, 1272, 848, 424, 1009, // 112\r
+1728, 127, 96, 1296, 864, 432, 223, // 113\r
+1760, 27, 110, 1320, 880, 440, 137, // 114\r
+1792, 29, 112, 448, 896, 1344, 141, // 115\r
+1824, 29, 114, 456, 912, 1368, 143, // 116\r
+1856, 57, 116, 464, 928, 1392, 173, // 117\r
+1888, 45, 354, 472, 944, 1416, 399, // 118\r
+1920, 31, 120, 1440, 960, 480, 151, // 119\r
+1952, 59, 610, 1464, 976, 488, 669, // 120\r
+1984, 185, 124, 496, 992, 1488, 309, // 121\r
+2016, 113, 420, 504, 1008, 1512, 533, // 122\r
+2048, 31, 64, 1536, 1024, 512, 95, // 123\r
+2112, 17, 66, 528, 1056, 1584, 83, // 124\r
+2176, 171, 136, 1632, 1088, 544, 307, // 125\r
+2240, 209, 420, 560, 1120, 1680, 629, // 126\r
+2304, 253, 216, 576, 1152, 1728, 469, // 127\r
+2368, 367, 444, 1776, 1184, 592, 811, // 128\r
+2432, 265, 456, 608, 1216, 1824, 721, // 129\r
+2496, 181, 468, 624, 1248, 1872, 649, // 130\r
+2560, 39, 80, 1920, 1280, 640, 119, // 131\r
+2624, 27, 164, 1968, 1312, 656, 191, // 132\r
+2688, 127, 504, 2016, 1344, 672, 631, // 133\r
+2752, 143, 172, 2064, 1376, 688, 315, // 134\r
+2816, 43, 88, 2112, 1408, 704, 131, // 135\r
+2880, 29, 300, 720, 1440, 2160, 329, // 136\r
+2944, 45, 92, 736, 1472, 2208, 137, // 137\r
+3008, 157, 188, 752, 1504, 2256, 345, // 138\r
+3072, 47, 96, 2304, 1536, 768, 143, // 139\r
+3136, 13, 28, 784, 1568, 2352, 41, // 140\r
+3200, 111, 240, 2400, 1600, 800, 351, // 141\r
+3264, 443, 204, 2448, 1632, 816, 647, // 142\r
+3328, 51, 104, 2496, 1664, 832, 155, // 143\r
+3392, 51, 212, 2544, 1696, 848, 263, // 144\r
+3456, 451, 192, 2592, 1728, 864, 643, // 145\r
+3520, 257, 220, 880, 1760, 2640, 477, // 146\r
+3584, 57, 336, 896, 1792, 2688, 393, // 147\r
+3648, 313, 228, 912, 1824, 2736, 541, // 148\r
+3712, 271, 232, 2784, 1856, 928, 503, // 149\r
+3776, 179, 236, 2832, 1888, 944, 415, // 150\r
+3840, 331, 120, 2880, 1920, 960, 451, // 151\r
+3904, 363, 244, 2928, 1952, 976, 607, // 152\r
+3968, 375, 248, 2976, 1984, 992, 623, // 153\r
+4032, 127, 168, 3024, 2016, 1008, 295, // 154\r
+4096, 31, 64, 3072, 2048, 1024, 95, // 155\r
+4160, 33, 130, 1040, 2080, 3120, 163, // 156\r
+4224, 43, 264, 3168, 2112, 1056, 307, // 157\r
+4288, 33, 134, 1072, 2144, 3216, 167, // 158\r
+4352, 477, 408, 1088, 2176, 3264, 885, // 159\r
+4416, 35, 138, 3312, 2208, 1104, 173, // 160\r
+4480, 233, 280, 1120, 2240, 3360, 513, // 161\r
+4544, 357, 142, 1136, 2272, 3408, 499, // 162\r
+4608, 337, 480, 1152, 2304, 3456, 817, // 163\r
+4672, 37, 146, 1168, 2336, 3504, 183, // 164\r
+4736, 71, 444, 3552, 2368, 1184, 515, // 165\r
+4800, 71, 120, 3600, 2400, 1200, 191, // 166\r
+4864, 37, 152, 1216, 2432, 3648, 189, // 167\r
+4928, 39, 462, 3696, 2464, 1232, 501, // 168\r
+4992, 127, 234, 3744, 2496, 1248, 361, // 169\r
+5056, 39, 158, 3792, 2528, 1264, 197, // 170\r
+5120, 39, 80, 3840, 2560, 1280, 119, // 171\r
+5184, 31, 96, 3888, 2592, 1296, 127, // 172\r
+5248, 113, 902, 1312, 2624, 3936, 1015, // 173\r
+5312, 41, 166, 1328, 2656, 3984, 207, // 174\r
+5376, 251, 336, 4032, 2688, 1344, 587, // 175\r
+5440, 43, 170, 4080, 2720, 1360, 213, // 176\r
+5504, 21, 86, 1376, 2752, 4128, 107, // 177\r
+5568, 43, 174, 4176, 2784, 1392, 217, // 178\r
+5632, 45, 176, 1408, 2816, 4224, 221, // 179\r
+5696, 45, 178, 1424, 2848, 4272, 223, // 180\r
+5760, 161, 120, 1440, 2880, 4320, 281, // 181\r
+5824, 89, 182, 1456, 2912, 4368, 271, // 182\r
+5888, 323, 184, 4416, 2944, 1472, 507, // 183\r
+5952, 47, 186, 4464, 2976, 1488, 233, // 184\r
+6016, 23, 94, 4512, 3008, 1504, 117, // 185\r
+6080, 47, 190, 4560, 3040, 1520, 237, // 186\r
+6144, 263, 480, 4608, 3072, 1536, 743, // 187\r
+\r
+/*********FOLLOWING PART IS EXTENTION TO 8192 with step 64 TO TEST TCP3 *************/\r
+ 6208, 3, 194, 4656, 3104, 1552, 197, // 188\r
+ 6272, 3, 14, 4704, 3136, 1568, 17, // 189\r
+ 6336, 5, 66, 1584, 3168, 4752, 71, // 190\r
+ 6400, 3, 10, 4800, 3200, 1600, 13, // 191\r
+ 6464, 3, 202, 4848, 3232, 1616, 205, // 192\r
+ 6528, 5, 102, 1632, 3264, 4896, 107, // 193\r
+ 6592, 3, 206, 4944, 3296, 1648, 209, // 194\r
+ 6656, 3, 26, 4992, 3328, 1664, 29, // 195\r
+ 6720, 11, 210, 5040, 3360, 1680, 221, // 196\r
+ 6784, 3, 106, 5088, 3392, 1696, 109, // 197\r
+ 6848, 3, 214, 5136, 3424, 1712, 217, // 198\r
+ 6912, 5, 6, 1728, 3456, 5184, 11, // 199\r
+ 6976, 3, 218, 5232, 3488, 1744, 221, // 200\r
+ 7040, 3, 110, 5280, 3520, 1760, 113, // 201\r
+ 7104, 5, 222, 1776, 3552, 5328, 227, // 202\r
+ 7168, 3, 14, 5376, 3584, 1792, 17, // 203\r
+ 7232, 3, 226, 5424, 3616, 1808, 229, // 204\r
+ 7296, 5, 114, 1824, 3648, 5472, 119, // 205\r
+ 7360, 3, 230, 5520, 3680, 1840, 233, // 206\r
+ 7424, 3, 58, 5568, 3712, 1856, 61, // 207\r
+ 7488, 5, 78, 1872, 3744, 5616, 83, // 208\r
+ 7552, 3, 118, 5664, 3776, 1888, 121, // 209\r
+ 7616, 3, 238, 5712, 3808, 1904, 241, // 210\r
+ 7680, 7, 30, 5760, 3840, 1920, 37, // 211\r
+ 7744, 3, 22, 5808, 3872, 1936, 25, // 212\r
+ 7808, 3, 122, 5856, 3904, 1952, 125, // 213\r
+ 7872, 5, 246, 1968, 3936, 5904, 251, // 214\r
+ 7936, 3, 62, 5952, 3968, 1984, 65, // 215\r
+ 8000, 3, 10, 6000, 4000, 2000, 13, // 216\r
+ 8064, 5, 42, 2016, 4032, 6048, 47, // 217\r
+ 8128, 3, 254, 6096, 4064, 2032, 257, // 218\r
+ 8192, 3, 2, 6144, 4096, 2048, 5, // 219\r
+\r
+};\r
+\r
+int32_t TCP3_WimaxInterleaverTable[][4] ={\r
+ 20, 18, 11, 4, \r
+ 8, 12, 23, 34, \r
+ 4, 14, 27, 40, \r
+ 44, 54, 23, 4, \r
+ 28, 8, 39, 46, \r
+ 44, 12, 79, 90, \r
+ 52, 14, 27, 40, \r
+ 68, 20, 107, 126, \r
+ 44, 12, 23, 34, \r
+ 44, 12, 71, 82, \r
+ 52, 14, 27, 40, \r
+ 52, 14, 87, 100, \r
+ 212, 356, 119, 402, \r
+ 172, 588, 387, 474, \r
+ 172, 44, 447, 1390, \r
+ 124, 1000, 87, 1070, \r
+ 212, 1320, 131, 1362 \r
+}; \r
+\r
+//*********************************************************************\r
+//Sets the register structure that contains all tcp3 register parameters\r
+//based on sparms structure.\r
+//*********************************************************************\r
+void SetReg(TCP3_SIM_PARMS *sparms, TCP3_REGS *reg)\r
+{\r
+ \r
+ int32_t i;\r
+ uint8_t *ptr;\r
+ int32_t numMap;\r
+ int32_t subFrameLen;\r
+ int32_t sw0NomLen;\r
+ int32_t numSW;\r
+ int32_t SW1LenSelTmp;\r
+ int32_t SW2LenSelTmp;\r
+ \r
+ \r
+ //Initialize reg structure\r
+ ptr = (uint8_t *) reg;\r
+ for(i=0; i<sizeof(TCP3_REGS); i++)\r
+ {\r
+ ptr[i] = 0;\r
+ }\r
+ \r
+ //sets ping or pong input area\r
+ reg->proc_id = 0;\r
+ \r
+ switch (sparms->CodingStandard)\r
+ {\r
+ case WCDMA_SINGLE_MAP_MODE:\r
+ reg->NumInfoBits = sparms->frameLenInd;\r
+ reg->ExtndNumInfoBits = (reg->NumInfoBits+3) & 0xFFFFFFFC;\r
+ reg->IntlvLen = reg->ExtndNumInfoBits;\r
+ numMap = 1;\r
+ break;\r
+ case LTE_DUAL_MAP_MODE:\r
+ reg->NumInfoBits = LTE_FRAME_LENGTHS[sparms->frameLenInd];\r
+ reg->ExtndNumInfoBits = reg->NumInfoBits;\r
+ reg->IntlvLen = reg->ExtndNumInfoBits;\r
+ numMap = 2;\r
+ break;\r
+ case WIMAX_DUAL_MAP_MODE: \r
+ reg->NumInfoBits = WIMAX_FRAME_LENGTHS[sparms->frameLenInd];\r
+ reg->ExtndNumInfoBits = reg->NumInfoBits;\r
+ reg->IntlvLen = reg->ExtndNumInfoBits>>1;\r
+ numMap = 2;\r
+ break;\r
+ case WCDMA_SPLIT_DEC_MODE:\r
+ reg->NumInfoBits = sparms->frameLenInd;\r
+ reg->ExtndNumInfoBits = (reg->NumInfoBits+3) & 0xFFFFFFFC;\r
+ reg->IntlvLen = reg->ExtndNumInfoBits;\r
+ numMap = 1;\r
+ break;\r
+ }\r
+\r
+ \r
+ //Common registers:\r
+ //TCP3_MODE\r
+ reg->mode_sel = sparms->CodingStandard;\r
+ if(reg->mode_sel == 3)\r
+ {\r
+ reg->in_mem_db_en = 0;\r
+ }\r
+ else\r
+ {\r
+ reg->in_mem_db_en = 1;\r
+ }\r
+ \r
+ reg->itg_en = sparms->tcp3_intlvGenEn;\r
+ reg->err_ignore_en = 1;\r
+ reg->auto_trig_en = 0;\r
+ reg->lte_crc_init_sel = sparms->tcp3_lteCrcInitSel;\r
+ \r
+ //TRIGGER_REG\r
+ reg->trig = 1;\r
+ \r
+ //TCP_ENDIAN\r
+ reg->endian_intr = 1;\r
+ reg->endian_indata = 1;\r
+ \r
+ //Per process control register:\r
+ //TCP3_EXE\r
+ reg->exe_cmd = 1; //Execute new decode\r
+ \r
+ //Per process configuration registers:\r
+ //CFG0\r
+ reg->blk_ln = reg->NumInfoBits - 1;\r
+ \r
+ //CFG2\r
+ reg->inter_load_sel = sparms->tcp3_intlvLoadSel; //Load or generate interleaver\r
+ reg->maxst_en = sparms->maxStarEn;\r
+ reg->out_flag_en = sparms->tcp3_outStatusReadEn;\r
+ reg->out_order_sel = sparms->tcp3_outBitOrderSel;\r
+ reg->ext_scale_en = sparms->tcp3_extrScaleEn;\r
+ reg->soft_out_flag_en = sparms->tcp3_softOutBitsReadEn;\r
+ reg->soft_out_order_sel = 0;\r
+ reg->soft_out_fmt = sparms->tcp3_softOutBitFormat;\r
+ reg->min_itr = sparms->MinNumTurboIterations;\r
+ reg->max_itr = sparms->MaxNumTurboIterations;\r
+ reg->snr_val = sparms->tcp3_SNR_stopVal;\r
+ reg->snr_rep = sparms->tcp3_SNR_Report;\r
+ reg->stop_sel = sparms->tcp3_stopSel;\r
+ reg->crc_iter_pass = sparms->tcp3_lteCrcIterPass;\r
+ reg->crc_sel = sparms->tcp3_crcSel;\r
+ \r
+ //CFG3\r
+ reg->maxst_thold = sparms->maxStarThreshold;\r
+ reg->maxst_value = sparms->maxStarValue;\r
+ \r
+ \r
+ \r
+ //CFG8\r
+ reg->ext_scale_0 = sparms->extrinsicScales[0];\r
+ reg->ext_scale_1 = sparms->extrinsicScales[1];\r
+ reg->ext_scale_2 = sparms->extrinsicScales[2];\r
+ reg->ext_scale_3 = sparms->extrinsicScales[3];\r
+ \r
+ //CFG9\r
+ reg->ext_scale_4 = sparms->extrinsicScales[4];\r
+ reg->ext_scale_5 = sparms->extrinsicScales[5];\r
+ reg->ext_scale_6 = sparms->extrinsicScales[6];\r
+ reg->ext_scale_7 = sparms->extrinsicScales[7];\r
+ \r
+ //CFG10\r
+ reg->ext_scale_8 = sparms->extrinsicScales[8 ];\r
+ reg->ext_scale_9 = sparms->extrinsicScales[9 ];\r
+ reg->ext_scale_10 = sparms->extrinsicScales[10];\r
+ reg->ext_scale_11 = sparms->extrinsicScales[11];\r
+ \r
+ //CFG11\r
+ reg->ext_scale_12 = sparms->extrinsicScales[12];\r
+ reg->ext_scale_13 = sparms->extrinsicScales[13];\r
+ reg->ext_scale_14 = sparms->extrinsicScales[14];\r
+ reg->ext_scale_15 = sparms->extrinsicScales[15];\r
+ \r
+ //CFG12-CFG14\r
+ if(sparms->CodingStandard == 1) //LTE interleaver parameters \r
+ {\r
+ reg->itg_param_1 = TCP3_LteInterleaverTable[sparms->frameLenInd][6];\r
+ reg->itg_param_0 = (int32_t) ((2*TCP3_LteInterleaverTable[sparms->frameLenInd][2]) % TCP3_LteInterleaverTable[sparms->frameLenInd][0]);\r
+ reg->itg_param_2 = TCP3_LteInterleaverTable[sparms->frameLenInd][3];\r
+ reg->itg_param_3 = TCP3_LteInterleaverTable[sparms->frameLenInd][4];\r
+ reg->itg_param_4 = TCP3_LteInterleaverTable[sparms->frameLenInd][5];\r
+ }\r
+ else if(sparms->CodingStandard == 2) //WIMAX interleaver parameters \r
+ {\r
+ reg->itg_param_0 = 0;\r
+ reg->itg_param_1 = TCP3_WimaxInterleaverTable[sparms->frameLenInd][0]; \r
+ reg->itg_param_2 = TCP3_WimaxInterleaverTable[sparms->frameLenInd][1]; \r
+ reg->itg_param_3 = TCP3_WimaxInterleaverTable[sparms->frameLenInd][2]; \r
+ reg->itg_param_4 = TCP3_WimaxInterleaverTable[sparms->frameLenInd][3];\r
+ }\r
+ else\r
+ {\r
+ reg->itg_param_0 = 0;\r
+ reg->itg_param_1 = 0;\r
+ reg->itg_param_2 = 0;\r
+ reg->itg_param_3 = 0;\r
+ reg->itg_param_4 = 0;\r
+ }\r
+ \r
+ \r
+ \r
+ //Calculate SW0LenSel, SW1LenSel, SW2LenSel, numSW0\r
+ if((reg->mode_sel == 1) || (reg->mode_sel == 2)) \r
+ {\r
+ subFrameLen = reg->ExtndNumInfoBits / (2*2);\r
+ }\r
+ else\r
+ {\r
+ subFrameLen = reg->ExtndNumInfoBits / (2);\r
+ }\r
+ \r
+ \r
+ //CFG1\r
+ reg->SW0_length = sparms->tcp3_SW0_length;\r
+ switch (sparms->tcp3_SW0_length)\r
+ {\r
+ case 16:\r
+ reg->sw0_ln_sel = 0;\r
+ break;\r
+ case 32:\r
+ reg->sw0_ln_sel = 1;\r
+ break;\r
+ case 48:\r
+ reg->sw0_ln_sel = 2;\r
+ break;\r
+ case 64:\r
+ reg->sw0_ln_sel = 3;\r
+ break;\r
+ case 96:\r
+ reg->sw0_ln_sel = 4;\r
+ break;\r
+ case 128:\r
+ reg->sw0_ln_sel = 5;\r
+ break;\r
+ default:\r
+ reg->sw0_ln_sel = 5;\r
+ }\r
+ \r
+ //Check that this holds: (reg->NumInfoBits <= 128 * sparms->tcp3_SW0_length * numMap)\r
+ while(reg->NumInfoBits > 128 * SW0_LN_Tab[reg->sw0_ln_sel] * numMap)\r
+ {\r
+ reg->sw0_ln_sel++;\r
+ }\r
+ \r
+ //CFG0 & CFG1\r
+ sw0NomLen = SW0_LN_Tab[reg->sw0_ln_sel];\r
+ numSW = (int32_t) ceil((double)subFrameLen/sw0NomLen);\r
+ if(numSW == 1)\r
+ {\r
+ reg->num_sw0 = 0;\r
+ reg->sw1_ln = subFrameLen-1; //stored value is (sw1_length -1)\r
+ reg->sw2_ln_sel = 0; //SW2 is Off.\r
+ }\r
+ else if(numSW == 2)\r
+ {\r
+ reg->num_sw0 = 0;\r
+ SW1LenSelTmp = 2 * (int32_t) ceil(subFrameLen/4.0) - 1; //stored value is (sw1_length-1)\r
+ SW2LenSelTmp = 2 * (int32_t) floor(subFrameLen/4.0) - 1;\r
+ if(SW1LenSelTmp == SW2LenSelTmp)\r
+ {\r
+ reg->sw2_ln_sel = 1; //SW1Len = SW2Len\r
+ }\r
+ else\r
+ {\r
+ reg->sw2_ln_sel = 2; //SW1Len > SW2Len\r
+ }\r
+ reg->sw1_ln = SW1LenSelTmp;\r
+ }\r
+ else if( (int32_t) (subFrameLen % sw0NomLen) <= (sw0NomLen/2) )\r
+ {\r
+ reg->num_sw0 = numSW-2;\r
+ SW1LenSelTmp = 2 * (int32_t) ceil((subFrameLen - (numSW-2)*sw0NomLen)/4.0) - 1;\r
+ SW2LenSelTmp = 2 * (int32_t) floor((subFrameLen - (numSW-2)*sw0NomLen)/4.0) - 1;\r
+ if(SW1LenSelTmp == SW2LenSelTmp)\r
+ {\r
+ reg->sw2_ln_sel = 1; //SW1Len = SW2Len\r
+ }\r
+ else\r
+ {\r
+ reg->sw2_ln_sel = 2; //SW1Len > SW2Len\r
+ }\r
+ \r
+ reg->sw1_ln = SW1LenSelTmp;\r
+ }\r
+ else\r
+ {\r
+ reg->num_sw0 = numSW-1;\r
+ reg->sw2_ln_sel = 0; //SW2 is Off.\r
+ reg->sw1_ln = (int32_t) (subFrameLen % sw0NomLen) - 1;\r
+ }\r
+}\r
+\r
+\r
+//*********************************************************************\r
+// Copy from reg structure to output reg structure (stripped version)\r
+//*********************************************************************\r
+void SetOutReg(TCP3_REGS *reg, OUT_TCP3_REGS *outReg)\r
+{\r
+\r
+\r
+ outReg->mode_sel = reg->mode_sel ;\r
+ outReg->lte_crc_init_sel = reg->lte_crc_init_sel ;\r
+ outReg->NumInfoBits = reg->NumInfoBits ;\r
+ outReg->SW0_length = reg->SW0_length ;\r
+ outReg->maxst_en = reg->maxst_en ;\r
+ outReg->out_flag_en = reg->out_flag_en ;\r
+ outReg->out_order_sel = reg->out_order_sel ;\r
+ outReg->ext_scale_en = reg->ext_scale_en ;\r
+ outReg->soft_out_flag_en = reg->soft_out_flag_en ;\r
+ outReg->soft_out_fmt = reg->soft_out_fmt ;\r
+ outReg->min_itr = reg->min_itr ;\r
+ outReg->max_itr = reg->max_itr ;\r
+ outReg->snr_val = reg->snr_val ;\r
+ outReg->snr_rep = reg->snr_rep ;\r
+ outReg->stop_sel = reg->stop_sel ;\r
+ outReg->crc_iter_pass = reg->crc_iter_pass ;\r
+ outReg->crc_sel = reg->crc_sel ;\r
+ outReg->maxst_thold = reg->maxst_thold ;\r
+ outReg->maxst_value = reg->maxst_value ;\r
+ outReg->ext_scale_0 = reg->ext_scale_0 ;\r
+ outReg->ext_scale_1 = reg->ext_scale_1 ;\r
+ outReg->ext_scale_2 = reg->ext_scale_2 ;\r
+ outReg->ext_scale_3 = reg->ext_scale_3 ;\r
+ outReg->ext_scale_4 = reg->ext_scale_4 ;\r
+ outReg->ext_scale_5 = reg->ext_scale_5 ;\r
+ outReg->ext_scale_6 = reg->ext_scale_6 ;\r
+ outReg->ext_scale_7 = reg->ext_scale_7 ;\r
+ outReg->ext_scale_8 = reg->ext_scale_8 ;\r
+ outReg->ext_scale_9 = reg->ext_scale_9 ;\r
+ outReg->ext_scale_10 = reg->ext_scale_10 ;\r
+ outReg->ext_scale_11 = reg->ext_scale_11 ;\r
+ outReg->ext_scale_12 = reg->ext_scale_12 ;\r
+ outReg->ext_scale_13 = reg->ext_scale_13 ;\r
+ outReg->ext_scale_14 = reg->ext_scale_14 ;\r
+ outReg->ext_scale_15 = reg->ext_scale_15 ;\r
+\r
+}
\ No newline at end of file
diff --git a/test/gen_test_vectors/test0_lte/block0_cfgreg.dat b/test/gen_test_vectors/test0_lte/block0_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+5504\r
+64\r
+0\r
+0\r
+0\r
+1\r
+0\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test0_lte/config_1.cfg b/test/gen_test_vectors/test0_lte/config_1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1
+Frame_size_index = 177
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 18882671
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/test0_lte/config_list.cfg b/test/gen_test_vectors/test0_lte/config_list.cfg
--- /dev/null
@@ -0,0 +1 @@
+config_1.cfg
diff --git a/test/gen_test_vectors/test0_lte/number_of_blocks.dat b/test/gen_test_vectors/test0_lte/number_of_blocks.dat
--- /dev/null
@@ -0,0 +1 @@
+1\r
diff --git a/test/gen_test_vectors/test0_wcdma/config_1.cfg b/test/gen_test_vectors/test0_wcdma/config_1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3
+Frame_size_index = 4845
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 18882671
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/test0_wcdma/config_list.cfg b/test/gen_test_vectors/test0_wcdma/config_list.cfg
--- /dev/null
@@ -0,0 +1 @@
+config_1.cfg
diff --git a/test/gen_test_vectors/test0_wimax/config_1.cfg b/test/gen_test_vectors/test0_wimax/config_1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2
+Frame_size_index = 15
+Max_number_of_turbo_iterations = 8
+Min_number_of_turbo_iterations = 1
+Max_star_enable = 0
+Max_star_threshold = 4
+Max_star_value = 2
+tcp3_extrScaleEn = 1
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
+tcp3_SW0_length = 64
+tcp3_stopSel = 0
+tcp3_SNR_Report = 1
+tcp3_SNR_stopVal = 14
+tcp3_intlvGenEn = 1
+tcp3_softOutBitFormat = 1
+tcp3_lteCrcInitSel = 0
+tcp3_lteCrcIterPass = 1
+tcp3_outStatusReadEn = 0
+tcp3_softOutBitsReadEn = 0
+Save_intermediate_data = 1
+Minimum_number_of_FEC_blocks = 1
+Maximum_number_of_FEC_blocks = 1
+Snr_increment_step = 0
+Frame_error_rate_limit = -4
+Snr_init_value = 2
+Add_noise = 1
+c_model_seed = 18882671
+Bit_width_of_integer_part = 4
+Bit_width_of_fractional_part = 2
+Minimum_number_of_frame_errors = 0
+Store_info_bits_to_file = 1
+Load_info_bits_from_file = 0
+Info_bits_file_name = infobits_file.txt
+Info_bits_file_includes_CRC= 1
+Initial_process_index = 0
+Store_coded_bits_to_file = 0
+Coded_bits_file_name = codedbits_file.txt
diff --git a/test/gen_test_vectors/test0_wimax/config_list.cfg b/test/gen_test_vectors/test0_wimax/config_list.cfg
--- /dev/null
@@ -0,0 +1 @@
+config_1.cfg
diff --git a/test/gen_test_vectors/test1_lte/block0_cfgreg.dat b/test/gen_test_vectors/test1_lte/block0_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+1024\r
+64\r
+0\r
+1\r
+0\r
+1\r
+1\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test1_lte/block1_cfgreg.dat b/test/gen_test_vectors/test1_lte/block1_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+1056\r
+64\r
+0\r
+1\r
+0\r
+1\r
+1\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test1_lte/block2_cfgreg.dat b/test/gen_test_vectors/test1_lte/block2_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+1088\r
+64\r
+0\r
+0\r
+0\r
+1\r
+0\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test1_lte/block3_cfgreg.dat b/test/gen_test_vectors/test1_lte/block3_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+1120\r
+64\r
+0\r
+1\r
+0\r
+1\r
+1\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test1_lte/block4_cfgreg.dat b/test/gen_test_vectors/test1_lte/block4_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+40\r
+64\r
+0\r
+0\r
+0\r
+1\r
+0\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test1_lte/block5_cfgreg.dat b/test/gen_test_vectors/test1_lte/block5_cfgreg.dat
--- /dev/null
@@ -0,0 +1,35 @@
+1\r
+0\r
+6144\r
+64\r
+0\r
+0\r
+0\r
+1\r
+0\r
+1\r
+1\r
+8\r
+14\r
+1\r
+0\r
+1\r
+0\r
+4\r
+2\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
+24\r
diff --git a/test/gen_test_vectors/test1_lte/test1_config1.cfg b/test/gen_test_vectors/test1_lte/test1_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -3 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_lte/test1_config2.cfg b/test/gen_test_vectors/test1_lte/test1_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 92\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -10 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_lte/test1_config3.cfg b/test/gen_test_vectors/test1_lte/test1_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 93\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#cp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_lte/test1_config4.cfg b/test/gen_test_vectors/test1_lte/test1_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 94\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_lte/test1_config5.cfg b/test/gen_test_vectors/test1_lte/test1_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 0\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_lte/test1_config6.cfg b/test/gen_test_vectors/test1_lte/test1_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_lte/test1_list.cfg b/test/gen_test_vectors/test1_lte/test1_list.cfg
--- /dev/null
@@ -0,0 +1,6 @@
+test1_config1.cfg\r
+test1_config2.cfg\r
+test1_config3.cfg\r
+test1_config4.cfg\r
+test1_config5.cfg\r
+test1_config6.cfg\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config1.cfg b/test/gen_test_vectors/test1_wcdma/test1_config1.cfg
--- /dev/null
@@ -0,0 +1,39 @@
+Coding_standard = 3\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 10 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 0\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config10.cfg b/test/gen_test_vectors/test1_wcdma/test1_config10.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 800\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config11.cfg b/test/gen_test_vectors/test1_wcdma/test1_config11.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 810\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config12.cfg b/test/gen_test_vectors/test1_wcdma/test1_config12.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 820\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config2.cfg b/test/gen_test_vectors/test1_wcdma/test1_config2.cfg
--- /dev/null
@@ -0,0 +1,39 @@
+Coding_standard = 3\r
+Frame_size_index = 101\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config3.cfg b/test/gen_test_vectors/test1_wcdma/test1_config3.cfg
--- /dev/null
@@ -0,0 +1,41 @@
+Coding_standard = 3\r
+Frame_size_index = 102\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config4.cfg b/test/gen_test_vectors/test1_wcdma/test1_config4.cfg
--- /dev/null
@@ -0,0 +1,41 @@
+Coding_standard = 3\r
+Frame_size_index = 103\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config5.cfg b/test/gen_test_vectors/test1_wcdma/test1_config5.cfg
--- /dev/null
@@ -0,0 +1,39 @@
+Coding_standard = 3\r
+Frame_size_index = 104\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config6.cfg b/test/gen_test_vectors/test1_wcdma/test1_config6.cfg
--- /dev/null
@@ -0,0 +1,39 @@
+Coding_standard = 3\r
+Frame_size_index = 105\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config7.cfg b/test/gen_test_vectors/test1_wcdma/test1_config7.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 106\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config8.cfg b/test/gen_test_vectors/test1_wcdma/test1_config8.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 107\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wcdma/test1_config9.cfg b/test/gen_test_vectors/test1_wcdma/test1_config9.cfg
--- /dev/null
@@ -0,0 +1,40 @@
+Coding_standard = 3\r
+Frame_size_index = 2000\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wcdma/test1_list.cfg b/test/gen_test_vectors/test1_wcdma/test1_list.cfg
--- /dev/null
@@ -0,0 +1,32 @@
+test1_config1.cfg\r
+test1_config2.cfg\r
+test1_config3.cfg\r
+test1_config4.cfg\r
+test1_config5.cfg\r
+test1_config6.cfg\r
+test1_config7.cfg\r
+test1_config8.cfg\r
+test1_config9.cfg\r
+test1_config10.cfg\r
+test1_config11.cfg\r
+test1_config12.cfg\r
+test1_config2.cfg\r
+test1_config1.cfg\r
+test1_config3.cfg\r
+test1_config4.cfg\r
+test1_config5.cfg\r
+test1_config6.cfg\r
+test1_config2.cfg\r
+test1_config7.cfg\r
+test1_config8.cfg\r
+test1_config9.cfg\r
+test1_config10.cfg\r
+test1_config11.cfg\r
+test1_config12.cfg\r
+test1_config7.cfg\r
+test1_config8.cfg\r
+test1_config9.cfg\r
+test1_config10.cfg\r
+test1_config11.cfg\r
+test1_config12.cfg\r
+test1_config1.cfg\r
diff --git a/test/gen_test_vectors/test1_wimax/test1_config1.cfg b/test/gen_test_vectors/test1_wimax/test1_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wimax/test1_config2.cfg b/test/gen_test_vectors/test1_wimax/test1_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 15\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wimax/test1_config3.cfg b/test/gen_test_vectors/test1_wimax/test1_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 0\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wimax/test1_config4.cfg b/test/gen_test_vectors/test1_wimax/test1_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 1\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wimax/test1_config5.cfg b/test/gen_test_vectors/test1_wimax/test1_config5.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 5\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test1_wimax/test1_list.cfg b/test/gen_test_vectors/test1_wimax/test1_list.cfg
--- /dev/null
@@ -0,0 +1,5 @@
+test1_config1.cfg\r
+test1_config2.cfg\r
+test1_config3.cfg\r
+test1_config4.cfg\r
+test1_config5.cfg\r
diff --git a/test/gen_test_vectors/test2_lte/test2_config1.cfg b/test/gen_test_vectors/test2_lte/test2_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<======LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_lte/test2_config2.cfg b/test/gen_test_vectors/test2_lte/test2_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 81\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 1; #<======LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_lte/test2_config3.cfg b/test/gen_test_vectors/test2_lte/test2_config3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 91\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 0;\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_lte/test2_config4.cfg b/test/gen_test_vectors/test2_lte/test2_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 1\r
+Frame_size_index = 81\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_intlvLoadSel = 0; #do not load interleaver\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_lte/test2_list.cfg b/test/gen_test_vectors/test2_lte/test2_list.cfg
--- /dev/null
@@ -0,0 +1,4 @@
+test2_config1.cfg\r
+test2_config2.cfg\r
+test2_config3.cfg\r
+test2_config4.cfg\r
diff --git a/test/gen_test_vectors/test2_wcdma/test2_config1.cfg b/test/gen_test_vectors/test2_wcdma/test2_config1.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 5113\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test2_wcdma/test2_config2.cfg b/test/gen_test_vectors/test2_wcdma/test2_config2.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 5114\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test2_wcdma/test2_config3.cfg b/test/gen_test_vectors/test2_wcdma/test2_config3.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 400\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test2_wcdma/test2_config4.cfg b/test/gen_test_vectors/test2_wcdma/test2_config4.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 300\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test2_wcdma/test2_config5.cfg b/test/gen_test_vectors/test2_wcdma/test2_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 200\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test2_wcdma/test2_config6.cfg b/test/gen_test_vectors/test2_wcdma/test2_config6.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_wcdma/test2_list.cfg b/test/gen_test_vectors/test2_wcdma/test2_list.cfg
--- /dev/null
@@ -0,0 +1,6 @@
+test2_config1.cfg\r
+test2_config2.cfg\r
+test2_config3.cfg\r
+test2_config4.cfg\r
+test2_config5.cfg\r
+test2_config6.cfg\r
diff --git a/test/gen_test_vectors/test2_wimax/test2_config1.cfg b/test/gen_test_vectors/test2_wimax/test2_config1.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_wimax/test2_config2.cfg b/test/gen_test_vectors/test2_wimax/test2_config2.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_wimax/test2_config3.cfg b/test/gen_test_vectors/test2_wimax/test2_config3.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 0; #<======DO NOT LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_wimax/test2_config4.cfg b/test/gen_test_vectors/test2_wimax/test2_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 0; #<======DO NOT LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test2_wimax/test2_list.cfg b/test/gen_test_vectors/test2_wimax/test2_list.cfg
--- /dev/null
@@ -0,0 +1,4 @@
+test2_config1.cfg\r
+test2_config2.cfg\r
+test2_config3.cfg\r
+test2_config4.cfg\r
diff --git a/test/gen_test_vectors/test3_lte/test3_config1.cfg b/test/gen_test_vectors/test3_lte/test3_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -3 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_lte/test3_config2.cfg b/test/gen_test_vectors/test3_lte/test3_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -10 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_lte/test3_config3.cfg b/test/gen_test_vectors/test3_lte/test3_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#cp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_lte/test3_config4.cfg b/test/gen_test_vectors/test3_lte/test3_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_lte/test3_config5.cfg b/test/gen_test_vectors/test3_lte/test3_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_lte/test3_config6.cfg b/test/gen_test_vectors/test3_lte/test3_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 187\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_lte/test3_list.cfg b/test/gen_test_vectors/test3_lte/test3_list.cfg
--- /dev/null
@@ -0,0 +1,6 @@
+test3_config1.cfg\r
+test3_config2.cfg\r
+test3_config3.cfg\r
+test3_config4.cfg\r
+test3_config5.cfg\r
+test3_config6.cfg\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config1.cfg b/test/gen_test_vectors/test3_wcdma/test3_config1.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 2001\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config2.cfg b/test/gen_test_vectors/test3_wcdma/test3_config2.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 2002\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config3.cfg b/test/gen_test_vectors/test3_wcdma/test3_config3.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 1100\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config4.cfg b/test/gen_test_vectors/test3_wcdma/test3_config4.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 1200\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config5.cfg b/test/gen_test_vectors/test3_wcdma/test3_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 1300\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config6.cfg b/test/gen_test_vectors/test3_wcdma/test3_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 1400\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config7.cfg b/test/gen_test_vectors/test3_wcdma/test3_config7.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 50\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config8.cfg b/test/gen_test_vectors/test3_wcdma/test3_config8.cfg
--- /dev/null
@@ -0,0 +1,37 @@
+Coding_standard = 3\r
+Frame_size_index = 51\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wcdma/test3_config9.cfg b/test/gen_test_vectors/test3_wcdma/test3_config9.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 3\r
+Frame_size_index = 52\r
+Max_number_of_turbo_iterations = 8\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1 #<==This one is irellevant\r
+tcp3_intlvLoadSel = 1; #<====== LOAD interleaver \r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
diff --git a/test/gen_test_vectors/test3_wcdma/test3_list.cfg b/test/gen_test_vectors/test3_wcdma/test3_list.cfg
--- /dev/null
@@ -0,0 +1,9 @@
+test3_config1.cfg\r
+test3_config2.cfg\r
+test3_config3.cfg\r
+test3_config4.cfg\r
+test3_config5.cfg\r
+test3_config6.cfg\r
+test3_config7.cfg\r
+test3_config8.cfg\r
+test3_config9.cfg\r
diff --git a/test/gen_test_vectors/test3_wimax/test3_config1.cfg b/test/gen_test_vectors/test3_wimax/test3_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wimax/test3_config2.cfg b/test/gen_test_vectors/test3_wimax/test3_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wimax/test3_config3.cfg b/test/gen_test_vectors/test3_wimax/test3_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wimax/test3_config4.cfg b/test/gen_test_vectors/test3_wimax/test3_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 10\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wimax/test3_config5.cfg b/test/gen_test_vectors/test3_wimax/test3_config5.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 2\r
+Frame_size_index = 9\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 64\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test3_wimax/test3_list.cfg b/test/gen_test_vectors/test3_wimax/test3_list.cfg
--- /dev/null
@@ -0,0 +1,5 @@
+test3_config1.cfg\r
+test3_config2.cfg\r
+test3_config3.cfg\r
+test3_config4.cfg\r
+test3_config5.cfg\r
diff --git a/test/gen_test_vectors/test4_lte/test4_config1.cfg b/test/gen_test_vectors/test4_lte/test4_config1.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 95\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 32\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -3 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test4_lte/test4_config2.cfg b/test/gen_test_vectors/test4_lte/test4_config2.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 90\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 32\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = -10 #0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test4_lte/test4_config3.cfg b/test/gen_test_vectors/test4_lte/test4_config3.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 95\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 32\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+#tcp3_outStatusReadEn = 1\r
+#cp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test4_lte/test4_config4.cfg b/test/gen_test_vectors/test4_lte/test4_config4.cfg
--- /dev/null
@@ -0,0 +1,38 @@
+Coding_standard = 1\r
+Frame_size_index = 95\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 32\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+tcp3_outStatusReadEn = 1\r
+tcp3_softOutBitsReadEn = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test4_lte/test4_config5.cfg b/test/gen_test_vectors/test4_lte/test4_config5.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 90\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 32\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test4_lte/test4_config6.cfg b/test/gen_test_vectors/test4_lte/test4_config6.cfg
--- /dev/null
@@ -0,0 +1,36 @@
+Coding_standard = 1\r
+Frame_size_index = 95\r
+Max_number_of_turbo_iterations = 7\r
+Min_number_of_turbo_iterations = 1\r
+Max_star_enable = 0\r
+Max_star_threshold = 4\r
+Max_star_value = 2\r
+tcp3_extrScaleEn = 1\r
+Extrinsic_scales = 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 \r
+tcp3_SW0_length = 32\r
+tcp3_stopSel = 0\r
+tcp3_SNR_Report = 1\r
+tcp3_SNR_stopVal = 14\r
+tcp3_intlvGenEn = 1\r
+tcp3_softOutBitFormat = 1\r
+tcp3_lteCrcInitSel = 0\r
+tcp3_lteCrcIterPass = 1\r
+Save_intermediate_data = 1\r
+Minimum_number_of_FEC_blocks = 1\r
+Maximum_number_of_FEC_blocks = 1\r
+Snr_increment_step = 0\r
+Frame_error_rate_limit = -4\r
+Snr_init_value = 0\r
+Add_noise = 1\r
+c_model_seed = 1075579159\r
+Bit_width_of_integer_part = 4\r
+Bit_width_of_fractional_part = 2\r
+Minimum_number_of_frame_errors = 0\r
+Store_info_bits_to_file = 1\r
+Load_info_bits_from_file = 0\r
+Info_bits_file_name = infobits_file.txt\r
+Info_bits_file_includes_CRC= 1\r
+Initial_process_index = 0\r
+Store_coded_bits_to_file = 1\r
+Coded_bits_file_name = codedbits_file.txt\r
+\1a
\ No newline at end of file
diff --git a/test/gen_test_vectors/test4_lte/test4_list.cfg b/test/gen_test_vectors/test4_lte/test4_list.cfg
--- /dev/null
@@ -0,0 +1,6 @@
+test4_config1.cfg\r
+test4_config2.cfg\r
+test4_config3.cfg\r
+test4_config4.cfg\r
+test4_config5.cfg\r
+test4_config6.cfg\r
diff --git a/test/macros.ini b/test/macros.ini
--- /dev/null
+++ b/test/macros.ini
@@ -0,0 +1 @@
+TCP3D_INSTALL_PATH = ..\..\..\..\..\r
diff --git a/test/simtci6634/c66/bios/link_test.cmd b/test/simtci6634/c66/bios/link_test.cmd
--- /dev/null
@@ -0,0 +1,7 @@
+SECTIONS\r
+{\r
+ .init_array: load >> L2SRAM\r
+ .csl_vect > L2SRAM\r
+ .main_mem > L2SRAM\r
+ .profile_mem > L2SRAM\r
+}\r
diff --git a/test/simtci6634/c66/bios/tcp3dSimtci6634C66BiosTestProject.txt b/test/simtci6634/c66/bios/tcp3dSimtci6634C66BiosTestProject.txt
--- /dev/null
@@ -0,0 +1,18 @@
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/src/tcp3d_betaState.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/src/tcp3d_drv.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/src/tcp3d_reg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/tcp3d_drv_sample_init.c"\r
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/sample_cfg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/tcp3d_main.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/sample_cs.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/sample_init.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/sample_int_reg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/CpIntc_local.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/tcp3d_codeBlkSeg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/tcp3d_inputConfigPrep.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/tcp3d_itg.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/src/tcp3d_testset_functions.c"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/simtci6634/c66/bios/link_test.cmd"
+-ccs.linkFile "TCP3D_INSTALL_PATH/ti/drv/tcp3d/test/simtci6634/c66/bios/tcp3d_drv_test.cfg"
+-ccs.setCompilerOptions "-mv6600 -g -DUSE_TCP3D_DRIVER_TYPES --diag_warning=225 -I${TCP3D_INSTALL_PATH} -I${TCP3D_INSTALL_PATH}/ti/drv/tcp3d/test/src -I${TCP3D_INSTALL_PATH}/ti/drv/tcp3d/test/simtci6634/c66/bios"\r
+-rtsc.enableRtsc\r
diff --git a/test/simtci6634/c66/bios/tcp3d_drv_test.cfg b/test/simtci6634/c66/bios/tcp3d_drv_test.cfg
--- /dev/null
@@ -0,0 +1,125 @@
+/*
+ * ======== tcp3d_drv_test.cfg ========
+ */
+
+/* IPC packages */
+var ListMP = xdc.useModule('ti.sdo.ipc.ListMP');
+var GateMP = xdc.useModule('ti.sdo.ipc.GateMP');
+var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
+var HeapMemMP = xdc.useModule('ti.sdo.ipc.heaps.HeapMemMP');
+var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
+var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
+
+/*
+ * Configure System to use SysMin
+ */
+System = xdc.useModule('xdc.runtime.System');
+SysStd = xdc.useModule('xdc.runtime.SysStd');
+System.SupportProxy = xdc.useModule('xdc.runtime.SysMin')
+System.SupportProxy = SysStd;
+System.extendedFormats = "%$S%f";
+
+/* Set the system stack - 0x2000 */
+Program.stack = 0x4000;
+
+/*
+ * Pull in BIOS modules
+ */
+xdc.useModule('ti.sysbios.BIOS');
+xdc.useModule('ti.sysbios.hal.Timer');
+xdc.useModule('ti.sysbios.knl.Semaphore');
+xdc.useModule('ti.sysbios.knl.Swi');
+xdc.useModule('ti.sysbios.knl.Task');
+xdc.useModule('ti.sysbios.hal.Cache');
+xdc.useModule('xdc.runtime.Log');
+xdc.useModule('xdc.runtime.Error');
+
+/*
+ * Memory related modules and then allocate as needed
+ */
+var Memory = xdc.useModule('xdc.runtime.Memory');
+var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
+
+/* Use HeapMem for default heap manager and give it 49152 (0xC000)
+ * bytes to work with.
+ */
+Program.sectMap["systemHeap"] = Program.platform.dataMemory;
+var heapMemParams = new HeapMem.Params;
+heapMemParams.size = 0x18000;
+heapMemParams.sectionName = "systemHeap";
+Memory.defaultHeapInstance = HeapMem.create(heapMemParams);
+
+/*
+ * Creating Heap Memories for using with test application
+ */
+/* Create a heap for TCP3D input/output data using ti.bios.HeapMem. */
+/* Program.sectMap["tcp3DataSection"] = {loadSegment: "MSMCSRAM"};
+var heapMemParams1 = new HeapMem.Params;
+heapMemParams1.size = 0x180000;
+heapMemParams1.sectionName = "tcp3DataSection";
+Program.global.tcp3dDataHeap = HeapMem.create(heapMemParams1); */
+
+/* Create a heap for TCP3D driver using ti.bios.HeapMem. */
+Program.sectMap["tcp3DriverSection"] = Program.platform.dataMemory;
+var heapMemParams2 = new HeapMem.Params;
+heapMemParams2.size = 0x4000;
+heapMemParams2.sectionName = "tcp3DriverSection";
+Program.global.tcp3dDrvHeap = HeapMem.create(heapMemParams2);
+
+/* To avoid wasting shared memory for Notify and MessageQ transports */
+for (var i = 0; i < MultiProc.numProcessors; i++) {
+ Ipc.setEntryMeta({
+ remoteProcId: i,
+ setupNotify: false,
+ setupMessageQ: false,
+ });
+}
+
+
+SharedRegion.setEntryMeta(0,
+ { base: 0x0C000000,
+ len: 0x200000,
+ ownerProcId: 0,
+ cacheLineSize: 64,
+ isValid: true,
+ name: "sharemem",
+ });
+
+/*
+ * Setup the Logger for Driver
+ */
+var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
+var LoggerSys0Params0 = new LoggerSys.Params;
+LoggerSys0Params0.instance.name = 'tcp3dDrvLog';
+Program.global.tcp3dDrvLog = LoggerSys.create(LoggerSys0Params0);
+
+/*
+ * Pull in modules for EDMA3 LLD use
+ */
+xdc.useModule('ti.sysbios.family.c64p.Hwi');
+xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
+var ECM = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
+
+/*
+ * Enable Event Groups here and registering of ISR for specific GEM INTC is done
+ * using EventCombiner_dispatchPlug() and Hwi_eventMap() APIs
+ */
+ECM.eventGroupHwiNum[0] = 7;
+ECM.eventGroupHwiNum[1] = 8;
+ECM.eventGroupHwiNum[2] = 9;
+ECM.eventGroupHwiNum[3] = 10;
+
+/*******************************************************************
+ * Other Dependent packages
+ *******************************************************************/
+/*xdc.loadPackage('ti.wbi.common.api');*/
+xdc.loadPackage('ti.sdo.edma3.drv');
+
+/* Load the CSL package */
+var Csl = xdc.useModule('ti.csl.Settings');
+
+/* Device specific configuration */
+var devName = "tci6634";
+Csl.deviceType = devName;
+
+/* end of file */
diff --git a/test/simtci6634/c66/bios/tcp3d_osal.h b/test/simtci6634/c66/bios/tcp3d_osal.h
--- /dev/null
@@ -0,0 +1,56 @@
+/**\r
+ * @file tcp3d_osal.h\r
+ *\r
+ * @brief \r
+ * This is the OS adaptation layer for the TCP3D Driver which has \r
+ * been ported for XDC Runtime and BIOS.\r
+ *\r
+ * This is an example of <b> Approach 2 </b> in which the \r
+ * application rebuilds the TCP3D driver with the new definitions.\r
+ *\r
+ * Please refer to the 'tcp3d_osal.h' in the API documentation.\r
+ *\r
+ * \par\r
+ * NOTE:\r
+ * (C) Copyright 2009 Texas Instruments, Inc.\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#ifndef __TCP3D_OSAL_H__\r
+#define __TCP3D_OSAL_H__\r
+\r
+#include <xdc/runtime/System.h>\r
+#include <ti/sysbios/BIOS.h>\r
+\r
+/* TCP3D OSAL Logging API is mapped directly to an XDC Runtime API */\r
+#define Tcp3d_osalLog System_printf\r
+\r
+#endif /* __TCP3D_OSAL_H__ */\r
+\r
diff --git a/test/src/CpIntc_local.c b/test/src/CpIntc_local.c
--- /dev/null
+++ b/test/src/CpIntc_local.c
@@ -0,0 +1,144 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+/* \r
+ * Copyright (c) 2009\r
+ * Texas Instruments\r
+ *\r
+ * All rights reserved. Property of Texas Instruments\r
+ * Restricted rights to use, duplicate or disclose this code are\r
+ * granted through contract.\r
+ * \r
+ * */\r
+/*\r
+ * ======== CpIntc.c ========\r
+ */\r
+\r
+#include <xdc/std.h>\r
+#include <xdc/runtime/Error.h>\r
+#include <xdc/runtime/Startup.h>\r
+#include <xdc/runtime/System.h>\r
+\r
+#include "ti/sysbios/family/c66/tci66xx/package/internal/CpIntc.xdc.h"\r
+\r
+/*\r
+ * ======== CpIntc_dispatch ========\r
+ */\r
+//UInt32 cpintcCntr = 0;\r
+//UInt32 cpintcCntr1 = 0;\r
+//UInt32 cpintcCntr2 = 0;\r
+//UInt32 sysIntTrack[200];\r
+Void CpIntc_dispatchLoc(UInt hostInt)\r
+{\r
+ Int32 i;\r
+ UInt32 index;\r
+ UInt32 offset;\r
+ UInt32 srsrVal;\r
+ Int32 sysInt;\r
+ UInt32 id = 0;\r
+ extern volatile cregister UInt32 DNUM;\r
+\r
+// cpintcCntr++;\r
+\r
+ /* for core# 4-7 use INTC1 otherwise use INTC0 */\r
+ if (DNUM > 3) {\r
+ id = 1;\r
+ }\r
+ \r
+// if ( (*((UInt32*)0x0180000C)) == 0x1 )\r
+// System_printf("MISS detected\n");\r
+ \r
+ sysInt = CpIntc_module->hostIntToSysInt[hostInt];\r
+ \r
+// sysIntTrack[cpintcCntr]=((hostInt<<16)|sysInt);\r
+// sysIntTrack[0]=((hostInt<<16)|sysInt);\r
+\r
+ /* \r
+ * If only one system interrupt is mapped to a host interrupt\r
+ * we don't need to read the Sys Status Raw Registers. We\r
+ * know exactly which system interrupt triggered the interrupt.\r
+ */ \r
+ if (sysInt != 0xff && sysInt != 0xfe) {\r
+// cpintcCntr1++;\r
+ /* clear system interrupt associated with host interrupt */\r
+ CpIntc_clearSysInt(id, sysInt);\r
+\r
+ /* call function with arg */\r
+ CpIntc_module->dispatchTab[sysInt].fxn(\r
+ CpIntc_module->dispatchTab[sysInt].arg);\r
+ }\r
+ else {\r
+// cpintcCntr2++;\r
+ /*\r
+ * Loop through System Interrupt Status Enabled/Clear Registers for\r
+ * pending enabled interrupts. The highest numbered system interrupt\r
+ * will be processed first from left to right.\r
+ */\r
+ for (i = CpIntc_numStatusRegs - 1; i >= 0; i--) {\r
+ offset = i << 5;\r
+ \r
+ /*\r
+ * SDOCM00062100 - Nyquist CpIntc_dispatch needs to read the\r
+ * correct status pending and enabled register once the\r
+ * Simulator is fixed.\r
+ * Fix is:\r
+ * srsrVal = CpIntc_module->controller[id]->SECR[j - i];\r
+ */\r
+ srsrVal = CpIntc_module->controller[id]->SRSR[i] &\r
+ CpIntc_module->controller[id]->ESR[i];\r
+ \r
+ /* Find pending interrupts from left to right */\r
+ while (srsrVal) {\r
+ index = 31 - _lmbd(1, srsrVal);\r
+ srsrVal &= ~(1 << index);\r
+ \r
+ /* Make sure pending interrupt is mapped to host interrupt */\r
+ if (CpIntc_module->controller[id]->CMR[offset + index]\r
+ == hostInt) {\r
+ /* clear system interrupt first */\r
+ CpIntc_clearSysInt(id, offset + index);\r
+ \r
+ /* call function with arg */\r
+ CpIntc_module->dispatchTab[offset + index].fxn(\r
+ CpIntc_module->dispatchTab[offset + index].arg);\r
+ } \r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+\r
diff --git a/test/src/sample.h b/test/src/sample.h
--- /dev/null
+++ b/test/src/sample.h
@@ -0,0 +1,215 @@
+/*\r
+ * bios6_edma3_drv_sample.h\r
+ *\r
+ * Header file for the sample application for the EDMA3 Driver.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _BIOS6_EDMA3_DRV_SAMPLE_H_\r
+#define _BIOS6_EDMA3_DRV_SAMPLE_H_\r
+\r
+#include <stdio.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+\r
+/* Include EDMA3 Driver */\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/**\r
+ * Set this flag to use the CpIntc_dispatchLoc() function as the Event Combiner\r
+ * dispatchPlug function when ever the system interrupts are registered with\r
+ * CPINTC with callbacks.\r
+ */\r
+#define USE_LOCAL_CPINTC_DISPATCH 0\r
+\r
+/**\r
+ * Set this flag to use the edma3ComplHandlerLoc() function as the completion\r
+ * interrupt ISR for the region used for driver testing.\r
+ */\r
+#define EDMA_LOCAL_COMP_ISR 1\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+/**\r
+ * \brief TCC Callback - Caters to channel specific status reporting.\r
+ */\r
+typedef struct {\r
+ /** Callback function */\r
+ EDMA3_RM_TccCallback tccCb;\r
+\r
+ /** Callback data, passed to the Callback function */\r
+ void *cbData;\r
+} tccCallbackParams;\r
+#endif\r
+\r
+/* Macro to get CPINTC number */\r
+#define WHICH_CPINTC_NUM(core) ((core > 3)? 1: 0 )\r
+\r
+/**\r
+ * Cache line size on the underlying SoC. It needs to be modified\r
+ * for different cache line sizes, if the Cache is Enabled.\r
+ */\r
+#define EDMA3_CACHE_LINE_SIZE_IN_BYTES (128u)\r
+\r
+/* Error returned in case of buffers are not aligned on the cache boundary */\r
+#define EDMA3_NON_ALIGNED_BUFFERS_ERROR (-1)\r
+\r
+/* Error returned in case of data mismatch */\r
+#define EDMA3_DATA_MISMATCH_ERROR (-2)\r
+\r
+/**\r
+ * \brief EDMA3 Initialization\r
+ *\r
+ * This function initializes the EDMA3 Driver for the given EDMA3 controller\r
+ * and opens a EDMA3 driver instance. It internally calls EDMA3_DRV_create() and\r
+ * EDMA3_DRV_open(), in that order.\r
+ *\r
+ * It also registers interrupt handlers for various EDMA3 interrupts like \r
+ * transfer completion or error interrupts.\r
+ *\r
+ * \param edma3Id [IN] EDMA3 Controller Instance Id (Hardware\r
+ * instance id, starting from 0)\r
+ * \param errorCode [IN/OUT] Error code while opening DRV instance\r
+ * \return EDMA3_DRV_Handle: If successfully opened, the API will return the\r
+ * associated driver's instance handle.\r
+ */\r
+EDMA3_DRV_Handle edma3init (unsigned int edma3Id, EDMA3_DRV_Result *errorCode,\r
+ unsigned int dspCoreID, unsigned int tpccRegionUsed);\r
+\r
+/**\r
+ * \brief EDMA3 De-initialization\r
+ *\r
+ * This function de-initializes the EDMA3 Driver for the given EDMA3 controller\r
+ * and closes the previously opened EDMA3 driver instance. It internally calls \r
+ * EDMA3_DRV_close and EDMA3_DRV_delete(), in that order.\r
+ *\r
+ * It also un-registers the previously registered interrupt handlers for various \r
+ * EDMA3 interrupts.\r
+ *\r
+ * \param edma3Id [IN] EDMA3 Controller Instance Id (Hardware\r
+ * instance id, starting from 0)\r
+ * \param hEdma [IN] EDMA3 Driver handle, returned while using\r
+ * edma3init().\r
+ * \return EDMA3_DRV_SOK if success, else error code\r
+ */\r
+EDMA3_DRV_Result edma3deinit (unsigned int edma3Id, EDMA3_DRV_Handle hEdma);\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Invalidate\r
+ *\r
+ * This function invalidates the D cache.\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheInvalidate(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes);\r
+\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Flush\r
+ *\r
+ * This function flushes (cleans) the Cache\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheFlush(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes);\r
+\r
+\r
+\r
+/**\r
+ * Counting Semaphore related functions (OS dependent) should be\r
+ * called/implemented by the application. A handle to the semaphore\r
+ * is required while opening the driver/resource manager instance.\r
+ */\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Create\r
+ *\r
+ * This function creates a counting semaphore with specified\r
+ * attributes and initial value. It should be used to create a semaphore\r
+ * with initial value as '1'. The semaphore is then passed by the user\r
+ * to the EDMA3 driver/RM for proper sharing of resources.\r
+ * \param initVal [IN] is initial value for semaphore\r
+ * \param semParams [IN] is the semaphore attributes.\r
+ * \param hSem [OUT] is location to receive the handle to just created\r
+ * semaphore.\r
+ * \return EDMA3_DRV_SOK if successful, else a suitable error code.\r
+ */\r
+EDMA3_DRV_Result edma3OsSemCreate(int initVal,\r
+ const Semaphore_Params *semParams,\r
+ EDMA3_OS_Sem_Handle *hSem);\r
+\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Delete\r
+ *\r
+ * This function deletes or removes the specified semaphore\r
+ * from the system. Associated dynamically allocated memory\r
+ * if any is also freed up.\r
+ * \param hSem [IN] handle to the semaphore to be deleted\r
+ * \return EDMA3_DRV_SOK if successful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemDelete(EDMA3_OS_Sem_Handle hSem);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif /* extern "C" */\r
+\r
+#endif /* _BIOS6_EDMA3_DRV_SAMPLE_H_ */\r
+\r
diff --git a/test/src/sample_cfg.c b/test/src/sample_cfg.c
--- /dev/null
+++ b/test/src/sample_cfg.c
@@ -0,0 +1,1771 @@
+/*\r
+ * sample_cfg.c\r
+ *\r
+ * Platform specific EDMA3 hardware related information like number of transfer\r
+ * controllers, various interrupt ids etc. It is used while interrupts\r
+ * enabling / disabling. It needs to be ported for different SoCs.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+/* Number of EDMA3 controllers present in the system */\r
+#define NUM_EDMA3_INSTANCES 3u\r
+const unsigned int numEdma3Instances = NUM_EDMA3_INSTANCES;\r
+\r
+/* Number of DSPs present in the system */\r
+#define NUM_DSPS 4u\r
+//const unsigned int numDsps = NUM_DSPS;\r
+\r
+#define CGEM_REG_START (0x01800000)\r
+\r
+/* Determine the processor id by reading DNUM register. */\r
+unsigned short determineProcId()\r
+ {\r
+ volatile unsigned int *addr;\r
+ unsigned int core_no;\r
+\r
+ /* Identify the core number */\r
+ addr = (unsigned int *)(CGEM_REG_START+0x40000);\r
+ core_no = ((*addr) & 0x000F0000)>>16;\r
+\r
+ return core_no;\r
+ }\r
+\r
+/** Whether global configuration required for EDMA3 or not.\r
+ * This configuration should be done only once for the EDMA3 hardware by\r
+ * any one of the masters (i.e. DSPs).\r
+ * It can be changed depending on the use-case.\r
+ */\r
+unsigned int gblCfgReqdArray [NUM_DSPS] = {\r
+ 0, /* DSP#0 is Master, will do the global init */\r
+ 1, /* DSP#1 is Slave, will not do the global init */\r
+ 1, /* DSP#2 is Slave, will not do the global init */\r
+ 1, /* DSP#3 is Slave, will not do the global init */\r
+ };\r
+\r
+unsigned short isGblConfigRequired(unsigned int dspNum)\r
+ {\r
+ return gblCfgReqdArray[dspNum];\r
+ }\r
+\r
+/* Semaphore handles */\r
+EDMA3_OS_Sem_Handle semHandle[NUM_EDMA3_INSTANCES] = {NULL,NULL,NULL};\r
+\r
+\r
+/* Variable which will be used internally for referring number of Event Queues. */\r
+unsigned int numEdma3EvtQue[NUM_EDMA3_INSTANCES] = {2u, 4u, 4u};\r
+\r
+/* Variable which will be used internally for referring number of TCs. */\r
+unsigned int numEdma3Tc[NUM_EDMA3_INSTANCES] = {2u, 4u, 4u};\r
+\r
+/**\r
+ * Variable which will be used internally for referring transfer completion\r
+ * interrupt. Completion interrupts for all the shadow regions and all the\r
+ * EDMA3 controllers are captured since it is a multi-DSP platform.\r
+ */\r
+unsigned int ccXferCompInt[NUM_EDMA3_INSTANCES][EDMA3_MAX_REGIONS] = {\r
+ {\r
+ 38u, 39u, 40u, 41u,\r
+ 42u, 43u, 44u, 45u,\r
+ },\r
+ {\r
+ 8u, 9u, 10u, 11u,\r
+ 12u, 13u, 14u, 15u,\r
+ },\r
+ {\r
+ 24u, 25u, 26u, 27u,\r
+ 28u, 29u, 30u, 31u,\r
+ },\r
+ };\r
+\r
+/**\r
+ * Variable which will be used internally for referring channel controller's\r
+ * error interrupt.\r
+ */\r
+unsigned int ccErrorInt[NUM_EDMA3_INSTANCES] = {32u, 0u, 16u};\r
+\r
+/**\r
+ * Variable which will be used internally for referring transfer controllers'\r
+ * error interrupts.\r
+ */\r
+unsigned int tcErrorInt[NUM_EDMA3_INSTANCES][EDMA3_MAX_TC] = {\r
+ {\r
+ 34u, 35u, 0u, 0u,\r
+ 0u, 0u, 0u, 0u,\r
+ },\r
+ {\r
+ 2u, 3u, 4u, 5u,\r
+ 0u, 0u, 0u, 0u,\r
+ },\r
+ {\r
+ 18u, 19u, 20u, 21u,\r
+ 0u, 0u, 0u, 0u,\r
+ },\r
+ };\r
+\r
+/* Driver Object Initialization Configuration */\r
+EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[NUM_EDMA3_INSTANCES] =\r
+{\r
+ {\r
+ /* EDMA3 INSTANCE# 0 */\r
+ /** Total number of DMA Channels supported by the EDMA3 Controller */\r
+ 16u,\r
+ /** Total number of QDMA Channels supported by the EDMA3 Controller */\r
+ 8u,\r
+ /** Total number of TCCs supported by the EDMA3 Controller */\r
+ 16u,\r
+ /** Total number of PaRAM Sets supported by the EDMA3 Controller */\r
+ 128u,\r
+ /** Total number of Event Queues in the EDMA3 Controller */\r
+ 2u,\r
+ /** Total number of Transfer Controllers (TCs) in the EDMA3 Controller */\r
+ 2u,\r
+ /** Number of Regions on this EDMA3 controller */\r
+ 8u,\r
+\r
+ /**\r
+ * \brief Channel mapping existence\r
+ * A value of 0 (No channel mapping) implies that there is fixed association\r
+ * for a channel number to a parameter entry number or, in other words,\r
+ * PaRAM entry n corresponds to channel n.\r
+ */\r
+ 1u,\r
+\r
+ /** Existence of memory protection feature */\r
+ 1u,\r
+\r
+ /** Global Register Region of CC Registers */\r
+ (void *)0x02700000u,\r
+ /** Transfer Controller (TC) Registers */\r
+ {\r
+ (void *)0x02760000u,\r
+ (void *)0x02768000u,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL\r
+ },\r
+ /** Interrupt no. for Transfer Completion */\r
+ 38u,\r
+ /** Interrupt no. for CC Error */\r
+ 32u,\r
+ /** Interrupt no. for TCs Error */\r
+ {\r
+ 34u,\r
+ 35u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ },\r
+\r
+ /**\r
+ * \brief EDMA3 TC priority setting\r
+ *\r
+ * User can program the priority of the Event Queues\r
+ * at a system-wide level. This means that the user can set the\r
+ * priority of an IO initiated by either of the TCs (Transfer Controllers)\r
+ * relative to IO initiated by the other bus masters on the\r
+ * device (ARM, DSP, USB, etc)\r
+ */\r
+ {\r
+ 0u,\r
+ 1u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+ /**\r
+ * \brief To Configure the Threshold level of number of events\r
+ * that can be queued up in the Event queues. EDMA3CC error register\r
+ * (CCERR) will indicate whether or not at any instant of time the\r
+ * number of events queued up in any of the event queues exceeds\r
+ * or equals the threshold/watermark value that is set\r
+ * in the queue watermark threshold register (QWMTHRA).\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief To Configure the Default Burst Size (DBS) of TCs.\r
+ * An optimally-sized command is defined by the transfer controller\r
+ * default burst size (DBS). Different TCs can have different\r
+ * DBS values. It is defined in Bytes.\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a Parameter RAM set,\r
+ * if it exists, otherwise of no use.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, 14u, 15u,\r
+ /* DMA channels 16-63 DOES NOT exist */\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS,\r
+ EDMA3_MAX_PARAM_SETS, EDMA3_MAX_PARAM_SETS\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a TCC. This specific\r
+ * TCC code will be returned when the transfer is completed\r
+ * on the mapped channel.\r
+ */\r
+ {\r
+ 0u, 1u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 4u, 5u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 8u, 9u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 12u, 13u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ /* DMA channels 16-63 DOES NOT exist */\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC,\r
+ EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC, EDMA3_MAX_TCC\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping of DMA channels to Hardware Events from\r
+ * various peripherals, which use EDMA for data transfer.\r
+ * All channels need not be mapped, some can be free also.\r
+ */\r
+ {\r
+ 0x00003333u,\r
+ 0x00000000u\r
+ }\r
+ },\r
+\r
+ {\r
+ /* EDMA3 INSTANCE# 1 */\r
+ /** Total number of DMA Channels supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of QDMA Channels supported by the EDMA3 Controller */\r
+ 8u,\r
+ /** Total number of TCCs supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of PaRAM Sets supported by the EDMA3 Controller */\r
+ 512u,\r
+ /** Total number of Event Queues in the EDMA3 Controller */\r
+ 4u,\r
+ /** Total number of Transfer Controllers (TCs) in the EDMA3 Controller */\r
+ 4u,\r
+ /** Number of Regions on this EDMA3 controller */\r
+ 8u,\r
+\r
+ /**\r
+ * \brief Channel mapping existence\r
+ * A value of 0 (No channel mapping) implies that there is fixed association\r
+ * for a channel number to a parameter entry number or, in other words,\r
+ * PaRAM entry n corresponds to channel n.\r
+ */\r
+ 1u,\r
+\r
+ /** Existence of memory protection feature */\r
+ 1u,\r
+\r
+ /** Global Register Region of CC Registers */\r
+ (void *)0x02720000u,\r
+ /** Transfer Controller (TC) Registers */\r
+ {\r
+ (void *)0x02770000u,\r
+ (void *)0x02778000u,\r
+ (void *)0x02780000u,\r
+ (void *)0x02788000u,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL\r
+ },\r
+ /** Interrupt no. for Transfer Completion */\r
+ 8u,\r
+ /** Interrupt no. for CC Error */\r
+ 0u,\r
+ /** Interrupt no. for TCs Error */\r
+ {\r
+ 2u,\r
+ 3u,\r
+ 4u,\r
+ 5u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ },\r
+\r
+ /**\r
+ * \brief EDMA3 TC priority setting\r
+ *\r
+ * User can program the priority of the Event Queues\r
+ * at a system-wide level. This means that the user can set the\r
+ * priority of an IO initiated by either of the TCs (Transfer Controllers)\r
+ * relative to IO initiated by the other bus masters on the\r
+ * device (ARM, DSP, USB, etc)\r
+ */\r
+ {\r
+ 0u,\r
+ 1u,\r
+ 2u,\r
+ 3u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+ /**\r
+ * \brief To Configure the Threshold level of number of events\r
+ * that can be queued up in the Event queues. EDMA3CC error register\r
+ * (CCERR) will indicate whether or not at any instant of time the\r
+ * number of events queued up in any of the event queues exceeds\r
+ * or equals the threshold/watermark value that is set\r
+ * in the queue watermark threshold register (QWMTHRA).\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief To Configure the Default Burst Size (DBS) of TCs.\r
+ * An optimally-sized command is defined by the transfer controller\r
+ * default burst size (DBS). Different TCs can have different\r
+ * DBS values. It is defined in Bytes.\r
+ */\r
+ {\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a Parameter RAM set,\r
+ * if it exists, otherwise of no use.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, 14u, 15u,\r
+ 16u, 17u, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, 30u, 31u,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, 38u, 39u,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, 46u, 47u,\r
+ 48u, 49u, 50u, 51u, 52u, 53u, 54u, 55u,\r
+ 56u, 57u, 58u, 59u, 60u, 61u, 62u, 63u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a TCC. This specific\r
+ * TCC code will be returned when the transfer is completed\r
+ * on the mapped channel.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 16u, 17u, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, 38u, 39u,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 48u, 49u, 50u, 51u, 52u, 53u, 54u, 55u,\r
+ 56u, 57u, 58u, 59u, 60u, 61u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping of DMA channels to Hardware Events from\r
+ * various peripherals, which use EDMA for data transfer.\r
+ * All channels need not be mapped, some can be free also.\r
+ */\r
+ {\r
+ 0x3FFF3FFFu,\r
+ 0x3FFF3FFFu\r
+ }\r
+ },\r
+\r
+ {\r
+ /* EDMA3 INSTANCE# 2 */\r
+ /** Total number of DMA Channels supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of QDMA Channels supported by the EDMA3 Controller */\r
+ 8u,\r
+ /** Total number of TCCs supported by the EDMA3 Controller */\r
+ 64u,\r
+ /** Total number of PaRAM Sets supported by the EDMA3 Controller */\r
+ 512u,\r
+ /** Total number of Event Queues in the EDMA3 Controller */\r
+ 4u,\r
+ /** Total number of Transfer Controllers (TCs) in the EDMA3 Controller */\r
+ 4u,\r
+ /** Number of Regions on this EDMA3 controller */\r
+ 8u,\r
+\r
+ /**\r
+ * \brief Channel mapping existence\r
+ * A value of 0 (No channel mapping) implies that there is fixed association\r
+ * for a channel number to a parameter entry number or, in other words,\r
+ * PaRAM entry n corresponds to channel n.\r
+ */\r
+ 1u,\r
+\r
+ /** Existence of memory protection feature */\r
+ 1u,\r
+\r
+ /** Global Register Region of CC Registers */\r
+ (void *)0x02740000u,\r
+ /** Transfer Controller (TC) Registers */\r
+ {\r
+ (void *)0x02790000u,\r
+ (void *)0x02798000u,\r
+ (void *)0x027A0000u,\r
+ (void *)0x027A8000u,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL,\r
+ (void *)NULL\r
+ },\r
+ /** Interrupt no. for Transfer Completion */\r
+ 24u,\r
+ /** Interrupt no. for CC Error */\r
+ 16u,\r
+ /** Interrupt no. for TCs Error */\r
+ {\r
+ 18u,\r
+ 19u,\r
+ 20u,\r
+ 21u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ },\r
+\r
+ /**\r
+ * \brief EDMA3 TC priority setting\r
+ *\r
+ * User can program the priority of the Event Queues\r
+ * at a system-wide level. This means that the user can set the\r
+ * priority of an IO initiated by either of the TCs (Transfer Controllers)\r
+ * relative to IO initiated by the other bus masters on the\r
+ * device (ARM, DSP, USB, etc)\r
+ */\r
+ {\r
+ 0u,\r
+ 1u,\r
+ 2u,\r
+ 3u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+ /**\r
+ * \brief To Configure the Threshold level of number of events\r
+ * that can be queued up in the Event queues. EDMA3CC error register\r
+ * (CCERR) will indicate whether or not at any instant of time the\r
+ * number of events queued up in any of the event queues exceeds\r
+ * or equals the threshold/watermark value that is set\r
+ * in the queue watermark threshold register (QWMTHRA).\r
+ */\r
+ {\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 16u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief To Configure the Default Burst Size (DBS) of TCs.\r
+ * An optimally-sized command is defined by the transfer controller\r
+ * default burst size (DBS). Different TCs can have different\r
+ * DBS values. It is defined in Bytes.\r
+ */\r
+ {\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 8u,\r
+ 0u,\r
+ 0u,\r
+ 0u,\r
+ 0u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a Parameter RAM set,\r
+ * if it exists, otherwise of no use.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, 14u, 15u,\r
+ 16u, 17u, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, 30u, 31u,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, 38u, 39u,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, 46u, 47u,\r
+ 48u, 49u, 50u, 51u, 52u, 53u, 54u, 55u,\r
+ 56u, 57u, 58u, 59u, 60u, 61u, 62u, 63u\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping from each DMA channel to a TCC. This specific\r
+ * TCC code will be returned when the transfer is completed\r
+ * on the mapped channel.\r
+ */\r
+ {\r
+ 0u, 1u, 2u, 3u, 4u, 5u, 6u, 7u,\r
+ 8u, 9u, 10u, 11u, 12u, 13u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, 18u, 19u, 20u, 21u, 22u, 23u,\r
+ 24u, 25u, 26u, 27u, 28u, 29u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 32u, 33u, 34u, 35u, 36u, 37u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 40u, 41u, 42u, 43u, 44u, 45u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 48u, 49u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP,\r
+ 56u, 57u, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP, EDMA3_RM_CH_NO_TCC_MAP\r
+ },\r
+\r
+ /**\r
+ * \brief Mapping of DMA channels to Hardware Events from\r
+ * various peripherals, which use EDMA for data transfer.\r
+ * All channels need not be mapped, some can be free also.\r
+ */\r
+ {\r
+ 0x3FFC3FFFu,\r
+ 0x03033F3Fu\r
+ }\r
+ },\r
+};\r
+\r
+EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[NUM_EDMA3_INSTANCES][EDMA3_MAX_REGIONS] =\r
+ {\r
+ /* EDMA3 INSTANCE# 0 */\r
+ {\r
+ /* Resources owned/reserved by region 0 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0xFFFF000Fu, 0x00000FFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000003u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 */\r
+ {0x00000003u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 1 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x000000F0u, 0xFFFFF000u, 0x000000FFu, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x000000F0u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x0000000Cu},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x000000F0u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000030u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000030u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000030u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 2 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000F00u, 0x00000000u, 0xFFFFFF00u, 0x0000000Fu,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000F00u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000030u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000F00u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000300u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000300u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000300u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 3 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0xFFFFFFF0u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000F000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x000000C0u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000F000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00003000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00003000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00003000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 4 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 5 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 6 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 7 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+ },\r
+\r
+ /* EDMA3 INSTANCE# 1 */\r
+ {\r
+ /* Resources owned/reserved by region 0 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000FFFFu, 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0xFFFFFFFFu, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFFFu, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFFFu, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00003FFFu, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00003FFFu, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00003FFFu, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 1 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0xFFFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0xFFFFFFFFu, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x0000000Cu},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x3FFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 2 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x0000FFFFu, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000030u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00003FFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 3 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0xFFFF0000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0xFFFF0000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x000000C0u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0xFFFF0000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x3FFF0000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x3FFF0000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x3FFF0000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 4 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 5 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 6 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 7 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+ },\r
+\r
+ /* EDMA3 INSTANCE# 2 */\r
+ {\r
+ /* Resources owned/reserved by region 0 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000FFF0u, 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0xFFFFFFFFu, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFF0u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000003u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000FFF0u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00003FF0u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00003FF0u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00003FF0u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 1 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0xFFFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0xFFFFFFFFu, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x0000000Cu},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0xFFFF0000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x3FFF0000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x3FFF0000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 2 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x0000FFFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x0000FFFFu, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000030u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x0000FFFFu},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00003FFFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00003FFFu},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 3 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000000Fu, 0xFFFF00FFu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu,},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0xFFFF00FFu},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x000000C0u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0xFFFF00FFu},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000000Fu, 0x0303003Cu, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x0303003Cu},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x0000000Fu, 0x0303003Cu},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 4 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 5 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 6 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+\r
+ /* Resources owned/reserved by region 7 */\r
+ {\r
+ /* ownPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x0000F000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* ownDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* ownQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* ownTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdPaRAMSets */\r
+ /* 31 0 63 32 95 64 127 96 */\r
+ {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 159 128 191 160 223 192 255 224 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 287 256 319 288 351 320 383 352 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,\r
+ /* 415 384 447 416 479 448 511 480 */\r
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},\r
+\r
+ /* resvdDmaChannels */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+\r
+ /* resvdQdmaChannels */\r
+ /* 31 0 */\r
+ {0x00000000u},\r
+\r
+ /* resvdTccs */\r
+ /* 31 0 63 32 */\r
+ {0x00000000u, 0x00000000u},\r
+ },\r
+ },\r
+ };\r
+\r
+/* End of File */\r
diff --git a/test/src/sample_cs.c b/test/src/sample_cs.c
--- /dev/null
+++ b/test/src/sample_cs.c
@@ -0,0 +1,503 @@
+/*\r
+ * sample_cs.c\r
+ *\r
+ * Sample functions showing the implementation of critical section entry/exit\r
+ * routines and various semaphore related routines (all BIOS6 depenedent).\r
+ * These implementations MUST be provided by the user / application, using the\r
+ * EDMA3 driver, for its correct functioning.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
+#include <ti/sysbios/hal/Cache.h>\r
+#include <ti/sysbios/hal/Hwi.h>\r
+#include <ti/sysbios/knl/Task.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+\r
+#include "sample.h"\r
+\r
+#define CHECK_OS_PROTECT_FUNCTIONS 0\r
+\r
+extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];\r
+extern unsigned int ccErrorInt[];\r
+extern unsigned int tcErrorInt[][EDMA3_MAX_TC];\r
+\r
+/**\r
+ * DSP instance number on which the executable is running. Its value is\r
+ * determined by reading the processor specific register DNUM.\r
+ */\r
+extern unsigned int dsp_num;\r
+extern unsigned int tpccRegionUsedLoc;\r
+extern unsigned int gemEvents[2];\r
+\r
+/* Local variables used for Temp Fix */\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+#include <xdc/runtime/System.h>\r
+#include "c6x.h"\r
+\r
+volatile unsigned int testOsFuncFlag = 0;\r
+volatile unsigned int testOsFuncLog[2][100];\r
+volatile unsigned int testOsFuncCntr[2] = {0,0};\r
+\r
+#endif\r
+\r
+Void edmaTestInit(Void)\r
+{\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ Int i;\r
+ for(i=0;i<100;i++)\r
+ {\r
+ testOsFuncLog[0][i] = 0;\r
+ testOsFuncLog[1][i] = 0;\r
+ }\r
+ testOsFuncCntr[0] = 0;\r
+ testOsFuncCntr[1] = 0;\r
+#endif\r
+}\r
+\r
+/**\r
+ * \brief EDMA3 OS Protect Entry\r
+ *\r
+ * This function saves the current state of protection in 'intState'\r
+ * variable passed by caller, if the protection level is\r
+ * EDMA3_OS_PROTECT_INTERRUPT. It then applies the requested level of\r
+ * protection.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION and\r
+ * EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, variable 'intState' is ignored,\r
+ * and the requested interrupt is disabled.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, '*intState' specifies the\r
+ * Transfer Controller number whose interrupt needs to be disabled.\r
+ *\r
+ * \param level is numeric identifier of the desired degree of protection.\r
+ * \param intState is memory location where current state of protection is\r
+ * saved for future use while restoring it via edma3OsProtectExit() (Only\r
+ * for EDMA3_OS_PROTECT_INTERRUPT protection level).\r
+ * \return None\r
+ */\r
+void edma3OsProtectEntry (unsigned int edma3InstanceId,\r
+ int level, unsigned int *intState)\r
+ {\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ testOsFuncLog[0][testOsFuncCntr[0]++] = TSCL;\r
+#endif\r
+ if (((level == EDMA3_OS_PROTECT_INTERRUPT)\r
+ || (level == EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR))\r
+ && (intState == NULL))\r
+ {\r
+ return;\r
+ }\r
+ else\r
+ {\r
+ switch (level)\r
+ {\r
+ /* Disable all (global) interrupts */\r
+ case EDMA3_OS_PROTECT_INTERRUPT :\r
+ *intState = Hwi_disable();\r
+ break;\r
+\r
+ /* Disable scheduler */\r
+ case EDMA3_OS_PROTECT_SCHEDULER :\r
+ Task_disable();\r
+ break;\r
+\r
+ /* Disable EDMA3 transfer completion interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 0 )\r
+ testOsFuncFlag = 1;\r
+ else\r
+ System_exit(1);\r
+#endif\r
+ CpIntc_disableSysInt(WHICH_CPINTC_NUM(dsp_num), ccXferCompInt[edma3InstanceId][tpccRegionUsedLoc]);\r
+ //EventCombiner_disableEvent(ccXferCompInt[edma3InstanceId][dsp_num]);\r
+ //intState_cs = Hwi_disable(); // Temp fix\r
+ //eventId = CpIntc_getEventId(ccXferHostInt[edma3InstanceId][dsp_num]);\r
+ //EventCombiner_disableEvent(gemEvents[0]);\r
+ break;\r
+\r
+ /* Disable EDMA3 CC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 0 )\r
+ testOsFuncFlag = 2;\r
+ else\r
+ System_exit(1);\r
+#endif\r
+ CpIntc_disableSysInt(WHICH_CPINTC_NUM(dsp_num), ccErrorInt[edma3InstanceId]);\r
+ //EventCombiner_disableEvent(ccErrorInt[edma3InstanceId]);\r
+ break;\r
+\r
+ /* Disable EDMA3 TC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR :\r
+ switch (*intState)\r
+ {\r
+ case 0:\r
+ case 1:\r
+ case 2:\r
+ case 3:\r
+ case 4:\r
+ case 5:\r
+ case 6:\r
+ case 7:\r
+ /* Fall through... */\r
+ /* Disable the corresponding interrupt */\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 0 )\r
+ testOsFuncFlag = 3;\r
+ else\r
+ System_exit(1);\r
+#endif\r
+ CpIntc_disableSysInt(WHICH_CPINTC_NUM(dsp_num), tcErrorInt[edma3InstanceId][*intState]);\r
+ //EventCombiner_disableEvent(tcErrorInt[edma3InstanceId][*intState]);\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Protect Exit\r
+ *\r
+ * This function undoes the protection enforced to original state\r
+ * as is specified by the variable 'intState' passed, if the protection\r
+ * level is EDMA3_OS_PROTECT_INTERRUPT.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION and\r
+ * EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, variable 'intState' is ignored,\r
+ * and the requested interrupt is enabled.\r
+ * For EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, 'intState' specifies the\r
+ * Transfer Controller number whose interrupt needs to be enabled.\r
+ * \param level is numeric identifier of the desired degree of protection.\r
+ * \param intState is original state of protection at time when the\r
+ * corresponding edma3OsProtectEntry() was called (Only\r
+ * for EDMA3_OS_PROTECT_INTERRUPT protection level).\r
+ * \return None\r
+ */\r
+void edma3OsProtectExit (unsigned int edma3InstanceId,\r
+ int level, unsigned int intState)\r
+ {\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ testOsFuncLog[1][testOsFuncCntr[1]++] = TSCL;\r
+#endif\r
+ switch (level)\r
+ {\r
+ /* Enable all (global) interrupts */\r
+ case EDMA3_OS_PROTECT_INTERRUPT :\r
+ Hwi_restore(intState);\r
+ break;\r
+\r
+ /* Enable scheduler */\r
+ case EDMA3_OS_PROTECT_SCHEDULER :\r
+ Task_enable();\r
+ break;\r
+\r
+ /* Enable EDMA3 transfer completion interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 1 )\r
+ testOsFuncFlag = 0;\r
+ else\r
+ System_exit(0);\r
+#endif\r
+ CpIntc_enableSysInt(WHICH_CPINTC_NUM(dsp_num), ccXferCompInt[edma3InstanceId][tpccRegionUsedLoc]);\r
+ //EventCombiner_enableEvent(ccXferCompInt[edma3InstanceId][dsp_num]);\r
+ //Hwi_restore(intState_cs); // Temp fix\r
+ //eventId = CpIntc_getEventId(ccXferHostInt[edma3InstanceId][dsp_num]);\r
+ //EventCombiner_enableEvent(gemEvents[0]);\r
+ break;\r
+\r
+ /* Enable EDMA3 CC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR :\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 2 )\r
+ testOsFuncFlag = 0;\r
+ else\r
+ System_exit(0);\r
+#endif\r
+ CpIntc_enableSysInt(WHICH_CPINTC_NUM(dsp_num), ccErrorInt[edma3InstanceId]);\r
+ //EventCombiner_enableEvent(ccErrorInt[edma3InstanceId]);\r
+ break;\r
+\r
+ /* Enable EDMA3 TC error interrupt only */\r
+ case EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR :\r
+ switch (intState)\r
+ {\r
+ case 0:\r
+ case 1:\r
+ case 2:\r
+ case 3:\r
+ case 4:\r
+ case 5:\r
+ case 6:\r
+ case 7:\r
+ /* Fall through... */\r
+ /* Enable the corresponding interrupt */\r
+#if CHECK_OS_PROTECT_FUNCTIONS\r
+ if ( testOsFuncFlag == 3 )\r
+ testOsFuncFlag = 0;\r
+ else\r
+ System_exit(0);\r
+#endif\r
+ CpIntc_enableSysInt(WHICH_CPINTC_NUM(dsp_num), tcErrorInt[edma3InstanceId][intState]);\r
+ //EventCombiner_enableEvent(tcErrorInt[edma3InstanceId][intState]);\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+\r
+ break;\r
+\r
+ default:\r
+ break;\r
+ }\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Invalidate\r
+ *\r
+ * This function invalidates the D cache.\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheInvalidate(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes)\r
+ {\r
+ EDMA3_DRV_Result cacheInvResult = EDMA3_DRV_SOK;\r
+\r
+ /* Verify whether the start address is cache aligned or not */\r
+ if((mem_start_ptr & (EDMA3_CACHE_LINE_SIZE_IN_BYTES-1u)) != 0)\r
+ {\r
+#ifdef EDMA3_DRV_DEBUG\r
+ EDMA3_DRV_PRINTF("\r\n Cache : Memory is not %d bytes alinged\r\n",\r
+ EDMA3_CACHE_LINE_SIZE_IN_BYTES);\r
+#endif\r
+ cacheInvResult = EDMA3_NON_ALIGNED_BUFFERS_ERROR;\r
+ }\r
+ else\r
+ {\r
+ Cache_inv((Ptr)mem_start_ptr, num_bytes, Cache_Type_ALL, TRUE);\r
+ }\r
+\r
+ return cacheInvResult;\r
+}\r
+\r
+\r
+\r
+/**\r
+ * \brief EDMA3 Cache Flush\r
+ *\r
+ * This function flushes (cleans) the Cache\r
+ *\r
+ * \param mem_start_ptr [IN] Starting address of memory.\r
+ * Please note that this should be\r
+ * aligned according to the cache line size.\r
+ * \param num_bytes [IN] length of buffer\r
+ * \return EDMA3_DRV_SOK if success, else error code in case of error\r
+ * or non-alignment of buffers.\r
+ *\r
+ * Note: This function is required if the buffer is in DDR.\r
+ * For other cases, where buffer is NOT in DDR, user\r
+ * may or may not require the below implementation and\r
+ * should modify it according to her need.\r
+ */\r
+EDMA3_DRV_Result Edma3_CacheFlush(unsigned int mem_start_ptr,\r
+ unsigned int num_bytes)\r
+ {\r
+ EDMA3_DRV_Result cacheFlushResult = EDMA3_DRV_SOK;\r
+\r
+ /* Verify whether the start address is cache aligned or not */\r
+ if((mem_start_ptr & (EDMA3_CACHE_LINE_SIZE_IN_BYTES-1u)) != 0)\r
+ {\r
+#ifdef EDMA3_DRV_DEBUG\r
+ EDMA3_DRV_PRINTF("\r\n Cache : Memory is not %d bytes alinged\r\n",\r
+ EDMA3_CACHE_LINE_SIZE_IN_BYTES);\r
+#endif\r
+ cacheFlushResult = EDMA3_NON_ALIGNED_BUFFERS_ERROR;\r
+ }\r
+ else\r
+ {\r
+ Cache_wb((Ptr)mem_start_ptr, num_bytes, Cache_Type_ALL, TRUE);\r
+ }\r
+\r
+ return cacheFlushResult;\r
+}\r
+\r
+\r
+/**\r
+ * Counting Semaphore related functions (OS dependent) should be\r
+ * called/implemented by the application. A handle to the semaphore\r
+ * is required while opening the driver/resource manager instance.\r
+ */\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Create\r
+ *\r
+ * This function creates a counting semaphore with specified\r
+ * attributes and initial value. It should be used to create a semaphore\r
+ * with initial value as '1'. The semaphore is then passed by the user\r
+ * to the EDMA3 driver/RM for proper sharing of resources.\r
+ * \param initVal [IN] is initial value for semaphore\r
+ * \param semParams [IN] is the semaphore attributes.\r
+ * \param hSem [OUT] is location to recieve the handle to just created\r
+ * semaphore\r
+ * \return EDMA3_DRV_SOK if succesful, else a suitable error code.\r
+ */\r
+EDMA3_DRV_Result edma3OsSemCreate(int initVal,\r
+ const Semaphore_Params *semParams,\r
+ EDMA3_OS_Sem_Handle *hSem)\r
+ {\r
+ EDMA3_DRV_Result semCreateResult = EDMA3_DRV_SOK;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semCreateResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ *hSem = (EDMA3_OS_Sem_Handle)Semaphore_create(initVal, semParams, NULL);\r
+ if ( (*hSem) == NULL )\r
+ {\r
+ semCreateResult = EDMA3_DRV_E_SEMAPHORE;\r
+ }\r
+ }\r
+\r
+ return semCreateResult;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Delete\r
+ *\r
+ * This function deletes or removes the specified semaphore\r
+ * from the system. Associated dynamically allocated memory\r
+ * if any is also freed up.\r
+ * \param hSem [IN] handle to the semaphore to be deleted\r
+ * \return EDMA3_DRV_SOK if succesful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemDelete(EDMA3_OS_Sem_Handle hSem)\r
+ {\r
+ EDMA3_DRV_Result semDeleteResult = EDMA3_DRV_SOK;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semDeleteResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ Semaphore_delete((Semaphore_Handle *)&hSem);\r
+ }\r
+\r
+ return semDeleteResult;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Take\r
+ *\r
+ * This function takes a semaphore token if available.\r
+ * If a semaphore is unavailable, it blocks currently\r
+ * running thread in wait (for specified duration) for\r
+ * a free semaphore.\r
+ * \param hSem [IN] is the handle of the specified semaphore\r
+ * \param mSecTimeout [IN] is wait time in milliseconds\r
+ * \return EDMA3_DRV_Result if successful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemTake(EDMA3_OS_Sem_Handle hSem, int mSecTimeout)\r
+ {\r
+ EDMA3_DRV_Result semTakeResult = EDMA3_DRV_SOK;\r
+ unsigned short semPendResult;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semTakeResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ semPendResult = Semaphore_pend(hSem, mSecTimeout);\r
+ if (semPendResult == FALSE)\r
+ {\r
+ semTakeResult = EDMA3_DRV_E_SEMAPHORE;\r
+ }\r
+ }\r
+\r
+ return semTakeResult;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 OS Semaphore Give\r
+ *\r
+ * This function gives or relinquishes an already\r
+ * acquired semaphore token\r
+ * \param hSem [IN] is the handle of the specified semaphore\r
+ * \return EDMA3_DRV_Result if successful else a suitable error code\r
+ */\r
+EDMA3_DRV_Result edma3OsSemGive(EDMA3_OS_Sem_Handle hSem)\r
+ {\r
+ EDMA3_DRV_Result semGiveResult = EDMA3_DRV_SOK;\r
+\r
+ if(NULL == hSem)\r
+ {\r
+ semGiveResult = EDMA3_DRV_E_INVALID_PARAM;\r
+ }\r
+ else\r
+ {\r
+ Semaphore_post(hSem);\r
+ }\r
+\r
+ return semGiveResult;\r
+ }\r
+\r
+/* End of File */\r
+\r
diff --git a/test/src/sample_init.c b/test/src/sample_init.c
--- /dev/null
+++ b/test/src/sample_init.c
@@ -0,0 +1,217 @@
+/*\r
+ * sample_init.c\r
+ *\r
+ * Sample Initialization for the EDMA3 Driver for BIOS 6 based applications.\r
+ * It should be MANDATORILY done once before EDMA3 usage.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+#include <ti/sysbios/hal/Hwi.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+\r
+#include "sample.h"\r
+\r
+/** @brief EDMA3 Driver Instance specific Semaphore handle */\r
+extern EDMA3_OS_Sem_Handle semHandle[];\r
+\r
+/** To Register the ISRs with the underlying OS, if required. */\r
+extern void registerEdma3Interrupts ( unsigned int edma3Id,\r
+ unsigned int tpccRegionUsed,\r
+ unsigned int dsp_num);\r
+/** To Unregister the ISRs with the underlying OS, if previously registered. */\r
+extern void unregisterEdma3Interrupts ( unsigned int edma3Id,\r
+ unsigned int dsp_num);\r
+\r
+/* To find out the DSP# */\r
+extern unsigned short determineProcId();\r
+\r
+/**\r
+ * To check whether the global EDMA3 configuration is required or not.\r
+ * It should be done ONCE by any of the masters present in the system.\r
+ * This function checks whether the global configuration is required by the\r
+ * current master or not. In case of many masters, it should be done only\r
+ * by one of the masters. Hence this function will return TRUE only once\r
+ * and FALSE for all other masters. \r
+ */\r
+extern unsigned short isGblConfigRequired(unsigned int dspNum);\r
+\r
+/**\r
+ * DSP instance number on which the executable is running. Its value is\r
+ * determined by reading the processor specific register DNUM.\r
+ */\r
+unsigned int dsp_num;\r
+\r
+/* Number of EDMA3 controllers present in the system */\r
+extern const unsigned int numEdma3Instances;\r
+\r
+/* External Global Configuration Structure */\r
+extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];\r
+\r
+/* External Instance Specific Configuration Structure */\r
+extern EDMA3_DRV_InstanceInitConfig sampleInstInitConfig[][EDMA3_MAX_REGIONS];\r
+\r
+/* Variables defined in tcp3d_main.c \r
+extern unsigned int tpccRegionUsed;\r
+extern unsigned int dspCoreID;*/\r
+unsigned int tpccRegionUsedLoc;\r
+\r
+/* variable available only if CHECK_OS_PROTECT_FUNCTIONS is defined in sample_cs.c */\r
+//extern unsigned int testOsFuncLog[2][100];\r
+extern Void edmaTestInit(Void);\r
+\r
+/**\r
+ * \brief EDMA3 Initialization\r
+ *\r
+ * This function initializes the EDMA3 Driver and registers the\r
+ * interrupt handlers.\r
+ *\r
+ * \return EDMA3_DRV_SOK if success, else error code\r
+ */\r
+EDMA3_DRV_Handle edma3init (unsigned int edma3Id, EDMA3_DRV_Result *errorCode,\r
+ unsigned int dspCoreID, unsigned int tpccRegionUsed)\r
+ {\r
+ EDMA3_DRV_Result edma3Result = EDMA3_DRV_E_INVALID_PARAM;\r
+ Semaphore_Params semParams;\r
+ EDMA3_DRV_GblConfigParams *globalConfig = NULL;\r
+ EDMA3_DRV_InstanceInitConfig *instanceConfig = NULL;\r
+ EDMA3_DRV_InitConfig initCfg;\r
+ EDMA3_RM_MiscParam miscParam;\r
+ EDMA3_DRV_Handle hEdma = NULL;\r
+\r
+ if ((edma3Id >= numEdma3Instances) || (errorCode == NULL))\r
+ return hEdma;\r
+\r
+ edmaTestInit();// see sample_cs.c file\r
+\r
+ /* DSP instance number */\r
+ dsp_num = dspCoreID; //determineProcId();\r
+ //tpccRegionUsed = 3;//(3-dsp_num);\r
+ tpccRegionUsedLoc = tpccRegionUsed;\r
+\r
+ globalConfig = &sampleEdma3GblCfgParams[edma3Id];\r
+\r
+ /* Configure it as master, if required */\r
+ miscParam.isSlave = 0;//isGblConfigRequired(dsp_num);\r
+ edma3Result = EDMA3_DRV_create (edma3Id, globalConfig ,\r
+ (void *)&miscParam);\r
+\r
+ if (edma3Result == EDMA3_DRV_SOK)\r
+ {\r
+ /**\r
+ * Driver Object created successfully.\r
+ * Create a semaphore now for driver instance.\r
+ */\r
+ Semaphore_Params_init(&semParams);\r
+\r
+ initCfg.drvSemHandle = NULL;\r
+ edma3Result = edma3OsSemCreate(1, &semParams, &initCfg.drvSemHandle);\r
+ }\r
+\r
+ if (edma3Result == EDMA3_DRV_SOK)\r
+ {\r
+ /* Save the semaphore handle for future use */\r
+ semHandle[edma3Id] = initCfg.drvSemHandle;\r
+\r
+ /* configuration structure for the Driver */\r
+ instanceConfig = &sampleInstInitConfig[edma3Id][tpccRegionUsed];\r
+\r
+ initCfg.isMaster = TRUE;\r
+ /* Choose shadow region according to the DSP# */\r
+ initCfg.regionId = (EDMA3_RM_RegionId)tpccRegionUsed;\r
+ /* Driver instance specific config NULL */\r
+ initCfg.drvInstInitConfig = instanceConfig;\r
+\r
+ initCfg.gblerrCb = NULL;\r
+ initCfg.gblerrData = NULL;\r
+\r
+ /* Open the Driver Instance */\r
+ hEdma = EDMA3_DRV_open (edma3Id, (void *) &initCfg, &edma3Result);\r
+ }\r
+\r
+ if(hEdma && (edma3Result == EDMA3_DRV_SOK))\r
+ {\r
+ /**\r
+ * Register Interrupt Handlers for various interrupts\r
+ * like transfer completion interrupt, CC error\r
+ * interrupt, TC error interrupts etc, if required.\r
+ */\r
+ registerEdma3Interrupts(edma3Id, tpccRegionUsed, dsp_num);\r
+ }\r
+\r
+ *errorCode = edma3Result; \r
+ return hEdma;\r
+ }\r
+\r
+\r
+/**\r
+ * \brief EDMA3 De-initialization\r
+ *\r
+ * This function removes the EDMA3 Driver instance and unregisters the\r
+ * interrupt handlers.\r
+ *\r
+ * \return EDMA3_DRV_SOK if success, else error code\r
+ */\r
+EDMA3_DRV_Result edma3deinit (unsigned int edma3Id, EDMA3_DRV_Handle hEdma)\r
+ {\r
+ EDMA3_DRV_Result edma3Result = EDMA3_DRV_E_INVALID_PARAM;\r
+\r
+ /* Unregister Interrupt Handlers first */\r
+ unregisterEdma3Interrupts(edma3Id, dsp_num);\r
+\r
+ /* Delete the semaphore */\r
+ edma3Result = edma3OsSemDelete(semHandle[edma3Id]);\r
+\r
+ if (EDMA3_DRV_SOK == edma3Result )\r
+ {\r
+ /* Make the semaphore handle as NULL. */\r
+ semHandle[edma3Id] = NULL;\r
+\r
+ /* Now, close the EDMA3 Driver Instance */\r
+ edma3Result = EDMA3_DRV_close (hEdma, NULL);\r
+ }\r
+\r
+ if (EDMA3_DRV_SOK == edma3Result )\r
+ {\r
+ /* Now, delete the EDMA3 Driver Object */\r
+ edma3Result = EDMA3_DRV_delete (edma3Id, NULL);\r
+ }\r
+\r
+ return edma3Result;\r
+ }\r
+\r
+/* End of File */\r
+\r
diff --git a/test/src/sample_int_reg.c b/test/src/sample_int_reg.c
--- /dev/null
@@ -0,0 +1,482 @@
+/*\r
+ * sample_int_reg.c\r
+ *\r
+ * Platform specific interrupt registration and un-registration routines.\r
+ *\r
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+#include <ti/sysbios/family/c64p/Hwi.h>\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
+\r
+#include <xdc/runtime/System.h>\r
+\r
+#include "sample.h"\r
+\r
+extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS];\r
+extern unsigned int ccErrorInt[];\r
+extern unsigned int tcErrorInt[][EDMA3_MAX_TC];\r
+extern unsigned int numEdma3Tc[];\r
+\r
+#define DEBUG_PRINTS 0\r
+#define MAP_ONCE_ONLY 1\r
+#define ISR_APPROACH_WHILE 1 // 0 would make the code to hang\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tpcc.h>\r
+\r
+//extern CSL_TpccRegs *tpcc2Regs;\r
+extern unsigned int tpccRegionUsedLoc;\r
+\r
+tccCallbackParams edma3IntrParamsLoc[64];\r
+unsigned int allocatedTCCsLoc[2u] = {0x0u, 0x0u};\r
+\r
+static void edma3ComplHandlerLoc (unsigned int edma3Id);\r
+#endif\r
+\r
+void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(unsigned int arg) =\r
+ {\r
+ &lisrEdma3TC0ErrHandler0,\r
+ &lisrEdma3TC1ErrHandler0,\r
+ &lisrEdma3TC2ErrHandler0,\r
+ &lisrEdma3TC3ErrHandler0,\r
+ &lisrEdma3TC4ErrHandler0,\r
+ &lisrEdma3TC5ErrHandler0,\r
+ &lisrEdma3TC6ErrHandler0,\r
+ &lisrEdma3TC7ErrHandler0,\r
+ };\r
+\r
+unsigned int hwiInterrupt = 8;\r
+\r
+unsigned int gemEvents[2];\r
+\r
+/* Host interrupts for transfer completion (per spec intc_1.3.4.12.xlsx) */\r
+/* First 4 cores are connected from CP_INTC0 and last 4 cores are connected from CP_INTC1 */\r
+//unsigned int ccXferHostInt[NUM_EDMA3_INSTANCES][NUM_DSPS] = {\r
+ /* CP_INTC0 | CP_INTC1 */\r
+unsigned int ccXferHostInt[5][8] = {\r
+ {68u, 78u, 88u, 98u, 68u, 78u, 88u, 98u},\r
+ {69u, 79u, 89u, 99u, 69u, 79u, 89u, 99u},\r
+ {70u, 80u, 90u, 100u, 70u, 80u, 90u, 100u},\r
+ {71u, 81u, 91u, 101u, 71u, 81u, 91u, 101u},\r
+ {72u, 82u, 92u, 102u, 72u, 82u, 92u, 102u},\r
+ };\r
+unsigned int edma3ErrHostInt[5][8] = {\r
+ {73u, 83u, 93u, 103u, 73u, 83u, 93u, 103u},\r
+ {64u, 74u, 84u, 94u, 64u, 74u, 84u, 94u},\r
+ {65u, 75u, 85u, 95u, 65u, 75u, 85u, 95u},\r
+ {66u, 76u, 86u, 96u, 66u, 76u, 86u, 96u},\r
+ {67u, 77u, 87u, 97u, 67u, 77u, 87u, 97u},\r
+ };\r
+\r
+//extern unsigned int dsp_num;\r
+//extern unsigned int tpccRegionUsed;\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+extern Void CpIntc_dispatchLoc(UInt hostInt);\r
+#endif\r
+\r
+/** To Register the ISRs with the underlying OS, if required */\r
+void registerEdma3Interrupts ( unsigned int edma3Id,\r
+ unsigned int tpccRegionUsed,\r
+ unsigned int dsp_num)\r
+ {\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+ unsigned int numTc = 0;\r
+#if MAP_ONCE_ONLY\r
+ static UInt32 mapDone = 0;\r
+#endif\r
+ unsigned int cpIntcNum = WHICH_CPINTC_NUM(dsp_num);//(dsp_num > 3)? 1: 0;\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Transfer completion ISR */\r
+ CpIntc_dispatchPlug(ccXferCompInt[edma3Id][tpccRegionUsed],\r
+#if EDMA_LOCAL_COMP_ISR\r
+ edma3ComplHandlerLoc,\r
+#else\r
+ lisrEdma3ComplHandler0,\r
+#endif\r
+ edma3Id,\r
+ TRUE);\r
+#if MAP_ONCE_ONLY\r
+ if (!mapDone)\r
+#endif\r
+ CpIntc_mapSysIntToHostInt(cpIntcNum, ccXferCompInt[edma3Id][tpccRegionUsed],\r
+ ccXferHostInt[edma3Id][dsp_num]);\r
+ CpIntc_enableHostInt(cpIntcNum, ccXferHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(ccXferHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_dispatchPlug (eventId,\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+ CpIntc_dispatchLoc,\r
+#else\r
+ CpIntc_dispatch,\r
+#endif\r
+ ccXferHostInt[edma3Id][dsp_num],\r
+ TRUE);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t ccXferCompInt : %d \n", ccXferCompInt[edma3Id][tpccRegionUsed]);\r
+ System_printf("\t\t ccXferHostInt : %d \n", ccXferHostInt[edma3Id][dsp_num]);\r
+ System_printf("\t\t eventId : %d \n", eventId);\r
+#endif\r
+ gemEvents[0] = eventId;\r
+\r
+ /* CC Error ISR */\r
+ CpIntc_dispatchPlug(ccErrorInt[edma3Id], lisrEdma3CCErrHandler0,\r
+ edma3Id, TRUE);\r
+#if MAP_ONCE_ONLY\r
+ if (!mapDone)\r
+#endif\r
+ CpIntc_mapSysIntToHostInt(cpIntcNum, ccErrorInt[edma3Id],\r
+ edma3ErrHostInt[edma3Id][dsp_num]);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t ccErrorInt : %d \n", ccErrorInt[edma3Id]);\r
+ System_printf("\t\t edma3ErrHostInt : %d \n", edma3ErrHostInt[edma3Id][dsp_num]);\r
+#endif\r
+\r
+ /* TC Error ISR */\r
+ while (numTc < numEdma3Tc[edma3Id])\r
+ {\r
+ CpIntc_dispatchPlug(tcErrorInt[edma3Id][numTc],\r
+ (CpIntc_FuncPtr )(ptrEdma3TcIsrHandler[numTc]),\r
+ edma3Id, TRUE);\r
+#if MAP_ONCE_ONLY\r
+ if (!mapDone)\r
+#endif\r
+ CpIntc_mapSysIntToHostInt(cpIntcNum, tcErrorInt[edma3Id][numTc],\r
+ edma3ErrHostInt[edma3Id][dsp_num]);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t tcErrorInt : %d \n", tcErrorInt[edma3Id][numTc]);\r
+ System_printf("\t\t edma3ErrHostInt : %d \n", edma3ErrHostInt[edma3Id][dsp_num]);\r
+#endif\r
+ numTc++;\r
+ }\r
+ /* Enable the host interrupt which is common for both CC and TC error */\r
+ CpIntc_enableHostInt(cpIntcNum, edma3ErrHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(edma3ErrHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_dispatchPlug (eventId,\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+ CpIntc_dispatchLoc,\r
+#else\r
+ CpIntc_dispatch,\r
+#endif\r
+ edma3ErrHostInt[edma3Id][dsp_num],\r
+ TRUE);\r
+#if DEBUG_PRINTS\r
+ System_printf("\t\t eventId : %d \n", eventId);\r
+#endif\r
+ gemEvents[1] = eventId;\r
+\r
+ //Hwi_enableInterrupt(hwiInterrupt);\r
+\r
+ /* enable the 'global' switch */\r
+ CpIntc_enableAllHostInts(cpIntcNum);\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+ tpccRegionUsedLoc = tpccRegionUsed;\r
+#endif\r
+\r
+#if MAP_ONCE_ONLY\r
+ mapDone = 1;\r
+#endif\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+ }\r
+\r
+/** To Unregister the ISRs with the underlying OS, if previously registered. */\r
+void unregisterEdma3Interrupts (unsigned int edma3Id, unsigned int dsp_num)\r
+ {\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+// unsigned int numTc = 0;\r
+ unsigned int cpIntcNum = WHICH_CPINTC_NUM(dsp_num);//(dsp_num > 3)? 1: 0;\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Transfer completion ISR */\r
+ CpIntc_disableHostInt(cpIntcNum, ccXferHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(ccXferHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_disableEvent(eventId);\r
+\r
+ /* CC/TC Error ISR */\r
+ CpIntc_disableHostInt(cpIntcNum, edma3ErrHostInt[edma3Id][dsp_num]);\r
+ eventId = CpIntc_getEventId(edma3ErrHostInt[edma3Id][dsp_num]);\r
+ EventCombiner_disableEvent(eventId);\r
+\r
+ /**\r
+ * Clear all system interrupt to host interrupt mapping.\r
+ * - might not be needed\r
+ * - doing to get clean numbers from cpintc dispatcher for debugging\r
+ * - DID NOT HELP, so commenting for now\r
+ */\r
+// CpIntc_mapSysIntToHostInt(cpIntcNum, ccXferCompInt[edma3Id][tpccRegionUsedLoc], 0);\r
+// CpIntc_mapSysIntToHostInt(cpIntcNum, ccErrorInt[edma3Id], 0);\r
+// while (numTc < numEdma3Tc[edma3Id])\r
+// {\r
+// CpIntc_mapSysIntToHostInt(cpIntcNum, tcErrorInt[edma3Id][numTc], 0);\r
+// numTc++;\r
+// }\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+ }\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+/**\r
+ * edma3ComplHandler\r
+ * \brief Interrupt handler for successful transfer completion.\r
+ *\r
+ * \note This function first disables its own interrupt to make it non-\r
+ * entrant. Later, after calling all the callback functions, it\r
+ * re-enables its own interrupt.\r
+ *\r
+ * \return None.\r
+ */\r
+UInt32 tpccIsrCntr = 0;\r
+UInt32 tpccCbCntr = 0;\r
+static void edma3ComplHandlerLoc (unsigned int edma3Id)\r
+ {\r
+#if !ISR_APPROACH_WHILE\r
+ unsigned int Cnt;\r
+#endif\r
+ volatile CSL_TPCC_ShadowRegs *shadowRegs = NULL;\r
+ volatile unsigned int pendingIrqs;\r
+ unsigned int indexl;\r
+ unsigned int indexh;\r
+ CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMACC_2_REGS;\r
+\r
+ tpccIsrCntr++;\r
+\r
+ if (tpcc2Regs != NULL)\r
+ {\r
+ shadowRegs = (volatile CSL_TPCC_ShadowRegs *)\r
+ (&tpcc2Regs->SHADOW[tpccRegionUsedLoc]);\r
+ }\r
+\r
+#if !ISR_APPROACH_WHILE\r
+ Cnt = 0u;\r
+#endif\r
+ pendingIrqs = 0u;\r
+ indexl = 1u;\r
+ indexh = 1u;\r
+\r
+#if ISR_APPROACH_WHILE\r
+ while((shadowRegs->TPCC_IPR !=0 ) || (shadowRegs->TPCC_IPRH !=0 ))\r
+ {\r
+ /* Loop for EDMA3_RM_COMPL_HANDLER_RETRY_COUNT number of time,\r
+ breaks when no pending interrupt is found */\r
+ indexl = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPR;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[0u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u) == TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPR register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[indexl].tccCb != NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICR = (1u << indexl);\r
+\r
+ tpccCbCntr++;\r
+ \r
+ edma3IntrParamsLoc[indexl].tccCb (indexl,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[indexl].cbData);\r
+ }\r
+ }\r
+ ++indexl;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+\r
+ indexh = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPRH;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[1u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u)==TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPRH register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[32u+indexh].tccCb!=NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICRH = (1u << indexh);\r
+\r
+ edma3IntrParamsLoc[32u+indexh].tccCb(32u+indexh,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[32u+indexh].cbData);\r
+ }\r
+ }\r
+ ++indexh;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+ }\r
+#else // ISR_APPROACH_WHILE\r
+ if((shadowRegs->TPCC_IPR !=0 ) || (shadowRegs->TPCC_IPRH !=0 ))\r
+ {\r
+ /**\r
+ * Since an interrupt has found, we have to make sure that this\r
+ * interrupt (TCC) belongs to the TCCs allocated by us only.\r
+ * It might happen that someone else, who is using EDMA3 also,\r
+ * is the owner of this interrupt channel i.e. the TCC.\r
+ * For this, use the allocatedTCCs[], to check which all interrupt\r
+ * channels are owned by the EDMA3 RM Instances.\r
+ */\r
+\r
+ edma3OsProtectEntry (edma3Id,\r
+ EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,\r
+ NULL);\r
+\r
+ /* Loop for EDMA3_RM_COMPL_HANDLER_RETRY_COUNT number of time,\r
+ breaks when no pending interrupt is found */\r
+ while ((Cnt < 10u)\r
+ && ((indexl != 0u) || (indexh != 0u)))\r
+ {\r
+ indexl = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPR;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[0u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u) == TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPR register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[indexl].tccCb != NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICR = (1u << indexl);\r
+\r
+ tpccCbCntr++;\r
+ \r
+ edma3IntrParamsLoc[indexl].tccCb (indexl,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[indexl].cbData);\r
+ }\r
+ }\r
+ ++indexl;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+\r
+ indexh = 0u;\r
+ pendingIrqs = shadowRegs->TPCC_IPRH;\r
+\r
+ /**\r
+ * Choose interrupts coming from our allocated TCCs\r
+ * and MASK remaining ones.\r
+ */\r
+ pendingIrqs = (pendingIrqs & allocatedTCCsLoc[1u]);\r
+\r
+ while (pendingIrqs)\r
+ {\r
+ /*Process all the pending interrupts*/\r
+ if((pendingIrqs & 1u)==TRUE)\r
+ {\r
+ /**\r
+ * If the user has not given any callback function\r
+ * while requesting the TCC, its TCC specific bit\r
+ * in the IPRH register will NOT be cleared.\r
+ */\r
+ if(edma3IntrParamsLoc[32u+indexh].tccCb!=NULL)\r
+ {\r
+ /* here write to ICR to clear the corresponding IPR bits*/\r
+ shadowRegs->TPCC_ICRH = (1u << indexh);\r
+\r
+ edma3IntrParamsLoc[32u+indexh].tccCb(32u+indexh,\r
+ EDMA3_RM_XFER_COMPLETE,\r
+ edma3IntrParamsLoc[32u+indexh].cbData);\r
+ }\r
+ }\r
+ ++indexh;\r
+ pendingIrqs >>= 1u;\r
+ }\r
+\r
+ Cnt++;\r
+ }\r
+\r
+ indexl = (shadowRegs->TPCC_IPR & allocatedTCCsLoc[0u]);\r
+ indexh = (shadowRegs->TPCC_IPRH & allocatedTCCsLoc[1u]);\r
+\r
+ if((indexl !=0 ) || (indexh !=0 ))\r
+ {\r
+ shadowRegs->TPCC_IEVAL=0x1u;\r
+ }\r
+\r
+ edma3OsProtectExit (edma3Id,\r
+ EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION,\r
+ NULL);\r
+ }\r
+ /* for testing only */\r
+ else\r
+ {\r
+ while(1);\r
+ }\r
+#endif // ISR_APPROACH_WHILE\r
+ }\r
+#endif // EDMA_LOCAL_COMP_ISR\r
diff --git a/test/src/tcp3d_codeBlkSeg.c b/test/src/tcp3d_codeBlkSeg.c
--- /dev/null
@@ -0,0 +1,208 @@
+/** \r
+ * \file tcp3d_codeBlkSeg.c\r
+ *\r
+ * \brief Calculates code block segmentation parameteres based on the block length and SW0 length. \r
+ *\r
+ * Copyright (c) Texas Instruments Incorporated 2008\r
+ *\r
+ * Use of this software is controlled by the terms and conditions found in the\r
+ * license agreement under which this software has been supplied or provided.\r
+ * \r
+ */\r
+#include "tcp3d_codeBlkSeg.h"\r
+\r
+/** TCP3D SW0 nominal values */\r
+Int32 tcp3d_sw0_Tab[] = {16, 32, 48, 64, 96, 128};\r
+\r
+/** Used for getting the sw0LenSel index values */\r
+Int32 TAB[] = {0, 1, 2, 3, 3, 4, 4, 5};\r
+\r
+/** Table used for division optimization logic */\r
+Int32 shiftValTab [] = {4, 5, 4, 6, 5, 7};\r
+\r
+/** Table used for division optimization logic */\r
+Uint32 mulValTab [] = {32768, 32768, 10923, 32768, 10923, 32768};\r
+\r
+/** Table used for checking bounds */\r
+Uint32 frameLenTab[2][2] = {40,5114,40,6144};\r
+\r
+/** \r
+ * \fn Int32 TCP3D_codeBlkSeg (\r
+ * IN Uint32 blockLengthK,\r
+ * IN Uint8 numMAP,\r
+ * IN Uint8 * const RESTRICT sw0NomLen,\r
+ * OUT Uint8 * const RESTRICT sw0LenSel,\r
+ * OUT Uint8 * const RESTRICT sw1Len,\r
+ * OUT Uint8 * const RESTRICT sw2LenSel,\r
+ * OUT Uint8 * const RESTRICT numsw0)\r
+ * \brief Calculates code block segmentation parameteres based on the block length and SW0 length.\r
+ * \r
+ * \r
+ * \param[in] blockLengthK\r
+ * Code block length. (Number of information bits.)\r
+ * \r
+ *\r
+ * \param[in] numMAP\r
+ * Number of MAP decoders used. =1 for WCDMA, =2 for LTE and WiMAX\r
+ *\r
+ * \param[in] sw0NomLen\r
+ * Nominal length for the sliding window 0. Valid values are from the set: {16, 32, \r
+ * 48, 64, 96, 128}. Note that if [blockLengthK <= (numMAP * 128 * sw0NomLen)] does \r
+ * not hold, the function will pick the first greater length value from the set for which\r
+ * the above inequality holds, and will return it.\r
+ * \r
+ * This will be updated with the picked value.\r
+ * \r
+ * \param[out] sw0LenSel\r
+ * Input configuration register parameter. The value depends on the picked SW0 length \r
+ * used, (sw0NomLen), and the possible values are: \r
+ * 0 - 16 bits \r
+ * 1 - 32 bits\r
+ * 2 - 48 bits\r
+ * 3 - 64 bits\r
+ * 4 - 96 bits\r
+ * 5 - 128 bits\r
+ *\r
+ * \r
+ * \param[out] sw1Len\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 9 - 10 bits\r
+ * 10 - 11 bits\r
+ * 11 - 12 bits\r
+ * ...\r
+ * 127 - 128 bits\r
+ * \r
+ * \r
+ * \param[out] sw2LenSel\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 0 - SW2 is not present\r
+ * 1 - SW2 length is same as SW1\r
+ * 2 - SW2 length is less by 2 bits from SW1\r
+ * \r
+ * \param[out] numsw0\r
+ * Input configuration register parameter. Number of SW0 used in the decoder.\r
+ * \r
+ * \return Return indicates PASS or FAIL with ZERO or non-ZERO values.\r
+ * \r
+ * \r
+ */\r
+Int32 TCP3D_codeBlkSeg (\r
+ IN Uint32 blockLengthK,\r
+ IN Uint8 numMAP,\r
+ INOUT Uint8 * const RESTRICT sw0NomLen,\r
+ OUT Uint8 * const RESTRICT sw0LenSel,\r
+ OUT Uint8 * const RESTRICT sw1Len,\r
+ OUT Uint8 * const RESTRICT sw2LenSel,\r
+ OUT Uint8 * const RESTRICT numsw0)\r
+{\r
+ Int32 status = 0;\r
+ Int32 K, Kext;\r
+ Int32 numSWrem;\r
+ Int32 subFrameLen;\r
+ Int32 sw0LenSelTmp;\r
+ Int32 sw1LenTmp;\r
+ Int32 sw2LenSelTmp;\r
+ Int32 numsw0Tmp;\r
+ Int32 numSW;\r
+ Int32 shiftVal, mulVal;\r
+ Int32 sw0Len = *sw0NomLen;\r
+\r
+ /**\r
+ * Check the bounds based on numMAP value. frameLenTab is for the bound values\r
+ * numMAP - mode - block length bounds\r
+ * 1 - 3GPP - [40,5114]\r
+ * 2 - LTE/WIMAX - [40,6144]\r
+ */\r
+ if ( (blockLengthK < frameLenTab[numMAP-1][0]) ||\r
+ (blockLengthK > frameLenTab[numMAP-1][1]) )\r
+ {\r
+ status = 1;\r
+ return (status);\r
+ }\r
+\r
+ K = blockLengthK;\r
+ Kext = ((K + 0x3)>>2)<<2;\r
+\r
+ //Calculate sw0LenSelTmp, SW1Len, SW2LenSel, numsw0Tmp\r
+ subFrameLen = Kext >> numMAP; //Kext / (2*numMAP);\r
+\r
+ sw0LenSelTmp = TAB[((sw0Len>>4)-1)&0x7];\r
+\r
+ //Check that this holds: (reg->NumInfoBits <= 128 * sparms->tcp3_SW0_length * numMap)\r
+ while((Kext > 128 * sw0Len * numMAP) && sw0LenSelTmp<6)\r
+ {\r
+ sw0LenSelTmp++;\r
+ sw0Len = tcp3d_sw0_Tab[sw0LenSelTmp];\r
+ }\r
+\r
+ //numSW = subFrameLen/sw0Len; Replaced by:\r
+ shiftVal = shiftValTab[sw0LenSelTmp];\r
+ mulVal = mulValTab[sw0LenSelTmp];\r
+ numSW = _mpysu((subFrameLen >> shiftVal), mulVal)>>15;\r
+\r
+ numSWrem = subFrameLen - numSW*sw0Len;\r
+ if(numSWrem)\r
+ {\r
+ numSW++;\r
+ }\r
+\r
+ if(numSW == 1)\r
+ {\r
+ numsw0Tmp = 0;\r
+ sw1LenTmp = subFrameLen-1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 0; //SW2 is Off.\r
+ }\r
+ else if(numSW == 2)\r
+ {\r
+ numsw0Tmp = 0;\r
+ if(subFrameLen & 0x3)\r
+ {\r
+ sw1LenTmp = 2*(subFrameLen>>2) + 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 2; //sw1LenTmp > SW2Len\r
+ }\r
+ else\r
+ {\r
+ sw1LenTmp = (subFrameLen>>1) - 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 1; //sw1LenTmp = SW2Len\r
+ }\r
+ }\r
+ else if( numSWrem <= (sw0Len>>1) )\r
+ {\r
+ numsw0Tmp = numSW-2;\r
+ numSWrem = subFrameLen - (numSW-2)*sw0Len;\r
+ if((numSWrem) & 0x3)\r
+ {\r
+ sw1LenTmp = 2*(numSWrem>>2) + 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 2; //sw1LenTmp > SW2Len\r
+ }\r
+ else\r
+ {\r
+ sw1LenTmp = (numSWrem>>1) - 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 1; //sw1LenTmp = SW2Len\r
+ }\r
+ }\r
+ else\r
+ {\r
+ numsw0Tmp = numSW-1;\r
+ sw1LenTmp = numSWrem - 1; //stored value is (sw1_length -1)\r
+ sw2LenSelTmp = 0; //SW2 is Off.\r
+ }\r
+\r
+\r
+ *sw0LenSel = (Uint8) sw0LenSelTmp;\r
+ *sw1Len = (Uint8) sw1LenTmp;\r
+ *sw2LenSel = (Uint8) sw2LenSelTmp;\r
+ *numsw0 = (Uint8) numsw0Tmp;\r
+ *sw0NomLen = (Uint8) sw0Len;\r
+\r
+ return ( status );\r
+\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
diff --git a/test/src/tcp3d_codeBlkSeg.h b/test/src/tcp3d_codeBlkSeg.h
--- /dev/null
@@ -0,0 +1,81 @@
+#ifndef _TCP3D_CODE_BLK_SEG_H_\r
+#define _TCP3D_CODE_BLK_SEG_H_\r
+\r
+#ifndef USE_TCP3D_DRIVER_TYPES\r
+#include "swpform.h"\r
+#else\r
+#include <ti/csl/tistdtypes.h>\r
+#include <tcp3d_drv_types.h>\r
+#endif\r
+\r
+/** \r
+ * \fn Int32 TCP3D_codeBlkSeg (\r
+ * IN Uint32 blockLengthK,\r
+ * IN Uint8 numMAP,\r
+ * IN Uint8 * const RESTRICT sw0NomLen,\r
+ * OUT Uint8 * const RESTRICT sw0LenSel,\r
+ * OUT Uint8 * const RESTRICT sw1Len,\r
+ * OUT Uint8 * const RESTRICT sw2LenSel,\r
+ * OUT Uint8 * const RESTRICT numsw0)\r
+ * \brief Calculates code block segmentation parameteres based on the block lenght and SW0 length.\r
+ * \r
+ * \r
+ * \param[in] blockLengthK\r
+ * Code block length. (Number of information bits.)\r
+ * \r
+ *\r
+ * \param[in] numMAP\r
+ * Number of MAP decoders used. =1 for WCDMA, =2 for LTE and WiMAX\r
+ *\r
+ * \param[in,out] sw0NomLen\r
+ * Nominal length for the sliding window 0. Valid values are from the set: {16, 32, \r
+ * 48, 64, 96, 128}. Note that if [blockLengthK <= (numMAP * 128 * sw0NomLen)] does \r
+ * not hold, the function will pick the first greater length value from the set for which\r
+ * the above inequality holds, and will return it.\r
+ * \r
+ * This will be updated with the picked value.\r
+ * \r
+ * \param[out] sw0LenSel\r
+ * Input configuration register parameter. The value depends on the picked SW0 length \r
+ * used, (sw0NomLen), and the possible values are: \r
+ * 0 - 16 bits \r
+ * 1 - 32 bits\r
+ * 2 - 48 bits\r
+ * 3 - 64 bits\r
+ * 4 - 96 bits\r
+ * 5 - 128 bits\r
+ *\r
+ * \r
+ * \param[out] sw1Len\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 9 - 10 bits\r
+ * 10 - 11 bits\r
+ * 11 - 12 bits\r
+ * ...\r
+ * 127 - 128 bits\r
+ * \r
+ * \r
+ * \param[out] sw2LenSel\r
+ * Input configuration register parameter. The value depends on the SW1 length used \r
+ * and the possible values are:\r
+ * 0 - SW2 is not present\r
+ * 1 - SW2 length is same as SW1\r
+ * 2 - SW2 length is less by 2 bits from SW1\r
+ * \r
+ * \param[out] numsw0\r
+ * Input configuration register parameter. Number of SW0 used in the decoder.\r
+ * \r
+ * \return Return indicates PASS or FAIL with ZERO or non-ZERO values.\r
+ * \r
+ * \r
+ */\r
+Int32 TCP3D_codeBlkSeg (\r
+ IN Uint32 blockLengthK,\r
+ IN Uint8 numMAP,\r
+ IN Uint8 * const RESTRICT sw0NomLen,\r
+ OUT Uint8 * const RESTRICT sw0LenSel,\r
+ OUT Uint8 * const RESTRICT sw1Len,\r
+ OUT Uint8 * const RESTRICT sw2LenSel,\r
+ OUT Uint8 * const RESTRICT numsw0);\r
+#endif\r
diff --git a/test/src/tcp3d_drv_sample.h b/test/src/tcp3d_drv_sample.h
--- /dev/null
@@ -0,0 +1,155 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_SAMPLE_H_\r
+#define _TCP3D_SAMPLE_H_\r
+\r
+#include <xdc/std.h>\r
+#include <xdc/runtime/System.h>\r
+#include <xdc/runtime/Memory.h>\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+#include <ti/sdo/edma3/drv/edma3_drv.h>\r
+\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+#include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
+\r
+#include "sample.h"\r
+\r
+#if (CSL_TCP3D_PER_CNT > 1)\r
+#include "tcp3d_multi_inst.h"\r
+#else\r
+#include "tcp3d_single_inst.h"\r
+#endif\r
+\r
+#if EDMA_LOCAL_COMP_ISR\r
+extern tccCallbackParams edma3IntrParamsLoc[];\r
+extern unsigned int allocatedTCCsLoc[];\r
+#endif\r
+\r
+#define EDMA_RESULT_CHECK(res) ((res == EDMA3_DRV_SOK) ? "Passed": "Failed")\r
+\r
+/*\r
+ * EDMA Resource structure\r
+ */\r
+typedef struct EDMA_RES\r
+{\r
+ UInt32 chNo;\r
+ UInt32 tccNo;\r
+ EDMA3_RM_TccCallback cbFunc;\r
+ Void *cbData;\r
+} EDMA_RES;\r
+\r
+/*\r
+ * EDMA configuration structure\r
+ */\r
+typedef struct EDMA_CONFIG\r
+{\r
+ EDMA_RES pingChRes[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ EDMA_RES pongChRes[TCP3D_DRV_MAX_CH_PER_PATH];\r
+ EDMA_RES linkChRes[TCP3D_DRV_MAX_LINK_CH];\r
+} EDMA_CONFIG;\r
+\r
+/**\r
+ * \brief TCP3D Initialization\r
+ *\r
+ * This function initializes the TCP3D Driver for the given TCP3D instance ID.\r
+ * It internally calls Tcp3d_getNumBuf(), Tcp3d_getBufDesc() and Tcp3d_init(),\r
+ * in that order and memory is allocated from the heap pointer given.\r
+ */\r
+Tcp3d_Instance* tcp3dSampleInit(\r
+ IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ UInt32 testMaxBlocks,\r
+ UInt32 testMode,\r
+ UInt32 testDoubleBuffer,\r
+ UInt32 testLteCrcSel,\r
+ UInt32 dspCoreID,\r
+ EDMA3_DRV_Handle hEdma,\r
+ UInt32 tpccRegionUsed,\r
+ EDMA_CONFIG *edmaConfig,\r
+ Tcp3d_Result *errCode);\r
+\r
+/**\r
+ * \brief TCP3D De-initialization\r
+ *\r
+ * This function de-initializes the TCP3D Driver for the given TCP3D instance ID.\r
+ * Frees any memory allocated from the heap during the initialization.\r
+ * \r
+ * Currently, there are no driver function calls.\r
+ */\r
+Tcp3d_Result tcp3dSampleDeinit(\r
+ IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ Tcp3d_Instance *tcp3dInst);\r
+\r
+/**\r
+ * \brief Open EDMA channels for TCP3D driver\r
+ *\r
+ * Function for opening EDMA3 channels using the EDMA3 LLD APIs based on the\r
+ * TCP3D instance ID given and the details are updated in the edmaConfig structure.\r
+ */\r
+Void openEdmaChannels ( EDMA3_DRV_Handle hEdma,\r
+ UInt8 instNum,\r
+ EDMA_CONFIG *edmaConfig);\r
+\r
+/**\r
+ * \brief Close EDMA channels for TCP3D driver\r
+ *\r
+ * This function initializes the TCP3D Driver for the given TCP3D instance ID.\r
+ * It internally calls Tcp3d_getNumBuf(), Tcp3d_getBufDesc() and Tcp3d_init(),\r
+ * in that order and memory is allocated from the heap pointer given.\r
+ */\r
+Void closeEdmaChannels (EDMA3_DRV_Handle hEdma,\r
+ UInt8 instNum,\r
+ EDMA_CONFIG *edmaConfig);\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+/**\r
+ * Fill the tables for allocated TCC & tccCB params, used with local\r
+ * EDMA3 call back ISR routine (see in sample_int_reg.c file).\r
+ */\r
+Void updateAllocatedTccsLoc( EDMA_CONFIG *edmaConfig);\r
+#endif\r
+\r
+#endif /* _TCP3D_SAMPLE_H_ */\r
+\r
diff --git a/test/src/tcp3d_drv_sample_init.c b/test/src/tcp3d_drv_sample_init.c
--- /dev/null
@@ -0,0 +1,448 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include "tcp3d_drv_sample.h"\r
+\r
+Tcp3d_MemBuffer *bufs;\r
+Int16 nbufs;\r
+\r
+/**\r
+ * NOTE: All the configuration values whether they are used in the current\r
+ * driver or not. Unused values are kept as place holders for future use.\r
+ */ \r
+Void fillConfig(Tcp3d_InitParams *drvInitParams, UInt32 perId)\r
+{\r
+ UInt32 baseDataRegs;\r
+\r
+ if ( perId < CSL_TCP3D_PER_CNT )\r
+ {\r
+ /* Set the notification Event number */\r
+ drvInitParams->notificationEventNum = getNotifyEventNum(perId); \r
+\r
+ /* Set the Control Register base address */\r
+ drvInitParams->tcp3dCfgRegs = (CSL_Tcp3d_cfgRegs *) getTcp3dCfgRegsBase(perId);\r
+\r
+ /* Set REVT channel numbers */\r
+ drvInitParams->pingConfig.revtCh = getRevt0ChannelNum(perId);\r
+ drvInitParams->pongConfig.revtCh = getRevt1ChannelNum(perId);\r
+\r
+ /* Set the TCP3D PING addresses */\r
+ baseDataRegs = getTcp3dDataRegsBase(perId);\r
+ drvInitParams->pingConfig.inCfgStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_OFFSET;\r
+ drvInitParams->pingConfig.llrStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_SYS_P0_OFFSET;\r
+ drvInitParams->pingConfig.interStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_INTER_P0_OFFSET;\r
+ drvInitParams->pingConfig.hdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_HD0_OFFSET;\r
+ drvInitParams->pingConfig.stsStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_OFFSET;\r
+ drvInitParams->pingConfig.sdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_SO0_OFFSET;\r
+ \r
+ /* Set the TCP3D PONG addresses */\r
+ drvInitParams->pongConfig.inCfgStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_OFFSET;\r
+ drvInitParams->pongConfig.llrStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_SYS_P1_OFFSET;\r
+ drvInitParams->pongConfig.interStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_INTER_P1_OFFSET;\r
+ if ( drvInitParams->ctrlParams.doubleBuf == CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
+ {\r
+ drvInitParams->pongConfig.hdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_HD0_OFFSET;\r
+ drvInitParams->pongConfig.sdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_SO0_OFFSET;\r
+ drvInitParams->pongConfig.stsStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_OFFSET;\r
+ }\r
+ else\r
+ {\r
+ drvInitParams->pongConfig.hdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_HD1_OFFSET;\r
+ drvInitParams->pongConfig.sdStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_SO1_OFFSET;\r
+ drvInitParams->pongConfig.stsStart = baseDataRegs + CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_OFFSET;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ System_printf("Wrong Instance ID passed\n");\r
+ System_exit(0);\r
+ }\r
+}\r
+\r
+Tcp3d_Instance* tcp3dSampleInit(\r
+ IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ UInt32 testMaxBlocks,\r
+ UInt32 testMode,\r
+ UInt32 testDoubleBuffer,\r
+ UInt32 testLteCrcSel,\r
+ UInt32 dspCoreID,\r
+ EDMA3_DRV_Handle hEdma,\r
+ UInt32 tpccRegionUsed,\r
+ EDMA_CONFIG *edmaConfig,\r
+ Tcp3d_Result *errCode)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ Tcp3d_SizeCfg sizeCfg;\r
+ Tcp3d_InitParams drvInitParams;\r
+ Int32 cnt;\r
+ UInt32 numBytes;\r
+ UInt8 align;\r
+\r
+ /*\r
+ * Setup TCP3D Driver Initialization Sequence\r
+ */\r
+ /* Step 1: Set parameters in the sizeCfg structure for TCP3D driver\r
+ * memory allocation. This will be used with the driver functions\r
+ * Tcp3d_getNumBuf() & Tcp3d_getBufDesc() */\r
+ sizeCfg.maxCodeBlocks = testMaxBlocks;\r
+ sizeCfg.mode = testMode;\r
+\r
+ /* Step 2: Get Number of buffers required for TCP3D Driver */\r
+ tcp3dResult = Tcp3d_getNumBuf(&sizeCfg, &nbufs);\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
+ {\r
+ System_printf("Get Num Bufs failed\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_getNumBuf() passed\n");\r
+ }\r
+\r
+ /* Step 3: Allocate memory for buffer descriptor structure */\r
+ numBytes = nbufs * sizeof (Tcp3d_MemBuffer);\r
+ bufs = (Tcp3d_MemBuffer *) Memory_alloc(dataHeap, numBytes, 0, NULL); \r
+ if ( bufs == NULL )\r
+ {\r
+ System_printf("Memory allocation failed !!! (DRV MEMBUFS)\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Step 4: Get TCP3D Driver buffer descriptor requirements */\r
+ tcp3dResult = Tcp3d_getBufDesc(&sizeCfg, bufs);\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR )\r
+ {\r
+ System_printf("Get Buf Descriptor failed\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_getBufDesc() passed\n");\r
+ }\r
+\r
+ /* Step 5: Allocate memory for buffers based on the requirements given */\r
+ /*\r
+ * NOTE:\r
+ * 1) The memory class type is NOT used for allocation.\r
+ * 2) The memory allocation is always done from the data Heap. See the\r
+ * BIOS config file more details (drvHeap).\r
+ */\r
+ for (cnt = 0; cnt < nbufs; ++cnt)\r
+ {\r
+ numBytes = bufs[cnt].size;\r
+ align = 1<<bufs[cnt].log2align;\r
+ \r
+ bufs[cnt].base = (Tcp3d_MemBuffer *) Memory_alloc ( dataHeap,\r
+ numBytes,\r
+ align,\r
+ NULL);\r
+\r
+ if ( bufs[cnt].base == NULL )\r
+ {\r
+ System_printf("Memory allocation failed !!! (DRV BUF)\n");\r
+ System_exit(0);\r
+ }\r
+ }\r
+\r
+ /* Step 7: Set TCP3D Driver init parameters */\r
+ drvInitParams.coreID = dspCoreID;\r
+ drvInitParams.maxCodeBlocks = testMaxBlocks;\r
+ drvInitParams.instNum = instNum;\r
+\r
+ /* Set the EDMA variables/resoureces */\r
+ drvInitParams.edmaHnd = hEdma;\r
+ drvInitParams.edmaRegionId = tpccRegionUsed;\r
+ for (cnt = 0; cnt < TCP3D_DRV_MAX_CH_PER_PATH; ++cnt)\r
+ {\r
+ drvInitParams.pingCh[cnt] = edmaConfig->pingChRes[cnt].chNo;\r
+ drvInitParams.pongCh[cnt] = edmaConfig->pongChRes[cnt].chNo;\r
+ }\r
+ for (cnt = 0; cnt < TCP3D_DRV_MAX_LINK_CH; ++cnt)\r
+ {\r
+ drvInitParams.linkCh[cnt] = edmaConfig->linkChRes[cnt].chNo;\r
+ }\r
+\r
+ /* Set the Control Register parameters */\r
+ drvInitParams.ctrlParams.mode = testMode;\r
+ drvInitParams.ctrlParams.doubleBuf = testDoubleBuffer;\r
+ drvInitParams.ctrlParams.intTable = CSL_TCP3D_CFG_TCP3_MODE_ITG_EN_ENABLE;\r
+ drvInitParams.ctrlParams.autoTrig = CSL_TCP3D_CFG_TCP3_MODE_AUTO_TRIG_EN_ENABLE;\r
+ drvInitParams.ctrlParams.errIgnore = CSL_TCP3D_CFG_TCP3_MODE_ERROR_IGNORE_EN_DONT_STOP;\r
+ drvInitParams.ctrlParams.lteCrcSel = testLteCrcSel;\r
+#ifdef _LITTLE_ENDIAN\r
+ drvInitParams.ctrlParams.endInt = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INTR_32_BIT_PACKED;\r
+ drvInitParams.ctrlParams.endInData = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INDATA_32_BIT_PACKED;\r
+#else\r
+ drvInitParams.ctrlParams.endInt = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INTR_16_BIT_NATIVE;\r
+ drvInitParams.ctrlParams.endInData = CSL_TCP3D_CFG_TCP3_END_ENDIAN_INDATA_8_BIT_NATIVE;\r
+#endif\r
+ drvInitParams.ctrlParams.exeP0cmd = CSL_TCP3D_CFG_TCP3_EXE_P0_EXE_CMD_ENABLE;\r
+ if ( testDoubleBuffer != CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE )\r
+ drvInitParams.ctrlParams.exeP1cmd = CSL_TCP3D_CFG_TCP3_EXE_P1_EXE_CMD_ENABLE;\r
+\r
+ fillConfig(&drvInitParams, instNum);\r
+\r
+ /* Step 8: Call the TCP3D Driver init function */\r
+ tcp3dResult = Tcp3d_init ( bufs, &drvInitParams);\r
+\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR)\r
+ {\r
+ System_printf("TCP3D Driver Init failed\n");\r
+ System_exit(0);\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_init() passed\n");\r
+ }\r
+\r
+ *errCode = tcp3dResult;\r
+\r
+ /* Initialize the TCP3D driver instance variable */\r
+ return ((Tcp3d_Instance* )bufs[TCP3D_DRV_INST_BUFN].base);\r
+}\r
+\r
+Tcp3d_Result tcp3dSampleDeinit( IHeap_Handle dataHeap,\r
+ UInt8 instNum,\r
+ Tcp3d_Instance *tcp3dInst)\r
+{\r
+ Int32 cnt;\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+\r
+ tcp3dResult = Tcp3d_deInit(tcp3dInst);\r
+\r
+ if ( tcp3dResult != TCP3D_DRV_NO_ERR)\r
+ {\r
+ System_printf("TCP3D Driver De-Init failed\n");\r
+ System_exit(0);\r
+ }\r
+ else\r
+ {\r
+ System_printf("\t Tcp3d_deInit() passed\n");\r
+ }\r
+\r
+ /* Free memory allocated for TCP3D Driver Initialization sequence */\r
+ /* NOTE:\r
+ * It is assumed that the nbufs and bufs[] values are preserved from init. \r
+ */\r
+ for (cnt = 0; cnt < nbufs; ++cnt)\r
+ {\r
+ Memory_free(dataHeap, bufs[cnt].base, bufs[cnt].size); \r
+ }\r
+ Memory_free(dataHeap, bufs, nbufs*sizeof(Tcp3d_MemBuffer)); \r
+\r
+ return (tcp3dResult);\r
+}\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * Fill the tables for allocated TCC & tccCB params, used with local\r
+ * EDMA3 call back ISR routine (see in sample_int_reg.c file).\r
+ */\r
+Void updateAllocatedTccsLoc( EDMA_CONFIG *edmaConfig)\r
+{\r
+ Int i;\r
+ UInt32 tcc;\r
+\r
+ allocatedTCCsLoc[0] = 0u;\r
+ allocatedTCCsLoc[1] = 0u;\r
+\r
+ for (i=0;i<TCP3D_DRV_MAX_CH_PER_PATH;i++)\r
+ {\r
+ if( edmaConfig->pingChRes[i].cbFunc != NULL)\r
+ {\r
+ tcc = edmaConfig->pingChRes[i].tccNo;\r
+ edma3IntrParamsLoc[tcc].tccCb = edmaConfig->pingChRes[i].cbFunc;\r
+ edma3IntrParamsLoc[tcc].cbData = edmaConfig->pingChRes[i].cbData;\r
+ if (tcc < 32u)\r
+ allocatedTCCsLoc[0u] |= (0x1u << tcc);\r
+ else\r
+ allocatedTCCsLoc[1u] |= (0x1u << (tcc - 32u));\r
+ }\r
+ if( edmaConfig->pongChRes[i].cbFunc != NULL)\r
+ {\r
+ tcc = edmaConfig->pongChRes[i].tccNo;\r
+ edma3IntrParamsLoc[tcc].tccCb = edmaConfig->pongChRes[i].cbFunc;\r
+ edma3IntrParamsLoc[tcc].cbData = edmaConfig->pongChRes[i].cbData;\r
+ if (tcc < 32u)\r
+ allocatedTCCsLoc[0u] |= (0x1u << tcc);\r
+ else\r
+ allocatedTCCsLoc[1u] |= (0x1u << (tcc - 32u));\r
+ }\r
+ }\r
+}\r
+#endif\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void openEdmaChannels ( EDMA3_DRV_Handle hEdma,\r
+ UInt8 perId,\r
+ EDMA_CONFIG *edmaConfig)\r
+{\r
+ EDMA3_DRV_Result result, status = EDMA3_DRV_SOK;\r
+ Int32 i;\r
+\r
+ if ( perId < CSL_TCP3D_PER_CNT )\r
+ {\r
+ edmaConfig->pingChRes[0].chNo = getRevt0ChannelNum(perId);\r
+ edmaConfig->pongChRes[0].chNo = getRevt1ChannelNum(perId);\r
+ edmaConfig->pingChRes[1].chNo = EDMA3_DRV_DMA_CHANNEL_ANY;\r
+ edmaConfig->pongChRes[1].chNo = EDMA3_DRV_DMA_CHANNEL_ANY;\r
+ }\r
+ else\r
+ {\r
+ System_printf("Wrong Instance ID passed\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Fille the edmaConfig structure with defaults */\r
+ for (i=0;i<TCP3D_DRV_MAX_CH_PER_PATH;i++)\r
+ {\r
+ /* PING channel defaults */\r
+ edmaConfig->pingChRes[i].tccNo = EDMA3_DRV_TCC_ANY;\r
+ edmaConfig->pingChRes[i].cbFunc = NULL;\r
+ edmaConfig->pingChRes[i].cbData = NULL;\r
+ \r
+ /* PONG channel defaults */\r
+ edmaConfig->pongChRes[i].tccNo = EDMA3_DRV_TCC_ANY;\r
+ edmaConfig->pongChRes[i].cbFunc = NULL;\r
+ edmaConfig->pongChRes[i].cbData = NULL;\r
+ }\r
+\r
+ /**\r
+ * Open all the Physical Channels and then register call backs \r
+ */ \r
+ for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++)\r
+ {\r
+ result = EDMA3_DRV_requestChannel (hEdma, \r
+ &edmaConfig->pingChRes[i].chNo, \r
+ &edmaConfig->pingChRes[i].tccNo,\r
+ (EDMA3_RM_EventQueue)0,\r
+ edmaConfig->pingChRes[i].cbFunc, \r
+ edmaConfig->pingChRes[i].cbData);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d open (result = %d)\n", edmaConfig->pingChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+\r
+ result = EDMA3_DRV_requestChannel (hEdma, \r
+ &edmaConfig->pongChRes[i].chNo, \r
+ &edmaConfig->pongChRes[i].tccNo,\r
+ (EDMA3_RM_EventQueue)0,\r
+ edmaConfig->pongChRes[i].cbFunc, \r
+ edmaConfig->pongChRes[i].cbData);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d open (result = %d)\n", edmaConfig->pongChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ } /* end of - for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++) */\r
+\r
+ /**\r
+ * Open all the Link Channels \r
+ */\r
+ for(i=0; i<TCP3D_DRV_MAX_LINK_CH; i++)\r
+ {\r
+ /* Load the local variable with default values */\r
+ edmaConfig->linkChRes[i].chNo = EDMA3_DRV_LINK_CHANNEL; \r
+\r
+ result = EDMA3_DRV_requestChannel (hEdma, \r
+ &edmaConfig->linkChRes[i].chNo, \r
+ &edmaConfig->linkChRes[i].tccNo,\r
+ (EDMA3_RM_EventQueue)0,\r
+ edmaConfig->linkChRes[i].cbFunc, \r
+ edmaConfig->linkChRes[i].cbData);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA link channel %d open (result = %d)\n", edmaConfig->linkChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ } /* end of - for(i=0; i<TCP3D_DRV_MAX_LINK_CH; i++) */\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+ /* This must be called after opening channels */\r
+ updateAllocatedTccsLoc(edmaConfig);\r
+#endif\r
+\r
+ if ( status != EDMA3_DRV_SOK )\r
+ System_exit(0);\r
+ \r
+} /* openEdmaChannels() */\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void closeEdmaChannels( EDMA3_DRV_Handle hEdma,\r
+ UInt8 perId,\r
+ EDMA_CONFIG *edmaConfig)\r
+{\r
+ EDMA3_DRV_Result result, status = EDMA3_DRV_SOK;\r
+ Int32 i;\r
+\r
+ /**\r
+ * Close all the Physical Channels and do unregister call backs before\r
+ */\r
+ for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++)\r
+ {\r
+ result = EDMA3_DRV_freeChannel (hEdma, edmaConfig->pingChRes[i].chNo);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d close (result = %d)\n", edmaConfig->pingChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ \r
+ result = EDMA3_DRV_freeChannel (hEdma, edmaConfig->pongChRes[i].chNo);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA channel %d close (result = %d)\n", edmaConfig->pongChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ } /* end of - for(i=0; i<TCP3D_DRV_MAX_CH_PER_PATH; i++) */\r
+\r
+ /**\r
+ * Close all the Link Channels \r
+ */\r
+ for(i=0; i<TCP3D_DRV_MAX_LINK_CH; i++)\r
+ {\r
+ result = EDMA3_DRV_freeChannel (hEdma, edmaConfig->linkChRes[i].chNo);\r
+#if DEBUG_PRINT\r
+ System_printf("\tEDMA link channel %d close (result = %d)\n", edmaConfig->linkChRes[i].chNo, result);\r
+#endif\r
+ status |= result;\r
+ }\r
+\r
+ if ( status != EDMA3_DRV_SOK )\r
+ System_exit(0);\r
+ \r
+} /* closeEdmaChannels() */\r
+\r
+/* End of File */\r
diff --git a/test/src/tcp3d_drv_types.h b/test/src/tcp3d_drv_types.h
--- /dev/null
@@ -0,0 +1,78 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#ifndef _TCP3D_DRV_TYPES_H_\r
+#define _TCP3D_DRV_TYPES_H_\r
+\r
+/* c99 types includes */\r
+#include <stdint.h>\r
+#include <stdlib.h>\r
+\r
+/** @addtogroup TCP3D_DRV_MACRO\r
+ @{ */\r
+\r
+/**\r
+ * @brief Key work used with the function definitions to represent them as \r
+ * static and inline type functions.\r
+ */\r
+#define INLINE static inline\r
+\r
+/**\r
+ * @brief Key work for restrict abstracted to support various compilers.\r
+ */\r
+#define RESTRICT restrict\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as INPUT only.\r
+ */\r
+#define IN\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as OUTPUT only.\r
+ */\r
+#define OUT\r
+\r
+/**\r
+ * @brief Key word used for indicating the argument as both INPUT and OUTPUT.\r
+ */\r
+#define INOUT\r
+\r
+/**\r
+@}\r
+*/\r
+\r
+#endif /* _TCP3D_DRV_TYPES_H_ */\r
diff --git a/test/src/tcp3d_inputConfigPrep.c b/test/src/tcp3d_inputConfigPrep.c
--- /dev/null
@@ -0,0 +1,314 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+#include "tcp3d_main.h"\r
+\r
+/* XDC includes */\r
+#include <xdc/std.h>\r
+#include <xdc/cfg/global.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+#include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
+\r
+#if TEST_PREPARE_ONLY_BETASTATE\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void prepareBlockSizeDepICParams(cbDataDesc *cbPtr)\r
+{\r
+ Int32 frameLenInd;\r
+ UInt8 numMAP;\r
+ \r
+ if ( ( cbPtr->mode == TEST_MODE_SINGLE ) ||\r
+ ( cbPtr->mode == TEST_MODE_SPLIT ) ) \r
+ numMAP = 1; /* for 3GPP numMAP=1 */\r
+ else\r
+ numMAP = 2; /* LTE or WIMAX */\r
+\r
+ /* IC0 - IC1 */\r
+ cbPtr->inCfgParams->blockLen = (cbPtr->blockSize-1);\r
+ TCP3D_codeBlkSeg ( cbPtr->blockSize,\r
+ numMAP,\r
+ &cbPtr->sw0LengthUsed,\r
+ &cbPtr->inCfgParams->sw0LenSel,\r
+ &cbPtr->inCfgParams->sw1Len,\r
+ &cbPtr->inCfgParams->sw2LenSel,\r
+ &cbPtr->inCfgParams->numsw0);\r
+\r
+ /* IC12 - IC14 */\r
+ if ( cbPtr->mode == TEST_MODE_LTE )\r
+ { /* LTE */\r
+ frameLenInd = LTE_interleaver_index(cbPtr->blockSize);\r
+ cbPtr->inCfgParams->itgParam[0] = (UInt16) ((2*TCP3_LteInterleaverTable[frameLenInd][2]) % TCP3_LteInterleaverTable[frameLenInd][0]);\r
+ cbPtr->inCfgParams->itgParam[1] = TCP3_LteInterleaverTable[frameLenInd][6];\r
+ cbPtr->inCfgParams->itgParam[2] = TCP3_LteInterleaverTable[frameLenInd][3];\r
+ cbPtr->inCfgParams->itgParam[3] = TCP3_LteInterleaverTable[frameLenInd][4];\r
+ cbPtr->inCfgParams->itgParam[4] = TCP3_LteInterleaverTable[frameLenInd][5];\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_WIMAX )\r
+ { /* WIMAX */\r
+ /* NOTE: Finding Index function is not implemented */\r
+ frameLenInd = WIMAX_interleaver_index(cbPtr->blockSize);\r
+ cbPtr->inCfgParams->itgParam[0] = 0;\r
+ cbPtr->inCfgParams->itgParam[1] = TCP3_WimaxInterleaverTable[frameLenInd][0]; \r
+ cbPtr->inCfgParams->itgParam[2] = TCP3_WimaxInterleaverTable[frameLenInd][1]; \r
+ cbPtr->inCfgParams->itgParam[3] = TCP3_WimaxInterleaverTable[frameLenInd][2]; \r
+ cbPtr->inCfgParams->itgParam[4] = TCP3_WimaxInterleaverTable[frameLenInd][3];\r
+ }\r
+\r
+ Tcp3d_prepBlockSizeDepConfigRegs ( cbPtr->mode,\r
+ &cbPtr->inCfg[0],\r
+ cbPtr->inCfgParams->numsw0,\r
+ cbPtr->inCfgParams->blockLen,\r
+ cbPtr->inCfgParams->sw0LenSel,\r
+ cbPtr->inCfgParams->sw2LenSel,\r
+ cbPtr->inCfgParams->sw1Len,\r
+ &cbPtr->inCfgParams->itgParam[0]);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void prepareBetaStateICParams(cbDataDesc *cbPtr, UInt8 mode)\r
+{\r
+ if ( mode != TEST_MODE_WIMAX )\r
+ {\r
+ Tcp3d_betaStates ( cbPtr->tailBits,\r
+ //cbPtr->tailMap1,\r
+ 1, /* change to -1 for sign change */\r
+ COMPUTE_KT(cbPtr->blockSize),\r
+ cbPtr->inCfgParams->betaMap0,\r
+ cbPtr->inCfgParams->betaMap1);\r
+\r
+ Tcp3d_prepBetaStateConfigRegs ( mode,\r
+ &cbPtr->inCfg[0],\r
+ &cbPtr->inCfgParams->betaMap0[0],\r
+ &cbPtr->inCfgParams->betaMap1[0]);\r
+ }\r
+}\r
+\r
+#else\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * This function is used for filling the changing values and calling the \r
+ * utility prepare functions for constructing all the 15 input config registers \r
+ */\r
+Void prepareIC(cbDataDesc *cbPtr, UInt32 *tempIC, UInt8 copyFlag)\r
+{\r
+ UInt8 numMAP;\r
+ Int32 frameLenInd;\r
+ Int i;\r
+ Tcp3d_InCfgParams *inCfgParams = cbPtr->inCfgParams;\r
+ \r
+ if ( ( cbPtr->mode == TEST_MODE_SINGLE ) ||\r
+ ( cbPtr->mode == TEST_MODE_SPLIT ) ) \r
+ numMAP = 1; /* for 3GPP numMAP=1 */\r
+ else\r
+ numMAP = 2; /* LTE or WIMAX */\r
+\r
+ /* IC0 - IC1 */\r
+ inCfgParams->blockLen = (cbPtr->blockSize-1);\r
+ TCP3D_codeBlkSeg ( cbPtr->blockSize,\r
+ numMAP,\r
+ &cbPtr->sw0LengthUsed,\r
+ &inCfgParams->sw0LenSel,\r
+ &inCfgParams->sw1Len,\r
+ &inCfgParams->sw2LenSel,\r
+ &inCfgParams->numsw0);\r
+\r
+ /* IC2 - IC3 */\r
+ /* Fixed values filled once during init */\r
+ /* IC4 - IC7 */\r
+ if ( mode != TEST_MODE_WIMAX )\r
+ {\r
+ /* compute the beta state values from tail bits */\r
+ Tcp3d_betaStates ( cbPtr->tailBits,\r
+ 1, /* change to -1 for sign change */\r
+ COMPUTE_KT(cbPtr->blockSize),\r
+ inCfgParams->betaMap0,\r
+ inCfgParams->betaMap1);\r
+ }\r
+ /* IC8 - IC11 */\r
+ /* Fixed values filled once during init */\r
+ /* IC12 - IC14 */\r
+ if ( cbPtr->mode == TEST_MODE_LTE )\r
+ { /* LTE */\r
+ frameLenInd = LTE_interleaver_index(cbPtr->blockSize);\r
+ inCfgParams->itgParam[0] = (UInt16) ((2*TCP3_LteInterleaverTable[frameLenInd][2]) % TCP3_LteInterleaverTable[frameLenInd][0]);\r
+ inCfgParams->itgParam[1] = TCP3_LteInterleaverTable[frameLenInd][6];\r
+ inCfgParams->itgParam[2] = TCP3_LteInterleaverTable[frameLenInd][3];\r
+ inCfgParams->itgParam[3] = TCP3_LteInterleaverTable[frameLenInd][4];\r
+ inCfgParams->itgParam[4] = TCP3_LteInterleaverTable[frameLenInd][5];\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_WIMAX )\r
+ { /* WIMAX */\r
+ /* NOTE: Finding Index function is not implemented */\r
+ frameLenInd = WIMAX_interleaver_index(cbPtr->blockSize);\r
+ inCfgParams->itgParam[0] = 0;\r
+ inCfgParams->itgParam[1] = TCP3_WimaxInterleaverTable[frameLenInd][0]; \r
+ inCfgParams->itgParam[2] = TCP3_WimaxInterleaverTable[frameLenInd][1]; \r
+ inCfgParams->itgParam[3] = TCP3_WimaxInterleaverTable[frameLenInd][2]; \r
+ inCfgParams->itgParam[4] = TCP3_WimaxInterleaverTable[frameLenInd][3];\r
+ }\r
+\r
+ /* All Input Config Registers are populated */\r
+ Tcp3d_prepConfigRegs ( cbPtr->mode,\r
+ inCfgParams,\r
+ cbPtr->inCfg,\r
+ tempIC,\r
+ copyFlag);\r
+}\r
+#endif\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * This function is used for filling the fixed values in the inCfgParams\r
+ * structure.\r
+ */\r
+Void fillICParams(Tcp3d_InCfgParams *inCfgParams, cbConfig *cbCfg)\r
+{\r
+ /* copy the config info into inCfgParams */\r
+ /* IC0 - IC1 */\r
+ /* Filled by the TCP3D_codeBlkSeg() function call */\r
+ /* IC2 */\r
+ inCfgParams->intLoadSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_SET;\r
+ inCfgParams->maxStar = cbCfg->maxst_en;\r
+ inCfgParams->outStsRead = cbCfg->out_flag_en;\r
+#ifdef _BIG_ENDIAN\r
+ inCfgParams->outOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_SWAP;\r
+#else\r
+ inCfgParams->outOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_NO_SWAP;\r
+#endif\r
+ inCfgParams->extScale = cbCfg->ext_scale_en;\r
+ inCfgParams->softOutRead = cbCfg->soft_out_flag_en;\r
+#ifdef _BIG_ENDIAN\r
+ inCfgParams->softOutOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_8_BIT;\r
+#else\r
+ inCfgParams->softOutOrderSel = CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_32_BIT;\r
+#endif\r
+ inCfgParams->softOutFrmtSel = cbCfg->soft_out_fmt;\r
+ inCfgParams->minIter = cbCfg->min_itr;\r
+ inCfgParams->maxIter = cbCfg->max_itr;\r
+ inCfgParams->snrVal = cbCfg->snr_val;\r
+ inCfgParams->snrReport = cbCfg->snr_rep;\r
+ inCfgParams->stopSel = cbCfg->stop_sel;\r
+ inCfgParams->crcIterSel = cbCfg->crc_iter_pass;\r
+ inCfgParams->crcPolySel = cbCfg->crc_sel;\r
+ /* IC3 */\r
+ inCfgParams->maxStarThres = cbCfg->maxst_thold;\r
+ inCfgParams->maxStarValue = cbCfg->maxst_value;\r
+ /* IC4 - IC7 */\r
+ /* Filling with defaults - updated based on tail bits */\r
+ memset(inCfgParams->betaMap0,0,8);\r
+ memset(inCfgParams->betaMap0,0,8);\r
+ /* IC8 - IC11 */\r
+ inCfgParams->extrScale[0] = cbCfg->ext_scale_0;\r
+ inCfgParams->extrScale[1] = cbCfg->ext_scale_1;\r
+ inCfgParams->extrScale[2] = cbCfg->ext_scale_2;\r
+ inCfgParams->extrScale[3] = cbCfg->ext_scale_3;\r
+ inCfgParams->extrScale[4] = cbCfg->ext_scale_4;\r
+ inCfgParams->extrScale[5] = cbCfg->ext_scale_5;\r
+ inCfgParams->extrScale[6] = cbCfg->ext_scale_6;\r
+ inCfgParams->extrScale[7] = cbCfg->ext_scale_7;\r
+ inCfgParams->extrScale[8] = cbCfg->ext_scale_8;\r
+ inCfgParams->extrScale[9] = cbCfg->ext_scale_9;\r
+ inCfgParams->extrScale[10] = cbCfg->ext_scale_10;\r
+ inCfgParams->extrScale[11] = cbCfg->ext_scale_11;\r
+ inCfgParams->extrScale[12] = cbCfg->ext_scale_12;\r
+ inCfgParams->extrScale[13] = cbCfg->ext_scale_13;\r
+ inCfgParams->extrScale[14] = cbCfg->ext_scale_14;\r
+ inCfgParams->extrScale[15] = cbCfg->ext_scale_15;\r
+ /* IC12 - IC14 */\r
+ /* Filling with defaults - updated based on block size */\r
+ inCfgParams->itgParam[0] = 0;\r
+ inCfgParams->itgParam[1] = 0;\r
+ inCfgParams->itgParam[2] = 0;\r
+ inCfgParams->itgParam[3] = 0;\r
+ inCfgParams->itgParam[4] = 0;\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This function compares the prepared beta state values with the \r
+ * reference test vector file. \r
+ *\r
+ * @param[in] inCfg\r
+ * Address of input configuration registers array.\r
+ *\r
+ * @retval\r
+ * Not Applicable.\r
+ */\r
+void checkBetaValues (uint32_t inCfg[])\r
+{\r
+#if TEST_BETA_VALUE_CHECK\r
+ Int idx, i;\r
+ Char fileName[300];\r
+ FILE *fid;\r
+ UInt32 inCfgRef[15];\r
+ UInt32 tmp;\r
+\r
+ /* Check Beta state values with reference */\r
+ sprintf(fileName, "%s\\reference\\block%d_inp_cfg.dat", testFolder[testCntr], sendBlockCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\t Reference Input configuration file open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<15;i++)\r
+ {\r
+ fscanf(fid, "%x", &tmp);\r
+ inCfgRef[i] = tmp;\r
+ }\r
+ fclose(fid);\r
+\r
+ for (idx = 4; idx < 8; ++idx)\r
+ {\r
+ if ( inCfgRef[idx] != inCfg[idx] )\r
+ {\r
+ System_printf("\t Block Count %d, INCFG mismatch %d\n", sendBlockCnt, idx);\r
+ }\r
+ }\r
+#else\r
+ return;\r
+#endif\r
+}\r
+\r
+/* end of file */\r
diff --git a/test/src/tcp3d_itg.c b/test/src/tcp3d_itg.c
--- /dev/null
+++ b/test/src/tcp3d_itg.c
@@ -0,0 +1,366 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+\r
+#include <xdc/std.h>\r
+\r
+/***************************************************************************/\r
+/* LTE Interelaver table with the coefficients P0,P1,P2 and G0 needed for */\r
+/* internal LTE coefficient generation. */\r
+/* K f1 f2 P0 P1 P2 G0 */\r
+/***************************************************************************/\r
+Int16 TCP3_LteInterleaverTable [220][7] = {\r
+ 40, 3, 10, 30, 20, 10, 13, // 0\r
+ 48, 7, 12, 36, 24, 12, 19, // 1\r
+ 56, 19, 42, 42, 28, 14, 5, // 2\r
+ 64, 7, 16, 48, 32, 16, 23, // 3\r
+ 72, 7, 18, 54, 36, 18, 25, // 4\r
+ 80, 11, 20, 60, 40, 20, 31, // 5\r
+ 88, 5, 22, 22, 44, 66, 27, // 6\r
+ 96, 11, 24, 72, 48, 24, 35, // 7\r
+ 104, 7, 26, 78, 52, 26, 33, // 8\r
+ 112, 41, 84, 28, 56, 84, 13, // 9\r
+ 120, 103, 90, 90, 60, 30, 73, // 10\r
+ 128, 15, 32, 96, 64, 32, 47, // 11\r
+ 136, 9, 34, 34, 68, 102, 43, // 12\r
+ 144, 17, 108, 36, 72, 108, 125, // 13\r
+ 152, 9, 38, 38, 76, 114, 47, // 14\r
+ 160, 21, 120, 40, 80, 120, 141, // 15\r
+ 168, 101, 84, 42, 84, 126, 17, // 16\r
+ 176, 21, 44, 44, 88, 132, 65, // 17\r
+ 184, 57, 46, 46, 92, 138, 103, // 18\r
+ 192, 23, 48, 144, 96, 48, 71, // 19\r
+ 200, 13, 50, 50, 100, 150, 63, // 20\r
+ 208, 27, 52, 156, 104, 52, 79, // 21\r
+ 216, 11, 36, 162, 108, 54, 47, // 22\r
+ 224, 27, 56, 168, 112, 56, 83, // 23\r
+ 232, 85, 58, 58, 116, 174, 143, // 24\r
+ 240, 29, 60, 60, 120, 180, 89, // 25\r
+ 248, 33, 62, 62, 124, 186, 95, // 26\r
+ 256, 15, 32, 192, 128, 64, 47, // 27\r
+ 264, 17, 198, 66, 132, 198, 215, // 28\r
+ 272, 33, 68, 68, 136, 204, 101, // 29\r
+ 280, 103, 210, 210, 140, 70, 33, // 30\r
+ 288, 19, 36, 216, 144, 72, 55, // 31\r
+ 296, 19, 74, 222, 148, 74, 93, // 32\r
+ 304, 37, 76, 76, 152, 228, 113, // 33\r
+ 312, 19, 78, 234, 156, 78, 97, // 34\r
+ 320, 21, 120, 80, 160, 240, 141, // 35\r
+ 328, 21, 82, 82, 164, 246, 103, // 36\r
+ 336, 115, 84, 252, 168, 84, 199, // 37\r
+ 344, 193, 86, 86, 172, 258, 279, // 38\r
+ 352, 21, 44, 88, 176, 264, 65, // 39\r
+ 360, 133, 90, 90, 180, 270, 223, // 40\r
+ 368, 81, 46, 92, 184, 276, 127, // 41\r
+ 376, 45, 94, 94, 188, 282, 139, // 42\r
+ 384, 23, 48, 288, 192, 96, 71, // 43\r
+ 392, 243, 98, 294, 196, 98, 341, // 44\r
+ 400, 151, 40, 300, 200, 100, 191, // 45\r
+ 408, 155, 102, 306, 204, 102, 257, // 46\r
+ 416, 25, 52, 104, 208, 312, 77, // 47\r
+ 424, 51, 106, 318, 212, 106, 157, // 48\r
+ 432, 47, 72, 324, 216, 108, 119, // 49\r
+ 440, 91, 110, 330, 220, 110, 201, // 50\r
+ 448, 29, 168, 112, 224, 336, 197, // 51\r
+ 456, 29, 114, 114, 228, 342, 143, // 52\r
+ 464, 247, 58, 348, 232, 116, 305, // 53\r
+ 472, 29, 118, 118, 236, 354, 147, // 54\r
+ 480, 89, 180, 120, 240, 360, 269, // 55\r
+ 488, 91, 122, 366, 244, 122, 213, // 56\r
+ 496, 157, 62, 124, 248, 372, 219, // 57\r
+ 504, 55, 84, 378, 252, 126, 139, // 58\r
+ 512, 31, 64, 384, 256, 128, 95, // 59\r
+ 528, 17, 66, 132, 264, 396, 83, // 60\r
+ 544, 35, 68, 408, 272, 136, 103, // 61\r
+ 560, 227, 420, 420, 280, 140, 87, // 62\r
+ 576, 65, 96, 144, 288, 432, 161, // 63\r
+ 592, 19, 74, 444, 296, 148, 93, // 64\r
+ 608, 37, 76, 152, 304, 456, 113, // 65\r
+ 624, 41, 234, 156, 312, 468, 275, // 66\r
+ 640, 39, 80, 480, 320, 160, 119, // 67\r
+ 656, 185, 82, 164, 328, 492, 267, // 68\r
+ 672, 43, 252, 504, 336, 168, 295, // 69\r
+ 688, 21, 86, 172, 344, 516, 107, // 70\r
+ 704, 155, 44, 528, 352, 176, 199, // 71\r
+ 720, 79, 120, 540, 360, 180, 199, // 72\r
+ 736, 139, 92, 552, 368, 184, 231, // 73\r
+ 752, 23, 94, 564, 376, 188, 117, // 74\r
+ 768, 217, 48, 192, 384, 576, 265, // 75\r
+ 784, 25, 98, 196, 392, 588, 123, // 76\r
+ 800, 17, 80, 200, 400, 600, 97, // 77\r
+ 816, 127, 102, 612, 408, 204, 229, // 78\r
+ 832, 25, 52, 208, 416, 624, 77, // 79\r
+ 848, 239, 106, 636, 424, 212, 345, // 80\r
+ 864, 17, 48, 216, 432, 648, 65, // 81\r
+ 880, 137, 110, 220, 440, 660, 247, // 82\r
+ 896, 215, 112, 672, 448, 224, 327, // 83\r
+ 912, 29, 114, 228, 456, 684, 143, // 84\r
+ 928, 15, 58, 696, 464, 232, 73, // 85\r
+ 944, 147, 118, 708, 472, 236, 265, // 86\r
+ 960, 29, 60, 240, 480, 720, 89, // 87\r
+ 976, 59, 122, 732, 488, 244, 181, // 88\r
+ 992, 65, 124, 248, 496, 744, 189, // 89\r
+ 1008, 55, 84, 756, 504, 252, 139, // 90\r
+ 1024, 31, 64, 768, 512, 256, 95, // 91\r
+ 1056, 17, 66, 264, 528, 792, 83, // 92\r
+ 1088, 171, 204, 816, 544, 272, 375, // 93\r
+ 1120, 67, 140, 840, 560, 280, 207, // 94\r
+ 1152, 35, 72, 864, 576, 288, 107, // 95\r
+ 1184, 19, 74, 888, 592, 296, 93, // 96\r
+ 1216, 39, 76, 912, 608, 304, 115, // 97\r
+ 1248, 19, 78, 936, 624, 312, 97, // 98\r
+ 1280, 199, 240, 960, 640, 320, 439, // 99\r
+ 1312, 21, 82, 328, 656, 984, 103, // 100\r
+ 1344, 211, 252, 1008, 672, 336, 463, // 101\r
+ 1376, 21, 86, 344, 688, 1032, 107, // 102\r
+ 1408, 43, 88, 1056, 704, 352, 131, // 103\r
+ 1440, 149, 60, 360, 720, 1080, 209, // 104\r
+ 1472, 45, 92, 368, 736, 1104, 137, // 105\r
+ 1504, 49, 846, 376, 752, 1128, 895, // 106\r
+ 1536, 71, 48, 1152, 768, 384, 119, // 107\r
+ 1568, 13, 28, 392, 784, 1176, 41, // 108\r
+ 1600, 17, 80, 400, 800, 1200, 97, // 109\r
+ 1632, 25, 102, 408, 816, 1224, 127, // 110\r
+ 1664, 183, 104, 1248, 832, 416, 287, // 111\r
+ 1696, 55, 954, 1272, 848, 424, 1009, // 112\r
+ 1728, 127, 96, 1296, 864, 432, 223, // 113\r
+ 1760, 27, 110, 1320, 880, 440, 137, // 114\r
+ 1792, 29, 112, 448, 896, 1344, 141, // 115\r
+ 1824, 29, 114, 456, 912, 1368, 143, // 116\r
+ 1856, 57, 116, 464, 928, 1392, 173, // 117\r
+ 1888, 45, 354, 472, 944, 1416, 399, // 118\r
+ 1920, 31, 120, 1440, 960, 480, 151, // 119\r
+ 1952, 59, 610, 1464, 976, 488, 669, // 120\r
+ 1984, 185, 124, 496, 992, 1488, 309, // 121\r
+ 2016, 113, 420, 504, 1008, 1512, 533, // 122\r
+ 2048, 31, 64, 1536, 1024, 512, 95, // 123\r
+ 2112, 17, 66, 528, 1056, 1584, 83, // 124\r
+ 2176, 171, 136, 1632, 1088, 544, 307, // 125\r
+ 2240, 209, 420, 560, 1120, 1680, 629, // 126\r
+ 2304, 253, 216, 576, 1152, 1728, 469, // 127\r
+ 2368, 367, 444, 1776, 1184, 592, 811, // 128\r
+ 2432, 265, 456, 608, 1216, 1824, 721, // 129\r
+ 2496, 181, 468, 624, 1248, 1872, 649, // 130\r
+ 2560, 39, 80, 1920, 1280, 640, 119, // 131\r
+ 2624, 27, 164, 1968, 1312, 656, 191, // 132\r
+ 2688, 127, 504, 2016, 1344, 672, 631, // 133\r
+ 2752, 143, 172, 2064, 1376, 688, 315, // 134\r
+ 2816, 43, 88, 2112, 1408, 704, 131, // 135\r
+ 2880, 29, 300, 720, 1440, 2160, 329, // 136\r
+ 2944, 45, 92, 736, 1472, 2208, 137, // 137\r
+ 3008, 157, 188, 752, 1504, 2256, 345, // 138\r
+ 3072, 47, 96, 2304, 1536, 768, 143, // 139\r
+ 3136, 13, 28, 784, 1568, 2352, 41, // 140\r
+ 3200, 111, 240, 2400, 1600, 800, 351, // 141\r
+ 3264, 443, 204, 2448, 1632, 816, 647, // 142\r
+ 3328, 51, 104, 2496, 1664, 832, 155, // 143\r
+ 3392, 51, 212, 2544, 1696, 848, 263, // 144\r
+ 3456, 451, 192, 2592, 1728, 864, 643, // 145\r
+ 3520, 257, 220, 880, 1760, 2640, 477, // 146\r
+ 3584, 57, 336, 896, 1792, 2688, 393, // 147\r
+ 3648, 313, 228, 912, 1824, 2736, 541, // 148\r
+ 3712, 271, 232, 2784, 1856, 928, 503, // 149\r
+ 3776, 179, 236, 2832, 1888, 944, 415, // 150\r
+ 3840, 331, 120, 2880, 1920, 960, 451, // 151\r
+ 3904, 363, 244, 2928, 1952, 976, 607, // 152\r
+ 3968, 375, 248, 2976, 1984, 992, 623, // 153\r
+ 4032, 127, 168, 3024, 2016, 1008, 295, // 154\r
+ 4096, 31, 64, 3072, 2048, 1024, 95, // 155\r
+ 4160, 33, 130, 1040, 2080, 3120, 163, // 156\r
+ 4224, 43, 264, 3168, 2112, 1056, 307, // 157\r
+ 4288, 33, 134, 1072, 2144, 3216, 167, // 158\r
+ 4352, 477, 408, 1088, 2176, 3264, 885, // 159\r
+ 4416, 35, 138, 3312, 2208, 1104, 173, // 160\r
+ 4480, 233, 280, 1120, 2240, 3360, 513, // 161\r
+ 4544, 357, 142, 1136, 2272, 3408, 499, // 162\r
+ 4608, 337, 480, 1152, 2304, 3456, 817, // 163\r
+ 4672, 37, 146, 1168, 2336, 3504, 183, // 164\r
+ 4736, 71, 444, 3552, 2368, 1184, 515, // 165\r
+ 4800, 71, 120, 3600, 2400, 1200, 191, // 166\r
+ 4864, 37, 152, 1216, 2432, 3648, 189, // 167\r
+ 4928, 39, 462, 3696, 2464, 1232, 501, // 168\r
+ 4992, 127, 234, 3744, 2496, 1248, 361, // 169\r
+ 5056, 39, 158, 3792, 2528, 1264, 197, // 170\r
+ 5120, 39, 80, 3840, 2560, 1280, 119, // 171\r
+ 5184, 31, 96, 3888, 2592, 1296, 127, // 172\r
+ 5248, 113, 902, 1312, 2624, 3936, 1015, // 173\r
+ 5312, 41, 166, 1328, 2656, 3984, 207, // 174\r
+ 5376, 251, 336, 4032, 2688, 1344, 587, // 175\r
+ 5440, 43, 170, 4080, 2720, 1360, 213, // 176\r
+ 5504, 21, 86, 1376, 2752, 4128, 107, // 177\r
+ 5568, 43, 174, 4176, 2784, 1392, 217, // 178\r
+ 5632, 45, 176, 1408, 2816, 4224, 221, // 179\r
+ 5696, 45, 178, 1424, 2848, 4272, 223, // 180\r
+ 5760, 161, 120, 1440, 2880, 4320, 281, // 181\r
+ 5824, 89, 182, 1456, 2912, 4368, 271, // 182\r
+ 5888, 323, 184, 4416, 2944, 1472, 507, // 183\r
+ 5952, 47, 186, 4464, 2976, 1488, 233, // 184\r
+ 6016, 23, 94, 4512, 3008, 1504, 117, // 185\r
+ 6080, 47, 190, 4560, 3040, 1520, 237, // 186\r
+ 6144, 263, 480, 4608, 3072, 1536, 743, // 187\r
+\r
+/*********FOLLOWING PART IS EXTENTION TO 8192 with step 64 TO TEST TCP3 *************/\r
+ 6208, 3, 194, 4656, 3104, 1552, 197, // 188\r
+ 6272, 3, 14, 4704, 3136, 1568, 17, // 189\r
+ 6336, 5, 66, 1584, 3168, 4752, 71, // 190\r
+ 6400, 3, 10, 4800, 3200, 1600, 13, // 191\r
+ 6464, 3, 202, 4848, 3232, 1616, 205, // 192\r
+ 6528, 5, 102, 1632, 3264, 4896, 107, // 193\r
+ 6592, 3, 206, 4944, 3296, 1648, 209, // 194\r
+ 6656, 3, 26, 4992, 3328, 1664, 29, // 195\r
+ 6720, 11, 210, 5040, 3360, 1680, 221, // 196\r
+ 6784, 3, 106, 5088, 3392, 1696, 109, // 197\r
+ 6848, 3, 214, 5136, 3424, 1712, 217, // 198\r
+ 6912, 5, 6, 1728, 3456, 5184, 11, // 199\r
+ 6976, 3, 218, 5232, 3488, 1744, 221, // 200\r
+ 7040, 3, 110, 5280, 3520, 1760, 113, // 201\r
+ 7104, 5, 222, 1776, 3552, 5328, 227, // 202\r
+ 7168, 3, 14, 5376, 3584, 1792, 17, // 203\r
+ 7232, 3, 226, 5424, 3616, 1808, 229, // 204\r
+ 7296, 5, 114, 1824, 3648, 5472, 119, // 205\r
+ 7360, 3, 230, 5520, 3680, 1840, 233, // 206\r
+ 7424, 3, 58, 5568, 3712, 1856, 61, // 207\r
+ 7488, 5, 78, 1872, 3744, 5616, 83, // 208\r
+ 7552, 3, 118, 5664, 3776, 1888, 121, // 209\r
+ 7616, 3, 238, 5712, 3808, 1904, 241, // 210\r
+ 7680, 7, 30, 5760, 3840, 1920, 37, // 211\r
+ 7744, 3, 22, 5808, 3872, 1936, 25, // 212\r
+ 7808, 3, 122, 5856, 3904, 1952, 125, // 213\r
+ 7872, 5, 246, 1968, 3936, 5904, 251, // 214\r
+ 7936, 3, 62, 5952, 3968, 1984, 65, // 215\r
+ 8000, 3, 10, 6000, 4000, 2000, 13, // 216\r
+ 8064, 5, 42, 2016, 4032, 6048, 47, // 217\r
+ 8128, 3, 254, 6096, 4064, 2032, 257, // 218\r
+ 8192, 3, 2, 6144, 4096, 2048, 5, // 219\r
+};\r
+\r
+Int16 TCP3_WimaxInterleaverTable[17][4] ={\r
+ 20, 18, 11, 4, // 0\r
+ 8, 12, 23, 34, // 1\r
+ 4, 14, 27, 40, // 2\r
+ 44, 54, 23, 4, // 3\r
+ 28, 8, 39, 46, // 4\r
+ 44, 12, 79, 90, // 5\r
+ 52, 14, 27, 40, // 6\r
+ 68, 20, 107, 126, // 7\r
+ 44, 12, 23, 34, // 8\r
+ 44, 12, 71, 82, // 9\r
+ 52, 14, 27, 40, // 10\r
+ 52, 14, 87, 100, // 11\r
+ 212, 356, 119, 402, // 12\r
+ 172, 588, 387, 474, // 13\r
+ 172, 44, 447, 1390, // 14\r
+ 124, 1000, 87, 1070, // 15\r
+ 212, 1320, 131, 1362 // 16\r
+};\r
+\r
+/*WiMAX frame lengths*/\r
+Int32 WIMAX_FRAME_LENGTHS[17] = {\r
+ 48, /* 0: 6 Bytes */\r
+ 72, /* 1: 9 Bytes */\r
+ 96, /* 2: 12 Bytes */\r
+ 144, /* 3: 18 Bytes */\r
+ 192, /* 4: 24 Bytes */\r
+ 216, /* 5: 27 Bytes */\r
+ 240, /* 6: 30 Bytes */\r
+ 288, /* 7: 36 Bytes */\r
+ 360, /* 8: 45 Bytes */\r
+ 384, /* 9: 48 Bytes */\r
+ 432, /* 10: 54 Bytes */\r
+ 480, /* 11: 60 Bytes */\r
+ 960, /* 12: 120 Bytes */\r
+ 1920, /* 13: 240 Bytes */\r
+ 2880, /* 14: 360 Bytes */\r
+ 3840, /* 15: 480 Bytes */\r
+ 4800 /* 16: 600 Bytes */\r
+};\r
+\r
+/*\r
+ * Calculates the LTE interleaver table index for given block length K\r
+ */\r
+Int32 LTE_interleaver_index(Int32 K)\r
+{\r
+ Int32 ind = K;\r
+\r
+ if ( K <= 512u )\r
+ {\r
+ ind = ( K >> 3 ) - 5u;\r
+ }\r
+ else if ( K <= 1024u )\r
+ {\r
+ ind = ( K >> 4 ) + 27u;\r
+ }\r
+ else if ( K <= 2048u )\r
+ {\r
+ ind = ( K >> 5 ) + 59u;\r
+ }\r
+ else if ( K <= 8192u )\r
+ {\r
+ ind = ( K >> 6 ) + 91u;\r
+ }\r
+\r
+ if ( ind == K )\r
+ {\r
+ printf("%s\n"," Error: Unsupported block length ");\r
+ exit(0);\r
+ }\r
+\r
+ return (ind);\r
+}\r
+\r
+/*\r
+ * Calculates the WIMAX interleaver table index for given block length K\r
+ */\r
+Int32 WIMAX_interleaver_index(Int32 K)\r
+{\r
+ Int32 ind = K, i;\r
+\r
+ for (i = 0; i < 17; ++i)\r
+ {\r
+ if ( K == WIMAX_FRAME_LENGTHS[i] )\r
+ {\r
+ ind = i;\r
+ }\r
+ }\r
+\r
+ if ( ind == K )\r
+ {\r
+ printf("%s\n"," Error: Unsupported block length ");\r
+ exit(0);\r
+ }\r
+\r
+ return (ind);\r
+}\r
diff --git a/test/src/tcp3d_main.c b/test/src/tcp3d_main.c
--- /dev/null
+++ b/test/src/tcp3d_main.c
@@ -0,0 +1,1429 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <stdio.h>\r
+#include <time.h>\r
+#include <string.h>\r
+\r
+/* XDC includes */\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+/* BIOS includes */\r
+#include <ti/sysbios/knl/Task.h>\r
+#include <ti/sysbios/BIOS.h>\r
+#include <ti/sysbios/knl/Semaphore.h>\r
+#include <ti/sysbios/family/c64p/Hwi.h>\r
+#include <ti/sysbios/family/c64p/EventCombiner.h>\r
+#include <ti/sysbios/family/c66/tci66xx/CpIntc.h>\r
+\r
+/* IPC includes */ \r
+#include <ti/ipc/GateMP.h>\r
+#include <ti/ipc/Ipc.h>\r
+#include <ti/ipc/ListMP.h>\r
+#include <ti/ipc/SharedRegion.h>\r
+#include <ti/ipc/MultiProc.h>\r
+\r
+/* CSL includes */\r
+#include <ti/csl/soc.h>\r
+#include <ti/csl/csl_chipAux.h>\r
+#include <ti/csl/cslr_tpcc.h>\r
+#include <ti/csl/cslr_tcp3d_cfg.h>\r
+#include <ti/csl/cslr_tcp3d_dma.h>\r
+#include <ti/csl/cslr_tcp3d_dma_offsets.h>\r
+#include <ti/csl/csl_tsc.h>\r
+#include <ti/csl/csl_cacheAux.h>\r
+#include <ti/csl/csl_xmcAux.h>\r
+\r
+#include "sample.h"\r
+#include "tcp3d_drv_sample.h"\r
+#include "tcp3d_main.h"\r
+\r
+/**********************************************************************\r
+ ************************** Test Compile Flags ************************\r
+ **********************************************************************/\r
+#define DEBUG_VARS 0 // add debug variables at different places in the code \r
+\r
+#define DEBUG_PRINT 0\r
+\r
+#define MY_LOG_PRINT0(x) {\\r
+ if(DEBUG_PRINT)\\r
+ {\\r
+ System_printf(#x"\n");\\r
+ }\\r
+}\r
+\r
+#define MY_LOG_PRINT1(x, val) {\\r
+ if(DEBUG_PRINT)\\r
+ {\\r
+ System_printf(#x" %d\n", val);\\r
+ }\\r
+}\r
+\r
+#define MY_LOG_PRINT2(x, val1, y, val2) {\\r
+ if(DEBUG_PRINT)\\r
+ {\\r
+ System_printf(#x" %d, "#y" %d\n", val1, val2);\\r
+ }\\r
+}\r
+\r
+/**\r
+ * This is used for plotting timing diagram using matlab by collecting the data\r
+ * points from running the code.\r
+ * \r
+ * Requirements:\r
+ * 1) it is required to enable the logging for TCP3D in the Simulator\r
+ * Configuration file. The decoding and reset times are collected from the\r
+ * log file (c:\\Tcp3dDebug.log) generated from running the simulator.\r
+ */\r
+#define TEST_PROFILE_LOG 1 \r
+\r
+/**********************************************************************\r
+ ************************** Test Definitions **************************\r
+ **********************************************************************/\r
+#define START_CMD_PERIOD 1\r
+\r
+#define SIMULATOR_SUPPORT 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Variables ****************************\r
+ **********************************************************************/\r
+/* Code Block Test Variables */\r
+#pragma DATA_SECTION(codeBlockSet, ".main_mem")\r
+cbTestDesc codeBlockSet;\r
+\r
+Char *strMode[4] = {"3GPP(0)","LTE(1)","WIMAX(2)","WCDMA Split(3)"};\r
+Char *strDBuf[2] = {"Disable(0)","Enable(1)"};\r
+Char *strInst[2] = {"TCP3D_A(0)","TCP3D_B(1)"};\r
+\r
+UInt32 keepTestVectMem = 0;\r
+UInt32 firstTime = 1;\r
+UInt32 testMaxCodeBlocks;\r
+UInt32 dspCoreID;\r
+\r
+/* File Operation Variables */\r
+UInt32 testCntr = 0;\r
+UInt32 testErrCntr = 0;\r
+UInt32 totErrCnt;\r
+#ifdef USE_PDK_INSTALL_BASE\r
+Char testvectFolderBase[] = "C:\\ti\\csl_lld_keystone2_1_0_0_2\\packages\\ti\\drv\\tcp3d\\test\\gen_test_vectors\\";\r
+#else\r
+Char testvectFolderBase[] = "..\\..\\gen_test_vectors\\";\r
+#endif\r
+Char folderName[1000] = "";\r
+Char *testFolder[] = {\r
+ "test0_lte",\r
+ "test0_wimax",\r
+ "test0_wcdma",\r
+ "WIMAX",\r
+ "test1_lte",\r
+ "test2_lte",\r
+ "WCDMA",\r
+ "test4_lte",\r
+ "test3_lte",\r
+ //"test1_wimax", // giving error on simulator, TODO: debug later\r
+ "test3_wimax",\r
+ "test2_wimax",\r
+ "test2_wcdma",\r
+ "LTE",\r
+ "test3_wcdma",\r
+ "test1_wcdma",\r
+ "sim_config\\WIMAX",\r
+ "sim_config\\LTE",\r
+ "sim_config\\WCDMA",\r
+ // "LTE_200",\r
+ // "WCDMA_200",\r
+ // "WIMAX_200",\r
+};\r
+/* Number of test folders computed. Alternately can be set manually as length of *testFolder[] array */\r
+UInt32 numTests = sizeof(testFolder)/sizeof(*testFolder);\r
+\r
+/* Throughput calculation variables */\r
+clock_t total_clock_end, total_clock_start;\r
+UInt32 test_cycles;\r
+UInt32 TotalBitsDecoded;\r
+Float ThroughPut;\r
+\r
+/* BIOS variables */\r
+Semaphore_Handle semRcvDone, semSendBlock, semSendWait, semRcvStart;\r
+IHeap_Handle dataHeap = NULL;\r
+IHeap_Handle drvHeap = NULL;\r
+\r
+/* Driver configuration variables */\r
+Tcp3d_Result tcp3dResultSend = TCP3D_DRV_NO_ERR;\r
+Tcp3d_Instance *tcp3dDrvInst[2] = {NULL, NULL};\r
+Tcp3d_Instance *inst;\r
+Tcp3d_Ctrl drvCtrl;\r
+Tcp3d_Sts drvStatus;\r
+\r
+Int32 sendBlockCnt;\r
+Int32 rcvBlockCnt;\r
+#if TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT\r
+UInt32 tempICRegs[15]; /* to store 15 registers */\r
+#endif\r
+\r
+/**\r
+ * EDMA3 LLD & TCP3D Driver Init/Deinit related variables\r
+ */\r
+EDMA3_DRV_Handle hEdma;\r
+UInt32 tpccNum;\r
+UInt32 tpccRegionUsed;\r
+EDMA_CONFIG edmaConfig[2];\r
+UInt8 instNum;\r
+/* Flags used in ISR functions */\r
+UInt32 pingComplete, pongComplete;\r
+UInt32 pauseIntr = 0, l2pIntr = 0;\r
+UInt32 soldoutCntr = 0;\r
+UInt32 tcp3dEventCntr = 0;\r
+UInt32 tpccEvtCntr = 0;\r
+UInt32 rcvStartFlag = 0;\r
+UInt32 pauseIntFlag = 0;\r
+UInt32 afterIntrSoldout = 0, afterIntrPause = 0;\r
+UInt32 pendPauseCntr = 0;\r
+\r
+/**\r
+ * PROFILE LOG related variables\r
+ */\r
+#if TEST_PROFILE_LOG\r
+#include "tcp3d_profile.h"\r
+volatile PROFILE_TAG profileTag[PROF_TAG_LEN];\r
+volatile UInt32 profileTagInd = 0;\r
+#else // TEST_PROFILE_LOG\r
+/* Dummy macros */\r
+#define PROF_LOG_COMPLETE() {}\r
+#define PROF_LOG_INIT() {}\r
+#define LOG_TIME(TASK, TAG, TIME) {}\r
+#define LOG_TIME_ISR(TASK, TAG, TIME) {}\r
+#endif // TEST_PROFILE_LOG\r
+\r
+#if DEBUG_VARS\r
+#include <ti/csl/src/intc/csl_intc.h>\r
+#include <ti/csl/csl_cpIntcAux.h>\r
+\r
+/* To track the RCV task posting */\r
+volatile Int semCnt;\r
+\r
+/* Register pointers */\r
+CSL_TpccRegs *tpcc2Regs = (CSL_TpccRegs *) CSL_EDMA2CC_REGS;\r
+CSL_CPINTC_RegsOvly cpintc0Regs = (CSL_CPINTC_RegsOvly) CSL_CP_INTC_0_REGS;\r
+CSL_IntcRegsOvly gemIntcRegs = (CSL_IntcRegsOvly)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS;\r
+#endif\r
+\r
+/**********************************************************************\r
+ *********************** Test Local Functions *************************\r
+ **********************************************************************/\r
+/**\r
+ * Task Functions\r
+ */\r
+Void testerTaskFunc(Void);\r
+Void tskHeartBeat(Void);\r
+Void sndBlockTaskFunc(Void);\r
+Void rcvBlockTaskFunc(Void);\r
+\r
+/**\r
+ * (De)Init Functions\r
+ */\r
+Void allInit(Void);\r
+Void allDeInit(Void);\r
+Void getMemoryStats(Void);\r
+\r
+/**\r
+ * EDMA Channel ISR functions\r
+ */\r
+Void revt0ChCallback(Void);\r
+Void revt1ChCallback(Void);\r
+\r
+/**\r
+ * Cache and other IP functions\r
+ */\r
+static Int32 enable_tcp3d (void);\r
+void tcp3dBeginMemAccess (void *ptr, uint32_t size);\r
+void tcp3dEndMemAccess (void *ptr, uint32_t size);\r
+\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+extern Void CpIntc_dispatchLoc(UInt hostInt);\r
+#endif\r
+\r
+Void soldOutAction(Void)\r
+{\r
+ /* clear flag */\r
+ pauseIntFlag = 0;\r
+\r
+#if SOLDOUT_USE_L2P_INTERRUPT\r
+ /**\r
+ * 1) enable L2P channel interrupt to get notified to try enqueue again\r
+ * 2) also enable REVT channel interrupt for PAUSE detection\r
+ */\r
+ /* Set interrupt flag on PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* Call TCP3D driver control to set interrupt on L2P channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+#else\r
+ /* keep trying until successful */\r
+ Semaphore_post(semSendBlock);\r
+#endif\r
+}\r
+\r
+Void soldOutActionClear (Void)\r
+{\r
+#if SOLDOUT_USE_L2P_INTERRUPT\r
+ if ( pauseIntFlag )\r
+ {\r
+ afterIntrSoldout++;\r
+ \r
+ /**\r
+ * 1) diable L2P channel interrupt to get notified to try enqueue again\r
+ * 2) also disable REVT channel interrupt for PAUSE detection\r
+ */\r
+ /* Call TCP3D driver control to set interrupt on L2P channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* Set interrupt flag on PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+ }\r
+#else\r
+ /* nothing to be done */\r
+#endif\r
+}\r
+\r
+/*******************************************************************************\r
+ TESTING METHOD 1: Copy test vector folder to workspace\r
+--------------------------------------------------------------------------------\r
+1. In this method, ensure that the entire \93test\gen_test_vectors\94 folder is\r
+ placed two levels higher than the unit test project .out file location.\r
+ For example, if the unit test project out file is located under\r
+ \93C:\MyPDKWorkspace\tcp3dTestProject\Debug\94 folder, then please copy\r
+ the folder \93test\gen_test_vectors\94 from the PDK package to \93C:\MyPDKWorkspace\94.\r
+2. Next, execute the batch script \93gen_test_vectors\genTestVect.bat\94 from the\r
+ copied location to generate all the necessary test vector files.\r
+3. Ensure that the compile flag USE_PDK_INSTALL_BASE is undefined in\r
+ the project \93tcp3dTestProject\94 before building.\r
+4. Build the project.\r
+5. Launch the debug session to load and run the out file.\r
+\r
+ TESTING METHOD 2: Use the test vector folder from the PDK installation\r
+--------------------------------------------------------------------------------\r
+1. In this method, ensure that the compile flag USE_PDK_INSTALL_BASE is\r
+ defined in the project \93tcp3dTestProject\94.\r
+2. Also, ensure the variable \93testvectFolderBase\94 defined in the tcp3d_main.c\r
+ file is set to \93<PDK_INSTALL_DIR>\packages\ti\drv\tcp3d\test\gen_test_vectors\94\r
+ when the USE_PDK_INSTALL_BASE flag is defined.\r
+3. Next, execute the batch script \93gen_test_vectors\genTestVect.bat\94 from the\r
+ PDK installation location to generate all the necessary test vector files.\r
+4. Build the project.\r
+5. Launch the debug session to load and run the out file.\r
+\r
+By default, test project is configured to test using "METHOD 2"\r
+******************************************************************************/\r
+/*\r
+ * main()\r
+ */\r
+Void main(Void)\r
+{\r
+ Task_Params taskParams;\r
+\r
+ /* Initialize the heap in shared memory. Using IPC module to do that */ \r
+ Ipc_start();\r
+\r
+ /* Power on TCP3D peripheral before using it */\r
+ if (enable_tcp3d () < 0)\r
+ {\r
+ System_printf ("Error: TCP3D PSC Initialization Failed\n");\r
+ return;\r
+ }\r
+ \r
+ /* Enable time stamp counter */\r
+ CSL_tscEnable();\r
+\r
+ /* Enable L1D cache. Disable L2 caching for our tests. */\r
+ CACHE_setL1DSize (CACHE_L1_MAXIM3); /* CACHE_L1_0KCACHE */\r
+ CACHE_setL2Size (CACHE_0KCACHE);\r
+\r
+ /* Initialize the default Task parameters */\r
+ Task_Params_init(&taskParams);\r
+\r
+ /* Crete the tester Task using default Task parameters */\r
+ Task_create((Task_FuncPtr)testerTaskFunc, &taskParams, NULL);\r
+\r
+ BIOS_start();\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void testerTaskFunc(Void)\r
+{\r
+ Int i;\r
+ Task_Params taskParams;\r
+ Semaphore_Params semParams;\r
+\r
+ /* Set the one-time global test variables */\r
+ testMaxCodeBlocks = 8; /* max possible used in init */\r
+ dspCoreID = CSL_chipReadDNUM();\r
+\r
+ /******** Select the TCP3D Instance Number **********/\r
+#if 0\r
+ if ( dspCoreID == 0 ) // Core 0\r
+ instNum = CSL_TCP3D_A;\r
+ else\r
+ instNum = CSL_TCP3D_B;\r
+#else\r
+ instNum = getTcp3dInstNum(dspCoreID);\r
+#endif\r
+ /******** Clear TCP3D log file **********/\r
+ PROF_LOG_INIT(instNum);\r
+\r
+ /* Initialize the default Task parameters */\r
+ Task_Params_init(&taskParams);\r
+\r
+ /* Initialize the default Semaphore parameters */\r
+ Semaphore_Params_init(&semParams);\r
+\r
+ /* Crete the Binary Semaphore */\r
+ semParams.mode = Semaphore_Mode_BINARY;\r
+ semRcvDone = Semaphore_create(0, &semParams, NULL);\r
+\r
+ /* Get the Heap handles - used when ever memory allocations are needed */\r
+ //dataHeap = HeapMem_Handle_upCast(tcp3dDataHeap);\r
+ dataHeap = (IHeap_Handle) SharedRegion_getHeap(0);\r
+ drvHeap = HeapMem_Handle_upCast(tcp3dDrvHeap);\r
+\r
+ while( testCntr < numTests )\r
+ {\r
+ LOG_TIME(0, PROF_START, TSCL); \r
+ LOG_TIME(0, PROF_STOP, TSCL); \r
+\r
+ /**\r
+ * Create the Binary semaphores each time using the parameters set\r
+ * outside the tester while loop.\r
+ * \r
+ * It was observed that at times the receive semaphore count was\r
+ * non-zero after the first run and receive task was getting triggered\r
+ * before posting from the ISR callback. So, the semaphores are created\r
+ * for each test to work-around with the problem. \r
+ */\r
+ semSendBlock = Semaphore_create(0, &semParams, NULL);\r
+ semSendWait = Semaphore_create(0, &semParams, NULL);\r
+ semRcvStart = Semaphore_create(0, &semParams, NULL);\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semRcvStart);\r
+#endif\r
+\r
+ /**\r
+ * Create the send and receive tasks for each test using the default\r
+ * tak parameters.\r
+ * \r
+ * NOTE: No need to do the Task_delete() as these tasks have exits.\r
+ */\r
+ Task_create((Task_FuncPtr)sndBlockTaskFunc, &taskParams, NULL);\r
+ Task_create((Task_FuncPtr)rcvBlockTaskFunc, &taskParams, NULL);\r
+\r
+ System_printf("\n******************************************************************\n");\r
+ System_printf("\n----- TEST #%d STARTED ------\n", testCntr);\r
+\r
+ /**\r
+ * Prepare data for Code Blocks processing (reading test vector files).\r
+ * Allocates Memory as needed from the tcp3dDataHeap\r
+ */\r
+ if ( firstTime )\r
+ {\r
+ System_printf("\nReading test vector files started (including memory allocation)...\n");\r
+ strcpy(folderName, testvectFolderBase);\r
+ strcat(folderName, testFolder[testCntr]);\r
+ getTestSetCB(dataHeap, &codeBlockSet, folderName);\r
+ System_printf("Reading test vector files complete\n");\r
+#if DEBUG_PRINT\r
+ System_printf("\tPrepared %d code blocks in %s mode\n", codeBlockSet.maxNumCB, strMode[codeBlockSet.mode]);\r
+#endif\r
+ firstTime = 0;\r
+ }\r
+ else\r
+ {\r
+ System_printf("\nUsing the test vectors read before\n");\r
+ }\r
+\r
+ System_printf("\n----- TEST INITIALIZATION STARTED -----\n\n");\r
+ allInit();\r
+ getMemoryStats(); /* Heap Stats */\r
+ System_printf("\n----- TEST INITIALIZATION COMPLETE -----\n\n");\r
+\r
+#if TEST_PREPARE_ONLY_BETASTATE\r
+ for (i = 0; i < codeBlockSet.maxNumCB ;i++)\r
+ {\r
+ /* Prepare fixed IC registers using the inCfgParams of first block*/\r
+ Tcp3d_prepFixedConfigRegs(codeBlockSet.cbData[i]->inCfgParams, codeBlockSet.cbData[i]->inCfg);\r
+\r
+ /* Prepare block size dependent params */\r
+ prepareBlockSizeDepICParams(codeBlockSet.cbData[i]);\r
+ }\r
+#elif TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT\r
+ /* Prepare fixed IC registers using the inCfgParams of first block*/\r
+ Tcp3d_prepFixedConfigRegs(codeBlockSet.cbData[0]->inCfgParams, tempICRegs);\r
+#endif\r
+\r
+ /* Start the Send task first */\r
+ Semaphore_post(semSendBlock);\r
+\r
+ /* Wait for the Receive task to complete */\r
+ Semaphore_pend(semRcvDone, BIOS_WAIT_FOREVER);\r
+\r
+ /**\r
+ * Test Profile Calculations\r
+ * \r
+ * (Total Bits)\r
+ * Throughput (Mbps) = -----------------------------\r
+ * (Total Time)*(10^-9)*(10^6)\r
+ * \r
+ */\r
+ TotalBitsDecoded = 0;\r
+ for (i = 0; i < codeBlockSet.maxNumCB; ++i)\r
+ {\r
+ TotalBitsDecoded += codeBlockSet.cbData[i]->blockSize;\r
+ }\r
+\r
+ test_cycles = (total_clock_end - total_clock_start);\r
+ ThroughPut = TotalBitsDecoded*1.0;\r
+ ThroughPut = (ThroughPut/test_cycles)*1000;\r
+\r
+ /******** Free code blocks ********/\r
+ if ( keepTestVectMem )\r
+ {\r
+ System_printf("\nNo freeing - Using the test vectors read before\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("\nTest vectors memory freeing started...\n");\r
+ freeTestSetCB(dataHeap, &codeBlockSet);\r
+ System_printf("Test vectors memory freeing complete\n");\r
+#if DEBUG_PRINT\r
+ System_printf("\tFreed memory allocated for %d code blocks in %s mode\n", codeBlockSet.maxNumCB, strMode[codeBlockSet.mode]);\r
+#endif\r
+ firstTime = 1;\r
+ }\r
+\r
+ System_printf("\n----- TEST DE-INITIALIZATION STARTED -----\n\n");\r
+ allDeInit();\r
+ getMemoryStats(); /* Heap Stats */\r
+ System_printf("\n----- TEST DE-INITIALIZATION COMPLETE -----\n");\r
+ \r
+ if ( totErrCnt > 0 )\r
+ {\r
+ System_printf("\n----- TEST #%d FAILED -----\n", testCntr);\r
+ testErrCntr++;\r
+ }\r
+ else\r
+ {\r
+ System_printf("\n----- TEST #%d PASSED -----\n", testCntr);\r
+ }\r
+ System_printf("\n+++++++++++++++++++++++ TEST #%d SUMMARY +++++++++++++++++++++++++\n", testCntr);\r
+ System_printf("TCP3D Peripheral Configuration\n");\r
+ System_printf(" Instance : %s\n", strInst[instNum]);\r
+ System_printf(" Mode Tested : %s\n", strMode[codeBlockSet.mode]);\r
+ System_printf(" Double Buffer Mode : %s\n", strDBuf[codeBlockSet.doubleBuffer]);\r
+ System_printf("Max code blocks (Input Capacity) : %d\n", testMaxCodeBlocks);\r
+ System_printf("Code blocks sent for decoding : %d\n", codeBlockSet.maxNumCB);\r
+ System_printf("Call back counters : %d - interrupts\n", pauseIntr);\r
+ System_printf(" (%d-SOLDOUT, %d-PAUSE, %d-PENDPAUSE)\n", afterIntrSoldout, afterIntrPause, pendPauseCntr);\r
+ System_printf("Total Notificaiton Interrupts : %d\n", tcp3dEventCntr);\r
+ System_printf("Throughput Calculations\n");\r
+ System_printf(" Total Bits Decoded : %d\n", TotalBitsDecoded);\r
+ System_printf(" Time Taken (in cycles) : %d\n", test_cycles);\r
+ System_printf(" Effective Throughput : %f Mbps\n", ThroughPut);\r
+ System_printf("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n");\r
+\r
+ System_printf("\n******************************************************************\n");\r
+\r
+ /* Increment the test counter */\r
+ testCntr++;\r
+\r
+ /**\r
+ * Delete the semaphores each time, so that there is no left over count.\r
+ * See the explanation at the beginning of this loop where the create\r
+ * semaphore calls are present. \r
+ */\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semRcvStart);\r
+#endif\r
+ Semaphore_delete(&semSendWait);\r
+ Semaphore_delete(&semSendBlock);\r
+ Semaphore_delete(&semRcvStart);\r
+ }\r
+\r
+ /* All test status print */\r
+ if(testErrCntr)\r
+ {\r
+ System_printf("!!! SOME TESTS FAILED !!!\n");\r
+ }\r
+ else\r
+ {\r
+ System_printf("!!! ALL TESTS PASSED !!!\n");\r
+ }\r
+\r
+ /* Save profile data to file */ \r
+ PROF_LOG_COMPLETE(instNum);\r
+\r
+ /* Remove all creations - to make graceful system exit */\r
+ Semaphore_delete(&semRcvDone);\r
+\r
+ System_exit(0);\r
+}\r
+ \r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void sndBlockTaskFunc(Void)\r
+{\r
+ UInt8 notifyFlag;\r
+ cbDataDesc *cbPtr;\r
+ static UInt32 cookie = 0;\r
+\r
+ sendBlockCnt = 0;\r
+\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semSendBlock);\r
+#endif\r
+\r
+ total_clock_start = TSCL;\r
+ LOG_TIME(PROF_SEND_TASK, PROF_START, TSCL); \r
+\r
+ while(1)\r
+ {\r
+ /* Pending on Semaphore to run the loop */\r
+ Semaphore_pend(semSendBlock, BIOS_WAIT_FOREVER);\r
+\r
+ /* set TCP3D instance to use */\r
+ inst = tcp3dDrvInst[instNum];\r
+\r
+ /* Get pointer to the code block data structure */\r
+ cbPtr = codeBlockSet.cbData[sendBlockCnt];\r
+\r
+ /* Interrupt flag, used in Tcp3d_enqueueCodeBlock function */\r
+ notifyFlag = 0;\r
+ if ( sendBlockCnt >= (codeBlockSet.maxNumCB-2) )\r
+ {\r
+ notifyFlag = 1; /* Set for the last CB in each path (PING & PONG) */\r
+ }\r
+\r
+ /**\r
+ * Prepare input configuration (IC) registers.\r
+ */\r
+ if ( TCP3D_DRV_INPUT_LIST_FULL == tcp3dResultSend )\r
+ {\r
+ /* IC prepare not required. Just clear soldout actions. */\r
+ soldOutActionClear();\r
+ }\r
+ else\r
+ {\r
+ LOG_TIME(PROF_PREPROC, PROF_START, TSCL);\r
+\r
+ /* Prepare Input Config Registers */\r
+#if TEST_PREPARE_ONLY_BETASTATE\r
+ /* Prepare only beta state registers */\r
+ prepareBetaStateICParams(cbPtr, cbPtr->mode);\r
+#elif TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT \r
+ /* Prepare only registers depend on code block configuration\r
+ * (tempICRegs has the fixed registers prepare outside send loop) */\r
+ prepareIC(cbPtr, tempICRegs, 1);\r
+#else\r
+ /* Prepare all registers */\r
+ prepareIC(cbPtr, NULL, NULL);\r
+#endif\r
+\r
+ LOG_TIME(PROF_PREPROC, PROF_STOP, TSCL);\r
+ }\r
+\r
+ checkBetaValues (cbPtr->inCfg);\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ tcp3dEndMemAccess(cbPtr->inCfg, cbPtr->sizeCFG);\r
+ tcp3dEndMemAccess(cbPtr->inLLR, cbPtr->sizeLLR);\r
+\r
+ tcp3dBeginMemAccess(cbPtr->outHD, cbPtr->sizeHD);\r
+ if (cbPtr->sdFlag)\r
+ tcp3dBeginMemAccess(cbPtr->outSD, cbPtr->sizeSD);\r
+ if (cbPtr->stsFlag)\r
+ tcp3dBeginMemAccess(cbPtr->outSts, cbPtr->sizeSTS);\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+\r
+ /**\r
+ * WORKAROUND CODE:\r
+ * This code works in line with the code in the second while loop\r
+ * in the send task where check for completion is done.\r
+ * Here we are setting the last byte in the outHD with some value when\r
+ * the refHD has 0x00. This avoids any false completion of send task.\r
+ */\r
+ if ( sendBlockCnt >= (codeBlockSet.maxNumCB-2) )\r
+ {\r
+ /* Fill the last byte in outHD when refHD last byte is ZERO */\r
+ uint8_t *bytePtr1, *bytePtr2;\r
+ uint32_t byteSize;\r
+\r
+ bytePtr1 = (UInt8 *) cbPtr->refHD;\r
+ bytePtr2 = (UInt8 *) cbPtr->outHD;\r
+ byteSize = (cbPtr->blockSize>>3);\r
+\r
+ if ( bytePtr1[byteSize-1] == 0 )\r
+ {\r
+ bytePtr2[byteSize-1] = 0xde;\r
+ }\r
+ }\r
+\r
+ LOG_TIME(PROF_ENQUE_FUNC, PROF_START, TSCL); \r
+\r
+ /* Enqueue the Code block */\r
+ tcp3dResultSend = Tcp3d_enqueueCodeBlock ( inst,\r
+ cbPtr->blockSize,\r
+ (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->inCfg),\r
+ (Int8 *)L2GLBMAP(dspCoreID, cbPtr->inLLR),\r
+ cbPtr->llrOffset,\r
+ (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->outHD),\r
+ (Int8 *)L2GLBMAP(dspCoreID, cbPtr->outSD), \r
+ cbPtr->sdOffset,\r
+ (UInt32 *)L2GLBMAP(dspCoreID, cbPtr->outSts),\r
+ notifyFlag); // 1 - GEN EVENT, 0 - NO EVENT\r
+\r
+ LOG_TIME(PROF_ENQUE_FUNC, PROF_STOP, TSCL); \r
+\r
+ /* Check for soldout case */\r
+ if ( TCP3D_DRV_INPUT_LIST_FULL != tcp3dResultSend )\r
+ {\r
+ /* increment the block count */\r
+ sendBlockCnt++;\r
+\r
+ /* goto next block */\r
+ Semaphore_post(semSendBlock);\r
+ }\r
+ else\r
+ {\r
+ /* increment soldout count */\r
+ soldoutCntr++;\r
+\r
+ soldOutAction(); /* take action */\r
+ }\r
+\r
+ /* Start the driver after START_CMD_PERIOD blocks */\r
+ if ( sendBlockCnt == START_CMD_PERIOD )\r
+ {\r
+ LOG_TIME(PROF_START_FUNC, PROF_START, TSCL);\r
+ if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
+ {\r
+ System_printf("Tcp3d_start function returned error (AUTO)\n");\r
+ System_exit(0);\r
+ }\r
+ LOG_TIME(PROF_START_FUNC, PROF_STOP, TSCL);\r
+ }\r
+\r
+ /* Check for end of task and exit */\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ {\r
+ /* set flags first */\r
+ pauseIntFlag = 0;\r
+ l2pIntr = pauseIntr;\r
+ pendPauseCntr = 0;\r
+\r
+#if SOLDOUT_USE_L2P_INTERRUPT\r
+ if ( soldoutCntr )\r
+ {\r
+ /* Call TCP3D driver control to set interrupt on L2P channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_L2P_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_DISABLE; // disable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+ }\r
+#endif\r
+\r
+ /* Set interrupt flag PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_CLR_REVT_INT;\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* Check to see if restart needed before exit */\r
+ LOG_TIME(PROF_START_FUNC, PROF_START, TSCL);\r
+ if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
+ {\r
+ System_printf("Tcp3d_start function returned error (AUTO)\n");\r
+ System_exit(0);\r
+ }\r
+ LOG_TIME(PROF_START_FUNC, PROF_STOP, TSCL);\r
+ \r
+ /* Set interrupt flag PAUSE channel */\r
+ drvCtrl.cmd = TCP3D_DRV_SET_REVT_INT;\r
+ drvCtrl.intrFlag = TEST_INTR_ENABLE; // enable\r
+ Tcp3d_control(inst, &drvCtrl);\r
+\r
+ /* out of enqueue loop */\r
+ break;\r
+ }\r
+ } /* end of - while(1) */\r
+\r
+#if DEBUG_VARS\r
+ semCnt = Semaphore_getCount(semSendWait);\r
+#endif\r
+\r
+ /**\r
+ * Check for pending Pauses and waiting for the last block to be decoded \r
+ */\r
+ while ( 1 )\r
+ {\r
+ /* Pending on Semaphore to run the loop */\r
+ Semaphore_pend(semSendWait, BIOS_WAIT_FOREVER);\r
+\r
+ /* Received both the completion events, so exit send task */\r
+ if ( tcp3dEventCntr >= 2 )\r
+ {\r
+ break;\r
+ } else if ( tcp3dEventCntr == 1 )\r
+ {\r
+ /* one code block test case */\r
+ if ( codeBlockSet.maxNumCB == 1 )\r
+ {\r
+ break;\r
+ }\r
+ else if ( codeBlockSet.mode == TEST_MODE_SPLIT )\r
+ { /* missing one notificatin event - possible in split mode */\r
+ /**\r
+ * WORKAROUND CODE:\r
+ * This is possibility in case of SPLIT mode, that one event is\r
+ * lost when both ping and pong channels try to generate system\r
+ * events at close proximity.\r
+ * In this test bench we have enabled notification events for\r
+ * the last two blocks, so checking the outHD & refHD last bytes\r
+ * to confirm the decoding of these blocks are completed.\r
+ */\r
+ \r
+ /* cbPtr for last two code blocks */\r
+ cbDataDesc *cbPtr1 = codeBlockSet.cbData[codeBlockSet.maxNumCB-2];\r
+ cbDataDesc *cbPtr2 = codeBlockSet.cbData[codeBlockSet.maxNumCB-1];\r
+ uint8_t *bytePtr11, *bytePtr12, *bytePtr21, *bytePtr22;\r
+ uint32_t size1, size2;\r
+\r
+ bytePtr11 = (UInt8 *) cbPtr1->refHD;\r
+ bytePtr12 = (UInt8 *) cbPtr1->outHD;\r
+ bytePtr21 = (UInt8 *) cbPtr2->refHD;\r
+ bytePtr22 = (UInt8 *) cbPtr2->outHD;\r
+ size1 = (cbPtr1->blockSize>>3); /* in bytes */\r
+ size2 = (cbPtr2->blockSize>>3); /* in bytes */\r
+\r
+ /* check if last HD byte of last two blocks are completed */\r
+ if ((bytePtr11[size1-1] == bytePtr12[size1-1]) &&\r
+ (bytePtr21[size2-1] == bytePtr22[size2-1]) ) \r
+ {\r
+ System_printf("Notification event missed (Race Condition)\n");\r
+ System_printf("Since the last two block decoding completed, completing send task\n");\r
+ System_printf("Block : %d\n", codeBlockSet.maxNumCB-2);\r
+ System_printf("\trefHD[%d] = 0x%x\t outHD[%d] = 0x%x\n", size1-1, bytePtr11[size1-1], size1-1, bytePtr12[size1-1]);\r
+ System_printf("Block : %d\n", codeBlockSet.maxNumCB-1);\r
+ System_printf("\trefHD[%d] = 0x%x\t outHD[%d] = 0x%x\n", size2-1, bytePtr21[size2-1], size2-1, bytePtr22[size2-1]);\r
+ break;\r
+ }\r
+ }\r
+ }\r
+\r
+ LOG_TIME(PROF_START_FUNC, PROF_START, TSCL);\r
+ if ( TCP3D_DRV_NO_ERR != Tcp3d_start(inst, TCP3D_DRV_START_AUTO) )\r
+ {\r
+ System_printf("Tcp3d_start function returned error\n");\r
+ System_exit(0);\r
+ }\r
+ LOG_TIME(PROF_START_FUNC, PROF_STOP, TSCL);\r
+\r
+ /* keep trying until finding two end events */\r
+ Semaphore_post(semSendWait);\r
+\r
+ pendPauseCntr++;\r
+ }\r
+ LOG_TIME(PROF_SEND_TASK, PROF_STOP, TSCL);\r
+\r
+ /* Last code block decoded - Start the receive task */\r
+ total_clock_end = TSCL;\r
+ LOG_TIME_ISR(PROF_POST_RECV_PING, PROF_INST, TSCL); \r
+ Semaphore_post(semRcvStart);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void rcvBlockTaskFunc(Void)\r
+{\r
+ Int32 errCnt;\r
+\r
+ cbDataDesc *cbPtr;\r
+ Int idx, loopCnt;\r
+ Int fail = 0;\r
+ UInt8 *ptr1, *ptr2;\r
+ \r
+ rcvBlockCnt = 0;\r
+ totErrCnt = 0;\r
+\r
+ while(1)\r
+ {\r
+ Semaphore_pend(semRcvStart, BIOS_WAIT_FOREVER);\r
+\r
+ /* prints for send task are done here */\r
+ if ( tcp3dResultSend == TCP3D_DRV_NO_ERR )\r
+ {\r
+#if DEBUG_PRINT\r
+ for ( loopCnt = 0; loopCnt < sendBlockCnt; loopCnt++ )\r
+ {\r
+ cbPtr = codeBlockSet.cbData[loopCnt];\r
+ System_printf("Send Task: Enqueued Block %d (Size: %d, SW0: %d)\n",\r
+ loopCnt, cbPtr->blockSize,\r
+ cbPtr->sw0LengthUsed);\r
+ }\r
+#endif\r
+ System_printf("Send Task: Enqueued %d Blocks\n\n", sendBlockCnt);\r
+ }\r
+ else\r
+ {\r
+ System_printf("Send Task: Enqueued Blocks failed (tcp3dResultSend : %d)\n\n", tcp3dResultSend);\r
+ System_exit(0);\r
+ }\r
+\r
+ MY_LOG_PRINT0(Rcv Task: SEM RECEIVED);\r
+\r
+ LOG_TIME(PROF_RECV_TASK, PROF_START, TSCL); \r
+\r
+ while( rcvBlockCnt < codeBlockSet.maxNumCB )\r
+ {\r
+ /* Get the pointer to the Code Block Set */\r
+ cbPtr = codeBlockSet.cbData[rcvBlockCnt];\r
+ \r
+ /* Step 2: Verify All the outputs */\r
+ fail = 0;\r
+ /* Step 2.1: Hard Decisions Verification */\r
+ ptr1 = (UInt8 *) cbPtr->refHD;\r
+ ptr2 = (UInt8 *) cbPtr->outHD;\r
+\r
+ /* Invalidate out HD */\r
+ CACHE_invL1d (cbPtr->outHD, cbPtr->blockSize>>3, CACHE_WAIT);\r
+\r
+ errCnt = 0; \r
+ for (idx = 0; idx < (cbPtr->blockSize>>3); ++idx)\r
+ {\r
+ if ( ptr1[idx] != ptr2[idx] )\r
+ {\r
+ errCnt++;\r
+ System_printf("\tBlock Count %d, HD mismatch byte %d\n", rcvBlockCnt, idx);\r
+ }\r
+ }\r
+\r
+ if (errCnt)\r
+ {\r
+ MY_LOG_PRINT2(Rcv task: HD FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
+ fail++;\r
+ }\r
+ else\r
+ {\r
+ MY_LOG_PRINT1(Rcv task: HD PASSED, rcvBlockCnt);\r
+ }\r
+ \r
+ /* Step 2.2: Soft Decisions Verification */\r
+ if (cbPtr->sdFlag)\r
+ {\r
+ if ( codeBlockSet.mode == TEST_MODE_SPLIT ) /* SPLIT MODE */\r
+ loopCnt = cbPtr->blockSize;\r
+ else\r
+ loopCnt = (3*cbPtr->blockSize);\r
+ \r
+ /* Invalidate out SD */\r
+ CACHE_invL1d (cbPtr->outSD, loopCnt, CACHE_WAIT);\r
+ \r
+ /* NOTE: Assumed that the Soft Decisions are in a single array */\r
+ errCnt = 0;\r
+ for (idx = 0; idx < loopCnt; ++idx)\r
+ {\r
+ if ( cbPtr->refSD[idx] != cbPtr->outSD[idx] )\r
+ {\r
+ errCnt += 1;\r
+ System_printf("\tBlock Count %d, SD mismatch byte %d\n", rcvBlockCnt, idx);\r
+ }\r
+ }\r
+ \r
+ if (errCnt)\r
+ {\r
+ MY_LOG_PRINT2(Rcv task: SD FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
+ fail++;\r
+ }\r
+ else\r
+ {\r
+ MY_LOG_PRINT1(Rcv task: SD PASSED, rcvBlockCnt);\r
+ }\r
+ } /* if (cbPtr->sdFlag) */\r
+ \r
+ /* Step 2.3: errCnt Registers Verification */\r
+ if (cbPtr->stsFlag)\r
+ {\r
+ /* Invalidate out Sts */\r
+ CACHE_invL1d (cbPtr->outSts, 12, CACHE_WAIT);\r
+\r
+ errCnt = 0;\r
+ for (idx = 0; idx < 3; ++idx)\r
+ {\r
+ if ( cbPtr->refSts[idx] != cbPtr->outSts[idx] )\r
+ {\r
+ errCnt += 1;\r
+ System_printf("\tBlock Count %d, STS mismatch word %d\n", rcvBlockCnt, idx);\r
+ }\r
+ }\r
+ if (errCnt)\r
+ {\r
+ MY_LOG_PRINT2(Rcv task: STS FAILED, rcvBlockCnt, ERRORS:, errCnt);\r
+ fail++;\r
+ }\r
+ else\r
+ {\r
+ MY_LOG_PRINT1(Rcv task: STS PASSED, rcvBlockCnt);\r
+ }\r
+ } /* if (cbPtr->stsFlag) */\r
+ if (fail)\r
+ {\r
+ System_printf("Rcv task: Block %d FAILED\n", rcvBlockCnt);\r
+ totErrCnt++;\r
+ }\r
+#if DEBUG_PRINT\r
+ else\r
+ {\r
+ System_printf("Rcv task: Block %d PASSED\n", rcvBlockCnt);\r
+ }\r
+#endif\r
+ rcvBlockCnt++;\r
+ }\r
+ if(rcvBlockCnt >= codeBlockSet.maxNumCB)\r
+ {\r
+ break;\r
+ } \r
+ }\r
+\r
+ LOG_TIME(PROF_RECV_TASK, PROF_STOP, TSCL); \r
+\r
+ System_printf("Rcv Task: COMPLETE - verified %d blocks\n", rcvBlockCnt);\r
+ \r
+ /* Prepare for next test, set by "tester task" */\r
+ Semaphore_post(semRcvDone);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void revt0ChCallback(Void)\r
+{\r
+ /* Increment the ISR counter */\r
+ pauseIntr++;\r
+ \r
+ pauseIntFlag = 1;\r
+\r
+ LOG_TIME_ISR(PROF_RESTART_PING, PROF_INST, TSCL);\r
+\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ Semaphore_post(semSendWait);\r
+ else\r
+ Semaphore_post(semSendBlock);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void revt1ChCallback(Void)\r
+{\r
+ /* Increment the ISR counter */\r
+ pauseIntr++;\r
+ \r
+ pauseIntFlag = 2;\r
+\r
+ LOG_TIME_ISR(PROF_RESTART_PONG, PROF_INST, TSCL);\r
+\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ Semaphore_post(semSendWait);\r
+ else\r
+ Semaphore_post(semSendBlock);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void tskHeartBeat(Void)\r
+{\r
+ static unsigned int counter = 0u;\r
+\r
+ while (counter < 0x1000000u)\r
+ {\r
+ Task_sleep (1000u);\r
+ System_printf("\n!!! EDMA3 LLD HrtBt %x\n", counter);\r
+ counter++;\r
+ }\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void getMemoryStats(Void)\r
+{\r
+ Memory_Stats memStats;\r
+\r
+ Memory_getStats(drvHeap, &memStats);\r
+ System_printf("\nHeap Usage/Staus\n");\r
+ System_printf(" tcp3dDrvHeap : %d of %d free\n", memStats.totalFreeSize, memStats.totalSize);\r
+\r
+ Memory_getStats(dataHeap, &memStats);\r
+ System_printf(" tcp3dDataHeap : %d of %d free\n", memStats.totalFreeSize, memStats.totalSize);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void tcp3dEventISR(UInt32 testEvtNum)\r
+{\r
+ tcp3dEventCntr++;\r
+ tpccEvtCntr++;\r
+\r
+ LOG_TIME_ISR(PROF_RESTART_PING, PROF_INST, TSCL);\r
+\r
+ if ( sendBlockCnt >= codeBlockSet.maxNumCB )\r
+ Semaphore_post(semSendWait);\r
+ else\r
+ Semaphore_post(semSendBlock);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void registerTcp3dEvent(Void)\r
+{\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+ static UInt32 mapDone = 0;\r
+ UInt32 testEvt = getNotifyEventNum(instNum);\r
+ UInt32 hostIntr = getHostIntrNum(dspCoreID);\r
+\r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Completion ISR Registration */\r
+ CpIntc_dispatchPlug(testEvt, tcp3dEventISR, hostIntr, TRUE);\r
+ if (!mapDone)\r
+ CpIntc_mapSysIntToHostInt(0, testEvt, hostIntr);\r
+ CpIntc_enableHostInt(0, hostIntr);\r
+ eventId = CpIntc_getEventId(hostIntr);\r
+ EventCombiner_dispatchPlug (eventId,\r
+#if USE_LOCAL_CPINTC_DISPATCH\r
+ CpIntc_dispatchLoc,\r
+#else\r
+ CpIntc_dispatch,\r
+#endif\r
+ hostIntr,\r
+ TRUE);\r
+#if DEBUG_PRINT\r
+ System_printf("\t\t testEvt : %d \n", testEvt);\r
+ System_printf("\t\t hostIntr : %d \n", hostIntr);\r
+ System_printf("\t\t eventId : %d \n", eventId);\r
+#endif\r
+\r
+ /* enable the 'global' switch */\r
+ CpIntc_enableAllHostInts(0);\r
+\r
+ mapDone = 1;\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void unregisterTcp3dEvent(Void)\r
+{\r
+ static UInt32 cookie = 0;\r
+ Int eventId = 0; /* GEM event id */\r
+ UInt32 hostIntr = getHostIntrNum(dspCoreID);\r
+ \r
+ /* Disabling the global interrupts */\r
+ cookie = Hwi_disable();\r
+\r
+ /* Driver Completion ISR */\r
+ CpIntc_disableHostInt(0, hostIntr);\r
+ eventId = CpIntc_getEventId(hostIntr);\r
+ EventCombiner_disableEvent(eventId);\r
+\r
+ /* Restore interrupts */\r
+ Hwi_restore(cookie);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void allInit(Void)\r
+{\r
+ Tcp3d_Result tcp3dResult = TCP3D_DRV_NO_ERR;\r
+ EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;\r
+\r
+#if TEST_PROFILE_LOG\r
+#if 0\r
+ CSL_Tcp3d_cfgRegs *tcp3dCfgRegs = (CSL_Tcp3d_cfgRegs *) ((instNum == CSL_TCP3D_A)? CSL_TCP3D_A_CFG_REGS: CSL_TCP3D_B_CFG_REGS);\r
+#else\r
+ CSL_Tcp3d_cfgRegs *tcp3dCfgRegs = (CSL_Tcp3d_cfgRegs *) getTcp3dCfgRegsBase(instNum);\r
+#endif\r
+#endif\r
+\r
+ /* Initialize EDMA3 first */\r
+ hEdma = NULL;\r
+ tpccNum = 2;\r
+ tpccRegionUsed = 3;\r
+ hEdma = edma3init ( tpccNum,\r
+ &edmaResult,\r
+ dspCoreID,\r
+ tpccRegionUsed);\r
+ if (edmaResult != EDMA3_DRV_SOK)\r
+ {\r
+ System_printf("edma3init() FAILED, error code: %d\n", edmaResult);\r
+ }\r
+ else\r
+ {\r
+ System_printf("EDMA3 LLD Initialization complete (TPCC #%d, Region #%d)\n", tpccNum, tpccRegionUsed);\r
+ }\r
+\r
+ /* Allocate all EDMA channels required for TCP3D Driver */\r
+ System_printf("EDMA3 Channels opening started...\n");\r
+\r
+ /* Open channels for one instance */\r
+ openEdmaChannels (hEdma, instNum, &edmaConfig[instNum]);\r
+\r
+ /* Register call backs */\r
+ EDMA3_DRV_registerTccCb(hEdma, edmaConfig[instNum].pingChRes[0].chNo, (EDMA3_RM_TccCallback)&revt0ChCallback, NULL);\r
+ EDMA3_DRV_registerTccCb(hEdma, edmaConfig[instNum].pongChRes[0].chNo, (EDMA3_RM_TccCallback)&revt1ChCallback, NULL);\r
+\r
+#if EDMA_LOCAL_COMP_ISR // flag defined in sample.h file\r
+ /* Fill call back details */\r
+ edmaConfig[instNum].pingChRes[0].cbFunc = (EDMA3_RM_TccCallback)&revt0ChCallback;\r
+ edmaConfig[instNum].pingChRes[0].cbData = NULL;\r
+ edmaConfig[instNum].pongChRes[0].cbFunc = (EDMA3_RM_TccCallback)&revt1ChCallback;\r
+ edmaConfig[instNum].pongChRes[0].cbData = NULL;\r
+\r
+ /**\r
+ * Update the information to use with local EDMA ISR \r
+ * (NOTE: This function must be called after the channels are opened)\r
+ */\r
+ updateAllocatedTccsLoc(&edmaConfig[instNum]);\r
+#endif\r
+\r
+ System_printf("EDMA3 Channels opening complete\n");\r
+\r
+ System_printf("TCP3 Decoder Driver Initialization sequence started...\n");\r
+\r
+#if TEST_PROFILE_LOG\r
+ /***** Soft Reset the TCP3D for synchronization ******/\r
+ LOG_TIME(PROF_SOFT_RESET, PROF_INST, TSCL); \r
+ tcp3dCfgRegs->TCP3_SOFT_RESET = 1;\r
+ tcp3dCfgRegs->TCP3_SOFT_RESET = 0;\r
+#endif\r
+\r
+ LOG_TIME(PROF_INIT_FUNC, PROF_START, TSCL); \r
+\r
+ /* Initialize the TCP3D first */\r
+ tcp3dDrvInst[instNum] = tcp3dSampleInit (drvHeap,\r
+ instNum,\r
+ testMaxCodeBlocks,\r
+ codeBlockSet.mode,\r
+ codeBlockSet.doubleBuffer,\r
+ codeBlockSet.lteCrcSel,\r
+ dspCoreID,\r
+ hEdma,\r
+ tpccRegionUsed,\r
+ &edmaConfig[instNum],\r
+ &tcp3dResult);\r
+\r
+ LOG_TIME(PROF_INIT_FUNC, PROF_STOP, TSCL); \r
+\r
+ System_printf("TCP3 Decoder Driver Initialization sequence complete\n");\r
+\r
+ /* Register the Notification Event for TCP3D */\r
+ registerTcp3dEvent();\r
+\r
+ /* Set the global flags to default values */\r
+ pingComplete = 0;\r
+ pongComplete = 0;\r
+ pauseIntr = 0;\r
+ l2pIntr = 0;\r
+ tcp3dEventCntr = 0;\r
+ pauseIntFlag = 0;\r
+ rcvStartFlag = 0;\r
+ soldoutCntr = 0;\r
+ afterIntrSoldout = 0;\r
+ afterIntrPause = 0;\r
+ pendPauseCntr = 0;\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void allDeInit(Void)\r
+{\r
+ EDMA3_DRV_Result edmaResult = EDMA3_DRV_SOK;\r
+\r
+ /* Un-register the Notification Event for TCP3D */\r
+ unregisterTcp3dEvent();\r
+\r
+ /* Close all EDMA channels allocated for the test */\r
+ System_printf("EDMA3 Channels freeing started...\n");\r
+\r
+ /* Register call backs */\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pingChRes[0].chNo);\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pingChRes[1].chNo);\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pongChRes[0].chNo);\r
+ EDMA3_DRV_unregisterTccCb(hEdma, edmaConfig[instNum].pongChRes[1].chNo);\r
+\r
+ /* Close channels */\r
+ closeEdmaChannels(hEdma, instNum, &edmaConfig[instNum]);\r
+\r
+ System_printf("EDMA3 Channels freeing complete\n");\r
+\r
+ /* Deinit for TCP3D driver */\r
+ System_printf("TCP3 Decoder Driver De-Initialization sequence started...\n");\r
+\r
+ tcp3dSampleDeinit(drvHeap, instNum, tcp3dDrvInst[instNum]);\r
+\r
+ System_printf("TCP3 Decoder Driver De-Initialization sequence complete\n");\r
+\r
+ /* De-init EDMA3 */\r
+ edmaResult = edma3deinit(tpccNum, hEdma);\r
+ if (edmaResult != EDMA3_DRV_SOK)\r
+ {\r
+ System_printf("edma3deinit() FAILED, error code: %d\n", edmaResult);\r
+ }\r
+ else\r
+ {\r
+ System_printf("EDMA3 LLD De-Initialization complete\n");\r
+ }\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * This function enables the power/clock domains for TCP3D. \r
+ *\r
+ * @retval\r
+ * Not Applicable.\r
+ */\r
+static Int32 enable_tcp3d (void)\r
+{\r
+#ifndef SIMULATOR_SUPPORT\r
+ /* TCP3D power domain is turned OFF by default.\r
+ * It needs to be turned on before doing any TCP3D device register access.\r
+ * This is not required for the simulator. */\r
+\r
+ /* Set TCP3D Power domain to ON */ \r
+ CSL_PSC_enablePowerDomain (CSL_PSC_PD_TCP3D);\r
+\r
+ /* Enable the clocks too for TCP3D */\r
+ CSL_PSC_setModuleNextState (CSL_PSC_LPSC_TCP3D, PSC_MODSTATE_ENABLE);\r
+\r
+ /* Start the state transition */\r
+ CSL_PSC_startStateTransition (CSL_PSC_PD_TCP3D);\r
+\r
+ /* Wait until the state transition process is completed. */\r
+ while (!CSL_PSC_isStateTransitionDone (CSL_PSC_PD_TCP3D));\r
+\r
+ /* Return TCP3D PSC status */\r
+ if ((CSL_PSC_getPowerDomainState(CSL_PSC_PD_TCP3D) == PSC_PDSTATE_ON) &&\r
+ (CSL_PSC_getModuleState (CSL_PSC_LPSC_TCP3D) == PSC_MODSTATE_ENABLE))\r
+ {\r
+ /* TCP3D ON. Ready for use */ \r
+ return 0;\r
+ }\r
+ else\r
+ {\r
+ /* SRIO Power on failed. Return error */ \r
+ return -1; \r
+ }\r
+#else\r
+ /* PSC is not supported on simulator. Return success always */\r
+ return 0;\r
+#endif\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to indicate that a block of memory is \r
+ * about to be accessed. If the memory block is cached then this \r
+ * indicates that the application would need to ensure that the \r
+ * cache is updated with the data from the actual memory.\r
+ *\r
+ * @param[in] ptr\r
+ * Address of memory block\r
+ *\r
+ * @param[in] size\r
+ * Size of memory block\r
+ *\r
+ * @retval\r
+ * Not Applicable\r
+ */\r
+void tcp3dBeginMemAccess (void *ptr, uint32_t size)\r
+{\r
+ /* Invalidate L1D cache and wait until operation is complete. \r
+ * Use this approach if L2 cache is not enabled */ \r
+ CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);\r
+\r
+ /* Cleanup the prefectch buffer also. */\r
+ CSL_XMC_invalidatePrefetchBuffer(); \r
+\r
+ return;\r
+}\r
+\r
+/**\r
+ * @b Description\r
+ * @n \r
+ * The function is used to indicate that the block of memory has \r
+ * finished being accessed. If the memory block is cached then the \r
+ * application would need to ensure that the contents of the cache \r
+ * are updated immediately to the actual memory. \r
+ *\r
+ * @param[in] ptr\r
+ * Address of memory block\r
+ * @param[in] size\r
+ * Size of memory block\r
+ *\r
+ * @retval\r
+ * Not Applicable\r
+ */\r
+void tcp3dEndMemAccess (void *ptr, uint32_t size)\r
+{\r
+ /* Writeback L1D cache and wait until operation is complete. \r
+ * Use this approach if L2 cache is not enabled */ \r
+ CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT); \r
+\r
+ return;\r
+}\r
+\r
+/* end of file */\r
diff --git a/test/src/tcp3d_main.h b/test/src/tcp3d_main.h
--- /dev/null
+++ b/test/src/tcp3d_main.h
@@ -0,0 +1,234 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+#ifndef _TCP3D_MAIN_H_\r
+#define _TCP3D_MAIN_H_\r
+\r
+/* XDC includes */\r
+//#include <xdc/std.h>\r
+#include <xdc/cfg/global.h>\r
+#include <xdc/runtime/System.h>\r
+#include <xdc/runtime/Memory.h>\r
+#include <xdc/runtime/IHeap.h>\r
+\r
+/* Driver includes */\r
+#include <ti/drv/tcp3d/tcp3d_drv.h>\r
+#include <ti/drv/tcp3d/src/tcp3d_utils.h>\r
+\r
+/* Utility includes */\r
+#include "tcp3d_codeBlkSeg.h"\r
+\r
+/**********************************************************************\r
+ ************************** Test Macros *******************************\r
+ **********************************************************************/\r
+/**\r
+ * Address mapping is done based on the mapping shown below.\r
+ * Check on the address done to ensure it be in L2SRAM space.\r
+ * \r
+ * L2SRAM : org = 0x00800000, len = 0x100000 (local)\r
+ * GEM0_L2_MEM : org = 0x10800000, len = 0x100000 (global)\r
+ * GEM1_L2_MEM : org = 0x11800000, len = 0x100000 (global)\r
+ * GEM2_L2_MEM : org = 0x12800000, len = 0x100000 (global)\r
+ * GEM3_L2_MEM : org = 0x13800000, len = 0x100000 (global)\r
+ *\r
+ * MSMCSRAM : org = 0x0c000000, len = 0x200000 (global)\r
+ */\r
+#define L2GLBMAP(coreID, addr) \\r
+ ( ( ((UInt32)(addr) >= 0x00800000) && ((UInt32)(addr) < 0x00900000) ) ? \\r
+ ( (UInt32)(addr) | (UInt32)((0x10 | (coreID & 0x3)) << 24) ) : \\r
+ (UInt32)(addr) ) \r
+\r
+/**********************************************************************\r
+ ************************** Test Compile Flags ************************\r
+ **********************************************************************/\r
+/**\r
+ * Prepare all input config registers outside the Send loop (block size based, etc)\r
+ * except for beta states since they are data dependent.\r
+ */\r
+#define TEST_PREPARE_ONLY_BETASTATE 1\r
+\r
+/**\r
+ * Set this flag to use the fixed input configuration parameters preparation\r
+ * optimization. This flag is useful only if TEST_PREPARE_ONLY_BETASTATE is\r
+ * not used.\r
+ */\r
+#define TEST_PREPARE_ONLY_CODEBLOCK_PARAM_DEPENDENT 0\r
+\r
+/**\r
+ * Check the beta state values with the reference from the file generated \r
+ * with the test vectors.\r
+ */\r
+#define TEST_BETA_VALUE_CHECK 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Definitions **************************\r
+ **********************************************************************/\r
+/* TCP3D modes */\r
+#define TEST_MODE_SINGLE CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_3GPP //0 (NOT SUPPORTED)\r
+#define TEST_MODE_LTE CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_LTE //1\r
+#define TEST_MODE_WIMAX CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_WIMAX //2\r
+#define TEST_MODE_SPLIT CSL_TCP3D_CFG_TCP3_MODE_MODE_SEL_HSUPA //3\r
+\r
+/* Test True/False flags */\r
+#define TEST_FALSE 0\r
+#define TEST_TRUE 1\r
+\r
+/* Test Interrupt flags */\r
+#define TEST_INTR_ENABLE 1\r
+#define TEST_INTR_DISABLE 0\r
+\r
+/**********************************************************************\r
+ ************************** Test Structures ***************************\r
+ **********************************************************************/\r
+/*\r
+ * Structure that holds the configuration parameters. Used for storing the\r
+ * configuration values read from the file blockXX_cfgreg.dat for a given\r
+ * code block.\r
+ */\r
+typedef struct cbConfig\r
+{\r
+ /* Control */\r
+ Int32 mode_sel; //TCP3_MODE\r
+ Int32 lte_crc_init_sel;\r
+\r
+ /* Input */\r
+ Int32 NumInfoBits; //CFG0\r
+ Int32 SW0_length; //CFG1\r
+ Int32 maxst_en; //CFG2\r
+ Int32 out_flag_en;\r
+ Int32 out_order_sel;\r
+ Int32 ext_scale_en;\r
+ Int32 soft_out_flag_en;\r
+ Int32 soft_out_fmt;\r
+ Int32 min_itr;\r
+ Int32 max_itr;\r
+ Int32 snr_val;\r
+ Int32 snr_rep;\r
+ Int32 stop_sel;\r
+ Int32 crc_iter_pass;\r
+ Int32 crc_sel;\r
+ Int32 maxst_thold; //CFG3\r
+ Int32 maxst_value;\r
+ Int32 ext_scale_0; //CFG8\r
+ Int32 ext_scale_1;\r
+ Int32 ext_scale_2;\r
+ Int32 ext_scale_3;\r
+ Int32 ext_scale_4; //CFG9\r
+ Int32 ext_scale_5;\r
+ Int32 ext_scale_6;\r
+ Int32 ext_scale_7;\r
+ Int32 ext_scale_8; //CFG10\r
+ Int32 ext_scale_9;\r
+ Int32 ext_scale_10;\r
+ Int32 ext_scale_11;\r
+ Int32 ext_scale_12; //CFG11\r
+ Int32 ext_scale_13;\r
+ Int32 ext_scale_14;\r
+ Int32 ext_scale_15;\r
+} cbConfig;\r
+\r
+/*\r
+ * Structure for one code block description.\r
+ */\r
+typedef struct cbDataDesc\r
+{\r
+ UInt32 mode;\r
+ UInt32 crcInitVal;\r
+ Int8 tailBits[12];\r
+ Tcp3d_InCfgParams *inCfgParams;\r
+ UInt8 sw0LengthUsed;\r
+\r
+ UInt32 blockSize;\r
+ UInt32 interFlag;\r
+ UInt32 sdFlag;\r
+ UInt32 stsFlag;\r
+ UInt32 llrOffset;\r
+ UInt32 sdOffset;\r
+\r
+ UInt32 sizeCFG;\r
+ UInt32 sizeINTER;\r
+ UInt32 sizeLLR;\r
+ UInt32 sizeHD;\r
+ UInt32 sizeSD;\r
+ UInt32 sizeSTS;\r
+\r
+ UInt32 *inCfg;\r
+ UInt16 *inInter;\r
+ Int8 *inLLR; /* three arrays with offset in llrOffset */\r
+ UInt32 *outHD;\r
+ UInt32 *refHD;\r
+ Int8 *outSD; /* three arrays with offset in sdOffset */\r
+ Int8 *refSD; /* three arrays with offset in sdOffset */\r
+ UInt32 *outSts;\r
+ UInt32 *refSts;\r
+} cbDataDesc;\r
+\r
+/*\r
+ * Structure for one test description. \r
+ */\r
+typedef struct cbTestDesc\r
+{\r
+ cbDataDesc **cbData;\r
+ Int32 maxNumCB;\r
+ Int32 mode;\r
+ Int32 doubleBuffer;\r
+ Int32 lteCrcSel;\r
+} cbTestDesc;\r
+\r
+/**********************************************************************\r
+ ************************** Test Global Tables ************************\r
+ **********************************************************************/\r
+/* interleaver tables (used in tcp3d_inputCongigPrep.c file) */\r
+extern Int16 TCP3_LteInterleaverTable[220][7];\r
+extern Int16 TCP3_WimaxInterleaverTable[17][4];\r
+\r
+/**********************************************************************\r
+ *********************** Test Global Functions ************************\r
+ **********************************************************************/\r
+/* interleaver table index calculation function */\r
+Int32 LTE_interleaver_index(Int32 K);\r
+Int32 WIMAX_interleaver_index(Int32 K);\r
+\r
+/* input config prepare function definitions (see tcp3d_inputCongigPrep.c) */\r
+Void prepareBlockSizeDepICParams(cbDataDesc *cbPtr);\r
+Void prepareBetaStateICParams(cbDataDesc *cbPtr, UInt8 mode);\r
+Void prepareIC(cbDataDesc *cbPtr, UInt32 *tempIC, UInt8 copyFlag);\r
+Void fillICParams(Tcp3d_InCfgParams *inCfgParams, cbConfig *cbCfg);\r
+Void checkBetaValues (UInt32 inCfg[]);\r
+\r
+/* Test vector functions (see tcp3d_testvector.c) */\r
+Int getTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet, Char *testFolder);\r
+Void freeTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet);\r
+\r
+#endif /* _TCP3D_MAIN_H_ */\r
diff --git a/test/src/tcp3d_multi_inst.h b/test/src/tcp3d_multi_inst.h
--- /dev/null
@@ -0,0 +1,135 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _TCP3D_MULTI_INST_H_\r
+#define _TCP3D_MULTI_INST_H_\r
+\r
+/**\r
+ * Test TCP3D Notification Events\r
+ */\r
+#define TCP3D_A_TEST_EVENT 7\r
+#define TCP3D_B_TEST_EVENT 23\r
+\r
+/**\r
+ * This gives the channel numbers to which the TCP3 decoder REVTs are mapped.\r
+ * ((per spec intc_1.3.4.12.xlsx, TPCC2)\r
+ */\r
+#define TCP3D_A_REVT0_CH_NUMBER 34\r
+#define TCP3D_A_REVT1_CH_NUMBER 35\r
+#define TCP3D_B_REVT0_CH_NUMBER 36\r
+#define TCP3D_B_REVT1_CH_NUMBER 37\r
+\r
+INLINE UInt32 getHostIntrNum(UInt32 dspCoreID)\r
+{\r
+ /* Host Interrupts for CPINTC0 (per spec intc_1.3.4.12.xls) */\r
+ UInt32 hostIntr[] = {13u, 29u, 45u, 61u};\r
+\r
+ return hostIntr[dspCoreID];\r
+}\r
+\r
+INLINE UInt32 getNotifyEventNum(UInt8 instNum)\r
+{\r
+ UInt32 testEvt;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ testEvt = TCP3D_A_TEST_EVENT; // First instance\r
+ else\r
+ testEvt = TCP3D_B_TEST_EVENT; // Second instance\r
+\r
+ return testEvt;\r
+}\r
+\r
+INLINE UInt32 getRevt0ChannelNum(UInt8 instNum)\r
+{\r
+ UInt32 chNum;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ chNum = TCP3D_A_REVT0_CH_NUMBER; // First instance\r
+ else\r
+ chNum = TCP3D_B_REVT0_CH_NUMBER; // Second instance\r
+\r
+ return chNum;\r
+}\r
+\r
+INLINE UInt32 getRevt1ChannelNum(UInt8 instNum)\r
+{\r
+ UInt32 chNum;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ chNum = TCP3D_A_REVT1_CH_NUMBER; // First instance\r
+ else\r
+ chNum = TCP3D_B_REVT1_CH_NUMBER; // Second instance\r
+\r
+ return chNum;\r
+}\r
+\r
+INLINE UInt8 getTcp3dInstNum(UInt32 dspCoreID)\r
+{\r
+ UInt8 instNum;\r
+\r
+ if ( dspCoreID == 0 )\r
+ instNum = CSL_TCP3D_0; // First instance\r
+ else\r
+ instNum = CSL_TCP3D_1; // Second instance\r
+\r
+ return instNum;\r
+}\r
+\r
+INLINE UInt32 getTcp3dCfgRegsBase(UInt8 instNum)\r
+{\r
+ UInt32 regBase;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ regBase = CSL_TCP3D_0_CFG_REGS; // First instance\r
+ else\r
+ regBase = CSL_TCP3D_1_CFG_REGS; // Second instance\r
+\r
+ return regBase;\r
+}\r
+\r
+INLINE UInt32 getTcp3dDataRegsBase(UInt8 instNum)\r
+{\r
+ UInt32 regBase;\r
+\r
+ if ( instNum == CSL_TCP3D_0 )\r
+ regBase = CSL_TCP3D_0_DATA_REGS; // First instance\r
+ else\r
+ regBase = CSL_TCP3D_1_DATA_REGS; // Second instance\r
+\r
+ return regBase;\r
+}\r
+\r
+#endif /* _TCP3D_MULTI_INST_H_ */\r
+\r
diff --git a/test/src/tcp3d_profile.h b/test/src/tcp3d_profile.h
--- /dev/null
+++ b/test/src/tcp3d_profile.h
@@ -0,0 +1,135 @@
+#ifndef _TCP3D_PROFILE_H_\r
+#define _TCP3D_PROFILE_H_\r
+\r
+/**\r
+ * \file tcp3d_profile.h\r
+ *\r
+ * \brief TCP3D test profile header.\r
+ *\r
+ * Copyright (C) Texas Instruments Incorporated 2009\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+/**\r
+ * Include Files\r
+ */\r
+#include <stdio.h>\r
+#include <xdc/std.h>\r
+#include <ti/sysbios/family/c64p/Hwi.h>\r
+\r
+/*\r
+ * Profile taps for plotting with Matlab \r
+ */\r
+#define PROF_START 0x00000100\r
+#define PROF_STOP 0x00000200\r
+#define PROF_INST 0x00000300\r
+\r
+#define PROF_SOFT_RESET 0x00010000\r
+#define PROF_RESTART_PING 0x00020000\r
+#define PROF_RESTART_PONG 0x00030000\r
+#define PROF_SEND_TASK 0x00040000\r
+#define PROF_PREPROC 0x00050000\r
+#define PROF_ENQUE_FUNC 0x00060000\r
+#define PROF_START_FUNC 0x00070000\r
+#define PROF_PING_DECODE 0x00080000\r
+#define PROF_PONG_DECODE 0x00090000\r
+#define PROF_POST_RECV_PING 0x000A0000\r
+#define PROF_POST_RECV_PONG 0x000B0000\r
+#define PROF_RECV_TASK 0x000C0000\r
+#define PROF_INIT_FUNC 0x000D0000\r
+\r
+#define PROF_TAG_LEN 4000\r
+\r
+typedef struct PROFILE_TAG\r
+{\r
+ UInt32 tag;\r
+ UInt32 time;\r
+} PROFILE_TAG;\r
+\r
+/**\r
+ * extern variables (see tcp3d_main.c)\r
+ */\r
+extern volatile PROFILE_TAG profileTag[PROF_TAG_LEN];\r
+extern volatile UInt32 profileTagInd;\r
+\r
+/**\r
+ * Profile Macro Functions \r
+ */\r
+#define PROF_LOG_COMPLETE(instNum) { \\r
+ FILE *fid; \\r
+ Int i; \\r
+ if (instNum == CSL_TCP3D_0) \\r
+ fid = fopen("c:\\profile_A.dat","w"); \\r
+ else \\r
+ fid = fopen("c:\\profile_B.dat","w"); \\r
+ fprintf(fid, "0 0 0 0 %x\n", 2*profileTagInd); \\r
+ for(i=0; i<profileTagInd; i++) \\r
+ { \\r
+ fprintf(fid, "0x%08x\n", profileTag[i].tag); \\r
+ fprintf(fid, "0x%08x\n", profileTag[i].time); \\r
+ } \\r
+ fclose(fid); \\r
+ }\r
+\r
+#define PROF_LOG_INIT(instNum) { \\r
+ FILE *fidL; \\r
+ if (instNum == CSL_TCP3D_0) \\r
+ fidL = fopen("c:\\Tcp3dDebug_A.log","w"); \\r
+ else \\r
+ fidL = fopen("c:\\Tcp3dDebug_B.log","w"); \\r
+ fclose(fidL); \\r
+ profileTagInd = 0; \\r
+ }\r
+\r
+#if 0\r
+#define LOG_TIME(TASK, TAG, TIME) { \\r
+ UInt32 cookie = 0; \\r
+ if(profileTagInd<PROF_TAG_LEN) \\r
+ { \\r
+ cookie = Hwi_disable(); \\r
+ profileTag[profileTagInd].tag = (TASK | TAG); \\r
+ profileTag[profileTagInd++].time = TIME; \\r
+ Hwi_restore(cookie); \\r
+ } \\r
+ }\r
+#else\r
+#define LOG_TIME(TASK, TAG, TIME) LOG_TIME_ISR(TASK, TAG, TIME)\r
+#endif\r
+\r
+#define LOG_TIME_ISR(TASK, TAG, TIME) { \\r
+ if(profileTagInd<PROF_TAG_LEN) \\r
+ { \\r
+ profileTag[profileTagInd].tag = (TASK | TAG); \\r
+ profileTag[profileTagInd++].time = TIME; \\r
+ } \\r
+ }\r
+\r
+#endif /* _TCP3D_PROFILE_H_ */\r
diff --git a/test/src/tcp3d_single_inst.h b/test/src/tcp3d_single_inst.h
--- /dev/null
@@ -0,0 +1,90 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+#ifndef _TCP3D_SINGLE_INST_H_\r
+#define _TCP3D_SINGLE_INST_H_\r
+\r
+/**\r
+ * Test TCP3D Notification Events\r
+ */\r
+#define TCP3D_A_TEST_EVENT 23\r
+\r
+/**\r
+ * This gives the channel numbers to which the TCP3 decoder REVTs are mapped.\r
+ * (as per spec nysh_INTERNAL_1_0_7.pdf)\r
+ */\r
+#define TCP3D_A_REVT0_CH_NUMBER 0\r
+#define TCP3D_A_REVT1_CH_NUMBER 1\r
+\r
+INLINE UInt32 getHostIntrNum(UInt32 dspCoreID)\r
+{\r
+ /* Host Interrupts for CPINTC0 (per spec - 0.0.1) */\r
+ UInt32 hostIntr[] = {6u, 26u, 46u, 66u};\r
+\r
+ return hostIntr[dspCoreID];\r
+}\r
+\r
+INLINE UInt32 getNotifyEventNum(UInt8 instNum)\r
+{\r
+ return TCP3D_A_TEST_EVENT;\r
+}\r
+\r
+INLINE UInt32 getRevt0ChannelNum(UInt8 instNum)\r
+{\r
+ return TCP3D_A_REVT0_CH_NUMBER;\r
+}\r
+\r
+INLINE UInt32 getRevt1ChannelNum(UInt8 instNum)\r
+{\r
+ return TCP3D_A_REVT1_CH_NUMBER;\r
+}\r
+\r
+INLINE UInt8 getTcp3dInstNum(UInt32 dspCoreID)\r
+{\r
+ return CSL_TCP3D_A;\r
+}\r
+\r
+INLINE UInt32 getTcp3dCfgRegsBase(UInt8 instNum)\r
+{\r
+ return CSL_TCP3D_A_CFG_REGS;\r
+}\r
+\r
+INLINE UInt32 getTcp3dDataRegsBase(UInt8 instNum)\r
+{\r
+ return CSL_TCP3D_A_DATA_REGS;\r
+}\r
+\r
+#endif /* _TCP3D_SINGLE_INST_H_ */\r
+\r
diff --git a/test/src/tcp3d_testset_functions.c b/test/src/tcp3d_testset_functions.c
--- /dev/null
@@ -0,0 +1,681 @@
+/*\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ \r
+ * \r
+ * \r
+ * Redistribution and use in source and binary forms, with or without \r
+ * modification, are permitted provided that the following conditions \r
+ * are met:\r
+ *\r
+ * Redistributions of source code must retain the above copyright \r
+ * notice, this list of conditions and the following disclaimer.\r
+ *\r
+ * Redistributions in binary form must reproduce the above copyright\r
+ * notice, this list of conditions and the following disclaimer in the \r
+ * documentation and/or other materials provided with the \r
+ * distribution.\r
+ *\r
+ * Neither the name of Texas Instruments Incorporated nor the names of\r
+ * its contributors may be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+*/\r
+\r
+\r
+\r
+#include <stdio.h>\r
+#include <string.h>\r
+\r
+#include "tcp3d_main.h"\r
+\r
+#define READ_BINARY_TEST_VECTORS 1 /* Read .bin test vector files */\r
+\r
+UInt32 morePrints = 0;\r
+extern Char *strMode[4];\r
+extern Char testvectFolderBase[];\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * @brief Bit reverse in 32-bit word\r
+ */\r
+UInt32 bitr(UInt32 src)\r
+{\r
+ UInt32 a,c;\r
+ UInt32 i;\r
+ UInt32 sa;\r
+\r
+ a = src;\r
+ c = 0;\r
+ for (i = 0,sa=31; i < 16; i++,sa-=2) {\r
+ c |= (a & (0x1 << i)) << sa;\r
+ }\r
+ for (i = 16,sa=1; i < 32; i++,sa+=2) {\r
+ c |= (a & (0x1 << i)) >> (sa);\r
+ }\r
+ return c;\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+/**\r
+ * @brief Swap bytes in 32-bit word\r
+ */\r
+UInt32 swapBytes(UInt32 src)\r
+{\r
+ UInt32 a,c;\r
+\r
+ a = src;\r
+ c = (a & 0x000000ff) << 24;\r
+ c |= (a & 0x0000ff00) << 8;\r
+ c |= (a & 0x00ff0000) >> 8;\r
+ c |= (a & 0xff000000) >> 24;\r
+ return c;\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Int getTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet, Char *testFolder)\r
+{\r
+ cbDataDesc *cbPtr;\r
+ cbConfig tempCbConfig;\r
+ Int i, cbCnt;\r
+ Int32 numBytes;\r
+\r
+ Char fileName[300];\r
+ FILE *fid;\r
+ Int cbCfgStrSize=(sizeof(cbConfig)>>2);\r
+ Int32 *tmp32 = (Int32 *) &tempCbConfig;\r
+ /* Note: Temporary pointer used for writing\r
+ into the tempCbConfig Structure memory */\r
+ Int32 stmp[3];\r
+#if !READ_BINARY_TEST_VECTORS\r
+ Int8 *syspar;\r
+ UInt32 inSize;\r
+#endif\r
+ UInt32 tmp;\r
+\r
+ /* Get number of blocks */\r
+ strcpy(fileName, testFolder);\r
+ strcat(fileName, "\\number_of_blocks.dat");\r
+ if(!(fid = fopen(fileName,"r")))\r
+ {\r
+ System_printf("\t!!! Error in Number of blocks file : %s !!!\n", fileName);\r
+ System_printf("\n***********************************************************\n");\r
+ System_printf(" It means the test vectors are not available in the folder: \n\t %s \n\n", testFolder);\r
+ System_printf(" Do the following: \n");\r
+ System_printf(" 1) Check the variable named \"testvectFolderBase\" in the corresponding main.c file. \n");\r
+ System_printf(" a) It is set to \"%s\" \n", testvectFolderBase);\r
+ System_printf(" b) Make sure the \"testvectFolderBase\" variable is set to correct folder for testvectors. \n");\r
+ System_printf(" 2) For test project, make sure to run the batch file before running tests: \n");\r
+ System_printf(" %s \n", "\\tcp3d\\test\\gen_test_vectors\\genTestVect.bat");\r
+ System_printf("***********************************************************\n");\r
+ System_exit(0);\r
+ }\r
+ cbCnt = 0;\r
+ fscanf(fid, "%d", &cbTestSet->maxNumCB);\r
+ fclose(fid);\r
+\r
+ /* Allocate memory for code blocks */\r
+ numBytes = cbTestSet->maxNumCB * sizeof(cbDataDesc *);\r
+ cbTestSet->cbData = (cbDataDesc **) Memory_alloc(dataHeap, numBytes, 64, NULL); \r
+\r
+ /* Load code blocks */\r
+ for(cbCnt=0; cbCnt < cbTestSet->maxNumCB; cbCnt++)\r
+ {\r
+ /* Allocate memory for code block set and update the local pointer */\r
+ cbTestSet->cbData[cbCnt] = (cbDataDesc *) Memory_alloc ( dataHeap,\r
+ sizeof(cbDataDesc),\r
+ 64,\r
+ NULL);\r
+ cbPtr = cbTestSet->cbData[cbCnt];\r
+ if ( cbPtr == NULL )\r
+ {\r
+ System_printf("\tMemory allocation failed for Code Block Set %d!\n", cbCnt);\r
+ }\r
+\r
+ /* Open the block parameters file */\r
+ sprintf(fileName, "%s\\block%d_cfgreg.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tConfig file open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ /* Load block parameters */\r
+ for(i=0;i<cbCfgStrSize;i++)\r
+ {\r
+ fscanf(fid, "%d", &stmp[0]);\r
+ tmp32[i] = stmp[0]; /* tmp32 points to tempCbConfig address */ \r
+ }\r
+ fclose(fid);\r
+\r
+ /* Set the Code Block specific values from Config Read */\r
+ cbPtr->blockSize = tempCbConfig.NumInfoBits;\r
+ cbPtr->mode = tempCbConfig.mode_sel;\r
+ cbPtr->crcInitVal = tempCbConfig.lte_crc_init_sel;\r
+ cbPtr->sw0LengthUsed = tempCbConfig.SW0_length;\r
+\r
+ /* Set the code block set value with the first one block config */\r
+ if (cbCnt == 0)\r
+ {\r
+ cbTestSet->mode = cbPtr->mode;\r
+ cbTestSet->lteCrcSel = cbPtr->crcInitVal;\r
+ }\r
+\r
+ /* Check if the mode is different from the first one in the group */\r
+ /* Force the mode value to be same as first one */\r
+ if ( cbPtr->mode != cbTestSet->mode )\r
+ {\r
+ if ( !((cbPtr->mode+cbTestSet->mode) % 3) )\r
+ {\r
+ System_printf("\tBlock = %d, Mode changed from %s to %s\n", cbCnt,\r
+ strMode[cbPtr->mode],\r
+ strMode[cbTestSet->mode]);\r
+ cbPtr->mode = cbTestSet->mode;\r
+ }\r
+ else\r
+ {\r
+ System_exit(0);\r
+ }\r
+ }\r
+\r
+ /* Check for LTE CRC Init Value Change */\r
+ if ( ( cbPtr->mode == TEST_MODE_LTE ) &&\r
+ ( cbPtr->crcInitVal != cbTestSet->lteCrcSel ) )\r
+ {\r
+ System_printf("\tLTE CRC Initial Value is different\n");\r
+ System_printf("\tSet Value is %d\n", cbTestSet->lteCrcSel);\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Allocate Memory for Input LLR data */\r
+ if ( cbPtr->mode == TEST_MODE_SPLIT )\r
+ { /* 3GPP - Split Mode */\r
+ cbPtr->llrOffset = COMPUTE_KOUT(cbPtr->blockSize);\r
+ }\r
+ else\r
+ {\r
+ cbPtr->llrOffset = cbPtr->blockSize;\r
+ }\r
+ cbPtr->sizeLLR = 3 * cbPtr->llrOffset; /* three streams (sys, par0, par1) */\r
+ cbPtr->inLLR = (Int8 *) Memory_alloc(dataHeap, cbPtr->sizeLLR, 64, NULL);\r
+ if(cbPtr->inLLR == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (LLR)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Input LLR streams */\r
+ /* This mode value is set with the value read from cfgreg file */\r
+ if ( cbPtr->mode == TEST_MODE_SPLIT ) /* 3GPP - split mode */\r
+ {\r
+#if READ_BINARY_TEST_VECTORS\r
+ /* Fill syspar with data bits */\r
+ sprintf(fileName, "%s\\block%d_llrs.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->inLLR, 1, cbPtr->llrOffset, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset], 1, cbPtr->llrOffset, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset<<1], 1, cbPtr->llrOffset, fid);\r
+ fclose(fid);\r
+\r
+ /* Fill syspar with tail bits */\r
+ sprintf(fileName, "%s\\block%d_tail_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tTail Bits file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < 6; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d", &stmp[0], &stmp[1]);\r
+ cbPtr->tailBits[i] = (Int8) stmp[0];\r
+ cbPtr->tailBits[6+i] = (Int8) stmp[1];\r
+ }\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ /* set loop count for LLR file read */\r
+ inSize = cbPtr->blockSize*3;\r
+\r
+ /* Allocate memory for syspar temp Buffer for WCDMA case \r
+ syspar = (Int8 *) Memory_alloc(dataHeap, inSize+12, 0, NULL); \r
+ if(syspar == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (SysPar)\n");\r
+ System_exit(0);\r
+ }*/\r
+\r
+ /* Fill syspar with data bits */\r
+ sprintf(fileName, "%s\\block%d_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<inSize;i+=3)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1],&stmp[2]);\r
+ //syspar[i] = (Int8) stmp[0];\r
+ //syspar[i+1] = (Int8) stmp[1];\r
+ //syspar[i+2] = (Int8) stmp[2];\r
+ cbPtr->inLLR[i] = (Int8) stmp[0];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset] = (Int8) stmp[1];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset<<1] = (Int8) stmp[2];\r
+ }\r
+ fclose(fid);\r
+ \r
+ /* Fill syspar with tail bits */\r
+ sprintf(fileName, "%s\\block%d_tail_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tTail Bits file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < 6; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d", &stmp[0], &stmp[1]);\r
+ //syspar[inSize+i] = (Int8) stmp[0];\r
+ //syspar[inSize+6+i] = (Int8) stmp[1];\r
+ cbPtr->tailBits[i] = (Int8) stmp[0];\r
+ cbPtr->tailBits[6+i] = (Int8) stmp[1];\r
+ }\r
+ fclose(fid);\r
+ \r
+ /* Prepare the sys, par1, par2 streams \r
+ TCP3D_WCDMA_dataPrep ( syspar,\r
+ cbPtr->blockSize,\r
+ NULL, // No sign change\r
+ cbPtr->inLLR,\r
+ cbPtr->inLLR+cbPtr->llrOffset,\r
+ cbPtr->inLLR+2*cbPtr->llrOffset,\r
+ betaMap0,\r
+ betaMap1);*/\r
+ \r
+ /* Free syspar Memory \r
+ Memory_free(dataHeap, syspar, inSize+12);*/ \r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_LTE ) /* LTE mode */\r
+ {\r
+ /* Fill syspar with data bits */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->inLLR, 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset], 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset<<1], 1, cbPtr->blockSize, fid);\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<cbPtr->blockSize;i++)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1],&stmp[2]);\r
+ cbPtr->inLLR[i] = (Int8) stmp[0];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset] = (Int8) stmp[1];\r
+ cbPtr->inLLR[i+2*cbPtr->llrOffset]= (Int8) stmp[2];\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ \r
+ /* Fill syspar with tail bits */\r
+ sprintf(fileName, "%s\\block%d_tail_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tTail Bits file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < 6; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d", &stmp[0], &stmp[1]);\r
+ cbPtr->tailBits[i] = (Int8) stmp[0];\r
+ cbPtr->tailBits[6+i] = (Int8) stmp[1];\r
+ }\r
+ fclose(fid);\r
+ }\r
+ else if ( cbPtr->mode == TEST_MODE_WIMAX ) /* WIMAX mode */\r
+ {\r
+ /* Fill syspar with data bits */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->inLLR, 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset], 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->inLLR[cbPtr->llrOffset<<1], 1, cbPtr->blockSize, fid);\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_llrs.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tLLR Data file read failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<cbPtr->blockSize;i++)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1],&stmp[2]);\r
+ cbPtr->inLLR[i] = (Int8) stmp[0];\r
+ cbPtr->inLLR[i+cbPtr->llrOffset] = (Int8) stmp[1];\r
+ cbPtr->inLLR[i+2*cbPtr->llrOffset]= (Int8) stmp[2];\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+\r
+ /* Allocate Memory for Ouput & Reference Hard Decisions */\r
+ cbPtr->sizeHD = COMPUTE_HD_BYTE_SIZE(cbPtr->blockSize);\r
+ cbPtr->outHD = (UInt32 *) Memory_calloc(dataHeap,\r
+ cbPtr->sizeHD,\r
+ 64,\r
+ NULL);\r
+ if(cbPtr->outHD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Out HD)\n");\r
+ System_exit(0);\r
+ }\r
+ cbPtr->refHD = (UInt32 *) Memory_calloc(dataHeap,\r
+ cbPtr->sizeHD,\r
+ 64,\r
+ NULL);\r
+ if(cbPtr->refHD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Ref HD)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Reference Hard Decisions */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_hard_dec.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tHard Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->refHD, 4, (cbPtr->sizeHD>>2), fid);\r
+ \r
+ for(i=0;i<(cbPtr->sizeHD>>2);i++)\r
+ {\r
+#ifdef _BIG_ENDIAN\r
+ tmp = swapBytes(cbPtr->refHD[i]);\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+#else\r
+ tmp = cbPtr->refHD[i];\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+#endif\r
+ }\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_hard_dec.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tHard Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<(cbPtr->sizeHD>>2);i++)\r
+ {\r
+ fscanf(fid, "%x", &tmp);\r
+#ifdef _BIG_ENDIAN\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+#else\r
+ if (!tempCbConfig.out_order_sel)\r
+ {\r
+ cbPtr->refHD[i] = tmp;\r
+ }\r
+ else\r
+ {\r
+ cbPtr->refHD[i] = bitr(tmp);\r
+ }\r
+#endif\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+\r
+ /* Allocate Memory for Interleaver Table */\r
+ /* Interleaver flag is cleared - no external interleaver table */\r
+ cbPtr->interFlag = 0;\r
+ cbPtr->sizeINTER = 0;\r
+ cbPtr->inInter = NULL;\r
+\r
+ /* Allocate Memory for Ouput & Reference Soft Decisions */\r
+ cbPtr->sdFlag = 0;\r
+ cbPtr->sizeSD = 0;\r
+ cbPtr->sdOffset = 0;\r
+ cbPtr->outSD = NULL;\r
+ cbPtr->refSD = NULL;\r
+// tempCbConfig.soft_out_flag_en = 0;\r
+ if ( tempCbConfig.soft_out_flag_en )\r
+ {\r
+ cbPtr->sdFlag = 1;\r
+\r
+ if ( cbPtr->mode == TEST_MODE_SPLIT ) /* SPLIT MODE */\r
+ {\r
+ cbPtr->sizeSD = cbPtr->blockSize;\r
+ cbPtr->sdOffset = NULL;\r
+ }\r
+ else\r
+ {\r
+ cbPtr->sizeSD = 3 * cbPtr->blockSize;\r
+ cbPtr->sdOffset = cbPtr->blockSize;\r
+ }\r
+ cbPtr->outSD = (Int8 *) Memory_calloc(dataHeap, cbPtr->sizeSD, 64, NULL);\r
+ if(cbPtr->outSD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Out SD)\n");\r
+ System_exit(0);\r
+ }\r
+ cbPtr->refSD = (Int8 *) Memory_calloc(dataHeap, cbPtr->sizeSD, 64, NULL);\r
+ if(cbPtr->refSD == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Ref SD)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Reference Soft Decisions */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_soft_dec.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tSoft Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->refSD, 1, cbPtr->blockSize, fid);\r
+ if ( cbPtr->sdOffset )\r
+ {\r
+ fread(&cbPtr->refSD[cbPtr->sdOffset], 1, cbPtr->blockSize, fid);\r
+ fread(&cbPtr->refSD[cbPtr->sdOffset<<1], 1, cbPtr->blockSize, fid);\r
+ }\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_soft_dec.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tSoft Decision File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for (i = 0; i < cbPtr->blockSize; i++)\r
+ {\r
+ fscanf(fid, "%d\t%d\t%d", &stmp[0], &stmp[1], &stmp[2]);\r
+ cbPtr->refSD[i] = (Int8) stmp[0];\r
+ if (cbPtr->sdOffset)\r
+ {\r
+ cbPtr->refSD[i+cbPtr->sdOffset] = (Int8) stmp[1];\r
+ cbPtr->refSD[i+2*cbPtr->sdOffset] = (Int8) stmp[2];\r
+ }\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+\r
+ /* Allocate Memory for Ouput & Reference Status Registers */\r
+ cbPtr->stsFlag = 0;\r
+ cbPtr->sizeSTS = 0;\r
+ cbPtr->outSts = NULL;\r
+ cbPtr->refSts = NULL;\r
+ if ( tempCbConfig.out_flag_en )\r
+ {\r
+ cbPtr->stsFlag = 1;\r
+ /* allocate outSts memory */\r
+ cbPtr->sizeSTS = 3 * sizeof(UInt32);\r
+ cbPtr->outSts = (UInt32 *) Memory_calloc(dataHeap, cbPtr->sizeSTS, 64, NULL);\r
+ if(cbPtr->outSts == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Out STS)\n");\r
+ System_exit(0);\r
+ }\r
+ cbPtr->refSts = (UInt32 *) Memory_calloc(dataHeap, cbPtr->sizeSTS, 64, NULL);\r
+ if(cbPtr->refSts == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (Ref STS)\n");\r
+ System_exit(0);\r
+ }\r
+ \r
+ /* Prepare Reference Status Registers */\r
+#if READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_status.bin", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"rb")) )\r
+ {\r
+ System_printf("\tStatus File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ fread(cbPtr->refSts, sizeof(UInt32), 3, fid);\r
+#ifdef _BIG_ENDIAN\r
+ cbPtr->refSts[0] = swapBytes(cbPtr->refSts[0]);\r
+ cbPtr->refSts[1] = swapBytes(cbPtr->refSts[1]);\r
+ cbPtr->refSts[2] = swapBytes(cbPtr->refSts[2]);\r
+#endif\r
+ fclose(fid);\r
+#else // READ_BINARY_TEST_VECTORS\r
+ sprintf(fileName, "%s\\block%d_status.dat", testFolder, cbCnt);\r
+ if ( !(fid = fopen(fileName,"r")) )\r
+ {\r
+ System_printf("\tStatus File open failed : %s\n", fileName);\r
+ System_exit(0);\r
+ }\r
+ for(i=0;i<3;i++)\r
+ {\r
+ fscanf(fid, "%x", &tmp);\r
+ cbPtr->refSts[i] = (UInt32) tmp;\r
+ }\r
+ fclose(fid);\r
+#endif // READ_BINARY_TEST_VECTORS\r
+ }\r
+// else\r
+// tempCbConfig.out_flag_en = 1;\r
+\r
+ /* Allocate Memory for Input Config Registers */\r
+ cbPtr->sizeCFG = 15 * sizeof(UInt32);\r
+ cbPtr->inCfg = (UInt32 *) Memory_calloc(dataHeap, cbPtr->sizeCFG, 64, NULL);\r
+ if(cbPtr->inCfg == NULL)\r
+ {\r
+ System_printf("\tMemory allocation failed !!! (CFG)\n");\r
+ System_exit(0);\r
+ }\r
+\r
+ /* Allocate Memory for Tcp3d_InCfgParams structure */\r
+ cbPtr->inCfgParams = (Tcp3d_InCfgParams *) Memory_alloc(dataHeap,\r
+ sizeof(Tcp3d_InCfgParams),\r
+ 64,\r
+ NULL);\r
+ if (cbPtr->inCfgParams == NULL)\r
+ {\r
+ System_printf("Memory allocation failed !!! (inCfgParams)\n");\r
+ System_exit(0);\r
+ }\r
+ /* Update the input config params structure */\r
+ fillICParams(cbPtr->inCfgParams, &tempCbConfig);\r
+\r
+ if ( (morePrints) && ((cbCnt+1) % 5) == 0 )\r
+ System_printf("\tCode block prepared : %d \n", cbCnt+1);\r
+\r
+ } /* for(cbCnt=0; cbCnt < cbTestSet->maxNumCB; cbCnt++) */\r
+\r
+ /* Set the double buffer value based on mode value */\r
+ if ( ( cbTestSet->mode == TEST_MODE_SINGLE ) || ( cbTestSet->mode == TEST_MODE_SPLIT ) ) \r
+ cbTestSet->doubleBuffer = 0; //CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_DISABLE\r
+ else\r
+ cbTestSet->doubleBuffer = 1; //CSL_TCP3D_CFG_TCP3_MODE_IN_MEM_DB_EN_ENABLE\r
+\r
+ return (cbCnt);\r
+}\r
+\r
+/*******************************************************************************\r
+ ******************************************************************************/\r
+Void freeTestSetCB(IHeap_Handle dataHeap, cbTestDesc *cbTestSet)\r
+{\r
+ Int32 i;\r
+ \r
+ /* Free memory allocated for Code Block sets */\r
+ for(i=0; i< cbTestSet->maxNumCB; i++)\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inCfg, cbTestSet->cbData[i]->sizeCFG); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inLLR, cbTestSet->cbData[i]->sizeLLR); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->outHD, cbTestSet->cbData[i]->sizeHD); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->refHD, cbTestSet->cbData[i]->sizeHD); \r
+ if ( cbTestSet->cbData[i]->sdFlag )\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->outSD, cbTestSet->cbData[i]->sizeSD); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->refSD, cbTestSet->cbData[i]->sizeSD);\r
+ }\r
+ if ( cbTestSet->cbData[i]->stsFlag )\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->outSts, cbTestSet->cbData[i]->sizeSTS); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->refSts, cbTestSet->cbData[i]->sizeSTS);\r
+ }\r
+ if ( cbTestSet->cbData[i]->interFlag )\r
+ {\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inInter, cbTestSet->cbData[i]->sizeINTER);\r
+ }\r
+ Memory_free(dataHeap, cbTestSet->cbData[i]->inCfgParams, sizeof(Tcp3d_InCfgParams)); \r
+ Memory_free(dataHeap, cbTestSet->cbData[i], sizeof(cbDataDesc)); \r
+ }\r
+ Memory_free(dataHeap, cbTestSet->cbData, cbTestSet->maxNumCB * sizeof(cbDataDesc *));\r
+}\r
+\r
+/* end of file */\r