edma3: reduce some strict binding to EDMA3 LLD

When updating to a recent EDMA3 LLD release, some of the #defines have
changed their 'unsigned number' definition usage from little-u to
big-U (e.g. "#define foo (1u)" was changed to "define foo (1U)").

This causes build issues in FC since FC redefines some of these
definitions (exactly how previous EDMA3 LLD releases did, using
little-u).  When the #defines were identical (FC used little-u, EDMA3
LLD used little-u), there was no issue.  They were redundant
definitions, but they were identical.  But with the EDMA3 LLD change,
the following warning (or error, depending on your compile flags) is
reported (for several definitions):

   warning #48-D: incompatible redefinition of macro
   "EDMA3_MAX_DMA_CH"

With this commit, only define the preprocessor definitions if they
haven't already been defined.  EDMA3 LLD-based users should #include
the EDMA3 LLD headers first, then ti/sdo/fc/edma3/edma3_config.h,
which will now detect that EDMA3 LLD has already made these
definitions and will no longer redundantly define them.

The reality is that the EDMA3 LLD is present in all current
FC-supported environments.  Historically FC supported Linux ARM which
EDMA3 LLD didn't, but FC dropped Linux support a while ago.  So a
potentially better solution would be to _always_ depend on EDMA3 LLD.

Signed-off-by: Chris Ring <cring@ti.com>

diff --git a/packages/ti/sdo/fc/edma3/edma3_config.c b/packages/ti/sdo/fc/edma3/edma3_config.c
index 80edbd074f529456cca15ebacd33a57091b50d2e..535a77823bacf7d89412c45fd97c7ad00cbdf7af 100644 (file)
--- a/packages/ti/sdo/fc/edma3/edma3_config.c
+++ b/packages/ti/sdo/fc/edma3/edma3_config.c
@@ -58,10 +58,11 @@
 #include <ti/sdo/fc/global/FCSettings.h>
 
 #include <ti/xdais/ialg.h>
 #include <ti/sdo/fc/global/FCSettings.h>
 
 #include <ti/xdais/ialg.h>

-#include "edma3_config.h"

 #include <ti/sdo/edma3/rm/edma3_common.h>
 #include <ti/sdo/edma3/rm/edma3_rm.h>
 
 #include <ti/sdo/edma3/rm/edma3_common.h>
 #include <ti/sdo/edma3/rm/edma3_rm.h>
 

+#include "edma3_config.h"
+

 extern __FAR__ EDMA3_GblConfigParams * ti_sdo_fc_edma3_Settings_globalConfig;
 extern __FAR__ EDMA3_InstanceInitConfig * ti_sdo_fc_edma3_Settings_regionConfig;
 /* TODO: Fix the SEMKEY function */
 extern __FAR__ EDMA3_GblConfigParams * ti_sdo_fc_edma3_Settings_globalConfig;
 extern __FAR__ EDMA3_InstanceInitConfig * ti_sdo_fc_edma3_Settings_regionConfig;
 /* TODO: Fix the SEMKEY function */

diff --git a/packages/ti/sdo/fc/edma3/edma3_config.h b/packages/ti/sdo/fc/edma3/edma3_config.h
index 948d85ccd196749c3dd1b699dd7f8f9b755072e3..e8c2f6e72c142026068822f823937f1c007c321b 100644 (file)
--- a/packages/ti/sdo/fc/edma3/edma3_config.h
+++ b/packages/ti/sdo/fc/edma3/edma3_config.h
@@ -155,49 +155,76 @@ extern "C" {
 #define EDMA3_PHYSICALID    0            /**< Physical ID identifying the EDMA3
                                             device being managed */
 
 #define EDMA3_PHYSICALID    0            /**< Physical ID identifying the EDMA3
                                             device being managed */
 

+/*
+ * The next several #defines are _typically_ defined by EDMA3 LLD headers.
+ * In cases where the EDMA3 LLD isn't present (e.g. devices not supported by
+ * EDMA3 LLD), we define them here.
+ */
+#ifndef EDMA3_MAX_DMA_CH

 #define EDMA3_MAX_DMA_CH    (64u)        /**< Maximum DMA channels supported
                                             by the EDMA3 Controller */
 #define EDMA3_MAX_DMA_CH    (64u)        /**< Maximum DMA channels supported
                                             by the EDMA3 Controller */

+#endif

 
 

+#ifndef EDMA3_MAX_QDMA_CH

 #define EDMA3_MAX_QDMA_CH   (8u)         /**< Maximum QDMA channels supported
                                             by the EDMA3 Controller */
 #define EDMA3_MAX_QDMA_CH   (8u)         /**< Maximum QDMA channels supported
                                             by the EDMA3 Controller */

+#endif

 
 

+#ifndef EDMA3_MAX_PARAM_SETS

 #define EDMA3_MAX_PARAM_SETS (512u)      /**< Maximum PaRAM Sets supported by
                                             the EDMA3 Controller */
 #define EDMA3_MAX_PARAM_SETS (512u)      /**< Maximum PaRAM Sets supported by
                                             the EDMA3 Controller */

+#endif

 
 

+#ifndef EDMA3_MAX_TCC

 #define EDMA3_MAX_TCC       (64u)        /**< Maximum TCCs (Interrupt Channels)
                                             supported by the EDMA3 Controller */
 #define EDMA3_MAX_TCC       (64u)        /**< Maximum TCCs (Interrupt Channels)
                                             supported by the EDMA3 Controller */

+#endif

 
 

+#ifndef EDMA3_MAX_EVT_QUE

 #define EDMA3_MAX_EVT_QUE   (8u)         /**< Maximum Event Queues supported by                                             the EDMA3 Controller */
 #define EDMA3_MAX_EVT_QUE   (8u)         /**< Maximum Event Queues supported by                                             the EDMA3 Controller */

+#endif

 
 

+#ifndef EDMA3_MAX_TC

 #define EDMA3_MAX_TC        (8u)         /**< Maximum Transfer Controllers
                                             supported by the EDMA3 Controller */
 #define EDMA3_MAX_TC        (8u)         /**< Maximum Transfer Controllers
                                             supported by the EDMA3 Controller */

+#endif

 
 

+#ifndef EDMA3_MAX_REGIONS

 #define EDMA3_MAX_REGIONS   (8u)         /**< Maximum Shadow Regions supported
                                             by the EDMA3 Controller */
 #define EDMA3_MAX_REGIONS   (8u)         /**< Maximum Shadow Regions supported
                                             by the EDMA3 Controller */

+#endif

 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible DMA channels.
  */
 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible DMA channels.
  */

+#ifndef EDMA3_MAX_DMA_CHAN_DWRDS

 #define EDMA3_MAX_DMA_CHAN_DWRDS                (EDMA3_MAX_DMA_CH / 32u)
 #define EDMA3_MAX_DMA_CHAN_DWRDS                (EDMA3_MAX_DMA_CH / 32u)

+#endif

 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible QDMA channels.
  */
 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible QDMA channels.
  */

+#ifndef EDMA3_MAX_QDMA_CHAN_DWRDS

 #define EDMA3_MAX_QDMA_CHAN_DWRDS               (1u)
 #define EDMA3_MAX_QDMA_CHAN_DWRDS               (1u)

+#endif

 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible PaRAM Sets.
  */
 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible PaRAM Sets.
  */

+#ifndef EDMA3_MAX_PARAM_DWRDS

 #define EDMA3_MAX_PARAM_DWRDS                   (EDMA3_MAX_PARAM_SETS / 32u)
 #define EDMA3_MAX_PARAM_DWRDS                   (EDMA3_MAX_PARAM_SETS / 32u)

+#endif

 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible TCCs.
  */
 
 /**
  * Maximum Words (4-bytes region) required for the book-keeping information
  * specific to the maximum possible TCCs.
  */

+#ifndef EDMA3_MAX_TCC_DWRDS

 #define EDMA3_MAX_TCC_DWRDS                     (EDMA3_MAX_TCC / 32u)
 #define EDMA3_MAX_TCC_DWRDS                     (EDMA3_MAX_TCC / 32u)

+#endif

 
 /**
  * Defines that identify different types of memory writes supported by EDMA3
 
 /**
  * Defines that identify different types of memory writes supported by EDMA3