1 /*
2 * Simple driver for Texas Instruments lp8758 Regulator chip
3 * Copyright (C) 2015 Texas Instruments
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 */
11 #ifndef __LINUX_LP8758_H
12 #define __LINUX_LP8758_H
14 #include <linux/regulator/consumer.h>
16 #define LP8758_NAME "lp8758"
17 #define LP8758_ADDR 0x60
19 enum lp8758_otp_id {
20 LP8758_B0 = 0xb0,
21 LP8758_D0 = 0xd0,
22 LP8758_E0 = 0xe0,
23 LP8758_F0 = 0xf0
24 };
26 enum lp8758_sub_version {
27 LP8758_SUB_VER_B0 = 0,
28 LP8758_SUB_VER_D0,
29 LP8758_SUB_VER_E0,
30 LP8758_SUB_VER_F0,
31 LP8758_SUB_VER_MAX
32 };
34 enum lp8758_bucks {
35 LP8758_BUCK0 = 0,
36 LP8758_BUCK1,
37 LP8758_BUCK2,
38 LP8758_BUCK3,
39 LP8758_BUCK_MAX
40 };
42 /*
43 * MODE0 : Pin Ctrl disable
44 * MODE1 : Pin1 Ctrl + Enable/Disable
45 * MODE2 : Pin1 Ctrl + Roof/Floor
46 * MODE3 : Pin2 Ctrl + Enable/Diasble
47 * MODE4 : Pin2 Ctrl + Roof/Floor
48 */
49 enum lp8758_ctrl_mode {
50 LP8758_CTRL_MODE0 = 0,
51 LP8758_CTRL_MODE1,
52 LP8758_CTRL_MODE2,
53 LP8758_CTRL_MODE3,
54 LP8758_CTRL_MODE4,
55 LP8758_CTRL_MAX
56 };
58 enum lp8758_buck_mode {
59 LP8758_BUCK_MASTER = 0,
60 LP8758_BUCK_SLAVE
61 };
63 enum lp8758_op_mode {
64 LP8758_BUCK_OP_AUTO = 0x00,
65 LP8758_BUCK_OP_FPWM = 0x02,
66 };
68 enum lp8758_registers {
69 LP8758_REG_DEV_REV = 0x00,
70 LP8758_REG_OTP_REV = 0x01,
71 LP8758_REG_BUCK0_CTRL1 = 0x02,
72 LP8758_REG_BUCK0_CTRL2 = 0x03,
73 LP8758_REG_BUCK1_CTRL1 = 0x04,
74 LP8758_REG_BUCK1_CTRL2 = 0x05,
75 LP8758_REG_BUCK2_CTRL1 = 0x06,
76 LP8758_REG_BUCK2_CTRL2 = 0x07,
77 LP8758_REG_BUCK3_CTRL1 = 0x08,
78 LP8758_REG_BUCK3_CTRL2 = 0x09,
79 LP8758_REG_BUCK0_VOUT = 0x0a,
80 LP8758_REG_BUCK0_FLOORVOUT = 0x0b,
81 LP8758_REG_BUCK1_VOUT = 0x0c,
82 LP8758_REG_BUCK1_FLOORVOUT = 0x0d,
83 LP8758_REG_BUCK2_VOUT = 0x0e,
84 LP8758_REG_BUCK2_FLOORVOUT = 0x0f,
85 LP8758_REG_BUCK3_VOUT = 0x10,
86 LP8758_REG_BUCK3_FLOORVOUT = 0x11,
87 LP8758_REG_BUCK0_DELAY = 0x12,
88 LP8758_REG_BUCK1_DELAY = 0x13,
89 LP8758_REG_BUCK2_DELAY = 0x14,
90 LP8758_REG_BUCK3_DELAY = 0x15,
91 LP8758_REG_RESET = 0x16,
92 LP8758_REG_CONFIG = 0x17,
93 LP8758_REG_INT_TOP = 0x18,
94 LP8758_REG_INT_BUCK_01 = 0x19,
95 LP8758_REG_INT_BUCK_23 = 0x1a,
96 LP8758_REG_STAT_TOP = 0x1b,
97 LP8758_REG_STAT_BUCK_01 = 0x1c,
98 LP8758_REG_STAT_BUCK_23 = 0x1d,
99 LP8758_REG_MASK_TOP = 0x1e,
100 LP8758_REG_MASK_BUCK_01 = 0x1f,
101 LP8758_REG_MASK_BUCK_23 = 0x20,
102 LP8758_REG_SEL_I_LOAD = 0x21,
103 LP8758_REG_SEL_I_LOAD_2 = 0x22,
104 LP8758_REG_SEL_I_LOAD_1 = 0x23,
105 LP8758_REG_MAX = 0xff
106 };
108 /*
109 * PWR FAULT : power fault detected
110 * OCP : over current protect activated
111 * OVP : over voltage protect activated
112 * TEMP_WARN : thermal warning
113 * TEMP_SHDN : thermal shutdonw detected
114 * I_LOAD : current measured
115 */
116 #define LP8758_EVENT_PWR_FAULT REGULATOR_EVENT_FAIL
117 #define LP8758_EVENT_OCP REGULATOR_EVENT_OVER_CURRENT
118 #define LP8758_EVENT_OVP 0x10000
119 #define LP8758_EVENT_TEMP_WARN 0x2000
120 #define LP8758_EVENT_TEMP_SHDN REGULATOR_EVENT_OVER_TEMP
121 #define LP8758_EVENT_I_LOAD 0x40000
123 #define LP8758_INT_BUCK01_MASK 0x30
124 #define LP8758_INT_BUCK23_MASK 0xc0
125 #define LP8758_INT_TEMP_SHDN_MASK 0x08
126 #define LP8758_INT_TEMP_WARN_MASK 0x04
128 /* Over Current interrupt mask */
129 #define LP8758_INT_OVC_BUCK0_MASK 0x01
130 #define LP8758_INT_OVC_BUCK1_MASK 0x10
131 #define LP8758_INT_OVC_BUCK2_MASK 0x01
132 #define LP8758_INT_OVC_BUCK3_MASK 0x10
133 /* Short Circuit interrupt mask */
134 #define LP8758_INT_SC_BUCK0_MASK 0x02
135 #define LP8758_INT_SC_BUCK1_MASK 0x20
136 #define LP8758_INT_SC_BUCK2_MASK 0x02
137 #define LP8758_INT_SC_BUCK3_MASK 0x20
138 /* Power Ground Reach interrupt mask */
139 #define LP8758_INT_PG_BUCK0_MASK 0x04
140 #define LP8758_INT_PG_BUCK1_MASK 0x40
141 #define LP8758_INT_PG_BUCK2_MASK 0x04
142 #define LP8758_INT_PG_BUCK3_MASK 0x40
144 #define LP8758_INT_TMEP_MASK\
145 (LP8758_INT_TEMP_WARN_MASK | LP8758_INT_TEMP_SHDN_MASK)
146 #define LP8758_INT_PWR_FAULT_BUCK0_MASK\
147 (LP8758_INT_SC_BUCK0_MASK | LP8758_INT_SC_BUCK0_MASK)
148 #define LP8758_INT_PWR_FAULT_BUCK1_MASK\
149 (LP8758_INT_SC_BUCK1_MASK | LP8758_INT_SC_BUCK1_MASK)
150 #define LP8758_INT_PWR_FAULT_BUCK2_MASK\
151 (LP8758_INT_SC_BUCK2_MASK | LP8758_INT_SC_BUCK2_MASK)
152 #define LP8758_INT_PWR_FAULT_BUCK3_MASK\
153 (LP8758_INT_SC_BUCK3_MASK | LP8758_INT_SC_BUCK3_MASK)
155 #define LP8758_INT_CLEAR_TOP 0x0f
156 #define LP8758_INT_CLEAR_BUCK 0x77
158 #define LP8758_ILIM_MASK 0x38
159 #define LP8758_ILIM_SHIFT 3
161 #define LP8758_BUCK_EN_MASK 0x80
162 #define LP8758_BUCK_VOUT_MASK 0xff
164 #define LP8758_CTRL_BUCK_MASK 0x70
165 #define LP8758_CTRL_BUCK_SHIFT 4
166 #define LP8758_CTRL_PIN_EN_MASK 0x04
168 #define LP8758_BUCK_RAMP_MASK 0x07
169 #define LP8758_BUCK_OP_MODE_MASK 0x04
171 /*
172 * struct lp8758 platform data
173 * @irq : irq number
174 * @sub_version : otp version 0-b0, 1-d0, 2-e0, 3-f0
175 * @buck_ctrl[] : [0] buck0 buck control config.
176 * [1] buck1 buck control config.
177 * [2] buck2 buck control config.
178 * [3] buck3 buck control config.
179 * control config
180 * : 0 - EN_BUCK bit only
181 * : 1 - EN_BUCK bit & EN_PIN1 ENABLE/DISABLE
182 * : 2 - EN_BUCK bit & EN_PIN1 ROOF/FLOOR
183 * : 3 - EN_BUCK bit & EN_PIN2 ENABLE/DISABLE
184 * : 4 - EN_BUCK bit & EN_PIN2 ROOF/FLOOR
185 * @buck_data : init buck data
186 */
187 struct lp8758_platform_data {
189 int irq;
190 u32 sub_version;
191 u32 buck_ctrl[LP8758_BUCK_MAX];
192 struct regulator_init_data *buck_data[LP8758_BUCK_MAX];
193 };
194 #endif /* __LINUX_LP8758_H */