1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the SelectionDAG class.
11 //
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/CallingConv.h"
18 #include "llvm/Constants.h"
19 #include "llvm/DebugInfo.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Function.h"
22 #include "llvm/GlobalAlias.h"
23 #include "llvm/GlobalVariable.h"
24 #include "llvm/Intrinsics.h"
25 #include "llvm/Analysis/ValueTracking.h"
26 #include "llvm/Assembly/Writer.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/DataLayout.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
51 #include <algorithm>
52 #include <cmath>
53 using namespace llvm;
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
59 return Res;
60 }
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f16: return &APFloat::IEEEhalf;
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
71 }
72 }
74 // Default null implementations of the callbacks.
75 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
76 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
78 //===----------------------------------------------------------------------===//
79 // ConstantFPSDNode Class
80 //===----------------------------------------------------------------------===//
82 /// isExactlyValue - We don't rely on operator== working on double values, as
83 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
84 /// As such, this method can be used to do an exact bit-for-bit comparison of
85 /// two floating point values.
86 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
87 return getValueAPF().bitwiseIsEqual(V);
88 }
90 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 const APFloat& Val) {
92 assert(VT.isFloatingPoint() && "Can only convert between FP types");
94 // PPC long double cannot be converted to any other type.
95 if (VT == MVT::ppcf128 ||
96 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
97 return false;
99 // convert modifies in place, so make a copy.
100 APFloat Val2 = APFloat(Val);
101 bool losesInfo;
102 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 &losesInfo);
104 return !losesInfo;
105 }
107 //===----------------------------------------------------------------------===//
108 // ISD Namespace
109 //===----------------------------------------------------------------------===//
111 /// isBuildVectorAllOnes - Return true if the specified node is a
112 /// BUILD_VECTOR where all of the elements are ~0 or undef.
113 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
114 // Look through a bit convert.
115 if (N->getOpcode() == ISD::BITCAST)
116 N = N->getOperand(0).getNode();
118 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
120 unsigned i = 0, e = N->getNumOperands();
122 // Skip over all of the undef values.
123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
124 ++i;
126 // Do not accept an all-undef vector.
127 if (i == e) return false;
129 // Do not accept build_vectors that aren't all constants or which have non-~0
130 // elements. We have to be a bit careful here, as the type of the constant
131 // may not be the same as the type of the vector elements due to type
132 // legalization (the elements are promoted to a legal type for the target and
133 // a vector of a type may be legal when the base element type is not).
134 // We only want to check enough bits to cover the vector elements, because
135 // we care if the resultant vector is all ones, not whether the individual
136 // constants are.
137 SDValue NotZero = N->getOperand(i);
138 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
139 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
140 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
141 return false;
142 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
143 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
144 return false;
145 } else
146 return false;
148 // Okay, we have at least one ~0 value, check to see if the rest match or are
149 // undefs. Even with the above element type twiddling, this should be OK, as
150 // the same type legalization should have applied to all the elements.
151 for (++i; i != e; ++i)
152 if (N->getOperand(i) != NotZero &&
153 N->getOperand(i).getOpcode() != ISD::UNDEF)
154 return false;
155 return true;
156 }
159 /// isBuildVectorAllZeros - Return true if the specified node is a
160 /// BUILD_VECTOR where all of the elements are 0 or undef.
161 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
162 // Look through a bit convert.
163 if (N->getOpcode() == ISD::BITCAST)
164 N = N->getOperand(0).getNode();
166 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
168 unsigned i = 0, e = N->getNumOperands();
170 // Skip over all of the undef values.
171 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
172 ++i;
174 // Do not accept an all-undef vector.
175 if (i == e) return false;
177 // Do not accept build_vectors that aren't all constants or which have non-0
178 // elements.
179 SDValue Zero = N->getOperand(i);
180 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
181 if (!CN->isNullValue())
182 return false;
183 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
184 if (!CFPN->getValueAPF().isPosZero())
185 return false;
186 } else
187 return false;
189 // Okay, we have at least one 0 value, check to see if the rest match or are
190 // undefs.
191 for (++i; i != e; ++i)
192 if (N->getOperand(i) != Zero &&
193 N->getOperand(i).getOpcode() != ISD::UNDEF)
194 return false;
195 return true;
196 }
198 /// isScalarToVector - Return true if the specified node is a
199 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
200 /// element is not an undef.
201 bool ISD::isScalarToVector(const SDNode *N) {
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
203 return true;
205 if (N->getOpcode() != ISD::BUILD_VECTOR)
206 return false;
207 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
208 return false;
209 unsigned NumElems = N->getNumOperands();
210 if (NumElems == 1)
211 return false;
212 for (unsigned i = 1; i < NumElems; ++i) {
213 SDValue V = N->getOperand(i);
214 if (V.getOpcode() != ISD::UNDEF)
215 return false;
216 }
217 return true;
218 }
220 /// allOperandsUndef - Return true if the node has at least one operand
221 /// and all operands of the specified node are ISD::UNDEF.
222 bool ISD::allOperandsUndef(const SDNode *N) {
223 // Return false if the node has no operands.
224 // This is "logically inconsistent" with the definition of "all" but
225 // is probably the desired behavior.
226 if (N->getNumOperands() == 0)
227 return false;
229 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
230 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
231 return false;
233 return true;
234 }
236 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
237 /// when given the operation for (X op Y).
238 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
239 // To perform this operation, we just need to swap the L and G bits of the
240 // operation.
241 unsigned OldL = (Operation >> 2) & 1;
242 unsigned OldG = (Operation >> 1) & 1;
243 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
244 (OldL << 1) | // New G bit
245 (OldG << 2)); // New L bit.
246 }
248 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
249 /// 'op' is a valid SetCC operation.
250 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
251 unsigned Operation = Op;
252 if (isInteger)
253 Operation ^= 7; // Flip L, G, E bits, but not U.
254 else
255 Operation ^= 15; // Flip all of the condition bits.
257 if (Operation > ISD::SETTRUE2)
258 Operation &= ~8; // Don't let N and U bits get set.
260 return ISD::CondCode(Operation);
261 }
264 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
265 /// signed operation and 2 if the result is an unsigned comparison. Return zero
266 /// if the operation does not depend on the sign of the input (setne and seteq).
267 static int isSignedOp(ISD::CondCode Opcode) {
268 switch (Opcode) {
269 default: llvm_unreachable("Illegal integer setcc operation!");
270 case ISD::SETEQ:
271 case ISD::SETNE: return 0;
272 case ISD::SETLT:
273 case ISD::SETLE:
274 case ISD::SETGT:
275 case ISD::SETGE: return 1;
276 case ISD::SETULT:
277 case ISD::SETULE:
278 case ISD::SETUGT:
279 case ISD::SETUGE: return 2;
280 }
281 }
283 /// getSetCCOrOperation - Return the result of a logical OR between different
284 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
285 /// returns SETCC_INVALID if it is not possible to represent the resultant
286 /// comparison.
287 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 bool isInteger) {
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed integer setcc with an unsigned integer setcc.
291 return ISD::SETCC_INVALID;
293 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
295 // If the N and U bits get set then the resultant comparison DOES suddenly
296 // care about orderedness, and is true when ordered.
297 if (Op > ISD::SETTRUE2)
298 Op &= ~16; // Clear the U bit if the N bit is set.
300 // Canonicalize illegal integer setcc's.
301 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
302 Op = ISD::SETNE;
304 return ISD::CondCode(Op);
305 }
307 /// getSetCCAndOperation - Return the result of a logical AND between different
308 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
309 /// function returns zero if it is not possible to represent the resultant
310 /// comparison.
311 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
312 bool isInteger) {
313 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
314 // Cannot fold a signed setcc with an unsigned setcc.
315 return ISD::SETCC_INVALID;
317 // Combine all of the condition bits.
318 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
320 // Canonicalize illegal integer setcc's.
321 if (isInteger) {
322 switch (Result) {
323 default: break;
324 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
325 case ISD::SETOEQ: // SETEQ & SETU[LG]E
326 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
327 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
328 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
329 }
330 }
332 return Result;
333 }
335 //===----------------------------------------------------------------------===//
336 // SDNode Profile Support
337 //===----------------------------------------------------------------------===//
339 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
340 ///
341 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
342 ID.AddInteger(OpC);
343 }
345 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
346 /// solely with their pointer.
347 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
348 ID.AddPointer(VTList.VTs);
349 }
351 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
352 ///
353 static void AddNodeIDOperands(FoldingSetNodeID &ID,
354 const SDValue *Ops, unsigned NumOps) {
355 for (; NumOps; --NumOps, ++Ops) {
356 ID.AddPointer(Ops->getNode());
357 ID.AddInteger(Ops->getResNo());
358 }
359 }
361 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
362 ///
363 static void AddNodeIDOperands(FoldingSetNodeID &ID,
364 const SDUse *Ops, unsigned NumOps) {
365 for (; NumOps; --NumOps, ++Ops) {
366 ID.AddPointer(Ops->getNode());
367 ID.AddInteger(Ops->getResNo());
368 }
369 }
371 static void AddNodeIDNode(FoldingSetNodeID &ID,
372 unsigned short OpC, SDVTList VTList,
373 const SDValue *OpList, unsigned N) {
374 AddNodeIDOpcode(ID, OpC);
375 AddNodeIDValueTypes(ID, VTList);
376 AddNodeIDOperands(ID, OpList, N);
377 }
379 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
380 /// the NodeID data.
381 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
382 switch (N->getOpcode()) {
383 case ISD::TargetExternalSymbol:
384 case ISD::ExternalSymbol:
385 llvm_unreachable("Should only be used on nodes with operands");
386 default: break; // Normal nodes don't need extra info.
387 case ISD::TargetConstant:
388 case ISD::Constant:
389 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
390 break;
391 case ISD::TargetConstantFP:
392 case ISD::ConstantFP: {
393 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
394 break;
395 }
396 case ISD::TargetGlobalAddress:
397 case ISD::GlobalAddress:
398 case ISD::TargetGlobalTLSAddress:
399 case ISD::GlobalTLSAddress: {
400 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
401 ID.AddPointer(GA->getGlobal());
402 ID.AddInteger(GA->getOffset());
403 ID.AddInteger(GA->getTargetFlags());
404 ID.AddInteger(GA->getAddressSpace());
405 break;
406 }
407 case ISD::BasicBlock:
408 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
409 break;
410 case ISD::Register:
411 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
412 break;
413 case ISD::RegisterMask:
414 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
415 break;
416 case ISD::SRCVALUE:
417 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
418 break;
419 case ISD::FrameIndex:
420 case ISD::TargetFrameIndex:
421 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
422 break;
423 case ISD::JumpTable:
424 case ISD::TargetJumpTable:
425 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
426 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
427 break;
428 case ISD::ConstantPool:
429 case ISD::TargetConstantPool: {
430 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
431 ID.AddInteger(CP->getAlignment());
432 ID.AddInteger(CP->getOffset());
433 if (CP->isMachineConstantPoolEntry())
434 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
435 else
436 ID.AddPointer(CP->getConstVal());
437 ID.AddInteger(CP->getTargetFlags());
438 break;
439 }
440 case ISD::TargetIndex: {
441 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
442 ID.AddInteger(TI->getIndex());
443 ID.AddInteger(TI->getOffset());
444 ID.AddInteger(TI->getTargetFlags());
445 break;
446 }
447 case ISD::LOAD: {
448 const LoadSDNode *LD = cast<LoadSDNode>(N);
449 ID.AddInteger(LD->getMemoryVT().getRawBits());
450 ID.AddInteger(LD->getRawSubclassData());
451 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
452 break;
453 }
454 case ISD::STORE: {
455 const StoreSDNode *ST = cast<StoreSDNode>(N);
456 ID.AddInteger(ST->getMemoryVT().getRawBits());
457 ID.AddInteger(ST->getRawSubclassData());
458 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
459 break;
460 }
461 case ISD::ATOMIC_CMP_SWAP:
462 case ISD::ATOMIC_SWAP:
463 case ISD::ATOMIC_LOAD_ADD:
464 case ISD::ATOMIC_LOAD_SUB:
465 case ISD::ATOMIC_LOAD_AND:
466 case ISD::ATOMIC_LOAD_OR:
467 case ISD::ATOMIC_LOAD_XOR:
468 case ISD::ATOMIC_LOAD_NAND:
469 case ISD::ATOMIC_LOAD_MIN:
470 case ISD::ATOMIC_LOAD_MAX:
471 case ISD::ATOMIC_LOAD_UMIN:
472 case ISD::ATOMIC_LOAD_UMAX:
473 case ISD::ATOMIC_LOAD:
474 case ISD::ATOMIC_STORE: {
475 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
476 ID.AddInteger(AT->getMemoryVT().getRawBits());
477 ID.AddInteger(AT->getRawSubclassData());
478 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
479 break;
480 }
481 case ISD::PREFETCH: {
482 const MemSDNode *PF = cast<MemSDNode>(N);
483 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
484 break;
485 }
486 case ISD::VECTOR_SHUFFLE: {
487 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
488 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
489 i != e; ++i)
490 ID.AddInteger(SVN->getMaskElt(i));
491 break;
492 }
493 case ISD::TargetBlockAddress:
494 case ISD::BlockAddress: {
495 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
496 ID.AddPointer(BA->getBlockAddress());
497 ID.AddInteger(BA->getOffset());
498 ID.AddInteger(BA->getTargetFlags());
499 break;
500 }
501 } // end switch (N->getOpcode())
503 // Target specific memory nodes could also have address spaces to check.
504 if (N->isTargetMemoryOpcode())
505 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
506 }
508 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
509 /// data.
510 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
511 AddNodeIDOpcode(ID, N->getOpcode());
512 // Add the return value info.
513 AddNodeIDValueTypes(ID, N->getVTList());
514 // Add the operand info.
515 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
517 // Handle SDNode leafs with special info.
518 AddNodeIDCustom(ID, N);
519 }
521 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
522 /// the CSE map that carries volatility, temporalness, indexing mode, and
523 /// extension/truncation information.
524 ///
525 static inline unsigned
526 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
527 bool isNonTemporal, bool isInvariant) {
528 assert((ConvType & 3) == ConvType &&
529 "ConvType may not require more than 2 bits!");
530 assert((AM & 7) == AM &&
531 "AM may not require more than 3 bits!");
532 return ConvType |
533 (AM << 2) |
534 (isVolatile << 5) |
535 (isNonTemporal << 6) |
536 (isInvariant << 7);
537 }
539 //===----------------------------------------------------------------------===//
540 // SelectionDAG Class
541 //===----------------------------------------------------------------------===//
543 /// doNotCSE - Return true if CSE should not be performed for this node.
544 static bool doNotCSE(SDNode *N) {
545 if (N->getValueType(0) == MVT::Glue)
546 return true; // Never CSE anything that produces a flag.
548 switch (N->getOpcode()) {
549 default: break;
550 case ISD::HANDLENODE:
551 case ISD::EH_LABEL:
552 return true; // Never CSE these nodes.
553 }
555 // Check that remaining values produced are not flags.
556 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
557 if (N->getValueType(i) == MVT::Glue)
558 return true; // Never CSE anything that produces a flag.
560 return false;
561 }
563 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
564 /// SelectionDAG.
565 void SelectionDAG::RemoveDeadNodes() {
566 // Create a dummy node (which is not added to allnodes), that adds a reference
567 // to the root node, preventing it from being deleted.
568 HandleSDNode Dummy(getRoot());
570 SmallVector<SDNode*, 128> DeadNodes;
572 // Add all obviously-dead nodes to the DeadNodes worklist.
573 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
574 if (I->use_empty())
575 DeadNodes.push_back(I);
577 RemoveDeadNodes(DeadNodes);
579 // If the root changed (e.g. it was a dead load, update the root).
580 setRoot(Dummy.getValue());
581 }
583 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
584 /// given list, and any nodes that become unreachable as a result.
585 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
587 // Process the worklist, deleting the nodes and adding their uses to the
588 // worklist.
589 while (!DeadNodes.empty()) {
590 SDNode *N = DeadNodes.pop_back_val();
592 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
593 DUL->NodeDeleted(N, 0);
595 // Take the node out of the appropriate CSE map.
596 RemoveNodeFromCSEMaps(N);
598 // Next, brutally remove the operand list. This is safe to do, as there are
599 // no cycles in the graph.
600 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
601 SDUse &Use = *I++;
602 SDNode *Operand = Use.getNode();
603 Use.set(SDValue());
605 // Now that we removed this operand, see if there are no uses of it left.
606 if (Operand->use_empty())
607 DeadNodes.push_back(Operand);
608 }
610 DeallocateNode(N);
611 }
612 }
614 void SelectionDAG::RemoveDeadNode(SDNode *N){
615 SmallVector<SDNode*, 16> DeadNodes(1, N);
617 // Create a dummy node that adds a reference to the root node, preventing
618 // it from being deleted. (This matters if the root is an operand of the
619 // dead node.)
620 HandleSDNode Dummy(getRoot());
622 RemoveDeadNodes(DeadNodes);
623 }
625 void SelectionDAG::DeleteNode(SDNode *N) {
626 // First take this out of the appropriate CSE map.
627 RemoveNodeFromCSEMaps(N);
629 // Finally, remove uses due to operands of this node, remove from the
630 // AllNodes list, and delete the node.
631 DeleteNodeNotInCSEMaps(N);
632 }
634 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
635 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
636 assert(N->use_empty() && "Cannot delete a node that is not dead!");
638 // Drop all of the operands and decrement used node's use counts.
639 N->DropOperands();
641 DeallocateNode(N);
642 }
644 void SelectionDAG::DeallocateNode(SDNode *N) {
645 if (N->OperandsNeedDelete)
646 delete[] N->OperandList;
648 // Set the opcode to DELETED_NODE to help catch bugs when node
649 // memory is reallocated.
650 N->NodeType = ISD::DELETED_NODE;
652 NodeAllocator.Deallocate(AllNodes.remove(N));
654 // Remove the ordering of this node.
655 Ordering->remove(N);
657 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
658 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
659 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
660 DbgVals[i]->setIsInvalidated();
661 }
663 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
664 /// correspond to it. This is useful when we're about to delete or repurpose
665 /// the node. We don't want future request for structurally identical nodes
666 /// to return N anymore.
667 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
668 bool Erased = false;
669 switch (N->getOpcode()) {
670 case ISD::HANDLENODE: return false; // noop.
671 case ISD::CONDCODE:
672 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
673 "Cond code doesn't exist!");
674 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
675 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
676 break;
677 case ISD::ExternalSymbol:
678 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
679 break;
680 case ISD::TargetExternalSymbol: {
681 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
682 Erased = TargetExternalSymbols.erase(
683 std::pair<std::string,unsigned char>(ESN->getSymbol(),
684 ESN->getTargetFlags()));
685 break;
686 }
687 case ISD::VALUETYPE: {
688 EVT VT = cast<VTSDNode>(N)->getVT();
689 if (VT.isExtended()) {
690 Erased = ExtendedValueTypeNodes.erase(VT);
691 } else {
692 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
693 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
694 }
695 break;
696 }
697 default:
698 // Remove it from the CSE Map.
699 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
700 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
701 Erased = CSEMap.RemoveNode(N);
702 break;
703 }
704 #ifndef NDEBUG
705 // Verify that the node was actually in one of the CSE maps, unless it has a
706 // flag result (which cannot be CSE'd) or is one of the special cases that are
707 // not subject to CSE.
708 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
709 !N->isMachineOpcode() && !doNotCSE(N)) {
710 N->dump(this);
711 dbgs() << "\n";
712 llvm_unreachable("Node is not in map!");
713 }
714 #endif
715 return Erased;
716 }
718 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
719 /// maps and modified in place. Add it back to the CSE maps, unless an identical
720 /// node already exists, in which case transfer all its users to the existing
721 /// node. This transfer can potentially trigger recursive merging.
722 ///
723 void
724 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
725 // For node types that aren't CSE'd, just act as if no identical node
726 // already exists.
727 if (!doNotCSE(N)) {
728 SDNode *Existing = CSEMap.GetOrInsertNode(N);
729 if (Existing != N) {
730 // If there was already an existing matching node, use ReplaceAllUsesWith
731 // to replace the dead one with the existing one. This can cause
732 // recursive merging of other unrelated nodes down the line.
733 ReplaceAllUsesWith(N, Existing);
735 // N is now dead. Inform the listeners and delete it.
736 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
737 DUL->NodeDeleted(N, Existing);
738 DeleteNodeNotInCSEMaps(N);
739 return;
740 }
741 }
743 // If the node doesn't already exist, we updated it. Inform listeners.
744 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
745 DUL->NodeUpdated(N);
746 }
748 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
749 /// were replaced with those specified. If this node is never memoized,
750 /// return null, otherwise return a pointer to the slot it would take. If a
751 /// node already exists with these operands, the slot will be non-null.
752 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
753 void *&InsertPos) {
754 if (doNotCSE(N))
755 return 0;
757 SDValue Ops[] = { Op };
758 FoldingSetNodeID ID;
759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
760 AddNodeIDCustom(ID, N);
761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
762 return Node;
763 }
765 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
766 /// were replaced with those specified. If this node is never memoized,
767 /// return null, otherwise return a pointer to the slot it would take. If a
768 /// node already exists with these operands, the slot will be non-null.
769 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
770 SDValue Op1, SDValue Op2,
771 void *&InsertPos) {
772 if (doNotCSE(N))
773 return 0;
775 SDValue Ops[] = { Op1, Op2 };
776 FoldingSetNodeID ID;
777 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
778 AddNodeIDCustom(ID, N);
779 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
780 return Node;
781 }
784 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
785 /// were replaced with those specified. If this node is never memoized,
786 /// return null, otherwise return a pointer to the slot it would take. If a
787 /// node already exists with these operands, the slot will be non-null.
788 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
789 const SDValue *Ops,unsigned NumOps,
790 void *&InsertPos) {
791 if (doNotCSE(N))
792 return 0;
794 FoldingSetNodeID ID;
795 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
796 AddNodeIDCustom(ID, N);
797 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
798 return Node;
799 }
801 #ifndef NDEBUG
802 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
803 static void VerifyNodeCommon(SDNode *N) {
804 switch (N->getOpcode()) {
805 default:
806 break;
807 case ISD::BUILD_PAIR: {
808 EVT VT = N->getValueType(0);
809 assert(N->getNumValues() == 1 && "Too many results!");
810 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
811 "Wrong return type!");
812 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
813 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
814 "Mismatched operand types!");
815 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
816 "Wrong operand type!");
817 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
818 "Wrong return type size");
819 break;
820 }
821 case ISD::BUILD_VECTOR: {
822 assert(N->getNumValues() == 1 && "Too many results!");
823 assert(N->getValueType(0).isVector() && "Wrong return type!");
824 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
825 "Wrong number of operands!");
826 EVT EltVT = N->getValueType(0).getVectorElementType();
827 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
828 assert((I->getValueType() == EltVT ||
829 (EltVT.isInteger() && I->getValueType().isInteger() &&
830 EltVT.bitsLE(I->getValueType()))) &&
831 "Wrong operand type!");
832 assert(I->getValueType() == N->getOperand(0).getValueType() &&
833 "Operands must all have the same type");
834 }
835 break;
836 }
837 }
838 }
840 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
841 static void VerifySDNode(SDNode *N) {
842 // The SDNode allocators cannot be used to allocate nodes with fields that are
843 // not present in an SDNode!
844 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
845 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
846 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
847 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
848 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
849 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
850 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
851 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
852 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
853 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
854 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
855 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
856 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
857 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
858 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
859 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
860 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
861 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
862 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
864 VerifyNodeCommon(N);
865 }
867 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
868 /// invalid.
869 static void VerifyMachineNode(SDNode *N) {
870 // The MachineNode allocators cannot be used to allocate nodes with fields
871 // that are not present in a MachineNode!
872 // Currently there are no such nodes.
874 VerifyNodeCommon(N);
875 }
876 #endif // NDEBUG
878 /// getEVTAlignment - Compute the default alignment value for the
879 /// given type.
880 ///
881 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
882 Type *Ty = VT == MVT::iPTR ?
883 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
884 VT.getTypeForEVT(*getContext());
886 return TLI.getDataLayout()->getABITypeAlignment(Ty);
887 }
889 // EntryNode could meaningfully have debug info if we can find it...
890 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
891 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
892 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
893 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
894 AllNodes.push_back(&EntryNode);
895 Ordering = new SDNodeOrdering();
896 DbgInfo = new SDDbgInfo();
897 }
899 void SelectionDAG::init(MachineFunction &mf) {
900 MF = &mf;
901 Context = &mf.getFunction()->getContext();
902 }
904 SelectionDAG::~SelectionDAG() {
905 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
906 allnodes_clear();
907 delete Ordering;
908 delete DbgInfo;
909 }
911 void SelectionDAG::allnodes_clear() {
912 assert(&*AllNodes.begin() == &EntryNode);
913 AllNodes.remove(AllNodes.begin());
914 while (!AllNodes.empty())
915 DeallocateNode(AllNodes.begin());
916 }
918 void SelectionDAG::clear() {
919 allnodes_clear();
920 OperandAllocator.Reset();
921 CSEMap.clear();
923 ExtendedValueTypeNodes.clear();
924 ExternalSymbols.clear();
925 TargetExternalSymbols.clear();
926 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
927 static_cast<CondCodeSDNode*>(0));
928 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
929 static_cast<SDNode*>(0));
931 EntryNode.UseList = 0;
932 AllNodes.push_back(&EntryNode);
933 Root = getEntryNode();
934 Ordering->clear();
935 DbgInfo->clear();
936 }
938 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
939 return VT.bitsGT(Op.getValueType()) ?
940 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
941 getNode(ISD::TRUNCATE, DL, VT, Op);
942 }
944 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
945 return VT.bitsGT(Op.getValueType()) ?
946 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
947 getNode(ISD::TRUNCATE, DL, VT, Op);
948 }
950 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
951 return VT.bitsGT(Op.getValueType()) ?
952 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
953 getNode(ISD::TRUNCATE, DL, VT, Op);
954 }
956 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
957 assert(!VT.isVector() &&
958 "getZeroExtendInReg should use the vector element type instead of "
959 "the vector type!");
960 if (Op.getValueType() == VT) return Op;
961 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
962 APInt Imm = APInt::getLowBitsSet(BitWidth,
963 VT.getSizeInBits());
964 return getNode(ISD::AND, DL, Op.getValueType(), Op,
965 getConstant(Imm, Op.getValueType()));
966 }
968 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
969 ///
970 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
971 EVT EltVT = VT.getScalarType();
972 SDValue NegOne =
973 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
974 return getNode(ISD::XOR, DL, VT, Val, NegOne);
975 }
977 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
978 EVT EltVT = VT.getScalarType();
979 assert((EltVT.getSizeInBits() >= 64 ||
980 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
981 "getConstant with a uint64_t value that doesn't fit in the type!");
982 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
983 }
985 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
986 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
987 }
989 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
990 assert(VT.isInteger() && "Cannot create FP integer constant!");
992 EVT EltVT = VT.getScalarType();
993 const ConstantInt *Elt = &Val;
995 // In some cases the vector type is legal but the element type is illegal and
996 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
997 // inserted value (the type does not need to match the vector element type).
998 // Any extra bits introduced will be truncated away.
999 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
1000 TargetLowering::TypePromoteInteger) {
1001 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
1002 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1003 Elt = ConstantInt::get(*getContext(), NewVal);
1004 }
1006 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1007 "APInt size does not match type size!");
1008 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1009 FoldingSetNodeID ID;
1010 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1011 ID.AddPointer(Elt);
1012 void *IP = 0;
1013 SDNode *N = NULL;
1014 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1015 if (!VT.isVector())
1016 return SDValue(N, 0);
1018 if (!N) {
1019 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1020 CSEMap.InsertNode(N, IP);
1021 AllNodes.push_back(N);
1022 }
1024 SDValue Result(N, 0);
1025 if (VT.isVector()) {
1026 SmallVector<SDValue, 8> Ops;
1027 Ops.assign(VT.getVectorNumElements(), Result);
1028 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1029 }
1030 return Result;
1031 }
1033 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1034 return getConstant(Val, TLI.getPointerTy(), isTarget);
1035 }
1038 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1039 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1040 }
1042 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1043 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1045 EVT EltVT = VT.getScalarType();
1047 // Do the map lookup using the actual bit pattern for the floating point
1048 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1049 // we don't have issues with SNANs.
1050 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1051 FoldingSetNodeID ID;
1052 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1053 ID.AddPointer(&V);
1054 void *IP = 0;
1055 SDNode *N = NULL;
1056 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1057 if (!VT.isVector())
1058 return SDValue(N, 0);
1060 if (!N) {
1061 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1062 CSEMap.InsertNode(N, IP);
1063 AllNodes.push_back(N);
1064 }
1066 SDValue Result(N, 0);
1067 if (VT.isVector()) {
1068 SmallVector<SDValue, 8> Ops;
1069 Ops.assign(VT.getVectorNumElements(), Result);
1070 // FIXME DebugLoc info might be appropriate here
1071 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1072 }
1073 return Result;
1074 }
1076 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1077 EVT EltVT = VT.getScalarType();
1078 if (EltVT==MVT::f32)
1079 return getConstantFP(APFloat((float)Val), VT, isTarget);
1080 else if (EltVT==MVT::f64)
1081 return getConstantFP(APFloat(Val), VT, isTarget);
1082 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1083 bool ignored;
1084 APFloat apf = APFloat(Val);
1085 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1086 &ignored);
1087 return getConstantFP(apf, VT, isTarget);
1088 } else
1089 llvm_unreachable("Unsupported type in getConstantFP");
1090 }
1092 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1093 EVT VT, int64_t Offset,
1094 bool isTargetGA,
1095 unsigned char TargetFlags) {
1096 assert((TargetFlags == 0 || isTargetGA) &&
1097 "Cannot set target flags on target-independent globals");
1099 // Truncate (with sign-extension) the offset value to the pointer size.
1100 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1101 if (BitWidth < 64)
1102 Offset = SignExtend64(Offset, BitWidth);
1104 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1105 if (!GVar) {
1106 // If GV is an alias then use the aliasee for determining thread-localness.
1107 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1108 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1109 }
1111 unsigned Opc;
1112 if (GVar && GVar->isThreadLocal())
1113 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1114 else
1115 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1117 FoldingSetNodeID ID;
1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1119 ID.AddPointer(GV);
1120 ID.AddInteger(Offset);
1121 ID.AddInteger(TargetFlags);
1122 ID.AddInteger(GV->getType()->getAddressSpace());
1123 void *IP = 0;
1124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1125 return SDValue(E, 0);
1127 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1128 Offset, TargetFlags);
1129 CSEMap.InsertNode(N, IP);
1130 AllNodes.push_back(N);
1131 return SDValue(N, 0);
1132 }
1134 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1135 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1136 FoldingSetNodeID ID;
1137 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1138 ID.AddInteger(FI);
1139 void *IP = 0;
1140 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1141 return SDValue(E, 0);
1143 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1147 }
1149 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1150 unsigned char TargetFlags) {
1151 assert((TargetFlags == 0 || isTarget) &&
1152 "Cannot set target flags on target-independent jump tables");
1153 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1154 FoldingSetNodeID ID;
1155 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1156 ID.AddInteger(JTI);
1157 ID.AddInteger(TargetFlags);
1158 void *IP = 0;
1159 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1160 return SDValue(E, 0);
1162 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1163 TargetFlags);
1164 CSEMap.InsertNode(N, IP);
1165 AllNodes.push_back(N);
1166 return SDValue(N, 0);
1167 }
1169 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1170 unsigned Alignment, int Offset,
1171 bool isTarget,
1172 unsigned char TargetFlags) {
1173 assert((TargetFlags == 0 || isTarget) &&
1174 "Cannot set target flags on target-independent globals");
1175 if (Alignment == 0)
1176 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1177 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1178 FoldingSetNodeID ID;
1179 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1180 ID.AddInteger(Alignment);
1181 ID.AddInteger(Offset);
1182 ID.AddPointer(C);
1183 ID.AddInteger(TargetFlags);
1184 void *IP = 0;
1185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1186 return SDValue(E, 0);
1188 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1189 Alignment, TargetFlags);
1190 CSEMap.InsertNode(N, IP);
1191 AllNodes.push_back(N);
1192 return SDValue(N, 0);
1193 }
1196 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1197 unsigned Alignment, int Offset,
1198 bool isTarget,
1199 unsigned char TargetFlags) {
1200 assert((TargetFlags == 0 || isTarget) &&
1201 "Cannot set target flags on target-independent globals");
1202 if (Alignment == 0)
1203 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1204 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1205 FoldingSetNodeID ID;
1206 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1207 ID.AddInteger(Alignment);
1208 ID.AddInteger(Offset);
1209 C->addSelectionDAGCSEId(ID);
1210 ID.AddInteger(TargetFlags);
1211 void *IP = 0;
1212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1213 return SDValue(E, 0);
1215 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1216 Alignment, TargetFlags);
1217 CSEMap.InsertNode(N, IP);
1218 AllNodes.push_back(N);
1219 return SDValue(N, 0);
1220 }
1222 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1223 unsigned char TargetFlags) {
1224 FoldingSetNodeID ID;
1225 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1226 ID.AddInteger(Index);
1227 ID.AddInteger(Offset);
1228 ID.AddInteger(TargetFlags);
1229 void *IP = 0;
1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1231 return SDValue(E, 0);
1233 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1234 TargetFlags);
1235 CSEMap.InsertNode(N, IP);
1236 AllNodes.push_back(N);
1237 return SDValue(N, 0);
1238 }
1240 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1241 FoldingSetNodeID ID;
1242 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1243 ID.AddPointer(MBB);
1244 void *IP = 0;
1245 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1246 return SDValue(E, 0);
1248 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1249 CSEMap.InsertNode(N, IP);
1250 AllNodes.push_back(N);
1251 return SDValue(N, 0);
1252 }
1254 SDValue SelectionDAG::getValueType(EVT VT) {
1255 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1256 ValueTypeNodes.size())
1257 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1259 SDNode *&N = VT.isExtended() ?
1260 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1262 if (N) return SDValue(N, 0);
1263 N = new (NodeAllocator) VTSDNode(VT);
1264 AllNodes.push_back(N);
1265 return SDValue(N, 0);
1266 }
1268 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1269 SDNode *&N = ExternalSymbols[Sym];
1270 if (N) return SDValue(N, 0);
1271 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1272 AllNodes.push_back(N);
1273 return SDValue(N, 0);
1274 }
1276 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1277 unsigned char TargetFlags) {
1278 SDNode *&N =
1279 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1280 TargetFlags)];
1281 if (N) return SDValue(N, 0);
1282 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1283 AllNodes.push_back(N);
1284 return SDValue(N, 0);
1285 }
1287 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1288 if ((unsigned)Cond >= CondCodeNodes.size())
1289 CondCodeNodes.resize(Cond+1);
1291 if (CondCodeNodes[Cond] == 0) {
1292 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1293 CondCodeNodes[Cond] = N;
1294 AllNodes.push_back(N);
1295 }
1297 return SDValue(CondCodeNodes[Cond], 0);
1298 }
1300 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1301 // the shuffle mask M that point at N1 to point at N2, and indices that point
1302 // N2 to point at N1.
1303 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1304 std::swap(N1, N2);
1305 int NElts = M.size();
1306 for (int i = 0; i != NElts; ++i) {
1307 if (M[i] >= NElts)
1308 M[i] -= NElts;
1309 else if (M[i] >= 0)
1310 M[i] += NElts;
1311 }
1312 }
1314 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1315 SDValue N2, const int *Mask) {
1316 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1317 assert(VT.isVector() && N1.getValueType().isVector() &&
1318 "Vector Shuffle VTs must be a vectors");
1319 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1320 && "Vector Shuffle VTs must have same element type");
1322 // Canonicalize shuffle undef, undef -> undef
1323 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1324 return getUNDEF(VT);
1326 // Validate that all indices in Mask are within the range of the elements
1327 // input to the shuffle.
1328 unsigned NElts = VT.getVectorNumElements();
1329 SmallVector<int, 8> MaskVec;
1330 for (unsigned i = 0; i != NElts; ++i) {
1331 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1332 MaskVec.push_back(Mask[i]);
1333 }
1335 // Canonicalize shuffle v, v -> v, undef
1336 if (N1 == N2) {
1337 N2 = getUNDEF(VT);
1338 for (unsigned i = 0; i != NElts; ++i)
1339 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1340 }
1342 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1343 if (N1.getOpcode() == ISD::UNDEF)
1344 commuteShuffle(N1, N2, MaskVec);
1346 // Canonicalize all index into lhs, -> shuffle lhs, undef
1347 // Canonicalize all index into rhs, -> shuffle rhs, undef
1348 bool AllLHS = true, AllRHS = true;
1349 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1350 for (unsigned i = 0; i != NElts; ++i) {
1351 if (MaskVec[i] >= (int)NElts) {
1352 if (N2Undef)
1353 MaskVec[i] = -1;
1354 else
1355 AllLHS = false;
1356 } else if (MaskVec[i] >= 0) {
1357 AllRHS = false;
1358 }
1359 }
1360 if (AllLHS && AllRHS)
1361 return getUNDEF(VT);
1362 if (AllLHS && !N2Undef)
1363 N2 = getUNDEF(VT);
1364 if (AllRHS) {
1365 N1 = getUNDEF(VT);
1366 commuteShuffle(N1, N2, MaskVec);
1367 }
1369 // If Identity shuffle, or all shuffle in to undef, return that node.
1370 bool AllUndef = true;
1371 bool Identity = true;
1372 for (unsigned i = 0; i != NElts; ++i) {
1373 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1374 if (MaskVec[i] >= 0) AllUndef = false;
1375 }
1376 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1377 return N1;
1378 if (AllUndef)
1379 return getUNDEF(VT);
1381 FoldingSetNodeID ID;
1382 SDValue Ops[2] = { N1, N2 };
1383 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1384 for (unsigned i = 0; i != NElts; ++i)
1385 ID.AddInteger(MaskVec[i]);
1387 void* IP = 0;
1388 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1389 return SDValue(E, 0);
1391 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1392 // SDNode doesn't have access to it. This memory will be "leaked" when
1393 // the node is deallocated, but recovered when the NodeAllocator is released.
1394 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1395 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1397 ShuffleVectorSDNode *N =
1398 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1399 CSEMap.InsertNode(N, IP);
1400 AllNodes.push_back(N);
1401 return SDValue(N, 0);
1402 }
1404 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1405 SDValue Val, SDValue DTy,
1406 SDValue STy, SDValue Rnd, SDValue Sat,
1407 ISD::CvtCode Code) {
1408 // If the src and dest types are the same and the conversion is between
1409 // integer types of the same sign or two floats, no conversion is necessary.
1410 if (DTy == STy &&
1411 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1412 return Val;
1414 FoldingSetNodeID ID;
1415 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1416 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1417 void* IP = 0;
1418 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1419 return SDValue(E, 0);
1421 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1422 Code);
1423 CSEMap.InsertNode(N, IP);
1424 AllNodes.push_back(N);
1425 return SDValue(N, 0);
1426 }
1428 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1429 FoldingSetNodeID ID;
1430 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1431 ID.AddInteger(RegNo);
1432 void *IP = 0;
1433 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1434 return SDValue(E, 0);
1436 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1437 CSEMap.InsertNode(N, IP);
1438 AllNodes.push_back(N);
1439 return SDValue(N, 0);
1440 }
1442 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1443 FoldingSetNodeID ID;
1444 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1445 ID.AddPointer(RegMask);
1446 void *IP = 0;
1447 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1448 return SDValue(E, 0);
1450 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1451 CSEMap.InsertNode(N, IP);
1452 AllNodes.push_back(N);
1453 return SDValue(N, 0);
1454 }
1456 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1457 FoldingSetNodeID ID;
1458 SDValue Ops[] = { Root };
1459 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1460 ID.AddPointer(Label);
1461 void *IP = 0;
1462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1463 return SDValue(E, 0);
1465 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1466 CSEMap.InsertNode(N, IP);
1467 AllNodes.push_back(N);
1468 return SDValue(N, 0);
1469 }
1472 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1473 int64_t Offset,
1474 bool isTarget,
1475 unsigned char TargetFlags) {
1476 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1478 FoldingSetNodeID ID;
1479 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1480 ID.AddPointer(BA);
1481 ID.AddInteger(Offset);
1482 ID.AddInteger(TargetFlags);
1483 void *IP = 0;
1484 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1485 return SDValue(E, 0);
1487 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1488 TargetFlags);
1489 CSEMap.InsertNode(N, IP);
1490 AllNodes.push_back(N);
1491 return SDValue(N, 0);
1492 }
1494 SDValue SelectionDAG::getSrcValue(const Value *V) {
1495 assert((!V || V->getType()->isPointerTy()) &&
1496 "SrcValue is not a pointer?");
1498 FoldingSetNodeID ID;
1499 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1500 ID.AddPointer(V);
1502 void *IP = 0;
1503 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1504 return SDValue(E, 0);
1506 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1507 CSEMap.InsertNode(N, IP);
1508 AllNodes.push_back(N);
1509 return SDValue(N, 0);
1510 }
1512 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1513 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1514 FoldingSetNodeID ID;
1515 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1516 ID.AddPointer(MD);
1518 void *IP = 0;
1519 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1520 return SDValue(E, 0);
1522 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1523 CSEMap.InsertNode(N, IP);
1524 AllNodes.push_back(N);
1525 return SDValue(N, 0);
1526 }
1529 /// getShiftAmountOperand - Return the specified value casted to
1530 /// the target's desired shift amount type.
1531 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1532 EVT OpTy = Op.getValueType();
1533 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1534 if (OpTy == ShTy || OpTy.isVector()) return Op;
1536 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1537 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1538 }
1540 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1541 /// specified value type.
1542 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1543 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1544 unsigned ByteSize = VT.getStoreSize();
1545 Type *Ty = VT.getTypeForEVT(*getContext());
1546 unsigned StackAlign =
1547 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1549 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1550 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1551 }
1553 /// CreateStackTemporary - Create a stack temporary suitable for holding
1554 /// either of the specified value types.
1555 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1556 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1557 VT2.getStoreSizeInBits())/8;
1558 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1559 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1560 const DataLayout *TD = TLI.getDataLayout();
1561 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1562 TD->getPrefTypeAlignment(Ty2));
1564 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1565 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1566 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1567 }
1569 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1570 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1571 // These setcc operations always fold.
1572 switch (Cond) {
1573 default: break;
1574 case ISD::SETFALSE:
1575 case ISD::SETFALSE2: return getConstant(0, VT);
1576 case ISD::SETTRUE:
1577 case ISD::SETTRUE2: return getConstant(1, VT);
1579 case ISD::SETOEQ:
1580 case ISD::SETOGT:
1581 case ISD::SETOGE:
1582 case ISD::SETOLT:
1583 case ISD::SETOLE:
1584 case ISD::SETONE:
1585 case ISD::SETO:
1586 case ISD::SETUO:
1587 case ISD::SETUEQ:
1588 case ISD::SETUNE:
1589 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1590 break;
1591 }
1593 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1594 const APInt &C2 = N2C->getAPIntValue();
1595 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1596 const APInt &C1 = N1C->getAPIntValue();
1598 switch (Cond) {
1599 default: llvm_unreachable("Unknown integer setcc!");
1600 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1601 case ISD::SETNE: return getConstant(C1 != C2, VT);
1602 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1603 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1604 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1605 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1606 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1607 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1608 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1609 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1610 }
1611 }
1612 }
1613 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1614 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1615 // No compile time operations on this type yet.
1616 if (N1C->getValueType(0) == MVT::ppcf128)
1617 return SDValue();
1619 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1620 switch (Cond) {
1621 default: break;
1622 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1623 return getUNDEF(VT);
1624 // fall through
1625 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1626 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1627 return getUNDEF(VT);
1628 // fall through
1629 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1630 R==APFloat::cmpLessThan, VT);
1631 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1632 return getUNDEF(VT);
1633 // fall through
1634 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1635 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1636 return getUNDEF(VT);
1637 // fall through
1638 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1639 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1640 return getUNDEF(VT);
1641 // fall through
1642 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1643 R==APFloat::cmpEqual, VT);
1644 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1645 return getUNDEF(VT);
1646 // fall through
1647 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1648 R==APFloat::cmpEqual, VT);
1649 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1650 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1651 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1652 R==APFloat::cmpEqual, VT);
1653 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1654 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1655 R==APFloat::cmpLessThan, VT);
1656 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1657 R==APFloat::cmpUnordered, VT);
1658 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1659 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1660 }
1661 } else {
1662 // Ensure that the constant occurs on the RHS.
1663 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1664 }
1665 }
1667 // Could not fold it.
1668 return SDValue();
1669 }
1671 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1672 /// use this predicate to simplify operations downstream.
1673 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1674 // This predicate is not safe for vector operations.
1675 if (Op.getValueType().isVector())
1676 return false;
1678 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1679 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1680 }
1682 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1683 /// this predicate to simplify operations downstream. Mask is known to be zero
1684 /// for bits that V cannot have.
1685 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1686 unsigned Depth) const {
1687 APInt KnownZero, KnownOne;
1688 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1690 return (KnownZero & Mask) == Mask;
1691 }
1693 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1694 /// known to be either zero or one and return them in the KnownZero/KnownOne
1695 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1696 /// processing.
1697 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1698 APInt &KnownOne, unsigned Depth) const {
1699 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1701 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1702 if (Depth == 6)
1703 return; // Limit search depth.
1705 APInt KnownZero2, KnownOne2;
1707 switch (Op.getOpcode()) {
1708 case ISD::Constant:
1709 // We know all of the bits for a constant!
1710 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1711 KnownZero = ~KnownOne;
1712 return;
1713 case ISD::AND:
1714 // If either the LHS or the RHS are Zero, the result is zero.
1715 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1716 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1718 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1720 // Output known-1 bits are only known if set in both the LHS & RHS.
1721 KnownOne &= KnownOne2;
1722 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1723 KnownZero |= KnownZero2;
1724 return;
1725 case ISD::OR:
1726 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1727 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1729 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1731 // Output known-0 bits are only known if clear in both the LHS & RHS.
1732 KnownZero &= KnownZero2;
1733 // Output known-1 are known to be set if set in either the LHS | RHS.
1734 KnownOne |= KnownOne2;
1735 return;
1736 case ISD::XOR: {
1737 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1738 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1739 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1740 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1742 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1743 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1744 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1745 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1746 KnownZero = KnownZeroOut;
1747 return;
1748 }
1749 case ISD::MUL: {
1750 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1751 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1752 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1753 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1755 // If low bits are zero in either operand, output low known-0 bits.
1756 // Also compute a conserative estimate for high known-0 bits.
1757 // More trickiness is possible, but this is sufficient for the
1758 // interesting case of alignment computation.
1759 KnownOne.clearAllBits();
1760 unsigned TrailZ = KnownZero.countTrailingOnes() +
1761 KnownZero2.countTrailingOnes();
1762 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1763 KnownZero2.countLeadingOnes(),
1764 BitWidth) - BitWidth;
1766 TrailZ = std::min(TrailZ, BitWidth);
1767 LeadZ = std::min(LeadZ, BitWidth);
1768 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1769 APInt::getHighBitsSet(BitWidth, LeadZ);
1770 return;
1771 }
1772 case ISD::UDIV: {
1773 // For the purposes of computing leading zeros we can conservatively
1774 // treat a udiv as a logical right shift by the power of 2 known to
1775 // be less than the denominator.
1776 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1777 unsigned LeadZ = KnownZero2.countLeadingOnes();
1779 KnownOne2.clearAllBits();
1780 KnownZero2.clearAllBits();
1781 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1782 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1783 if (RHSUnknownLeadingOnes != BitWidth)
1784 LeadZ = std::min(BitWidth,
1785 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1787 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1788 return;
1789 }
1790 case ISD::SELECT:
1791 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1792 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1793 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1794 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1796 // Only known if known in both the LHS and RHS.
1797 KnownOne &= KnownOne2;
1798 KnownZero &= KnownZero2;
1799 return;
1800 case ISD::SELECT_CC:
1801 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1802 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1803 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1804 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1806 // Only known if known in both the LHS and RHS.
1807 KnownOne &= KnownOne2;
1808 KnownZero &= KnownZero2;
1809 return;
1810 case ISD::SADDO:
1811 case ISD::UADDO:
1812 case ISD::SSUBO:
1813 case ISD::USUBO:
1814 case ISD::SMULO:
1815 case ISD::UMULO:
1816 if (Op.getResNo() != 1)
1817 return;
1818 // The boolean result conforms to getBooleanContents. Fall through.
1819 case ISD::SETCC:
1820 // If we know the result of a setcc has the top bits zero, use this info.
1821 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1822 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1823 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1824 return;
1825 case ISD::SHL:
1826 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1827 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1828 unsigned ShAmt = SA->getZExtValue();
1830 // If the shift count is an invalid immediate, don't do anything.
1831 if (ShAmt >= BitWidth)
1832 return;
1834 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1835 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1836 KnownZero <<= ShAmt;
1837 KnownOne <<= ShAmt;
1838 // low bits known zero.
1839 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1840 }
1841 return;
1842 case ISD::SRL:
1843 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1844 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1845 unsigned ShAmt = SA->getZExtValue();
1847 // If the shift count is an invalid immediate, don't do anything.
1848 if (ShAmt >= BitWidth)
1849 return;
1851 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1852 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1853 KnownZero = KnownZero.lshr(ShAmt);
1854 KnownOne = KnownOne.lshr(ShAmt);
1856 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1857 KnownZero |= HighBits; // High bits known zero.
1858 }
1859 return;
1860 case ISD::SRA:
1861 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1862 unsigned ShAmt = SA->getZExtValue();
1864 // If the shift count is an invalid immediate, don't do anything.
1865 if (ShAmt >= BitWidth)
1866 return;
1868 // If any of the demanded bits are produced by the sign extension, we also
1869 // demand the input sign bit.
1870 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1872 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1873 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1874 KnownZero = KnownZero.lshr(ShAmt);
1875 KnownOne = KnownOne.lshr(ShAmt);
1877 // Handle the sign bits.
1878 APInt SignBit = APInt::getSignBit(BitWidth);
1879 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1881 if (KnownZero.intersects(SignBit)) {
1882 KnownZero |= HighBits; // New bits are known zero.
1883 } else if (KnownOne.intersects(SignBit)) {
1884 KnownOne |= HighBits; // New bits are known one.
1885 }
1886 }
1887 return;
1888 case ISD::SIGN_EXTEND_INREG: {
1889 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1890 unsigned EBits = EVT.getScalarType().getSizeInBits();
1892 // Sign extension. Compute the demanded bits in the result that are not
1893 // present in the input.
1894 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1896 APInt InSignBit = APInt::getSignBit(EBits);
1897 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1899 // If the sign extended bits are demanded, we know that the sign
1900 // bit is demanded.
1901 InSignBit = InSignBit.zext(BitWidth);
1902 if (NewBits.getBoolValue())
1903 InputDemandedBits |= InSignBit;
1905 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1906 KnownOne &= InputDemandedBits;
1907 KnownZero &= InputDemandedBits;
1908 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1910 // If the sign bit of the input is known set or clear, then we know the
1911 // top bits of the result.
1912 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1913 KnownZero |= NewBits;
1914 KnownOne &= ~NewBits;
1915 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1916 KnownOne |= NewBits;
1917 KnownZero &= ~NewBits;
1918 } else { // Input sign bit unknown
1919 KnownZero &= ~NewBits;
1920 KnownOne &= ~NewBits;
1921 }
1922 return;
1923 }
1924 case ISD::CTTZ:
1925 case ISD::CTTZ_ZERO_UNDEF:
1926 case ISD::CTLZ:
1927 case ISD::CTLZ_ZERO_UNDEF:
1928 case ISD::CTPOP: {
1929 unsigned LowBits = Log2_32(BitWidth)+1;
1930 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1931 KnownOne.clearAllBits();
1932 return;
1933 }
1934 case ISD::LOAD: {
1935 LoadSDNode *LD = cast<LoadSDNode>(Op);
1936 if (ISD::isZEXTLoad(Op.getNode())) {
1937 EVT VT = LD->getMemoryVT();
1938 unsigned MemBits = VT.getScalarType().getSizeInBits();
1939 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1940 } else if (const MDNode *Ranges = LD->getRanges()) {
1941 computeMaskedBitsLoad(*Ranges, KnownZero);
1942 }
1943 return;
1944 }
1945 case ISD::ZERO_EXTEND: {
1946 EVT InVT = Op.getOperand(0).getValueType();
1947 unsigned InBits = InVT.getScalarType().getSizeInBits();
1948 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1949 KnownZero = KnownZero.trunc(InBits);
1950 KnownOne = KnownOne.trunc(InBits);
1951 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1952 KnownZero = KnownZero.zext(BitWidth);
1953 KnownOne = KnownOne.zext(BitWidth);
1954 KnownZero |= NewBits;
1955 return;
1956 }
1957 case ISD::SIGN_EXTEND: {
1958 EVT InVT = Op.getOperand(0).getValueType();
1959 unsigned InBits = InVT.getScalarType().getSizeInBits();
1960 APInt InSignBit = APInt::getSignBit(InBits);
1961 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1963 KnownZero = KnownZero.trunc(InBits);
1964 KnownOne = KnownOne.trunc(InBits);
1965 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1967 // Note if the sign bit is known to be zero or one.
1968 bool SignBitKnownZero = KnownZero.isNegative();
1969 bool SignBitKnownOne = KnownOne.isNegative();
1970 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1971 "Sign bit can't be known to be both zero and one!");
1973 KnownZero = KnownZero.zext(BitWidth);
1974 KnownOne = KnownOne.zext(BitWidth);
1976 // If the sign bit is known zero or one, the top bits match.
1977 if (SignBitKnownZero)
1978 KnownZero |= NewBits;
1979 else if (SignBitKnownOne)
1980 KnownOne |= NewBits;
1981 return;
1982 }
1983 case ISD::ANY_EXTEND: {
1984 EVT InVT = Op.getOperand(0).getValueType();
1985 unsigned InBits = InVT.getScalarType().getSizeInBits();
1986 KnownZero = KnownZero.trunc(InBits);
1987 KnownOne = KnownOne.trunc(InBits);
1988 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1989 KnownZero = KnownZero.zext(BitWidth);
1990 KnownOne = KnownOne.zext(BitWidth);
1991 return;
1992 }
1993 case ISD::TRUNCATE: {
1994 EVT InVT = Op.getOperand(0).getValueType();
1995 unsigned InBits = InVT.getScalarType().getSizeInBits();
1996 KnownZero = KnownZero.zext(InBits);
1997 KnownOne = KnownOne.zext(InBits);
1998 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1999 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2000 KnownZero = KnownZero.trunc(BitWidth);
2001 KnownOne = KnownOne.trunc(BitWidth);
2002 break;
2003 }
2004 case ISD::AssertZext: {
2005 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2006 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2007 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2008 KnownZero |= (~InMask);
2009 KnownOne &= (~KnownZero);
2010 return;
2011 }
2012 case ISD::FGETSIGN:
2013 // All bits are zero except the low bit.
2014 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2015 return;
2017 case ISD::SUB: {
2018 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2019 // We know that the top bits of C-X are clear if X contains less bits
2020 // than C (i.e. no wrap-around can happen). For example, 20-X is
2021 // positive if we can prove that X is >= 0 and < 16.
2022 if (CLHS->getAPIntValue().isNonNegative()) {
2023 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2024 // NLZ can't be BitWidth with no sign bit
2025 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2026 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2028 // If all of the MaskV bits are known to be zero, then we know the
2029 // output top bits are zero, because we now know that the output is
2030 // from [0-C].
2031 if ((KnownZero2 & MaskV) == MaskV) {
2032 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2033 // Top bits known zero.
2034 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2035 }
2036 }
2037 }
2038 }
2039 // fall through
2040 case ISD::ADD:
2041 case ISD::ADDE: {
2042 // Output known-0 bits are known if clear or set in both the low clear bits
2043 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2044 // low 3 bits clear.
2045 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2046 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2047 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2049 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2050 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2051 KnownZeroOut = std::min(KnownZeroOut,
2052 KnownZero2.countTrailingOnes());
2054 if (Op.getOpcode() == ISD::ADD) {
2055 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2056 return;
2057 }
2059 // With ADDE, a carry bit may be added in, so we can only use this
2060 // information if we know (at least) that the low two bits are clear. We
2061 // then return to the caller that the low bit is unknown but that other bits
2062 // are known zero.
2063 if (KnownZeroOut >= 2) // ADDE
2064 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2065 return;
2066 }
2067 case ISD::SREM:
2068 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2069 const APInt &RA = Rem->getAPIntValue().abs();
2070 if (RA.isPowerOf2()) {
2071 APInt LowBits = RA - 1;
2072 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2073 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2075 // The low bits of the first operand are unchanged by the srem.
2076 KnownZero = KnownZero2 & LowBits;
2077 KnownOne = KnownOne2 & LowBits;
2079 // If the first operand is non-negative or has all low bits zero, then
2080 // the upper bits are all zero.
2081 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2082 KnownZero |= ~LowBits;
2084 // If the first operand is negative and not all low bits are zero, then
2085 // the upper bits are all one.
2086 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2087 KnownOne |= ~LowBits;
2088 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2089 }
2090 }
2091 return;
2092 case ISD::UREM: {
2093 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2094 const APInt &RA = Rem->getAPIntValue();
2095 if (RA.isPowerOf2()) {
2096 APInt LowBits = (RA - 1);
2097 KnownZero |= ~LowBits;
2098 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2099 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2100 break;
2101 }
2102 }
2104 // Since the result is less than or equal to either operand, any leading
2105 // zero bits in either operand must also exist in the result.
2106 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2107 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2109 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2110 KnownZero2.countLeadingOnes());
2111 KnownOne.clearAllBits();
2112 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2113 return;
2114 }
2115 case ISD::FrameIndex:
2116 case ISD::TargetFrameIndex:
2117 if (unsigned Align = InferPtrAlignment(Op)) {
2118 // The low bits are known zero if the pointer is aligned.
2119 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2120 return;
2121 }
2122 break;
2124 default:
2125 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2126 break;
2127 // Fallthrough
2128 case ISD::INTRINSIC_WO_CHAIN:
2129 case ISD::INTRINSIC_W_CHAIN:
2130 case ISD::INTRINSIC_VOID:
2131 // Allow the target to implement this method for its nodes.
2132 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2133 return;
2134 }
2135 }
2137 /// ComputeNumSignBits - Return the number of times the sign bit of the
2138 /// register is replicated into the other bits. We know that at least 1 bit
2139 /// is always equal to the sign bit (itself), but other cases can give us
2140 /// information. For example, immediately after an "SRA X, 2", we know that
2141 /// the top 3 bits are all equal to each other, so we return 3.
2142 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2143 EVT VT = Op.getValueType();
2144 assert(VT.isInteger() && "Invalid VT!");
2145 unsigned VTBits = VT.getScalarType().getSizeInBits();
2146 unsigned Tmp, Tmp2;
2147 unsigned FirstAnswer = 1;
2149 if (Depth == 6)
2150 return 1; // Limit search depth.
2152 switch (Op.getOpcode()) {
2153 default: break;
2154 case ISD::AssertSext:
2155 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2156 return VTBits-Tmp+1;
2157 case ISD::AssertZext:
2158 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2159 return VTBits-Tmp;
2161 case ISD::Constant: {
2162 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2163 return Val.getNumSignBits();
2164 }
2166 case ISD::SIGN_EXTEND:
2167 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2168 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2170 case ISD::SIGN_EXTEND_INREG:
2171 // Max of the input and what this extends.
2172 Tmp =
2173 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2174 Tmp = VTBits-Tmp+1;
2176 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2177 return std::max(Tmp, Tmp2);
2179 case ISD::SRA:
2180 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2181 // SRA X, C -> adds C sign bits.
2182 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2183 Tmp += C->getZExtValue();
2184 if (Tmp > VTBits) Tmp = VTBits;
2185 }
2186 return Tmp;
2187 case ISD::SHL:
2188 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2189 // shl destroys sign bits.
2190 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2191 if (C->getZExtValue() >= VTBits || // Bad shift.
2192 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2193 return Tmp - C->getZExtValue();
2194 }
2195 break;
2196 case ISD::AND:
2197 case ISD::OR:
2198 case ISD::XOR: // NOT is handled here.
2199 // Logical binary ops preserve the number of sign bits at the worst.
2200 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2201 if (Tmp != 1) {
2202 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2203 FirstAnswer = std::min(Tmp, Tmp2);
2204 // We computed what we know about the sign bits as our first
2205 // answer. Now proceed to the generic code that uses
2206 // ComputeMaskedBits, and pick whichever answer is better.
2207 }
2208 break;
2210 case ISD::SELECT:
2211 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2212 if (Tmp == 1) return 1; // Early out.
2213 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2214 return std::min(Tmp, Tmp2);
2216 case ISD::SADDO:
2217 case ISD::UADDO:
2218 case ISD::SSUBO:
2219 case ISD::USUBO:
2220 case ISD::SMULO:
2221 case ISD::UMULO:
2222 if (Op.getResNo() != 1)
2223 break;
2224 // The boolean result conforms to getBooleanContents. Fall through.
2225 case ISD::SETCC:
2226 // If setcc returns 0/-1, all bits are sign bits.
2227 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2228 TargetLowering::ZeroOrNegativeOneBooleanContent)
2229 return VTBits;
2230 break;
2231 case ISD::ROTL:
2232 case ISD::ROTR:
2233 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2234 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2236 // Handle rotate right by N like a rotate left by 32-N.
2237 if (Op.getOpcode() == ISD::ROTR)
2238 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2240 // If we aren't rotating out all of the known-in sign bits, return the
2241 // number that are left. This handles rotl(sext(x), 1) for example.
2242 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2243 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2244 }
2245 break;
2246 case ISD::ADD:
2247 // Add can have at most one carry bit. Thus we know that the output
2248 // is, at worst, one more bit than the inputs.
2249 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2250 if (Tmp == 1) return 1; // Early out.
2252 // Special case decrementing a value (ADD X, -1):
2253 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2254 if (CRHS->isAllOnesValue()) {
2255 APInt KnownZero, KnownOne;
2256 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2258 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2259 // sign bits set.
2260 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2261 return VTBits;
2263 // If we are subtracting one from a positive number, there is no carry
2264 // out of the result.
2265 if (KnownZero.isNegative())
2266 return Tmp;
2267 }
2269 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2270 if (Tmp2 == 1) return 1;
2271 return std::min(Tmp, Tmp2)-1;
2273 case ISD::SUB:
2274 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2275 if (Tmp2 == 1) return 1;
2277 // Handle NEG.
2278 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2279 if (CLHS->isNullValue()) {
2280 APInt KnownZero, KnownOne;
2281 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2282 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2283 // sign bits set.
2284 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2285 return VTBits;
2287 // If the input is known to be positive (the sign bit is known clear),
2288 // the output of the NEG has the same number of sign bits as the input.
2289 if (KnownZero.isNegative())
2290 return Tmp2;
2292 // Otherwise, we treat this like a SUB.
2293 }
2295 // Sub can have at most one carry bit. Thus we know that the output
2296 // is, at worst, one more bit than the inputs.
2297 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2298 if (Tmp == 1) return 1; // Early out.
2299 return std::min(Tmp, Tmp2)-1;
2300 case ISD::TRUNCATE:
2301 // FIXME: it's tricky to do anything useful for this, but it is an important
2302 // case for targets like X86.
2303 break;
2304 }
2306 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2307 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2308 unsigned ExtType = LD->getExtensionType();
2309 switch (ExtType) {
2310 default: break;
2311 case ISD::SEXTLOAD: // '17' bits known
2312 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2313 return VTBits-Tmp+1;
2314 case ISD::ZEXTLOAD: // '16' bits known
2315 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2316 return VTBits-Tmp;
2317 }
2318 }
2320 // Allow the target to implement this method for its nodes.
2321 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2322 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2323 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2324 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2325 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2326 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2327 }
2329 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2330 // use this information.
2331 APInt KnownZero, KnownOne;
2332 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2334 APInt Mask;
2335 if (KnownZero.isNegative()) { // sign bit is 0
2336 Mask = KnownZero;
2337 } else if (KnownOne.isNegative()) { // sign bit is 1;
2338 Mask = KnownOne;
2339 } else {
2340 // Nothing known.
2341 return FirstAnswer;
2342 }
2344 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2345 // the number of identical bits in the top of the input value.
2346 Mask = ~Mask;
2347 Mask <<= Mask.getBitWidth()-VTBits;
2348 // Return # leading zeros. We use 'min' here in case Val was zero before
2349 // shifting. We don't want to return '64' as for an i32 "0".
2350 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2351 }
2353 /// isBaseWithConstantOffset - Return true if the specified operand is an
2354 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2355 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2356 /// semantics as an ADD. This handles the equivalence:
2357 /// X|Cst == X+Cst iff X&Cst = 0.
2358 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2359 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2360 !isa<ConstantSDNode>(Op.getOperand(1)))
2361 return false;
2363 if (Op.getOpcode() == ISD::OR &&
2364 !MaskedValueIsZero(Op.getOperand(0),
2365 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2366 return false;
2368 return true;
2369 }
2372 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2373 // If we're told that NaNs won't happen, assume they won't.
2374 if (getTarget().Options.NoNaNsFPMath)
2375 return true;
2377 // If the value is a constant, we can obviously see if it is a NaN or not.
2378 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2379 return !C->getValueAPF().isNaN();
2381 // TODO: Recognize more cases here.
2383 return false;
2384 }
2386 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2387 // If the value is a constant, we can obviously see if it is a zero or not.
2388 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2389 return !C->isZero();
2391 // TODO: Recognize more cases here.
2392 switch (Op.getOpcode()) {
2393 default: break;
2394 case ISD::OR:
2395 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2396 return !C->isNullValue();
2397 break;
2398 }
2400 return false;
2401 }
2403 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2404 // Check the obvious case.
2405 if (A == B) return true;
2407 // For for negative and positive zero.
2408 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2409 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2410 if (CA->isZero() && CB->isZero()) return true;
2412 // Otherwise they may not be equal.
2413 return false;
2414 }
2416 /// getNode - Gets or creates the specified node.
2417 ///
2418 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2419 FoldingSetNodeID ID;
2420 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2421 void *IP = 0;
2422 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2423 return SDValue(E, 0);
2425 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2426 CSEMap.InsertNode(N, IP);
2428 AllNodes.push_back(N);
2429 #ifndef NDEBUG
2430 VerifySDNode(N);
2431 #endif
2432 return SDValue(N, 0);
2433 }
2435 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2436 EVT VT, SDValue Operand) {
2437 // Constant fold unary operations with an integer constant operand.
2438 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2439 const APInt &Val = C->getAPIntValue();
2440 switch (Opcode) {
2441 default: break;
2442 case ISD::SIGN_EXTEND:
2443 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2444 case ISD::ANY_EXTEND:
2445 case ISD::ZERO_EXTEND:
2446 case ISD::TRUNCATE:
2447 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2448 case ISD::UINT_TO_FP:
2449 case ISD::SINT_TO_FP: {
2450 // No compile time operations on ppcf128.
2451 if (VT == MVT::ppcf128) break;
2452 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2453 (void)apf.convertFromAPInt(Val,
2454 Opcode==ISD::SINT_TO_FP,
2455 APFloat::rmNearestTiesToEven);
2456 return getConstantFP(apf, VT);
2457 }
2458 case ISD::BITCAST:
2459 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2460 return getConstantFP(APFloat(Val), VT);
2461 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2462 return getConstantFP(APFloat(Val), VT);
2463 break;
2464 case ISD::BSWAP:
2465 return getConstant(Val.byteSwap(), VT);
2466 case ISD::CTPOP:
2467 return getConstant(Val.countPopulation(), VT);
2468 case ISD::CTLZ:
2469 case ISD::CTLZ_ZERO_UNDEF:
2470 return getConstant(Val.countLeadingZeros(), VT);
2471 case ISD::CTTZ:
2472 case ISD::CTTZ_ZERO_UNDEF:
2473 return getConstant(Val.countTrailingZeros(), VT);
2474 }
2475 }
2477 // Constant fold unary operations with a floating point constant operand.
2478 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2479 APFloat V = C->getValueAPF(); // make copy
2480 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2481 switch (Opcode) {
2482 case ISD::FNEG:
2483 V.changeSign();
2484 return getConstantFP(V, VT);
2485 case ISD::FABS:
2486 V.clearSign();
2487 return getConstantFP(V, VT);
2488 case ISD::FCEIL: {
2489 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2490 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2491 return getConstantFP(V, VT);
2492 break;
2493 }
2494 case ISD::FTRUNC: {
2495 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2496 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2497 return getConstantFP(V, VT);
2498 break;
2499 }
2500 case ISD::FFLOOR: {
2501 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2502 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2503 return getConstantFP(V, VT);
2504 break;
2505 }
2506 case ISD::FP_EXTEND: {
2507 bool ignored;
2508 // This can return overflow, underflow, or inexact; we don't care.
2509 // FIXME need to be more flexible about rounding mode.
2510 (void)V.convert(*EVTToAPFloatSemantics(VT),
2511 APFloat::rmNearestTiesToEven, &ignored);
2512 return getConstantFP(V, VT);
2513 }
2514 case ISD::FP_TO_SINT:
2515 case ISD::FP_TO_UINT: {
2516 integerPart x[2];
2517 bool ignored;
2518 assert(integerPartWidth >= 64);
2519 // FIXME need to be more flexible about rounding mode.
2520 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2521 Opcode==ISD::FP_TO_SINT,
2522 APFloat::rmTowardZero, &ignored);
2523 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2524 break;
2525 APInt api(VT.getSizeInBits(), x);
2526 return getConstant(api, VT);
2527 }
2528 case ISD::BITCAST:
2529 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2530 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2531 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2532 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2533 break;
2534 }
2535 }
2536 }
2538 unsigned OpOpcode = Operand.getNode()->getOpcode();
2539 switch (Opcode) {
2540 case ISD::TokenFactor:
2541 case ISD::MERGE_VALUES:
2542 case ISD::CONCAT_VECTORS:
2543 return Operand; // Factor, merge or concat of one node? No need.
2544 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2545 case ISD::FP_EXTEND:
2546 assert(VT.isFloatingPoint() &&
2547 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2548 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2549 assert((!VT.isVector() ||
2550 VT.getVectorNumElements() ==
2551 Operand.getValueType().getVectorNumElements()) &&
2552 "Vector element count mismatch!");
2553 if (Operand.getOpcode() == ISD::UNDEF)
2554 return getUNDEF(VT);
2555 break;
2556 case ISD::SIGN_EXTEND:
2557 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2558 "Invalid SIGN_EXTEND!");
2559 if (Operand.getValueType() == VT) return Operand; // noop extension
2560 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2561 "Invalid sext node, dst < src!");
2562 assert((!VT.isVector() ||
2563 VT.getVectorNumElements() ==
2564 Operand.getValueType().getVectorNumElements()) &&
2565 "Vector element count mismatch!");
2566 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2567 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2568 else if (OpOpcode == ISD::UNDEF)
2569 // sext(undef) = 0, because the top bits will all be the same.
2570 return getConstant(0, VT);
2571 break;
2572 case ISD::ZERO_EXTEND:
2573 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2574 "Invalid ZERO_EXTEND!");
2575 if (Operand.getValueType() == VT) return Operand; // noop extension
2576 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2577 "Invalid zext node, dst < src!");
2578 assert((!VT.isVector() ||
2579 VT.getVectorNumElements() ==
2580 Operand.getValueType().getVectorNumElements()) &&
2581 "Vector element count mismatch!");
2582 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2583 return getNode(ISD::ZERO_EXTEND, DL, VT,
2584 Operand.getNode()->getOperand(0));
2585 else if (OpOpcode == ISD::UNDEF)
2586 // zext(undef) = 0, because the top bits will be zero.
2587 return getConstant(0, VT);
2588 break;
2589 case ISD::ANY_EXTEND:
2590 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2591 "Invalid ANY_EXTEND!");
2592 if (Operand.getValueType() == VT) return Operand; // noop extension
2593 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2594 "Invalid anyext node, dst < src!");
2595 assert((!VT.isVector() ||
2596 VT.getVectorNumElements() ==
2597 Operand.getValueType().getVectorNumElements()) &&
2598 "Vector element count mismatch!");
2600 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2601 OpOpcode == ISD::ANY_EXTEND)
2602 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2603 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2604 else if (OpOpcode == ISD::UNDEF)
2605 return getUNDEF(VT);
2607 // (ext (trunx x)) -> x
2608 if (OpOpcode == ISD::TRUNCATE) {
2609 SDValue OpOp = Operand.getNode()->getOperand(0);
2610 if (OpOp.getValueType() == VT)
2611 return OpOp;
2612 }
2613 break;
2614 case ISD::TRUNCATE:
2615 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2616 "Invalid TRUNCATE!");
2617 if (Operand.getValueType() == VT) return Operand; // noop truncate
2618 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2619 "Invalid truncate node, src < dst!");
2620 assert((!VT.isVector() ||
2621 VT.getVectorNumElements() ==
2622 Operand.getValueType().getVectorNumElements()) &&
2623 "Vector element count mismatch!");
2624 if (OpOpcode == ISD::TRUNCATE)
2625 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2626 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2627 OpOpcode == ISD::ANY_EXTEND) {
2628 // If the source is smaller than the dest, we still need an extend.
2629 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2630 .bitsLT(VT.getScalarType()))
2631 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2632 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2633 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2634 return Operand.getNode()->getOperand(0);
2635 }
2636 if (OpOpcode == ISD::UNDEF)
2637 return getUNDEF(VT);
2638 break;
2639 case ISD::BITCAST:
2640 // Basic sanity checking.
2641 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2642 && "Cannot BITCAST between types of different sizes!");
2643 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2644 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2645 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2646 if (OpOpcode == ISD::UNDEF)
2647 return getUNDEF(VT);
2648 break;
2649 case ISD::SCALAR_TO_VECTOR:
2650 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2651 (VT.getVectorElementType() == Operand.getValueType() ||
2652 (VT.getVectorElementType().isInteger() &&
2653 Operand.getValueType().isInteger() &&
2654 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2655 "Illegal SCALAR_TO_VECTOR node!");
2656 if (OpOpcode == ISD::UNDEF)
2657 return getUNDEF(VT);
2658 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2659 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2660 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2661 Operand.getConstantOperandVal(1) == 0 &&
2662 Operand.getOperand(0).getValueType() == VT)
2663 return Operand.getOperand(0);
2664 break;
2665 case ISD::FNEG:
2666 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2667 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2668 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2669 Operand.getNode()->getOperand(0));
2670 if (OpOpcode == ISD::FNEG) // --X -> X
2671 return Operand.getNode()->getOperand(0);
2672 break;
2673 case ISD::FABS:
2674 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2675 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2676 break;
2677 }
2679 SDNode *N;
2680 SDVTList VTs = getVTList(VT);
2681 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2682 FoldingSetNodeID ID;
2683 SDValue Ops[1] = { Operand };
2684 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2685 void *IP = 0;
2686 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2687 return SDValue(E, 0);
2689 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2690 CSEMap.InsertNode(N, IP);
2691 } else {
2692 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2693 }
2695 AllNodes.push_back(N);
2696 #ifndef NDEBUG
2697 VerifySDNode(N);
2698 #endif
2699 return SDValue(N, 0);
2700 }
2702 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2703 EVT VT,
2704 ConstantSDNode *Cst1,
2705 ConstantSDNode *Cst2) {
2706 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2708 switch (Opcode) {
2709 case ISD::ADD: return getConstant(C1 + C2, VT);
2710 case ISD::SUB: return getConstant(C1 - C2, VT);
2711 case ISD::MUL: return getConstant(C1 * C2, VT);
2712 case ISD::UDIV:
2713 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2714 break;
2715 case ISD::UREM:
2716 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2717 break;
2718 case ISD::SDIV:
2719 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2720 break;
2721 case ISD::SREM:
2722 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2723 break;
2724 case ISD::AND: return getConstant(C1 & C2, VT);
2725 case ISD::OR: return getConstant(C1 | C2, VT);
2726 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2727 case ISD::SHL: return getConstant(C1 << C2, VT);
2728 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2729 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2730 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2731 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2732 default: break;
2733 }
2735 return SDValue();
2736 }
2738 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2739 SDValue N1, SDValue N2) {
2740 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2741 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2742 switch (Opcode) {
2743 default: break;
2744 case ISD::TokenFactor:
2745 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2746 N2.getValueType() == MVT::Other && "Invalid token factor!");
2747 // Fold trivial token factors.
2748 if (N1.getOpcode() == ISD::EntryToken) return N2;
2749 if (N2.getOpcode() == ISD::EntryToken) return N1;
2750 if (N1 == N2) return N1;
2751 break;
2752 case ISD::CONCAT_VECTORS:
2753 // Concat of UNDEFs is UNDEF.
2754 if (N1.getOpcode() == ISD::UNDEF &&
2755 N2.getOpcode() == ISD::UNDEF)
2756 return getUNDEF(VT);
2758 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2759 // one big BUILD_VECTOR.
2760 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2761 N2.getOpcode() == ISD::BUILD_VECTOR) {
2762 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2763 N1.getNode()->op_end());
2764 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2765 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2766 }
2767 break;
2768 case ISD::AND:
2769 assert(VT.isInteger() && "This operator does not apply to FP types!");
2770 assert(N1.getValueType() == N2.getValueType() &&
2771 N1.getValueType() == VT && "Binary operator types must match!");
2772 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2773 // worth handling here.
2774 if (N2C && N2C->isNullValue())
2775 return N2;
2776 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2777 return N1;
2778 break;
2779 case ISD::OR:
2780 case ISD::XOR:
2781 case ISD::ADD:
2782 case ISD::SUB:
2783 assert(VT.isInteger() && "This operator does not apply to FP types!");
2784 assert(N1.getValueType() == N2.getValueType() &&
2785 N1.getValueType() == VT && "Binary operator types must match!");
2786 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2787 // it's worth handling here.
2788 if (N2C && N2C->isNullValue())
2789 return N1;
2790 break;
2791 case ISD::UDIV:
2792 case ISD::UREM:
2793 case ISD::MULHU:
2794 case ISD::MULHS:
2795 case ISD::MUL:
2796 case ISD::SDIV:
2797 case ISD::SREM:
2798 assert(VT.isInteger() && "This operator does not apply to FP types!");
2799 assert(N1.getValueType() == N2.getValueType() &&
2800 N1.getValueType() == VT && "Binary operator types must match!");
2801 break;
2802 case ISD::FADD:
2803 case ISD::FSUB:
2804 case ISD::FMUL:
2805 case ISD::FDIV:
2806 case ISD::FREM:
2807 if (getTarget().Options.UnsafeFPMath) {
2808 if (Opcode == ISD::FADD) {
2809 // 0+x --> x
2810 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2811 if (CFP->getValueAPF().isZero())
2812 return N2;
2813 // x+0 --> x
2814 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2815 if (CFP->getValueAPF().isZero())
2816 return N1;
2817 } else if (Opcode == ISD::FSUB) {
2818 // x-0 --> x
2819 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2820 if (CFP->getValueAPF().isZero())
2821 return N1;
2822 } else if (Opcode == ISD::FMUL) {
2823 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2824 SDValue V = N2;
2826 // If the first operand isn't the constant, try the second
2827 if (!CFP) {
2828 CFP = dyn_cast<ConstantFPSDNode>(N2);
2829 V = N1;
2830 }
2832 if (CFP) {
2833 // 0*x --> 0
2834 if (CFP->isZero())
2835 return SDValue(CFP,0);
2836 // 1*x --> x
2837 if (CFP->isExactlyValue(1.0))
2838 return V;
2839 }
2840 }
2841 }
2842 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2843 assert(N1.getValueType() == N2.getValueType() &&
2844 N1.getValueType() == VT && "Binary operator types must match!");
2845 break;
2846 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2847 assert(N1.getValueType() == VT &&
2848 N1.getValueType().isFloatingPoint() &&
2849 N2.getValueType().isFloatingPoint() &&
2850 "Invalid FCOPYSIGN!");
2851 break;
2852 case ISD::SHL:
2853 case ISD::SRA:
2854 case ISD::SRL:
2855 case ISD::ROTL:
2856 case ISD::ROTR:
2857 assert(VT == N1.getValueType() &&
2858 "Shift operators return type must be the same as their first arg");
2859 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2860 "Shifts only work on integers");
2861 // Verify that the shift amount VT is bit enough to hold valid shift
2862 // amounts. This catches things like trying to shift an i1024 value by an
2863 // i8, which is easy to fall into in generic code that uses
2864 // TLI.getShiftAmount().
2865 assert(N2.getValueType().getSizeInBits() >=
2866 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2867 "Invalid use of small shift amount with oversized value!");
2869 // Always fold shifts of i1 values so the code generator doesn't need to
2870 // handle them. Since we know the size of the shift has to be less than the
2871 // size of the value, the shift/rotate count is guaranteed to be zero.
2872 if (VT == MVT::i1)
2873 return N1;
2874 if (N2C && N2C->isNullValue())
2875 return N1;
2876 break;
2877 case ISD::FP_ROUND_INREG: {
2878 EVT EVT = cast<VTSDNode>(N2)->getVT();
2879 assert(VT == N1.getValueType() && "Not an inreg round!");
2880 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2881 "Cannot FP_ROUND_INREG integer types");
2882 assert(EVT.isVector() == VT.isVector() &&
2883 "FP_ROUND_INREG type should be vector iff the operand "
2884 "type is vector!");
2885 assert((!EVT.isVector() ||
2886 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2887 "Vector element counts must match in FP_ROUND_INREG");
2888 assert(EVT.bitsLE(VT) && "Not rounding down!");
2889 (void)EVT;
2890 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2891 break;
2892 }
2893 case ISD::FP_ROUND:
2894 assert(VT.isFloatingPoint() &&
2895 N1.getValueType().isFloatingPoint() &&
2896 VT.bitsLE(N1.getValueType()) &&
2897 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2898 if (N1.getValueType() == VT) return N1; // noop conversion.
2899 break;
2900 case ISD::AssertSext:
2901 case ISD::AssertZext: {
2902 EVT EVT = cast<VTSDNode>(N2)->getVT();
2903 assert(VT == N1.getValueType() && "Not an inreg extend!");
2904 assert(VT.isInteger() && EVT.isInteger() &&
2905 "Cannot *_EXTEND_INREG FP types");
2906 assert(!EVT.isVector() &&
2907 "AssertSExt/AssertZExt type should be the vector element type "
2908 "rather than the vector type!");
2909 assert(EVT.bitsLE(VT) && "Not extending!");
2910 if (VT == EVT) return N1; // noop assertion.
2911 break;
2912 }
2913 case ISD::SIGN_EXTEND_INREG: {
2914 EVT EVT = cast<VTSDNode>(N2)->getVT();
2915 assert(VT == N1.getValueType() && "Not an inreg extend!");
2916 assert(VT.isInteger() && EVT.isInteger() &&
2917 "Cannot *_EXTEND_INREG FP types");
2918 assert(EVT.isVector() == VT.isVector() &&
2919 "SIGN_EXTEND_INREG type should be vector iff the operand "
2920 "type is vector!");
2921 assert((!EVT.isVector() ||
2922 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2923 "Vector element counts must match in SIGN_EXTEND_INREG");
2924 assert(EVT.bitsLE(VT) && "Not extending!");
2925 if (EVT == VT) return N1; // Not actually extending
2927 if (N1C) {
2928 APInt Val = N1C->getAPIntValue();
2929 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2930 Val <<= Val.getBitWidth()-FromBits;
2931 Val = Val.ashr(Val.getBitWidth()-FromBits);
2932 return getConstant(Val, VT);
2933 }
2934 break;
2935 }
2936 case ISD::EXTRACT_VECTOR_ELT:
2937 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2938 if (N1.getOpcode() == ISD::UNDEF)
2939 return getUNDEF(VT);
2941 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2942 // expanding copies of large vectors from registers.
2943 if (N2C &&
2944 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2945 N1.getNumOperands() > 0) {
2946 unsigned Factor =
2947 N1.getOperand(0).getValueType().getVectorNumElements();
2948 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2949 N1.getOperand(N2C->getZExtValue() / Factor),
2950 getConstant(N2C->getZExtValue() % Factor,
2951 N2.getValueType()));
2952 }
2954 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2955 // expanding large vector constants.
2956 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2957 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2959 if (VT != Elt.getValueType())
2960 // If the vector element type is not legal, the BUILD_VECTOR operands
2961 // are promoted and implicitly truncated, and the result implicitly
2962 // extended. Make that explicit here.
2963 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2965 return Elt;
2966 }
2968 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2969 // operations are lowered to scalars.
2970 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2971 // If the indices are the same, return the inserted element else
2972 // if the indices are known different, extract the element from
2973 // the original vector.
2974 SDValue N1Op2 = N1.getOperand(2);
2975 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2977 if (N1Op2C && N2C) {
2978 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2979 if (VT == N1.getOperand(1).getValueType())
2980 return N1.getOperand(1);
2981 else
2982 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2983 }
2985 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2986 }
2987 }
2988 break;
2989 case ISD::EXTRACT_ELEMENT:
2990 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2991 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2992 (N1.getValueType().isInteger() == VT.isInteger()) &&
2993 N1.getValueType() != VT &&
2994 "Wrong types for EXTRACT_ELEMENT!");
2996 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2997 // 64-bit integers into 32-bit parts. Instead of building the extract of
2998 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2999 if (N1.getOpcode() == ISD::BUILD_PAIR)
3000 return N1.getOperand(N2C->getZExtValue());
3002 // EXTRACT_ELEMENT of a constant int is also very common.
3003 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3004 unsigned ElementSize = VT.getSizeInBits();
3005 unsigned Shift = ElementSize * N2C->getZExtValue();
3006 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3007 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3008 }
3009 break;
3010 case ISD::EXTRACT_SUBVECTOR: {
3011 SDValue Index = N2;
3012 if (VT.isSimple() && N1.getValueType().isSimple()) {
3013 assert(VT.isVector() && N1.getValueType().isVector() &&
3014 "Extract subvector VTs must be a vectors!");
3015 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3016 "Extract subvector VTs must have the same element type!");
3017 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3018 "Extract subvector must be from larger vector to smaller vector!");
3020 if (isa<ConstantSDNode>(Index.getNode())) {
3021 assert((VT.getVectorNumElements() +
3022 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3023 <= N1.getValueType().getVectorNumElements())
3024 && "Extract subvector overflow!");
3025 }
3027 // Trivial extraction.
3028 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3029 return N1;
3030 }
3031 break;
3032 }
3033 }
3035 if (N1C) {
3036 if (N2C) {
3037 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3038 if (SV.getNode()) return SV;
3039 } else { // Cannonicalize constant to RHS if commutative
3040 if (isCommutativeBinOp(Opcode)) {
3041 std::swap(N1C, N2C);
3042 std::swap(N1, N2);
3043 }
3044 }
3045 }
3047 // Constant fold FP operations.
3048 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3049 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3050 if (N1CFP) {
3051 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3052 // Cannonicalize constant to RHS if commutative
3053 std::swap(N1CFP, N2CFP);
3054 std::swap(N1, N2);
3055 } else if (N2CFP && VT != MVT::ppcf128) {
3056 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3057 APFloat::opStatus s;
3058 switch (Opcode) {
3059 case ISD::FADD:
3060 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3061 if (s != APFloat::opInvalidOp)
3062 return getConstantFP(V1, VT);
3063 break;
3064 case ISD::FSUB:
3065 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3066 if (s!=APFloat::opInvalidOp)
3067 return getConstantFP(V1, VT);
3068 break;
3069 case ISD::FMUL:
3070 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3071 if (s!=APFloat::opInvalidOp)
3072 return getConstantFP(V1, VT);
3073 break;
3074 case ISD::FDIV:
3075 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3076 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3077 return getConstantFP(V1, VT);
3078 break;
3079 case ISD::FREM :
3080 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3081 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3082 return getConstantFP(V1, VT);
3083 break;
3084 case ISD::FCOPYSIGN:
3085 V1.copySign(V2);
3086 return getConstantFP(V1, VT);
3087 default: break;
3088 }
3089 }
3091 if (Opcode == ISD::FP_ROUND) {
3092 APFloat V = N1CFP->getValueAPF(); // make copy
3093 bool ignored;
3094 // This can return overflow, underflow, or inexact; we don't care.
3095 // FIXME need to be more flexible about rounding mode.
3096 (void)V.convert(*EVTToAPFloatSemantics(VT),
3097 APFloat::rmNearestTiesToEven, &ignored);
3098 return getConstantFP(V, VT);
3099 }
3100 }
3102 // Canonicalize an UNDEF to the RHS, even over a constant.
3103 if (N1.getOpcode() == ISD::UNDEF) {
3104 if (isCommutativeBinOp(Opcode)) {
3105 std::swap(N1, N2);
3106 } else {
3107 switch (Opcode) {
3108 case ISD::FP_ROUND_INREG:
3109 case ISD::SIGN_EXTEND_INREG:
3110 case ISD::SUB:
3111 case ISD::FSUB:
3112 case ISD::FDIV:
3113 case ISD::FREM:
3114 case ISD::SRA:
3115 return N1; // fold op(undef, arg2) -> undef
3116 case ISD::UDIV:
3117 case ISD::SDIV:
3118 case ISD::UREM:
3119 case ISD::SREM:
3120 case ISD::SRL:
3121 case ISD::SHL:
3122 if (!VT.isVector())
3123 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3124 // For vectors, we can't easily build an all zero vector, just return
3125 // the LHS.
3126 return N2;
3127 }
3128 }
3129 }
3131 // Fold a bunch of operators when the RHS is undef.
3132 if (N2.getOpcode() == ISD::UNDEF) {
3133 switch (Opcode) {
3134 case ISD::XOR:
3135 if (N1.getOpcode() == ISD::UNDEF)
3136 // Handle undef ^ undef -> 0 special case. This is a common
3137 // idiom (misuse).
3138 return getConstant(0, VT);
3139 // fallthrough
3140 case ISD::ADD:
3141 case ISD::ADDC:
3142 case ISD::ADDE:
3143 case ISD::SUB:
3144 case ISD::UDIV:
3145 case ISD::SDIV:
3146 case ISD::UREM:
3147 case ISD::SREM:
3148 return N2; // fold op(arg1, undef) -> undef
3149 case ISD::FADD:
3150 case ISD::FSUB:
3151 case ISD::FMUL:
3152 case ISD::FDIV:
3153 case ISD::FREM:
3154 if (getTarget().Options.UnsafeFPMath)
3155 return N2;
3156 break;
3157 case ISD::MUL:
3158 case ISD::AND:
3159 case ISD::SRL:
3160 case ISD::SHL:
3161 if (!VT.isVector())
3162 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3163 // For vectors, we can't easily build an all zero vector, just return
3164 // the LHS.
3165 return N1;
3166 case ISD::OR:
3167 if (!VT.isVector())
3168 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3169 // For vectors, we can't easily build an all one vector, just return
3170 // the LHS.
3171 return N1;
3172 case ISD::SRA:
3173 return N1;
3174 }
3175 }
3177 // Memoize this node if possible.
3178 SDNode *N;
3179 SDVTList VTs = getVTList(VT);
3180 if (VT != MVT::Glue) {
3181 SDValue Ops[] = { N1, N2 };
3182 FoldingSetNodeID ID;
3183 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3184 void *IP = 0;
3185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3186 return SDValue(E, 0);
3188 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3189 CSEMap.InsertNode(N, IP);
3190 } else {
3191 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3192 }
3194 AllNodes.push_back(N);
3195 #ifndef NDEBUG
3196 VerifySDNode(N);
3197 #endif
3198 return SDValue(N, 0);
3199 }
3201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3202 SDValue N1, SDValue N2, SDValue N3) {
3203 // Perform various simplifications.
3204 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3205 switch (Opcode) {
3206 case ISD::CONCAT_VECTORS:
3207 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3208 // one big BUILD_VECTOR.
3209 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3210 N2.getOpcode() == ISD::BUILD_VECTOR &&
3211 N3.getOpcode() == ISD::BUILD_VECTOR) {
3212 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3213 N1.getNode()->op_end());
3214 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3215 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3216 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3217 }
3218 break;
3219 case ISD::SETCC: {
3220 // Use FoldSetCC to simplify SETCC's.
3221 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3222 if (Simp.getNode()) return Simp;
3223 break;
3224 }
3225 case ISD::SELECT:
3226 if (N1C) {
3227 if (N1C->getZExtValue())
3228 return N2; // select true, X, Y -> X
3229 return N3; // select false, X, Y -> Y
3230 }
3232 if (N2 == N3) return N2; // select C, X, X -> X
3233 break;
3234 case ISD::VECTOR_SHUFFLE:
3235 llvm_unreachable("should use getVectorShuffle constructor!");
3236 case ISD::INSERT_SUBVECTOR: {
3237 SDValue Index = N3;
3238 if (VT.isSimple() && N1.getValueType().isSimple()
3239 && N2.getValueType().isSimple()) {
3240 assert(VT.isVector() && N1.getValueType().isVector() &&
3241 N2.getValueType().isVector() &&
3242 "Insert subvector VTs must be a vectors");
3243 assert(VT == N1.getValueType() &&
3244 "Dest and insert subvector source types must match!");
3245 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3246 "Insert subvector must be from smaller vector to larger vector!");
3247 if (isa<ConstantSDNode>(Index.getNode())) {
3248 assert((N2.getValueType().getVectorNumElements() +
3249 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3250 <= VT.getVectorNumElements())
3251 && "Insert subvector overflow!");
3252 }
3254 // Trivial insertion.
3255 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3256 return N2;
3257 }
3258 break;
3259 }
3260 case ISD::BITCAST:
3261 // Fold bit_convert nodes from a type to themselves.
3262 if (N1.getValueType() == VT)
3263 return N1;
3264 break;
3265 }
3267 // Memoize node if it doesn't produce a flag.
3268 SDNode *N;
3269 SDVTList VTs = getVTList(VT);
3270 if (VT != MVT::Glue) {
3271 SDValue Ops[] = { N1, N2, N3 };
3272 FoldingSetNodeID ID;
3273 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3274 void *IP = 0;
3275 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3276 return SDValue(E, 0);
3278 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3279 CSEMap.InsertNode(N, IP);
3280 } else {
3281 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3282 }
3284 AllNodes.push_back(N);
3285 #ifndef NDEBUG
3286 VerifySDNode(N);
3287 #endif
3288 return SDValue(N, 0);
3289 }
3291 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3292 SDValue N1, SDValue N2, SDValue N3,
3293 SDValue N4) {
3294 SDValue Ops[] = { N1, N2, N3, N4 };
3295 return getNode(Opcode, DL, VT, Ops, 4);
3296 }
3298 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3299 SDValue N1, SDValue N2, SDValue N3,
3300 SDValue N4, SDValue N5) {
3301 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3302 return getNode(Opcode, DL, VT, Ops, 5);
3303 }
3305 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3306 /// the incoming stack arguments to be loaded from the stack.
3307 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3308 SmallVector<SDValue, 8> ArgChains;
3310 // Include the original chain at the beginning of the list. When this is
3311 // used by target LowerCall hooks, this helps legalize find the
3312 // CALLSEQ_BEGIN node.
3313 ArgChains.push_back(Chain);
3315 // Add a chain value for each stack argument.
3316 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3317 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3318 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3319 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3320 if (FI->getIndex() < 0)
3321 ArgChains.push_back(SDValue(L, 1));
3323 // Build a tokenfactor for all the chains.
3324 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3325 &ArgChains[0], ArgChains.size());
3326 }
3328 /// SplatByte - Distribute ByteVal over NumBits bits.
3329 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3330 APInt Val = APInt(NumBits, ByteVal);
3331 unsigned Shift = 8;
3332 for (unsigned i = NumBits; i > 8; i >>= 1) {
3333 Val = (Val << Shift) | Val;
3334 Shift <<= 1;
3335 }
3336 return Val;
3337 }
3339 /// getMemsetValue - Vectorized representation of the memset value
3340 /// operand.
3341 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3342 DebugLoc dl) {
3343 assert(Value.getOpcode() != ISD::UNDEF);
3345 unsigned NumBits = VT.getScalarType().getSizeInBits();
3346 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3347 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3348 if (VT.isInteger())
3349 return DAG.getConstant(Val, VT);
3350 return DAG.getConstantFP(APFloat(Val), VT);
3351 }
3353 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3354 if (NumBits > 8) {
3355 // Use a multiplication with 0x010101... to extend the input to the
3356 // required length.
3357 APInt Magic = SplatByte(NumBits, 0x01);
3358 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3359 }
3361 return Value;
3362 }
3364 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3365 /// used when a memcpy is turned into a memset when the source is a constant
3366 /// string ptr.
3367 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3368 const TargetLowering &TLI, StringRef Str) {
3369 // Handle vector with all elements zero.
3370 if (Str.empty()) {
3371 if (VT.isInteger())
3372 return DAG.getConstant(0, VT);
3373 else if (VT == MVT::f32 || VT == MVT::f64)
3374 return DAG.getConstantFP(0.0, VT);
3375 else if (VT.isVector()) {
3376 unsigned NumElts = VT.getVectorNumElements();
3377 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3378 return DAG.getNode(ISD::BITCAST, dl, VT,
3379 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3380 EltVT, NumElts)));
3381 } else
3382 llvm_unreachable("Expected type!");
3383 }
3385 assert(!VT.isVector() && "Can't handle vector type here!");
3386 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3387 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3389 uint64_t Val = 0;
3390 if (TLI.isLittleEndian()) {
3391 for (unsigned i = 0; i != NumBytes; ++i)
3392 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3393 } else {
3394 for (unsigned i = 0; i != NumBytes; ++i)
3395 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3396 }
3398 return DAG.getConstant(Val, VT);
3399 }
3401 /// getMemBasePlusOffset - Returns base and offset node for the
3402 ///
3403 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3404 SelectionDAG &DAG) {
3405 EVT VT = Base.getValueType();
3406 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3407 VT, Base, DAG.getConstant(Offset, VT));
3408 }
3410 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3411 ///
3412 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3413 unsigned SrcDelta = 0;
3414 GlobalAddressSDNode *G = NULL;
3415 if (Src.getOpcode() == ISD::GlobalAddress)
3416 G = cast<GlobalAddressSDNode>(Src);
3417 else if (Src.getOpcode() == ISD::ADD &&
3418 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3419 Src.getOperand(1).getOpcode() == ISD::Constant) {
3420 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3421 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3422 }
3423 if (!G)
3424 return false;
3426 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3427 }
3429 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3430 /// to replace the memset / memcpy. Return true if the number of memory ops
3431 /// is below the threshold. It returns the types of the sequence of
3432 /// memory ops to perform memset / memcpy by reference.
3433 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3434 unsigned Limit, uint64_t Size,
3435 unsigned DstAlign, unsigned SrcAlign,
3436 bool IsZeroVal,
3437 bool MemcpyStrSrc,
3438 SelectionDAG &DAG,
3439 const TargetLowering &TLI) {
3440 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3441 "Expecting memcpy / memset source to meet alignment requirement!");
3442 // If 'SrcAlign' is zero, that means the memory operation does not need to
3443 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3444 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3445 // is the specified alignment of the memory operation. If it is zero, that
3446 // means it's possible to change the alignment of the destination.
3447 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3448 // not need to be loaded.
3449 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3450 IsZeroVal, MemcpyStrSrc,
3451 DAG.getMachineFunction());
3452 Type *vtType = VT.isExtended() ? VT.getTypeForEVT(*DAG.getContext()) : NULL;
3453 unsigned AS = (vtType && vtType->isPointerTy()) ?
3454 cast<PointerType>(vtType)->getAddressSpace() : 0;
3456 if (VT == MVT::Other) {
3457 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3458 TLI.allowsUnalignedMemoryAccesses(VT)) {
3459 VT = TLI.getPointerTy();
3460 } else {
3461 switch (DstAlign & 7) {
3462 case 0: VT = MVT::i64; break;
3463 case 4: VT = MVT::i32; break;
3464 case 2: VT = MVT::i16; break;
3465 default: VT = MVT::i8; break;
3466 }
3467 }
3469 MVT LVT = MVT::i64;
3470 while (!TLI.isTypeLegal(LVT))
3471 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3472 assert(LVT.isInteger());
3474 if (VT.bitsGT(LVT))
3475 VT = LVT;
3476 }
3478 unsigned NumMemOps = 0;
3479 while (Size != 0) {
3480 unsigned VTSize = VT.getSizeInBits() / 8;
3481 while (VTSize > Size) {
3482 // For now, only use non-vector load / store's for the left-over pieces.
3483 if (VT.isVector() || VT.isFloatingPoint()) {
3484 VT = MVT::i64;
3485 while (!TLI.isTypeLegal(VT))
3486 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3487 VTSize = VT.getSizeInBits() / 8;
3488 } else {
3489 // This can result in a type that is not legal on the target, e.g.
3490 // 1 or 2 bytes on PPC.
3491 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3492 VTSize >>= 1;
3493 }
3494 }
3496 if (++NumMemOps > Limit)
3497 return false;
3498 MemOps.push_back(VT);
3499 Size -= VTSize;
3500 }
3502 return true;
3503 }
3505 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3506 SDValue Chain, SDValue Dst,
3507 SDValue Src, uint64_t Size,
3508 unsigned Align, bool isVol,
3509 bool AlwaysInline,
3510 MachinePointerInfo DstPtrInfo,
3511 MachinePointerInfo SrcPtrInfo) {
3512 // Turn a memcpy of undef to nop.
3513 if (Src.getOpcode() == ISD::UNDEF)
3514 return Chain;
3516 // Expand memcpy to a series of load and store ops if the size operand falls
3517 // below a certain threshold.
3518 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3519 // rather than maybe a humongous number of loads and stores.
3520 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3521 std::vector<EVT> MemOps;
3522 bool DstAlignCanChange = false;
3523 MachineFunction &MF = DAG.getMachineFunction();
3524 MachineFrameInfo *MFI = MF.getFrameInfo();
3525 bool OptSize =
3526 MF.getFunction()->getFnAttributes().
3527 hasAttribute(Attributes::OptimizeForSize);
3528 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3529 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3530 DstAlignCanChange = true;
3531 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3532 if (Align > SrcAlign)
3533 SrcAlign = Align;
3534 StringRef Str;
3535 bool CopyFromStr = isMemSrcFromString(Src, Str);
3536 bool isZeroStr = CopyFromStr && Str.empty();
3537 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3539 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3540 (DstAlignCanChange ? 0 : Align),
3541 (isZeroStr ? 0 : SrcAlign),
3542 true, CopyFromStr, DAG, TLI))
3543 return SDValue();
3545 if (DstAlignCanChange) {
3546 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3547 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3548 if (NewAlign > Align) {
3549 // Give the stack frame object a larger alignment if needed.
3550 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3551 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3552 Align = NewAlign;
3553 }
3554 }
3556 SmallVector<SDValue, 8> OutChains;
3557 unsigned NumMemOps = MemOps.size();
3558 uint64_t SrcOff = 0, DstOff = 0;
3559 for (unsigned i = 0; i != NumMemOps; ++i) {
3560 EVT VT = MemOps[i];
3561 unsigned VTSize = VT.getSizeInBits() / 8;
3562 SDValue Value, Store;
3564 if (CopyFromStr &&
3565 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3566 // It's unlikely a store of a vector immediate can be done in a single
3567 // instruction. It would require a load from a constantpool first.
3568 // We only handle zero vectors here.
3569 // FIXME: Handle other cases where store of vector immediate is done in
3570 // a single instruction.
3571 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3572 Store = DAG.getStore(Chain, dl, Value,
3573 getMemBasePlusOffset(Dst, DstOff, DAG),
3574 DstPtrInfo.getWithOffset(DstOff), isVol,
3575 false, Align);
3576 } else {
3577 // The type might not be legal for the target. This should only happen
3578 // if the type is smaller than a legal type, as on PPC, so the right
3579 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3580 // to Load/Store if NVT==VT.
3581 // FIXME does the case above also need this?
3582 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3583 assert(NVT.bitsGE(VT));
3584 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3585 getMemBasePlusOffset(Src, SrcOff, DAG),
3586 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3587 MinAlign(SrcAlign, SrcOff));
3588 Store = DAG.getTruncStore(Chain, dl, Value,
3589 getMemBasePlusOffset(Dst, DstOff, DAG),
3590 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3591 false, Align);
3592 }
3593 OutChains.push_back(Store);
3594 SrcOff += VTSize;
3595 DstOff += VTSize;
3596 }
3598 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3599 &OutChains[0], OutChains.size());
3600 }
3602 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3603 SDValue Chain, SDValue Dst,
3604 SDValue Src, uint64_t Size,
3605 unsigned Align, bool isVol,
3606 bool AlwaysInline,
3607 MachinePointerInfo DstPtrInfo,
3608 MachinePointerInfo SrcPtrInfo) {
3609 // Turn a memmove of undef to nop.
3610 if (Src.getOpcode() == ISD::UNDEF)
3611 return Chain;
3613 // Expand memmove to a series of load and store ops if the size operand falls
3614 // below a certain threshold.
3615 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3616 std::vector<EVT> MemOps;
3617 bool DstAlignCanChange = false;
3618 MachineFunction &MF = DAG.getMachineFunction();
3619 MachineFrameInfo *MFI = MF.getFrameInfo();
3620 bool OptSize = MF.getFunction()->getFnAttributes().
3621 hasAttribute(Attributes::OptimizeForSize);
3622 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3623 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3624 DstAlignCanChange = true;
3625 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3626 if (Align > SrcAlign)
3627 SrcAlign = Align;
3628 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3630 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3631 (DstAlignCanChange ? 0 : Align),
3632 SrcAlign, true, false, DAG, TLI))
3633 return SDValue();
3635 if (DstAlignCanChange) {
3636 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3637 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3638 if (NewAlign > Align) {
3639 // Give the stack frame object a larger alignment if needed.
3640 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3641 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3642 Align = NewAlign;
3643 }
3644 }
3646 uint64_t SrcOff = 0, DstOff = 0;
3647 SmallVector<SDValue, 8> LoadValues;
3648 SmallVector<SDValue, 8> LoadChains;
3649 SmallVector<SDValue, 8> OutChains;
3650 unsigned NumMemOps = MemOps.size();
3651 for (unsigned i = 0; i < NumMemOps; i++) {
3652 EVT VT = MemOps[i];
3653 unsigned VTSize = VT.getSizeInBits() / 8;
3654 SDValue Value, Store;
3656 Value = DAG.getLoad(VT, dl, Chain,
3657 getMemBasePlusOffset(Src, SrcOff, DAG),
3658 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3659 false, false, SrcAlign);
3660 LoadValues.push_back(Value);
3661 LoadChains.push_back(Value.getValue(1));
3662 SrcOff += VTSize;
3663 }
3664 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3665 &LoadChains[0], LoadChains.size());
3666 OutChains.clear();
3667 for (unsigned i = 0; i < NumMemOps; i++) {
3668 EVT VT = MemOps[i];
3669 unsigned VTSize = VT.getSizeInBits() / 8;
3670 SDValue Value, Store;
3672 Store = DAG.getStore(Chain, dl, LoadValues[i],
3673 getMemBasePlusOffset(Dst, DstOff, DAG),
3674 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3675 OutChains.push_back(Store);
3676 DstOff += VTSize;
3677 }
3679 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3680 &OutChains[0], OutChains.size());
3681 }
3683 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3684 SDValue Chain, SDValue Dst,
3685 SDValue Src, uint64_t Size,
3686 unsigned Align, bool isVol,
3687 MachinePointerInfo DstPtrInfo) {
3688 // Turn a memset of undef to nop.
3689 if (Src.getOpcode() == ISD::UNDEF)
3690 return Chain;
3692 // Expand memset to a series of load/store ops if the size operand
3693 // falls below a certain threshold.
3694 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3695 std::vector<EVT> MemOps;
3696 bool DstAlignCanChange = false;
3697 MachineFunction &MF = DAG.getMachineFunction();
3698 MachineFrameInfo *MFI = MF.getFrameInfo();
3699 bool OptSize = MF.getFunction()->getFnAttributes().
3700 hasAttribute(Attributes::OptimizeForSize);
3701 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3702 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3703 DstAlignCanChange = true;
3704 bool IsZeroVal =
3705 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3706 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3707 Size, (DstAlignCanChange ? 0 : Align), 0,
3708 IsZeroVal, false, DAG, TLI))
3709 return SDValue();
3711 if (DstAlignCanChange) {
3712 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3713 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3714 if (NewAlign > Align) {
3715 // Give the stack frame object a larger alignment if needed.
3716 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3717 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3718 Align = NewAlign;
3719 }
3720 }
3722 SmallVector<SDValue, 8> OutChains;
3723 uint64_t DstOff = 0;
3724 unsigned NumMemOps = MemOps.size();
3726 // Find the largest store and generate the bit pattern for it.
3727 EVT LargestVT = MemOps[0];
3728 for (unsigned i = 1; i < NumMemOps; i++)
3729 if (MemOps[i].bitsGT(LargestVT))
3730 LargestVT = MemOps[i];
3731 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3733 for (unsigned i = 0; i < NumMemOps; i++) {
3734 EVT VT = MemOps[i];
3736 // If this store is smaller than the largest store see whether we can get
3737 // the smaller value for free with a truncate.
3738 SDValue Value = MemSetValue;
3739 if (VT.bitsLT(LargestVT)) {
3740 if (!LargestVT.isVector() && !VT.isVector() &&
3741 TLI.isTruncateFree(LargestVT, VT))
3742 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3743 else
3744 Value = getMemsetValue(Src, VT, DAG, dl);
3745 }
3746 assert(Value.getValueType() == VT && "Value with wrong type.");
3747 SDValue Store = DAG.getStore(Chain, dl, Value,
3748 getMemBasePlusOffset(Dst, DstOff, DAG),
3749 DstPtrInfo.getWithOffset(DstOff),
3750 isVol, false, Align);
3751 OutChains.push_back(Store);
3752 DstOff += VT.getSizeInBits() / 8;
3753 }
3755 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3756 &OutChains[0], OutChains.size());
3757 }
3759 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3760 SDValue Src, SDValue Size,
3761 unsigned Align, bool isVol, bool AlwaysInline,
3762 MachinePointerInfo DstPtrInfo,
3763 MachinePointerInfo SrcPtrInfo) {
3765 // Check to see if we should lower the memcpy to loads and stores first.
3766 // For cases within the target-specified limits, this is the best choice.
3767 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3768 if (ConstantSize) {
3769 // Memcpy with size zero? Just return the original chain.
3770 if (ConstantSize->isNullValue())
3771 return Chain;
3773 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3774 ConstantSize->getZExtValue(),Align,
3775 isVol, false, DstPtrInfo, SrcPtrInfo);
3776 if (Result.getNode())
3777 return Result;
3778 }
3780 // Then check to see if we should lower the memcpy with target-specific
3781 // code. If the target chooses to do this, this is the next best.
3782 SDValue Result =
3783 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3784 isVol, AlwaysInline,
3785 DstPtrInfo, SrcPtrInfo);
3786 if (Result.getNode())
3787 return Result;
3789 // If we really need inline code and the target declined to provide it,
3790 // use a (potentially long) sequence of loads and stores.
3791 if (AlwaysInline) {
3792 assert(ConstantSize && "AlwaysInline requires a constant size!");
3793 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3794 ConstantSize->getZExtValue(), Align, isVol,
3795 true, DstPtrInfo, SrcPtrInfo);
3796 }
3798 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3799 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3800 // respect volatile, so they may do things like read or write memory
3801 // beyond the given memory regions. But fixing this isn't easy, and most
3802 // people don't care.
3804 // Emit a library call.
3805 TargetLowering::ArgListTy Args;
3806 TargetLowering::ArgListEntry Entry;
3807 unsigned AS = SrcPtrInfo.getAddrSpace();
3808 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext(), AS);
3809 Entry.Node = Dst; Args.push_back(Entry);
3810 Entry.Node = Src; Args.push_back(Entry);
3811 Entry.Node = Size; Args.push_back(Entry);
3812 // FIXME: pass in DebugLoc
3813 TargetLowering::
3814 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3815 false, false, false, false, 0,
3816 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3817 /*isTailCall=*/false,
3818 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3819 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3820 TLI.getPointerTy()),
3821 Args, *this, dl);
3822 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3824 return CallResult.second;
3825 }
3827 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3828 SDValue Src, SDValue Size,
3829 unsigned Align, bool isVol,
3830 MachinePointerInfo DstPtrInfo,
3831 MachinePointerInfo SrcPtrInfo) {
3833 // Check to see if we should lower the memmove to loads and stores first.
3834 // For cases within the target-specified limits, this is the best choice.
3835 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3836 if (ConstantSize) {
3837 // Memmove with size zero? Just return the original chain.
3838 if (ConstantSize->isNullValue())
3839 return Chain;
3841 SDValue Result =
3842 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3843 ConstantSize->getZExtValue(), Align, isVol,
3844 false, DstPtrInfo, SrcPtrInfo);
3845 if (Result.getNode())
3846 return Result;
3847 }
3849 // Then check to see if we should lower the memmove with target-specific
3850 // code. If the target chooses to do this, this is the next best.
3851 SDValue Result =
3852 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3853 DstPtrInfo, SrcPtrInfo);
3854 if (Result.getNode())
3855 return Result;
3857 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3858 // not be safe. See memcpy above for more details.
3860 // Emit a library call.
3861 TargetLowering::ArgListTy Args;
3862 TargetLowering::ArgListEntry Entry;
3863 unsigned AS = SrcPtrInfo.getAddrSpace();
3864 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext(), AS);
3865 Entry.Node = Dst; Args.push_back(Entry);
3866 Entry.Node = Src; Args.push_back(Entry);
3867 Entry.Node = Size; Args.push_back(Entry);
3868 // FIXME: pass in DebugLoc
3869 TargetLowering::
3870 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3871 false, false, false, false, 0,
3872 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3873 /*isTailCall=*/false,
3874 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3875 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3876 TLI.getPointerTy()),
3877 Args, *this, dl);
3878 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3880 return CallResult.second;
3881 }
3883 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3884 SDValue Src, SDValue Size,
3885 unsigned Align, bool isVol,
3886 MachinePointerInfo DstPtrInfo) {
3888 // Check to see if we should lower the memset to stores first.
3889 // For cases within the target-specified limits, this is the best choice.
3890 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3891 if (ConstantSize) {
3892 // Memset with size zero? Just return the original chain.
3893 if (ConstantSize->isNullValue())
3894 return Chain;
3896 SDValue Result =
3897 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3898 Align, isVol, DstPtrInfo);
3900 if (Result.getNode())
3901 return Result;
3902 }
3904 // Then check to see if we should lower the memset with target-specific
3905 // code. If the target chooses to do this, this is the next best.
3906 SDValue Result =
3907 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3908 DstPtrInfo);
3909 if (Result.getNode())
3910 return Result;
3912 // Emit a library call.
3913 unsigned AS = DstPtrInfo.getAddrSpace();
3914 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext(), AS);
3915 TargetLowering::ArgListTy Args;
3916 TargetLowering::ArgListEntry Entry;
3917 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3918 Args.push_back(Entry);
3919 // Extend or truncate the argument to be an i32 value for the call.
3920 if (Src.getValueType().bitsGT(MVT::i32))
3921 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3922 else
3923 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3924 Entry.Node = Src;
3925 Entry.Ty = Type::getInt32Ty(*getContext());
3926 Entry.isSExt = true;
3927 Args.push_back(Entry);
3928 Entry.Node = Size;
3929 Entry.Ty = IntPtrTy;
3930 Entry.isSExt = false;
3931 Args.push_back(Entry);
3932 // FIXME: pass in DebugLoc
3933 TargetLowering::
3934 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3935 false, false, false, false, 0,
3936 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3937 /*isTailCall=*/false,
3938 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3939 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3940 TLI.getPointerTy()),
3941 Args, *this, dl);
3942 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3944 return CallResult.second;
3945 }
3947 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3948 SDValue Chain, SDValue Ptr, SDValue Cmp,
3949 SDValue Swp, MachinePointerInfo PtrInfo,
3950 unsigned Alignment,
3951 AtomicOrdering Ordering,
3952 SynchronizationScope SynchScope) {
3953 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3954 Alignment = getEVTAlignment(MemVT);
3956 MachineFunction &MF = getMachineFunction();
3958 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
3959 // For now, atomics are considered to be volatile always.
3960 // FIXME: Volatile isn't really correct; we should keep track of atomic
3961 // orderings in the memoperand.
3962 unsigned Flags = MachineMemOperand::MOVolatile;
3963 if (Opcode != ISD::ATOMIC_STORE)
3964 Flags |= MachineMemOperand::MOLoad;
3965 if (Opcode != ISD::ATOMIC_LOAD)
3966 Flags |= MachineMemOperand::MOStore;
3968 MachineMemOperand *MMO =
3969 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3971 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3972 Ordering, SynchScope);
3973 }
3975 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3976 SDValue Chain,
3977 SDValue Ptr, SDValue Cmp,
3978 SDValue Swp, MachineMemOperand *MMO,
3979 AtomicOrdering Ordering,
3980 SynchronizationScope SynchScope) {
3981 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3982 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3984 EVT VT = Cmp.getValueType();
3986 SDVTList VTs = getVTList(VT, MVT::Other);
3987 FoldingSetNodeID ID;
3988 ID.AddInteger(MemVT.getRawBits());
3989 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3990 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3991 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
3992 void* IP = 0;
3993 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3994 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3995 return SDValue(E, 0);
3996 }
3997 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3998 Ptr, Cmp, Swp, MMO, Ordering,
3999 SynchScope);
4000 CSEMap.InsertNode(N, IP);
4001 AllNodes.push_back(N);
4002 return SDValue(N, 0);
4003 }
4005 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4006 SDValue Chain,
4007 SDValue Ptr, SDValue Val,
4008 const Value* PtrVal,
4009 unsigned Alignment,
4010 AtomicOrdering Ordering,
4011 SynchronizationScope SynchScope) {
4012 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4013 Alignment = getEVTAlignment(MemVT);
4015 MachineFunction &MF = getMachineFunction();
4016 // An atomic store does not load. An atomic load does not store.
4017 // (An atomicrmw obviously both loads and stores.)
4018 // For now, atomics are considered to be volatile always, and they are
4019 // chained as such.
4020 // FIXME: Volatile isn't really correct; we should keep track of atomic
4021 // orderings in the memoperand.
4022 unsigned Flags = MachineMemOperand::MOVolatile;
4023 if (Opcode != ISD::ATOMIC_STORE)
4024 Flags |= MachineMemOperand::MOLoad;
4025 if (Opcode != ISD::ATOMIC_LOAD)
4026 Flags |= MachineMemOperand::MOStore;
4028 MachineMemOperand *MMO =
4029 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4030 MemVT.getStoreSize(), Alignment);
4032 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4033 Ordering, SynchScope);
4034 }
4036 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4037 SDValue Chain,
4038 SDValue Ptr, SDValue Val,
4039 MachineMemOperand *MMO,
4040 AtomicOrdering Ordering,
4041 SynchronizationScope SynchScope) {
4042 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4043 Opcode == ISD::ATOMIC_LOAD_SUB ||
4044 Opcode == ISD::ATOMIC_LOAD_AND ||
4045 Opcode == ISD::ATOMIC_LOAD_OR ||
4046 Opcode == ISD::ATOMIC_LOAD_XOR ||
4047 Opcode == ISD::ATOMIC_LOAD_NAND ||
4048 Opcode == ISD::ATOMIC_LOAD_MIN ||
4049 Opcode == ISD::ATOMIC_LOAD_MAX ||
4050 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4051 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4052 Opcode == ISD::ATOMIC_SWAP ||
4053 Opcode == ISD::ATOMIC_STORE) &&
4054 "Invalid Atomic Op");
4056 EVT VT = Val.getValueType();
4058 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4059 getVTList(VT, MVT::Other);
4060 FoldingSetNodeID ID;
4061 ID.AddInteger(MemVT.getRawBits());
4062 SDValue Ops[] = {Chain, Ptr, Val};
4063 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4064 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4065 void* IP = 0;
4066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4067 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4068 return SDValue(E, 0);
4069 }
4070 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4071 Ptr, Val, MMO,
4072 Ordering, SynchScope);
4073 CSEMap.InsertNode(N, IP);
4074 AllNodes.push_back(N);
4075 return SDValue(N, 0);
4076 }
4078 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4079 EVT VT, SDValue Chain,
4080 SDValue Ptr,
4081 const Value* PtrVal,
4082 unsigned Alignment,
4083 AtomicOrdering Ordering,
4084 SynchronizationScope SynchScope) {
4085 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4086 Alignment = getEVTAlignment(MemVT);
4088 MachineFunction &MF = getMachineFunction();
4089 // An atomic store does not load. An atomic load does not store.
4090 // (An atomicrmw obviously both loads and stores.)
4091 // For now, atomics are considered to be volatile always, and they are
4092 // chained as such.
4093 // FIXME: Volatile isn't really correct; we should keep track of atomic
4094 // orderings in the memoperand.
4095 unsigned Flags = MachineMemOperand::MOVolatile;
4096 if (Opcode != ISD::ATOMIC_STORE)
4097 Flags |= MachineMemOperand::MOLoad;
4098 if (Opcode != ISD::ATOMIC_LOAD)
4099 Flags |= MachineMemOperand::MOStore;
4101 MachineMemOperand *MMO =
4102 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4103 MemVT.getStoreSize(), Alignment);
4105 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4106 Ordering, SynchScope);
4107 }
4109 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4110 EVT VT, SDValue Chain,
4111 SDValue Ptr,
4112 MachineMemOperand *MMO,
4113 AtomicOrdering Ordering,
4114 SynchronizationScope SynchScope) {
4115 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4117 SDVTList VTs = getVTList(VT, MVT::Other);
4118 FoldingSetNodeID ID;
4119 ID.AddInteger(MemVT.getRawBits());
4120 SDValue Ops[] = {Chain, Ptr};
4121 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4122 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4123 void* IP = 0;
4124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4125 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4126 return SDValue(E, 0);
4127 }
4128 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4129 Ptr, MMO, Ordering, SynchScope);
4130 CSEMap.InsertNode(N, IP);
4131 AllNodes.push_back(N);
4132 return SDValue(N, 0);
4133 }
4135 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4136 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4137 DebugLoc dl) {
4138 if (NumOps == 1)
4139 return Ops[0];
4141 SmallVector<EVT, 4> VTs;
4142 VTs.reserve(NumOps);
4143 for (unsigned i = 0; i < NumOps; ++i)
4144 VTs.push_back(Ops[i].getValueType());
4145 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4146 Ops, NumOps);
4147 }
4149 SDValue
4150 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4151 const EVT *VTs, unsigned NumVTs,
4152 const SDValue *Ops, unsigned NumOps,
4153 EVT MemVT, MachinePointerInfo PtrInfo,
4154 unsigned Align, bool Vol,
4155 bool ReadMem, bool WriteMem) {
4156 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4157 MemVT, PtrInfo, Align, Vol,
4158 ReadMem, WriteMem);
4159 }
4161 SDValue
4162 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4163 const SDValue *Ops, unsigned NumOps,
4164 EVT MemVT, MachinePointerInfo PtrInfo,
4165 unsigned Align, bool Vol,
4166 bool ReadMem, bool WriteMem) {
4167 if (Align == 0) // Ensure that codegen never sees alignment 0
4168 Align = getEVTAlignment(MemVT);
4170 MachineFunction &MF = getMachineFunction();
4171 unsigned Flags = 0;
4172 if (WriteMem)
4173 Flags |= MachineMemOperand::MOStore;
4174 if (ReadMem)
4175 Flags |= MachineMemOperand::MOLoad;
4176 if (Vol)
4177 Flags |= MachineMemOperand::MOVolatile;
4178 MachineMemOperand *MMO =
4179 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4181 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4182 }
4184 SDValue
4185 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4186 const SDValue *Ops, unsigned NumOps,
4187 EVT MemVT, MachineMemOperand *MMO) {
4188 assert((Opcode == ISD::INTRINSIC_VOID ||
4189 Opcode == ISD::INTRINSIC_W_CHAIN ||
4190 Opcode == ISD::PREFETCH ||
4191 Opcode == ISD::LIFETIME_START ||
4192 Opcode == ISD::LIFETIME_END ||
4193 (Opcode <= INT_MAX &&
4194 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4195 "Opcode is not a memory-accessing opcode!");
4197 // Memoize the node unless it returns a flag.
4198 MemIntrinsicSDNode *N;
4199 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4200 FoldingSetNodeID ID;
4201 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4202 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4203 void *IP = 0;
4204 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4205 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4206 return SDValue(E, 0);
4207 }
4209 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4210 MemVT, MMO);
4211 CSEMap.InsertNode(N, IP);
4212 } else {
4213 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4214 MemVT, MMO);
4215 }
4216 AllNodes.push_back(N);
4217 return SDValue(N, 0);
4218 }
4220 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4221 /// MachinePointerInfo record from it. This is particularly useful because the
4222 /// code generator has many cases where it doesn't bother passing in a
4223 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4224 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4225 // If this is FI+Offset, we can model it.
4226 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4227 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4229 // If this is (FI+Offset1)+Offset2, we can model it.
4230 if (Ptr.getOpcode() != ISD::ADD ||
4231 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4232 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4233 return MachinePointerInfo();
4235 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4236 return MachinePointerInfo::getFixedStack(FI, Offset+
4237 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4238 }
4240 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4241 /// MachinePointerInfo record from it. This is particularly useful because the
4242 /// code generator has many cases where it doesn't bother passing in a
4243 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4244 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4245 // If the 'Offset' value isn't a constant, we can't handle this.
4246 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4247 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4248 if (OffsetOp.getOpcode() == ISD::UNDEF)
4249 return InferPointerInfo(Ptr);
4250 return MachinePointerInfo();
4251 }
4254 SDValue
4255 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4256 EVT VT, DebugLoc dl, SDValue Chain,
4257 SDValue Ptr, SDValue Offset,
4258 MachinePointerInfo PtrInfo, EVT MemVT,
4259 bool isVolatile, bool isNonTemporal, bool isInvariant,
4260 unsigned Alignment, const MDNode *TBAAInfo,
4261 const MDNode *Ranges) {
4262 assert(Chain.getValueType() == MVT::Other &&
4263 "Invalid chain type");
4264 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4265 Alignment = getEVTAlignment(VT);
4267 unsigned Flags = MachineMemOperand::MOLoad;
4268 if (isVolatile)
4269 Flags |= MachineMemOperand::MOVolatile;
4270 if (isNonTemporal)
4271 Flags |= MachineMemOperand::MONonTemporal;
4272 if (isInvariant)
4273 Flags |= MachineMemOperand::MOInvariant;
4275 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4276 // clients.
4277 if (PtrInfo.V == 0)
4278 PtrInfo = InferPointerInfo(Ptr, Offset);
4280 MachineFunction &MF = getMachineFunction();
4281 MachineMemOperand *MMO =
4282 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4283 TBAAInfo, Ranges);
4284 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4285 }
4287 SDValue
4288 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4289 EVT VT, DebugLoc dl, SDValue Chain,
4290 SDValue Ptr, SDValue Offset, EVT MemVT,
4291 MachineMemOperand *MMO) {
4292 if (VT == MemVT) {
4293 ExtType = ISD::NON_EXTLOAD;
4294 } else if (ExtType == ISD::NON_EXTLOAD) {
4295 assert(VT == MemVT && "Non-extending load from different memory type!");
4296 } else {
4297 // Extending load.
4298 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4299 "Should only be an extending load, not truncating!");
4300 assert(VT.isInteger() == MemVT.isInteger() &&
4301 "Cannot convert from FP to Int or Int -> FP!");
4302 assert(VT.isVector() == MemVT.isVector() &&
4303 "Cannot use trunc store to convert to or from a vector!");
4304 assert((!VT.isVector() ||
4305 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4306 "Cannot use trunc store to change the number of vector elements!");
4307 }
4309 bool Indexed = AM != ISD::UNINDEXED;
4310 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4311 "Unindexed load with an offset!");
4313 SDVTList VTs = Indexed ?
4314 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4315 SDValue Ops[] = { Chain, Ptr, Offset };
4316 FoldingSetNodeID ID;
4317 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4318 ID.AddInteger(MemVT.getRawBits());
4319 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4320 MMO->isNonTemporal(),
4321 MMO->isInvariant()));
4322 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4323 void *IP = 0;
4324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4325 cast<LoadSDNode>(E)->refineAlignment(MMO);
4326 return SDValue(E, 0);
4327 }
4328 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4329 MemVT, MMO);
4330 CSEMap.InsertNode(N, IP);
4331 AllNodes.push_back(N);
4332 return SDValue(N, 0);
4333 }
4335 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4336 SDValue Chain, SDValue Ptr,
4337 MachinePointerInfo PtrInfo,
4338 bool isVolatile, bool isNonTemporal,
4339 bool isInvariant, unsigned Alignment,
4340 const MDNode *TBAAInfo,
4341 const MDNode *Ranges) {
4342 SDValue Undef = getUNDEF(Ptr.getValueType());
4343 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4344 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4345 TBAAInfo, Ranges);
4346 }
4348 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4349 SDValue Chain, SDValue Ptr,
4350 MachinePointerInfo PtrInfo, EVT MemVT,
4351 bool isVolatile, bool isNonTemporal,
4352 unsigned Alignment, const MDNode *TBAAInfo) {
4353 SDValue Undef = getUNDEF(Ptr.getValueType());
4354 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4355 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4356 TBAAInfo);
4357 }
4360 SDValue
4361 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4362 SDValue Offset, ISD::MemIndexedMode AM) {
4363 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4364 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4365 "Load is already a indexed load!");
4366 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4367 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4368 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4369 false, LD->getAlignment());
4370 }
4372 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4373 SDValue Ptr, MachinePointerInfo PtrInfo,
4374 bool isVolatile, bool isNonTemporal,
4375 unsigned Alignment, const MDNode *TBAAInfo) {
4376 assert(Chain.getValueType() == MVT::Other &&
4377 "Invalid chain type");
4378 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4379 Alignment = getEVTAlignment(Val.getValueType());
4381 unsigned Flags = MachineMemOperand::MOStore;
4382 if (isVolatile)
4383 Flags |= MachineMemOperand::MOVolatile;
4384 if (isNonTemporal)
4385 Flags |= MachineMemOperand::MONonTemporal;
4387 if (PtrInfo.V == 0)
4388 PtrInfo = InferPointerInfo(Ptr);
4390 MachineFunction &MF = getMachineFunction();
4391 MachineMemOperand *MMO =
4392 MF.getMachineMemOperand(PtrInfo, Flags,
4393 Val.getValueType().getStoreSize(), Alignment,
4394 TBAAInfo);
4396 return getStore(Chain, dl, Val, Ptr, MMO);
4397 }
4399 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4400 SDValue Ptr, MachineMemOperand *MMO) {
4401 assert(Chain.getValueType() == MVT::Other &&
4402 "Invalid chain type");
4403 EVT VT = Val.getValueType();
4404 SDVTList VTs = getVTList(MVT::Other);
4405 SDValue Undef = getUNDEF(Ptr.getValueType());
4406 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4407 FoldingSetNodeID ID;
4408 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4409 ID.AddInteger(VT.getRawBits());
4410 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4411 MMO->isNonTemporal(), MMO->isInvariant()));
4412 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4413 void *IP = 0;
4414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4415 cast<StoreSDNode>(E)->refineAlignment(MMO);
4416 return SDValue(E, 0);
4417 }
4418 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4419 false, VT, MMO);
4420 CSEMap.InsertNode(N, IP);
4421 AllNodes.push_back(N);
4422 return SDValue(N, 0);
4423 }
4425 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4426 SDValue Ptr, MachinePointerInfo PtrInfo,
4427 EVT SVT,bool isVolatile, bool isNonTemporal,
4428 unsigned Alignment,
4429 const MDNode *TBAAInfo) {
4430 assert(Chain.getValueType() == MVT::Other &&
4431 "Invalid chain type");
4432 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4433 Alignment = getEVTAlignment(SVT);
4435 unsigned Flags = MachineMemOperand::MOStore;
4436 if (isVolatile)
4437 Flags |= MachineMemOperand::MOVolatile;
4438 if (isNonTemporal)
4439 Flags |= MachineMemOperand::MONonTemporal;
4441 if (PtrInfo.V == 0)
4442 PtrInfo = InferPointerInfo(Ptr);
4444 MachineFunction &MF = getMachineFunction();
4445 MachineMemOperand *MMO =
4446 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4447 TBAAInfo);
4449 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4450 }
4452 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4453 SDValue Ptr, EVT SVT,
4454 MachineMemOperand *MMO) {
4455 EVT VT = Val.getValueType();
4457 assert(Chain.getValueType() == MVT::Other &&
4458 "Invalid chain type");
4459 if (VT == SVT)
4460 return getStore(Chain, dl, Val, Ptr, MMO);
4462 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4463 "Should only be a truncating store, not extending!");
4464 assert(VT.isInteger() == SVT.isInteger() &&
4465 "Can't do FP-INT conversion!");
4466 assert(VT.isVector() == SVT.isVector() &&
4467 "Cannot use trunc store to convert to or from a vector!");
4468 assert((!VT.isVector() ||
4469 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4470 "Cannot use trunc store to change the number of vector elements!");
4472 SDVTList VTs = getVTList(MVT::Other);
4473 SDValue Undef = getUNDEF(Ptr.getValueType());
4474 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4475 FoldingSetNodeID ID;
4476 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4477 ID.AddInteger(SVT.getRawBits());
4478 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4479 MMO->isNonTemporal(), MMO->isInvariant()));
4480 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4481 void *IP = 0;
4482 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4483 cast<StoreSDNode>(E)->refineAlignment(MMO);
4484 return SDValue(E, 0);
4485 }
4486 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4487 true, SVT, MMO);
4488 CSEMap.InsertNode(N, IP);
4489 AllNodes.push_back(N);
4490 return SDValue(N, 0);
4491 }
4493 SDValue
4494 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4495 SDValue Offset, ISD::MemIndexedMode AM) {
4496 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4497 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4498 "Store is already a indexed store!");
4499 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4500 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4501 FoldingSetNodeID ID;
4502 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4503 ID.AddInteger(ST->getMemoryVT().getRawBits());
4504 ID.AddInteger(ST->getRawSubclassData());
4505 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4506 void *IP = 0;
4507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4508 return SDValue(E, 0);
4510 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4511 ST->isTruncatingStore(),
4512 ST->getMemoryVT(),
4513 ST->getMemOperand());
4514 CSEMap.InsertNode(N, IP);
4515 AllNodes.push_back(N);
4516 return SDValue(N, 0);
4517 }
4519 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4520 SDValue Chain, SDValue Ptr,
4521 SDValue SV,
4522 unsigned Align) {
4523 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4524 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4525 }
4527 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4528 const SDUse *Ops, unsigned NumOps) {
4529 switch (NumOps) {
4530 case 0: return getNode(Opcode, DL, VT);
4531 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4532 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4533 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4534 default: break;
4535 }
4537 // Copy from an SDUse array into an SDValue array for use with
4538 // the regular getNode logic.
4539 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4540 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4541 }
4543 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4544 const SDValue *Ops, unsigned NumOps) {
4545 switch (NumOps) {
4546 case 0: return getNode(Opcode, DL, VT);
4547 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4548 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4549 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4550 default: break;
4551 }
4553 switch (Opcode) {
4554 default: break;
4555 case ISD::SELECT_CC: {
4556 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4557 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4558 "LHS and RHS of condition must have same type!");
4559 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4560 "True and False arms of SelectCC must have same type!");
4561 assert(Ops[2].getValueType() == VT &&
4562 "select_cc node must be of same type as true and false value!");
4563 break;
4564 }
4565 case ISD::BR_CC: {
4566 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4567 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4568 "LHS/RHS of comparison should match types!");
4569 break;
4570 }
4571 }
4573 // Memoize nodes.
4574 SDNode *N;
4575 SDVTList VTs = getVTList(VT);
4577 if (VT != MVT::Glue) {
4578 FoldingSetNodeID ID;
4579 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4580 void *IP = 0;
4582 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4583 return SDValue(E, 0);
4585 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4586 CSEMap.InsertNode(N, IP);
4587 } else {
4588 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4589 }
4591 AllNodes.push_back(N);
4592 #ifndef NDEBUG
4593 VerifySDNode(N);
4594 #endif
4595 return SDValue(N, 0);
4596 }
4598 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4599 const std::vector<EVT> &ResultTys,
4600 const SDValue *Ops, unsigned NumOps) {
4601 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4602 Ops, NumOps);
4603 }
4605 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4606 const EVT *VTs, unsigned NumVTs,
4607 const SDValue *Ops, unsigned NumOps) {
4608 if (NumVTs == 1)
4609 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4610 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4611 }
4613 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4614 const SDValue *Ops, unsigned NumOps) {
4615 if (VTList.NumVTs == 1)
4616 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4618 #if 0
4619 switch (Opcode) {
4620 // FIXME: figure out how to safely handle things like
4621 // int foo(int x) { return 1 << (x & 255); }
4622 // int bar() { return foo(256); }
4623 case ISD::SRA_PARTS:
4624 case ISD::SRL_PARTS:
4625 case ISD::SHL_PARTS:
4626 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4627 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4628 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4629 else if (N3.getOpcode() == ISD::AND)
4630 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4631 // If the and is only masking out bits that cannot effect the shift,
4632 // eliminate the and.
4633 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4634 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4635 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4636 }
4637 break;
4638 }
4639 #endif
4641 // Memoize the node unless it returns a flag.
4642 SDNode *N;
4643 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4644 FoldingSetNodeID ID;
4645 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4646 void *IP = 0;
4647 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4648 return SDValue(E, 0);
4650 if (NumOps == 1) {
4651 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4652 } else if (NumOps == 2) {
4653 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4654 } else if (NumOps == 3) {
4655 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4656 Ops[2]);
4657 } else {
4658 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4659 }
4660 CSEMap.InsertNode(N, IP);
4661 } else {
4662 if (NumOps == 1) {
4663 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4664 } else if (NumOps == 2) {
4665 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4666 } else if (NumOps == 3) {
4667 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4668 Ops[2]);
4669 } else {
4670 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4671 }
4672 }
4673 AllNodes.push_back(N);
4674 #ifndef NDEBUG
4675 VerifySDNode(N);
4676 #endif
4677 return SDValue(N, 0);
4678 }
4680 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4681 return getNode(Opcode, DL, VTList, 0, 0);
4682 }
4684 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4685 SDValue N1) {
4686 SDValue Ops[] = { N1 };
4687 return getNode(Opcode, DL, VTList, Ops, 1);
4688 }
4690 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4691 SDValue N1, SDValue N2) {
4692 SDValue Ops[] = { N1, N2 };
4693 return getNode(Opcode, DL, VTList, Ops, 2);
4694 }
4696 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4697 SDValue N1, SDValue N2, SDValue N3) {
4698 SDValue Ops[] = { N1, N2, N3 };
4699 return getNode(Opcode, DL, VTList, Ops, 3);
4700 }
4702 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4703 SDValue N1, SDValue N2, SDValue N3,
4704 SDValue N4) {
4705 SDValue Ops[] = { N1, N2, N3, N4 };
4706 return getNode(Opcode, DL, VTList, Ops, 4);
4707 }
4709 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4710 SDValue N1, SDValue N2, SDValue N3,
4711 SDValue N4, SDValue N5) {
4712 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4713 return getNode(Opcode, DL, VTList, Ops, 5);
4714 }
4716 SDVTList SelectionDAG::getVTList(EVT VT) {
4717 return makeVTList(SDNode::getValueTypeList(VT), 1);
4718 }
4720 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4721 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4722 E = VTList.rend(); I != E; ++I)
4723 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4724 return *I;
4726 EVT *Array = Allocator.Allocate<EVT>(2);
4727 Array[0] = VT1;
4728 Array[1] = VT2;
4729 SDVTList Result = makeVTList(Array, 2);
4730 VTList.push_back(Result);
4731 return Result;
4732 }
4734 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4735 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4736 E = VTList.rend(); I != E; ++I)
4737 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4738 I->VTs[2] == VT3)
4739 return *I;
4741 EVT *Array = Allocator.Allocate<EVT>(3);
4742 Array[0] = VT1;
4743 Array[1] = VT2;
4744 Array[2] = VT3;
4745 SDVTList Result = makeVTList(Array, 3);
4746 VTList.push_back(Result);
4747 return Result;
4748 }
4750 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4751 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4752 E = VTList.rend(); I != E; ++I)
4753 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4754 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4755 return *I;
4757 EVT *Array = Allocator.Allocate<EVT>(4);
4758 Array[0] = VT1;
4759 Array[1] = VT2;
4760 Array[2] = VT3;
4761 Array[3] = VT4;
4762 SDVTList Result = makeVTList(Array, 4);
4763 VTList.push_back(Result);
4764 return Result;
4765 }
4767 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4768 switch (NumVTs) {
4769 case 0: llvm_unreachable("Cannot have nodes without results!");
4770 case 1: return getVTList(VTs[0]);
4771 case 2: return getVTList(VTs[0], VTs[1]);
4772 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4773 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4774 default: break;
4775 }
4777 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4778 E = VTList.rend(); I != E; ++I) {
4779 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4780 continue;
4782 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4783 return *I;
4784 }
4786 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4787 std::copy(VTs, VTs+NumVTs, Array);
4788 SDVTList Result = makeVTList(Array, NumVTs);
4789 VTList.push_back(Result);
4790 return Result;
4791 }
4794 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4795 /// specified operands. If the resultant node already exists in the DAG,
4796 /// this does not modify the specified node, instead it returns the node that
4797 /// already exists. If the resultant node does not exist in the DAG, the
4798 /// input node is returned. As a degenerate case, if you specify the same
4799 /// input operands as the node already has, the input node is returned.
4800 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4801 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4803 // Check to see if there is no change.
4804 if (Op == N->getOperand(0)) return N;
4806 // See if the modified node already exists.
4807 void *InsertPos = 0;
4808 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4809 return Existing;
4811 // Nope it doesn't. Remove the node from its current place in the maps.
4812 if (InsertPos)
4813 if (!RemoveNodeFromCSEMaps(N))
4814 InsertPos = 0;
4816 // Now we update the operands.
4817 N->OperandList[0].set(Op);
4819 // If this gets put into a CSE map, add it.
4820 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4821 return N;
4822 }
4824 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4825 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4827 // Check to see if there is no change.
4828 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4829 return N; // No operands changed, just return the input node.
4831 // See if the modified node already exists.
4832 void *InsertPos = 0;
4833 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4834 return Existing;
4836 // Nope it doesn't. Remove the node from its current place in the maps.
4837 if (InsertPos)
4838 if (!RemoveNodeFromCSEMaps(N))
4839 InsertPos = 0;
4841 // Now we update the operands.
4842 if (N->OperandList[0] != Op1)
4843 N->OperandList[0].set(Op1);
4844 if (N->OperandList[1] != Op2)
4845 N->OperandList[1].set(Op2);
4847 // If this gets put into a CSE map, add it.
4848 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4849 return N;
4850 }
4852 SDNode *SelectionDAG::
4853 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4854 SDValue Ops[] = { Op1, Op2, Op3 };
4855 return UpdateNodeOperands(N, Ops, 3);
4856 }
4858 SDNode *SelectionDAG::
4859 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4860 SDValue Op3, SDValue Op4) {
4861 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4862 return UpdateNodeOperands(N, Ops, 4);
4863 }
4865 SDNode *SelectionDAG::
4866 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4867 SDValue Op3, SDValue Op4, SDValue Op5) {
4868 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4869 return UpdateNodeOperands(N, Ops, 5);
4870 }
4872 SDNode *SelectionDAG::
4873 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4874 assert(N->getNumOperands() == NumOps &&
4875 "Update with wrong number of operands");
4877 // Check to see if there is no change.
4878 bool AnyChange = false;
4879 for (unsigned i = 0; i != NumOps; ++i) {
4880 if (Ops[i] != N->getOperand(i)) {
4881 AnyChange = true;
4882 break;
4883 }
4884 }
4886 // No operands changed, just return the input node.
4887 if (!AnyChange) return N;
4889 // See if the modified node already exists.
4890 void *InsertPos = 0;
4891 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4892 return Existing;
4894 // Nope it doesn't. Remove the node from its current place in the maps.
4895 if (InsertPos)
4896 if (!RemoveNodeFromCSEMaps(N))
4897 InsertPos = 0;
4899 // Now we update the operands.
4900 for (unsigned i = 0; i != NumOps; ++i)
4901 if (N->OperandList[i] != Ops[i])
4902 N->OperandList[i].set(Ops[i]);
4904 // If this gets put into a CSE map, add it.
4905 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4906 return N;
4907 }
4909 /// DropOperands - Release the operands and set this node to have
4910 /// zero operands.
4911 void SDNode::DropOperands() {
4912 // Unlike the code in MorphNodeTo that does this, we don't need to
4913 // watch for dead nodes here.
4914 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4915 SDUse &Use = *I++;
4916 Use.set(SDValue());
4917 }
4918 }
4920 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4921 /// machine opcode.
4922 ///
4923 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4924 EVT VT) {
4925 SDVTList VTs = getVTList(VT);
4926 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4927 }
4929 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4930 EVT VT, SDValue Op1) {
4931 SDVTList VTs = getVTList(VT);
4932 SDValue Ops[] = { Op1 };
4933 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4934 }
4936 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4937 EVT VT, SDValue Op1,
4938 SDValue Op2) {
4939 SDVTList VTs = getVTList(VT);
4940 SDValue Ops[] = { Op1, Op2 };
4941 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4942 }
4944 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4945 EVT VT, SDValue Op1,
4946 SDValue Op2, SDValue Op3) {
4947 SDVTList VTs = getVTList(VT);
4948 SDValue Ops[] = { Op1, Op2, Op3 };
4949 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4950 }
4952 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4953 EVT VT, const SDValue *Ops,
4954 unsigned NumOps) {
4955 SDVTList VTs = getVTList(VT);
4956 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4957 }
4959 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4960 EVT VT1, EVT VT2, const SDValue *Ops,
4961 unsigned NumOps) {
4962 SDVTList VTs = getVTList(VT1, VT2);
4963 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4964 }
4966 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4967 EVT VT1, EVT VT2) {
4968 SDVTList VTs = getVTList(VT1, VT2);
4969 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4970 }
4972 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4973 EVT VT1, EVT VT2, EVT VT3,
4974 const SDValue *Ops, unsigned NumOps) {
4975 SDVTList VTs = getVTList(VT1, VT2, VT3);
4976 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4977 }
4979 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4980 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4981 const SDValue *Ops, unsigned NumOps) {
4982 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4983 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4984 }
4986 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4987 EVT VT1, EVT VT2,
4988 SDValue Op1) {
4989 SDVTList VTs = getVTList(VT1, VT2);
4990 SDValue Ops[] = { Op1 };
4991 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4992 }
4994 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4995 EVT VT1, EVT VT2,
4996 SDValue Op1, SDValue Op2) {
4997 SDVTList VTs = getVTList(VT1, VT2);
4998 SDValue Ops[] = { Op1, Op2 };
4999 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5000 }
5002 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5003 EVT VT1, EVT VT2,
5004 SDValue Op1, SDValue Op2,
5005 SDValue Op3) {
5006 SDVTList VTs = getVTList(VT1, VT2);
5007 SDValue Ops[] = { Op1, Op2, Op3 };
5008 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5009 }
5011 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5012 EVT VT1, EVT VT2, EVT VT3,
5013 SDValue Op1, SDValue Op2,
5014 SDValue Op3) {
5015 SDVTList VTs = getVTList(VT1, VT2, VT3);
5016 SDValue Ops[] = { Op1, Op2, Op3 };
5017 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5018 }
5020 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5021 SDVTList VTs, const SDValue *Ops,
5022 unsigned NumOps) {
5023 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5024 // Reset the NodeID to -1.
5025 N->setNodeId(-1);
5026 return N;
5027 }
5029 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5030 /// the line number information on the merged node since it is not possible to
5031 /// preserve the information that operation is associated with multiple lines.
5032 /// This will make the debugger working better at -O0, were there is a higher
5033 /// probability having other instructions associated with that line.
5034 ///
5035 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5036 DebugLoc NLoc = N->getDebugLoc();
5037 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5038 N->setDebugLoc(DebugLoc());
5039 }
5040 return N;
5041 }
5043 /// MorphNodeTo - This *mutates* the specified node to have the specified
5044 /// return type, opcode, and operands.
5045 ///
5046 /// Note that MorphNodeTo returns the resultant node. If there is already a
5047 /// node of the specified opcode and operands, it returns that node instead of
5048 /// the current one. Note that the DebugLoc need not be the same.
5049 ///
5050 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5051 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5052 /// node, and because it doesn't require CSE recalculation for any of
5053 /// the node's users.
5054 ///
5055 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5056 SDVTList VTs, const SDValue *Ops,
5057 unsigned NumOps) {
5058 // If an identical node already exists, use it.
5059 void *IP = 0;
5060 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5061 FoldingSetNodeID ID;
5062 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5063 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5064 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5065 }
5067 if (!RemoveNodeFromCSEMaps(N))
5068 IP = 0;
5070 // Start the morphing.
5071 N->NodeType = Opc;
5072 N->ValueList = VTs.VTs;
5073 N->NumValues = VTs.NumVTs;
5075 // Clear the operands list, updating used nodes to remove this from their
5076 // use list. Keep track of any operands that become dead as a result.
5077 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5078 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5079 SDUse &Use = *I++;
5080 SDNode *Used = Use.getNode();
5081 Use.set(SDValue());
5082 if (Used->use_empty())
5083 DeadNodeSet.insert(Used);
5084 }
5086 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5087 // Initialize the memory references information.
5088 MN->setMemRefs(0, 0);
5089 // If NumOps is larger than the # of operands we can have in a
5090 // MachineSDNode, reallocate the operand list.
5091 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5092 if (MN->OperandsNeedDelete)
5093 delete[] MN->OperandList;
5094 if (NumOps > array_lengthof(MN->LocalOperands))
5095 // We're creating a final node that will live unmorphed for the
5096 // remainder of the current SelectionDAG iteration, so we can allocate
5097 // the operands directly out of a pool with no recycling metadata.
5098 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5099 Ops, NumOps);
5100 else
5101 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5102 MN->OperandsNeedDelete = false;
5103 } else
5104 MN->InitOperands(MN->OperandList, Ops, NumOps);
5105 } else {
5106 // If NumOps is larger than the # of operands we currently have, reallocate
5107 // the operand list.
5108 if (NumOps > N->NumOperands) {
5109 if (N->OperandsNeedDelete)
5110 delete[] N->OperandList;
5111 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5112 N->OperandsNeedDelete = true;
5113 } else
5114 N->InitOperands(N->OperandList, Ops, NumOps);
5115 }
5117 // Delete any nodes that are still dead after adding the uses for the
5118 // new operands.
5119 if (!DeadNodeSet.empty()) {
5120 SmallVector<SDNode *, 16> DeadNodes;
5121 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5122 E = DeadNodeSet.end(); I != E; ++I)
5123 if ((*I)->use_empty())
5124 DeadNodes.push_back(*I);
5125 RemoveDeadNodes(DeadNodes);
5126 }
5128 if (IP)
5129 CSEMap.InsertNode(N, IP); // Memoize the new node.
5130 return N;
5131 }
5134 /// getMachineNode - These are used for target selectors to create a new node
5135 /// with specified return type(s), MachineInstr opcode, and operands.
5136 ///
5137 /// Note that getMachineNode returns the resultant node. If there is already a
5138 /// node of the specified opcode and operands, it returns that node instead of
5139 /// the current one.
5140 MachineSDNode *
5141 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5142 SDVTList VTs = getVTList(VT);
5143 return getMachineNode(Opcode, dl, VTs, 0, 0);
5144 }
5146 MachineSDNode *
5147 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5148 SDVTList VTs = getVTList(VT);
5149 SDValue Ops[] = { Op1 };
5150 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5151 }
5153 MachineSDNode *
5154 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5155 SDValue Op1, SDValue Op2) {
5156 SDVTList VTs = getVTList(VT);
5157 SDValue Ops[] = { Op1, Op2 };
5158 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5159 }
5161 MachineSDNode *
5162 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5163 SDValue Op1, SDValue Op2, SDValue Op3) {
5164 SDVTList VTs = getVTList(VT);
5165 SDValue Ops[] = { Op1, Op2, Op3 };
5166 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5167 }
5169 MachineSDNode *
5170 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5171 const SDValue *Ops, unsigned NumOps) {
5172 SDVTList VTs = getVTList(VT);
5173 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5174 }
5176 MachineSDNode *
5177 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5178 SDVTList VTs = getVTList(VT1, VT2);
5179 return getMachineNode(Opcode, dl, VTs, 0, 0);
5180 }
5182 MachineSDNode *
5183 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5184 EVT VT1, EVT VT2, SDValue Op1) {
5185 SDVTList VTs = getVTList(VT1, VT2);
5186 SDValue Ops[] = { Op1 };
5187 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5188 }
5190 MachineSDNode *
5191 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5192 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5193 SDVTList VTs = getVTList(VT1, VT2);
5194 SDValue Ops[] = { Op1, Op2 };
5195 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5196 }
5198 MachineSDNode *
5199 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5200 EVT VT1, EVT VT2, SDValue Op1,
5201 SDValue Op2, SDValue Op3) {
5202 SDVTList VTs = getVTList(VT1, VT2);
5203 SDValue Ops[] = { Op1, Op2, Op3 };
5204 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5205 }
5207 MachineSDNode *
5208 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5209 EVT VT1, EVT VT2,
5210 const SDValue *Ops, unsigned NumOps) {
5211 SDVTList VTs = getVTList(VT1, VT2);
5212 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5213 }
5215 MachineSDNode *
5216 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5217 EVT VT1, EVT VT2, EVT VT3,
5218 SDValue Op1, SDValue Op2) {
5219 SDVTList VTs = getVTList(VT1, VT2, VT3);
5220 SDValue Ops[] = { Op1, Op2 };
5221 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5222 }
5224 MachineSDNode *
5225 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5226 EVT VT1, EVT VT2, EVT VT3,
5227 SDValue Op1, SDValue Op2, SDValue Op3) {
5228 SDVTList VTs = getVTList(VT1, VT2, VT3);
5229 SDValue Ops[] = { Op1, Op2, Op3 };
5230 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5231 }
5233 MachineSDNode *
5234 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5235 EVT VT1, EVT VT2, EVT VT3,
5236 const SDValue *Ops, unsigned NumOps) {
5237 SDVTList VTs = getVTList(VT1, VT2, VT3);
5238 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5239 }
5241 MachineSDNode *
5242 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5243 EVT VT2, EVT VT3, EVT VT4,
5244 const SDValue *Ops, unsigned NumOps) {
5245 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5246 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5247 }
5249 MachineSDNode *
5250 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5251 const std::vector<EVT> &ResultTys,
5252 const SDValue *Ops, unsigned NumOps) {
5253 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5254 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5255 }
5257 MachineSDNode *
5258 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5259 const SDValue *Ops, unsigned NumOps) {
5260 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5261 MachineSDNode *N;
5262 void *IP = 0;
5264 if (DoCSE) {
5265 FoldingSetNodeID ID;
5266 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5267 IP = 0;
5268 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5269 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5270 }
5271 }
5273 // Allocate a new MachineSDNode.
5274 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5276 // Initialize the operands list.
5277 if (NumOps > array_lengthof(N->LocalOperands))
5278 // We're creating a final node that will live unmorphed for the
5279 // remainder of the current SelectionDAG iteration, so we can allocate
5280 // the operands directly out of a pool with no recycling metadata.
5281 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5282 Ops, NumOps);
5283 else
5284 N->InitOperands(N->LocalOperands, Ops, NumOps);
5285 N->OperandsNeedDelete = false;
5287 if (DoCSE)
5288 CSEMap.InsertNode(N, IP);
5290 AllNodes.push_back(N);
5291 #ifndef NDEBUG
5292 VerifyMachineNode(N);
5293 #endif
5294 return N;
5295 }
5297 /// getTargetExtractSubreg - A convenience function for creating
5298 /// TargetOpcode::EXTRACT_SUBREG nodes.
5299 SDValue
5300 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5301 SDValue Operand) {
5302 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5303 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5304 VT, Operand, SRIdxVal);
5305 return SDValue(Subreg, 0);
5306 }
5308 /// getTargetInsertSubreg - A convenience function for creating
5309 /// TargetOpcode::INSERT_SUBREG nodes.
5310 SDValue
5311 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5312 SDValue Operand, SDValue Subreg) {
5313 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5314 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5315 VT, Operand, Subreg, SRIdxVal);
5316 return SDValue(Result, 0);
5317 }
5319 /// getNodeIfExists - Get the specified node if it's already available, or
5320 /// else return NULL.
5321 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5322 const SDValue *Ops, unsigned NumOps) {
5323 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5324 FoldingSetNodeID ID;
5325 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5326 void *IP = 0;
5327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5328 return E;
5329 }
5330 return NULL;
5331 }
5333 /// getDbgValue - Creates a SDDbgValue node.
5334 ///
5335 SDDbgValue *
5336 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5337 DebugLoc DL, unsigned O) {
5338 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5339 }
5341 SDDbgValue *
5342 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5343 DebugLoc DL, unsigned O) {
5344 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5345 }
5347 SDDbgValue *
5348 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5349 DebugLoc DL, unsigned O) {
5350 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5351 }
5353 namespace {
5355 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5356 /// pointed to by a use iterator is deleted, increment the use iterator
5357 /// so that it doesn't dangle.
5358 ///
5359 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5360 SDNode::use_iterator &UI;
5361 SDNode::use_iterator &UE;
5363 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5364 // Increment the iterator as needed.
5365 while (UI != UE && N == *UI)
5366 ++UI;
5367 }
5369 public:
5370 RAUWUpdateListener(SelectionDAG &d,
5371 SDNode::use_iterator &ui,
5372 SDNode::use_iterator &ue)
5373 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5374 };
5376 }
5378 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5379 /// This can cause recursive merging of nodes in the DAG.
5380 ///
5381 /// This version assumes From has a single result value.
5382 ///
5383 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5384 SDNode *From = FromN.getNode();
5385 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5386 "Cannot replace with this method!");
5387 assert(From != To.getNode() && "Cannot replace uses of with self");
5389 // Iterate over all the existing uses of From. New uses will be added
5390 // to the beginning of the use list, which we avoid visiting.
5391 // This specifically avoids visiting uses of From that arise while the
5392 // replacement is happening, because any such uses would be the result
5393 // of CSE: If an existing node looks like From after one of its operands
5394 // is replaced by To, we don't want to replace of all its users with To
5395 // too. See PR3018 for more info.
5396 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5397 RAUWUpdateListener Listener(*this, UI, UE);
5398 while (UI != UE) {
5399 SDNode *User = *UI;
5401 // This node is about to morph, remove its old self from the CSE maps.
5402 RemoveNodeFromCSEMaps(User);
5404 // A user can appear in a use list multiple times, and when this
5405 // happens the uses are usually next to each other in the list.
5406 // To help reduce the number of CSE recomputations, process all
5407 // the uses of this user that we can find this way.
5408 do {
5409 SDUse &Use = UI.getUse();
5410 ++UI;
5411 Use.set(To);
5412 } while (UI != UE && *UI == User);
5414 // Now that we have modified User, add it back to the CSE maps. If it
5415 // already exists there, recursively merge the results together.
5416 AddModifiedNodeToCSEMaps(User);
5417 }
5419 // If we just RAUW'd the root, take note.
5420 if (FromN == getRoot())
5421 setRoot(To);
5422 }
5424 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5425 /// This can cause recursive merging of nodes in the DAG.
5426 ///
5427 /// This version assumes that for each value of From, there is a
5428 /// corresponding value in To in the same position with the same type.
5429 ///
5430 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5431 #ifndef NDEBUG
5432 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5433 assert((!From->hasAnyUseOfValue(i) ||
5434 From->getValueType(i) == To->getValueType(i)) &&
5435 "Cannot use this version of ReplaceAllUsesWith!");
5436 #endif
5438 // Handle the trivial case.
5439 if (From == To)
5440 return;
5442 // Iterate over just the existing users of From. See the comments in
5443 // the ReplaceAllUsesWith above.
5444 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5445 RAUWUpdateListener Listener(*this, UI, UE);
5446 while (UI != UE) {
5447 SDNode *User = *UI;
5449 // This node is about to morph, remove its old self from the CSE maps.
5450 RemoveNodeFromCSEMaps(User);
5452 // A user can appear in a use list multiple times, and when this
5453 // happens the uses are usually next to each other in the list.
5454 // To help reduce the number of CSE recomputations, process all
5455 // the uses of this user that we can find this way.
5456 do {
5457 SDUse &Use = UI.getUse();
5458 ++UI;
5459 Use.setNode(To);
5460 } while (UI != UE && *UI == User);
5462 // Now that we have modified User, add it back to the CSE maps. If it
5463 // already exists there, recursively merge the results together.
5464 AddModifiedNodeToCSEMaps(User);
5465 }
5467 // If we just RAUW'd the root, take note.
5468 if (From == getRoot().getNode())
5469 setRoot(SDValue(To, getRoot().getResNo()));
5470 }
5472 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5473 /// This can cause recursive merging of nodes in the DAG.
5474 ///
5475 /// This version can replace From with any result values. To must match the
5476 /// number and types of values returned by From.
5477 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5478 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5479 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5481 // Iterate over just the existing users of From. See the comments in
5482 // the ReplaceAllUsesWith above.
5483 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5484 RAUWUpdateListener Listener(*this, UI, UE);
5485 while (UI != UE) {
5486 SDNode *User = *UI;
5488 // This node is about to morph, remove its old self from the CSE maps.
5489 RemoveNodeFromCSEMaps(User);
5491 // A user can appear in a use list multiple times, and when this
5492 // happens the uses are usually next to each other in the list.
5493 // To help reduce the number of CSE recomputations, process all
5494 // the uses of this user that we can find this way.
5495 do {
5496 SDUse &Use = UI.getUse();
5497 const SDValue &ToOp = To[Use.getResNo()];
5498 ++UI;
5499 Use.set(ToOp);
5500 } while (UI != UE && *UI == User);
5502 // Now that we have modified User, add it back to the CSE maps. If it
5503 // already exists there, recursively merge the results together.
5504 AddModifiedNodeToCSEMaps(User);
5505 }
5507 // If we just RAUW'd the root, take note.
5508 if (From == getRoot().getNode())
5509 setRoot(SDValue(To[getRoot().getResNo()]));
5510 }
5512 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5513 /// uses of other values produced by From.getNode() alone. The Deleted
5514 /// vector is handled the same way as for ReplaceAllUsesWith.
5515 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5516 // Handle the really simple, really trivial case efficiently.
5517 if (From == To) return;
5519 // Handle the simple, trivial, case efficiently.
5520 if (From.getNode()->getNumValues() == 1) {
5521 ReplaceAllUsesWith(From, To);
5522 return;
5523 }
5525 // Iterate over just the existing users of From. See the comments in
5526 // the ReplaceAllUsesWith above.
5527 SDNode::use_iterator UI = From.getNode()->use_begin(),
5528 UE = From.getNode()->use_end();
5529 RAUWUpdateListener Listener(*this, UI, UE);
5530 while (UI != UE) {
5531 SDNode *User = *UI;
5532 bool UserRemovedFromCSEMaps = false;
5534 // A user can appear in a use list multiple times, and when this
5535 // happens the uses are usually next to each other in the list.
5536 // To help reduce the number of CSE recomputations, process all
5537 // the uses of this user that we can find this way.
5538 do {
5539 SDUse &Use = UI.getUse();
5541 // Skip uses of different values from the same node.
5542 if (Use.getResNo() != From.getResNo()) {
5543 ++UI;
5544 continue;
5545 }
5547 // If this node hasn't been modified yet, it's still in the CSE maps,
5548 // so remove its old self from the CSE maps.
5549 if (!UserRemovedFromCSEMaps) {
5550 RemoveNodeFromCSEMaps(User);
5551 UserRemovedFromCSEMaps = true;
5552 }
5554 ++UI;
5555 Use.set(To);
5556 } while (UI != UE && *UI == User);
5558 // We are iterating over all uses of the From node, so if a use
5559 // doesn't use the specific value, no changes are made.
5560 if (!UserRemovedFromCSEMaps)
5561 continue;
5563 // Now that we have modified User, add it back to the CSE maps. If it
5564 // already exists there, recursively merge the results together.
5565 AddModifiedNodeToCSEMaps(User);
5566 }
5568 // If we just RAUW'd the root, take note.
5569 if (From == getRoot())
5570 setRoot(To);
5571 }
5573 namespace {
5574 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5575 /// to record information about a use.
5576 struct UseMemo {
5577 SDNode *User;
5578 unsigned Index;
5579 SDUse *Use;
5580 };
5582 /// operator< - Sort Memos by User.
5583 bool operator<(const UseMemo &L, const UseMemo &R) {
5584 return (intptr_t)L.User < (intptr_t)R.User;
5585 }
5586 }
5588 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5589 /// uses of other values produced by From.getNode() alone. The same value
5590 /// may appear in both the From and To list. The Deleted vector is
5591 /// handled the same way as for ReplaceAllUsesWith.
5592 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5593 const SDValue *To,
5594 unsigned Num){
5595 // Handle the simple, trivial case efficiently.
5596 if (Num == 1)
5597 return ReplaceAllUsesOfValueWith(*From, *To);
5599 // Read up all the uses and make records of them. This helps
5600 // processing new uses that are introduced during the
5601 // replacement process.
5602 SmallVector<UseMemo, 4> Uses;
5603 for (unsigned i = 0; i != Num; ++i) {
5604 unsigned FromResNo = From[i].getResNo();
5605 SDNode *FromNode = From[i].getNode();
5606 for (SDNode::use_iterator UI = FromNode->use_begin(),
5607 E = FromNode->use_end(); UI != E; ++UI) {
5608 SDUse &Use = UI.getUse();
5609 if (Use.getResNo() == FromResNo) {
5610 UseMemo Memo = { *UI, i, &Use };
5611 Uses.push_back(Memo);
5612 }
5613 }
5614 }
5616 // Sort the uses, so that all the uses from a given User are together.
5617 std::sort(Uses.begin(), Uses.end());
5619 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5620 UseIndex != UseIndexEnd; ) {
5621 // We know that this user uses some value of From. If it is the right
5622 // value, update it.
5623 SDNode *User = Uses[UseIndex].User;
5625 // This node is about to morph, remove its old self from the CSE maps.
5626 RemoveNodeFromCSEMaps(User);
5628 // The Uses array is sorted, so all the uses for a given User
5629 // are next to each other in the list.
5630 // To help reduce the number of CSE recomputations, process all
5631 // the uses of this user that we can find this way.
5632 do {
5633 unsigned i = Uses[UseIndex].Index;
5634 SDUse &Use = *Uses[UseIndex].Use;
5635 ++UseIndex;
5637 Use.set(To[i]);
5638 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5640 // Now that we have modified User, add it back to the CSE maps. If it
5641 // already exists there, recursively merge the results together.
5642 AddModifiedNodeToCSEMaps(User);
5643 }
5644 }
5646 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5647 /// based on their topological order. It returns the maximum id and a vector
5648 /// of the SDNodes* in assigned order by reference.
5649 unsigned SelectionDAG::AssignTopologicalOrder() {
5651 unsigned DAGSize = 0;
5653 // SortedPos tracks the progress of the algorithm. Nodes before it are
5654 // sorted, nodes after it are unsorted. When the algorithm completes
5655 // it is at the end of the list.
5656 allnodes_iterator SortedPos = allnodes_begin();
5658 // Visit all the nodes. Move nodes with no operands to the front of
5659 // the list immediately. Annotate nodes that do have operands with their
5660 // operand count. Before we do this, the Node Id fields of the nodes
5661 // may contain arbitrary values. After, the Node Id fields for nodes
5662 // before SortedPos will contain the topological sort index, and the
5663 // Node Id fields for nodes At SortedPos and after will contain the
5664 // count of outstanding operands.
5665 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5666 SDNode *N = I++;
5667 checkForCycles(N);
5668 unsigned Degree = N->getNumOperands();
5669 if (Degree == 0) {
5670 // A node with no uses, add it to the result array immediately.
5671 N->setNodeId(DAGSize++);
5672 allnodes_iterator Q = N;
5673 if (Q != SortedPos)
5674 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5675 assert(SortedPos != AllNodes.end() && "Overran node list");
5676 ++SortedPos;
5677 } else {
5678 // Temporarily use the Node Id as scratch space for the degree count.
5679 N->setNodeId(Degree);
5680 }
5681 }
5683 // Visit all the nodes. As we iterate, move nodes into sorted order,
5684 // such that by the time the end is reached all nodes will be sorted.
5685 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5686 SDNode *N = I;
5687 checkForCycles(N);
5688 // N is in sorted position, so all its uses have one less operand
5689 // that needs to be sorted.
5690 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5691 UI != UE; ++UI) {
5692 SDNode *P = *UI;
5693 unsigned Degree = P->getNodeId();
5694 assert(Degree != 0 && "Invalid node degree");
5695 --Degree;
5696 if (Degree == 0) {
5697 // All of P's operands are sorted, so P may sorted now.
5698 P->setNodeId(DAGSize++);
5699 if (P != SortedPos)
5700 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5701 assert(SortedPos != AllNodes.end() && "Overran node list");
5702 ++SortedPos;
5703 } else {
5704 // Update P's outstanding operand count.
5705 P->setNodeId(Degree);
5706 }
5707 }
5708 if (I == SortedPos) {
5709 #ifndef NDEBUG
5710 SDNode *S = ++I;
5711 dbgs() << "Overran sorted position:\n";
5712 S->dumprFull();
5713 #endif
5714 llvm_unreachable(0);
5715 }
5716 }
5718 assert(SortedPos == AllNodes.end() &&
5719 "Topological sort incomplete!");
5720 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5721 "First node in topological sort is not the entry token!");
5722 assert(AllNodes.front().getNodeId() == 0 &&
5723 "First node in topological sort has non-zero id!");
5724 assert(AllNodes.front().getNumOperands() == 0 &&
5725 "First node in topological sort has operands!");
5726 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5727 "Last node in topologic sort has unexpected id!");
5728 assert(AllNodes.back().use_empty() &&
5729 "Last node in topologic sort has users!");
5730 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5731 return DAGSize;
5732 }
5734 /// AssignOrdering - Assign an order to the SDNode.
5735 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5736 assert(SD && "Trying to assign an order to a null node!");
5737 Ordering->add(SD, Order);
5738 }
5740 /// GetOrdering - Get the order for the SDNode.
5741 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5742 assert(SD && "Trying to get the order of a null node!");
5743 return Ordering->getOrder(SD);
5744 }
5746 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5747 /// value is produced by SD.
5748 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5749 DbgInfo->add(DB, SD, isParameter);
5750 if (SD)
5751 SD->setHasDebugValue(true);
5752 }
5754 /// TransferDbgValues - Transfer SDDbgValues.
5755 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5756 if (From == To || !From.getNode()->getHasDebugValue())
5757 return;
5758 SDNode *FromNode = From.getNode();
5759 SDNode *ToNode = To.getNode();
5760 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5761 SmallVector<SDDbgValue *, 2> ClonedDVs;
5762 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5763 I != E; ++I) {
5764 SDDbgValue *Dbg = *I;
5765 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5766 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5767 Dbg->getOffset(), Dbg->getDebugLoc(),
5768 Dbg->getOrder());
5769 ClonedDVs.push_back(Clone);
5770 }
5771 }
5772 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5773 E = ClonedDVs.end(); I != E; ++I)
5774 AddDbgValue(*I, ToNode, false);
5775 }
5777 //===----------------------------------------------------------------------===//
5778 // SDNode Class
5779 //===----------------------------------------------------------------------===//
5781 HandleSDNode::~HandleSDNode() {
5782 DropOperands();
5783 }
5785 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5786 const GlobalValue *GA,
5787 EVT VT, int64_t o, unsigned char TF)
5788 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5789 TheGlobal = GA;
5790 }
5792 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5793 MachineMemOperand *mmo)
5794 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5795 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5796 MMO->isNonTemporal(), MMO->isInvariant());
5797 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5798 assert(isNonTemporal() == MMO->isNonTemporal() &&
5799 "Non-temporal encoding error!");
5800 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5801 }
5803 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5804 const SDValue *Ops, unsigned NumOps, EVT memvt,
5805 MachineMemOperand *mmo)
5806 : SDNode(Opc, dl, VTs, Ops, NumOps),
5807 MemoryVT(memvt), MMO(mmo) {
5808 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5809 MMO->isNonTemporal(), MMO->isInvariant());
5810 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5811 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5812 }
5814 /// Profile - Gather unique data for the node.
5815 ///
5816 void SDNode::Profile(FoldingSetNodeID &ID) const {
5817 AddNodeIDNode(ID, this);
5818 }
5820 namespace {
5821 struct EVTArray {
5822 std::vector<EVT> VTs;
5824 EVTArray() {
5825 VTs.reserve(MVT::LAST_VALUETYPE);
5826 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5827 VTs.push_back(MVT((MVT::SimpleValueType)i));
5828 }
5829 };
5830 }
5832 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5833 static ManagedStatic<EVTArray> SimpleVTArray;
5834 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5836 /// getValueTypeList - Return a pointer to the specified value type.
5837 ///
5838 const EVT *SDNode::getValueTypeList(EVT VT) {
5839 if (VT.isExtended()) {
5840 sys::SmartScopedLock<true> Lock(*VTMutex);
5841 return &(*EVTs->insert(VT).first);
5842 } else {
5843 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5844 "Value type out of range!");
5845 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5846 }
5847 }
5849 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5850 /// indicated value. This method ignores uses of other values defined by this
5851 /// operation.
5852 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5853 assert(Value < getNumValues() && "Bad value!");
5855 // TODO: Only iterate over uses of a given value of the node
5856 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5857 if (UI.getUse().getResNo() == Value) {
5858 if (NUses == 0)
5859 return false;
5860 --NUses;
5861 }
5862 }
5864 // Found exactly the right number of uses?
5865 return NUses == 0;
5866 }
5869 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5870 /// value. This method ignores uses of other values defined by this operation.
5871 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5872 assert(Value < getNumValues() && "Bad value!");
5874 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5875 if (UI.getUse().getResNo() == Value)
5876 return true;
5878 return false;
5879 }
5882 /// isOnlyUserOf - Return true if this node is the only use of N.
5883 ///
5884 bool SDNode::isOnlyUserOf(SDNode *N) const {
5885 bool Seen = false;
5886 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5887 SDNode *User = *I;
5888 if (User == this)
5889 Seen = true;
5890 else
5891 return false;
5892 }
5894 return Seen;
5895 }
5897 /// isOperand - Return true if this node is an operand of N.
5898 ///
5899 bool SDValue::isOperandOf(SDNode *N) const {
5900 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5901 if (*this == N->getOperand(i))
5902 return true;
5903 return false;
5904 }
5906 bool SDNode::isOperandOf(SDNode *N) const {
5907 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5908 if (this == N->OperandList[i].getNode())
5909 return true;
5910 return false;
5911 }
5913 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5914 /// be a chain) reaches the specified operand without crossing any
5915 /// side-effecting instructions on any chain path. In practice, this looks
5916 /// through token factors and non-volatile loads. In order to remain efficient,
5917 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5918 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5919 unsigned Depth) const {
5920 if (*this == Dest) return true;
5922 // Don't search too deeply, we just want to be able to see through
5923 // TokenFactor's etc.
5924 if (Depth == 0) return false;
5926 // If this is a token factor, all inputs to the TF happen in parallel. If any
5927 // of the operands of the TF does not reach dest, then we cannot do the xform.
5928 if (getOpcode() == ISD::TokenFactor) {
5929 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5930 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5931 return false;
5932 return true;
5933 }
5935 // Loads don't have side effects, look through them.
5936 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5937 if (!Ld->isVolatile())
5938 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5939 }
5940 return false;
5941 }
5943 /// hasPredecessor - Return true if N is a predecessor of this node.
5944 /// N is either an operand of this node, or can be reached by recursively
5945 /// traversing up the operands.
5946 /// NOTE: This is an expensive method. Use it carefully.
5947 bool SDNode::hasPredecessor(const SDNode *N) const {
5948 SmallPtrSet<const SDNode *, 32> Visited;
5949 SmallVector<const SDNode *, 16> Worklist;
5950 return hasPredecessorHelper(N, Visited, Worklist);
5951 }
5953 bool SDNode::hasPredecessorHelper(const SDNode *N,
5954 SmallPtrSet<const SDNode *, 32> &Visited,
5955 SmallVector<const SDNode *, 16> &Worklist) const {
5956 if (Visited.empty()) {
5957 Worklist.push_back(this);
5958 } else {
5959 // Take a look in the visited set. If we've already encountered this node
5960 // we needn't search further.
5961 if (Visited.count(N))
5962 return true;
5963 }
5965 // Haven't visited N yet. Continue the search.
5966 while (!Worklist.empty()) {
5967 const SDNode *M = Worklist.pop_back_val();
5968 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5969 SDNode *Op = M->getOperand(i).getNode();
5970 if (Visited.insert(Op))
5971 Worklist.push_back(Op);
5972 if (Op == N)
5973 return true;
5974 }
5975 }
5977 return false;
5978 }
5980 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5981 assert(Num < NumOperands && "Invalid child # of SDNode!");
5982 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5983 }
5985 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5986 assert(N->getNumValues() == 1 &&
5987 "Can't unroll a vector with multiple results!");
5989 EVT VT = N->getValueType(0);
5990 unsigned NE = VT.getVectorNumElements();
5991 EVT EltVT = VT.getVectorElementType();
5992 DebugLoc dl = N->getDebugLoc();
5994 SmallVector<SDValue, 8> Scalars;
5995 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5997 // If ResNE is 0, fully unroll the vector op.
5998 if (ResNE == 0)
5999 ResNE = NE;
6000 else if (NE > ResNE)
6001 NE = ResNE;
6003 unsigned i;
6004 for (i= 0; i != NE; ++i) {
6005 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6006 SDValue Operand = N->getOperand(j);
6007 EVT OperandVT = Operand.getValueType();
6008 if (OperandVT.isVector()) {
6009 // A vector operand; extract a single element.
6010 EVT OperandEltVT = OperandVT.getVectorElementType();
6011 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6012 OperandEltVT,
6013 Operand,
6014 getConstant(i, TLI.getPointerTy()));
6015 } else {
6016 // A scalar operand; just use it as is.
6017 Operands[j] = Operand;
6018 }
6019 }
6021 switch (N->getOpcode()) {
6022 default:
6023 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6024 &Operands[0], Operands.size()));
6025 break;
6026 case ISD::VSELECT:
6027 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6028 &Operands[0], Operands.size()));
6029 break;
6030 case ISD::SHL:
6031 case ISD::SRA:
6032 case ISD::SRL:
6033 case ISD::ROTL:
6034 case ISD::ROTR:
6035 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6036 getShiftAmountOperand(Operands[0].getValueType(),
6037 Operands[1])));
6038 break;
6039 case ISD::SIGN_EXTEND_INREG:
6040 case ISD::FP_ROUND_INREG: {
6041 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6042 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6043 Operands[0],
6044 getValueType(ExtVT)));
6045 }
6046 }
6047 }
6049 for (; i < ResNE; ++i)
6050 Scalars.push_back(getUNDEF(EltVT));
6052 return getNode(ISD::BUILD_VECTOR, dl,
6053 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6054 &Scalars[0], Scalars.size());
6055 }
6058 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6059 /// location that is 'Dist' units away from the location that the 'Base' load
6060 /// is loading from.
6061 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6062 unsigned Bytes, int Dist) const {
6063 if (LD->getChain() != Base->getChain())
6064 return false;
6065 EVT VT = LD->getValueType(0);
6066 if (VT.getSizeInBits() / 8 != Bytes)
6067 return false;
6069 SDValue Loc = LD->getOperand(1);
6070 SDValue BaseLoc = Base->getOperand(1);
6071 if (Loc.getOpcode() == ISD::FrameIndex) {
6072 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6073 return false;
6074 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6075 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6076 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6077 int FS = MFI->getObjectSize(FI);
6078 int BFS = MFI->getObjectSize(BFI);
6079 if (FS != BFS || FS != (int)Bytes) return false;
6080 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6081 }
6083 // Handle X+C
6084 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6085 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6086 return true;
6088 const GlobalValue *GV1 = NULL;
6089 const GlobalValue *GV2 = NULL;
6090 int64_t Offset1 = 0;
6091 int64_t Offset2 = 0;
6092 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6093 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6094 if (isGA1 && isGA2 && GV1 == GV2)
6095 return Offset1 == (Offset2 + Dist*Bytes);
6096 return false;
6097 }
6100 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6101 /// it cannot be inferred.
6102 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6103 // If this is a GlobalAddress + cst, return the alignment.
6104 const GlobalValue *GV;
6105 int64_t GVOffset = 0;
6106 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6107 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6108 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6109 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6110 TLI.getDataLayout());
6111 unsigned AlignBits = KnownZero.countTrailingOnes();
6112 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6113 if (Align)
6114 return MinAlign(Align, GVOffset);
6115 }
6117 // If this is a direct reference to a stack slot, use information about the
6118 // stack slot's alignment.
6119 int FrameIdx = 1 << 31;
6120 int64_t FrameOffset = 0;
6121 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6122 FrameIdx = FI->getIndex();
6123 } else if (isBaseWithConstantOffset(Ptr) &&
6124 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6125 // Handle FI+Cst
6126 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6127 FrameOffset = Ptr.getConstantOperandVal(1);
6128 }
6130 if (FrameIdx != (1 << 31)) {
6131 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6132 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6133 FrameOffset);
6134 return FIInfoAlign;
6135 }
6137 return 0;
6138 }
6140 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6141 unsigned GlobalAddressSDNode::getAddressSpace() const {
6142 return getGlobal()->getType()->getAddressSpace();
6143 }
6146 Type *ConstantPoolSDNode::getType() const {
6147 if (isMachineConstantPoolEntry())
6148 return Val.MachineCPVal->getType();
6149 return Val.ConstVal->getType();
6150 }
6152 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6153 APInt &SplatUndef,
6154 unsigned &SplatBitSize,
6155 bool &HasAnyUndefs,
6156 unsigned MinSplatBits,
6157 bool isBigEndian) {
6158 EVT VT = getValueType(0);
6159 assert(VT.isVector() && "Expected a vector type");
6160 unsigned sz = VT.getSizeInBits();
6161 if (MinSplatBits > sz)
6162 return false;
6164 SplatValue = APInt(sz, 0);
6165 SplatUndef = APInt(sz, 0);
6167 // Get the bits. Bits with undefined values (when the corresponding element
6168 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6169 // in SplatValue. If any of the values are not constant, give up and return
6170 // false.
6171 unsigned int nOps = getNumOperands();
6172 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6173 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6175 for (unsigned j = 0; j < nOps; ++j) {
6176 unsigned i = isBigEndian ? nOps-1-j : j;
6177 SDValue OpVal = getOperand(i);
6178 unsigned BitPos = j * EltBitSize;
6180 if (OpVal.getOpcode() == ISD::UNDEF)
6181 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6182 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6183 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6184 zextOrTrunc(sz) << BitPos;
6185 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6186 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6187 else
6188 return false;
6189 }
6191 // The build_vector is all constants or undefs. Find the smallest element
6192 // size that splats the vector.
6194 HasAnyUndefs = (SplatUndef != 0);
6195 while (sz > 8) {
6197 unsigned HalfSize = sz / 2;
6198 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6199 APInt LowValue = SplatValue.trunc(HalfSize);
6200 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6201 APInt LowUndef = SplatUndef.trunc(HalfSize);
6203 // If the two halves do not match (ignoring undef bits), stop here.
6204 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6205 MinSplatBits > HalfSize)
6206 break;
6208 SplatValue = HighValue | LowValue;
6209 SplatUndef = HighUndef & LowUndef;
6211 sz = HalfSize;
6212 }
6214 SplatBitSize = sz;
6215 return true;
6216 }
6218 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6219 // Find the first non-undef value in the shuffle mask.
6220 unsigned i, e;
6221 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6222 /* search */;
6224 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6226 // Make sure all remaining elements are either undef or the same as the first
6227 // non-undef value.
6228 for (int Idx = Mask[i]; i != e; ++i)
6229 if (Mask[i] >= 0 && Mask[i] != Idx)
6230 return false;
6231 return true;
6232 }
6234 #ifdef XDEBUG
6235 static void checkForCyclesHelper(const SDNode *N,
6236 SmallPtrSet<const SDNode*, 32> &Visited,
6237 SmallPtrSet<const SDNode*, 32> &Checked) {
6238 // If this node has already been checked, don't check it again.
6239 if (Checked.count(N))
6240 return;
6242 // If a node has already been visited on this depth-first walk, reject it as
6243 // a cycle.
6244 if (!Visited.insert(N)) {
6245 dbgs() << "Offending node:\n";
6246 N->dumprFull();
6247 errs() << "Detected cycle in SelectionDAG\n";
6248 abort();
6249 }
6251 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6252 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6254 Checked.insert(N);
6255 Visited.erase(N);
6256 }
6257 #endif
6259 void llvm::checkForCycles(const llvm::SDNode *N) {
6260 #ifdef XDEBUG
6261 assert(N && "Checking nonexistant SDNode");
6262 SmallPtrSet<const SDNode*, 32> visited;
6263 SmallPtrSet<const SDNode*, 32> checked;
6264 checkForCyclesHelper(N, visited, checked);
6265 #endif
6266 }
6268 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6269 checkForCycles(DAG->getRoot().getNode());
6270 }