1 ; Test 64-bit comparisons in which the second operand is zero-extended
2 ; from a PC-relative i16.
3 ;
4 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
6 @g = global i16 1
7 @h = global i16 1, align 1, section "foo"
9 ; Check unsigned comparison.
10 define i64 @f1(i64 %src1) {
11 ; CHECK-LABEL: f1:
12 ; CHECK: clghrl %r2, g
13 ; CHECK-NEXT: jl
14 ; CHECK: br %r14
15 entry:
16 %val = load i16 *@g
17 %src2 = zext i16 %val to i64
18 %cond = icmp ult i64 %src1, %src2
19 br i1 %cond, label %exit, label %mulb
20 mulb:
21 %mul = mul i64 %src1, %src1
22 br label %exit
23 exit:
24 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
25 ret i64 %res
26 }
28 ; Check signed comparison.
29 define i64 @f2(i64 %src1) {
30 ; CHECK-LABEL: f2:
31 ; CHECK-NOT: clghrl
32 ; CHECK: br %r14
33 entry:
34 %val = load i16 *@g
35 %src2 = zext i16 %val to i64
36 %cond = icmp slt i64 %src1, %src2
37 br i1 %cond, label %exit, label %mulb
38 mulb:
39 %mul = mul i64 %src1, %src1
40 br label %exit
41 exit:
42 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
43 ret i64 %res
44 }
46 ; Check equality.
47 define i64 @f3(i64 %src1) {
48 ; CHECK-LABEL: f3:
49 ; CHECK: clghrl %r2, g
50 ; CHECK-NEXT: je
51 ; CHECK: br %r14
52 entry:
53 %val = load i16 *@g
54 %src2 = zext i16 %val to i64
55 %cond = icmp eq i64 %src1, %src2
56 br i1 %cond, label %exit, label %mulb
57 mulb:
58 %mul = mul i64 %src1, %src1
59 br label %exit
60 exit:
61 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
62 ret i64 %res
63 }
65 ; Check inequality.
66 define i64 @f4(i64 %src1) {
67 ; CHECK-LABEL: f4:
68 ; CHECK: clghrl %r2, g
69 ; CHECK-NEXT: jlh
70 ; CHECK: br %r14
71 entry:
72 %val = load i16 *@g
73 %src2 = zext i16 %val to i64
74 %cond = icmp ne i64 %src1, %src2
75 br i1 %cond, label %exit, label %mulb
76 mulb:
77 %mul = mul i64 %src1, %src1
78 br label %exit
79 exit:
80 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
81 ret i64 %res
82 }
84 ; Repeat f1 with an unaligned address.
85 define i64 @f5(i64 %src1) {
86 ; CHECK-LABEL: f5:
87 ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
88 ; CHECK: llgh [[VAL:%r[0-5]]], 0([[REG]])
89 ; CHECK: clgr %r2, [[VAL]]
90 ; CHECK-NEXT: jl
91 ; CHECK: br %r14
92 entry:
93 %val = load i16 *@h, align 1
94 %src2 = zext i16 %val to i64
95 %cond = icmp ult i64 %src1, %src2
96 br i1 %cond, label %exit, label %mulb
97 mulb:
98 %mul = mul i64 %src1, %src1
99 br label %exit
100 exit:
101 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
102 ret i64 %res
103 }