1 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 -mattr=-sse4.1 < %s | FileCheck %s
3 ; Verify that we don't emit packed vector shifts instructions if the
4 ; condition used by the vector select is a vector of constants.
6 define <4 x float> @test1(<4 x float> %a, <4 x float> %b) {
7 ; CHECK-LABEL: test1:
8 ; CHECK: # BB#0:
9 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm1
10 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
11 ; CHECK-NEXT: orps %xmm1, %xmm0
12 ; CHECK-NEXT: retq
13 %1 = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x float> %a, <4 x float> %b
14 ret <4 x float> %1
15 }
17 define <4 x float> @test2(<4 x float> %a, <4 x float> %b) {
18 ; CHECK-LABEL: test2:
19 ; CHECK: # BB#0:
20 ; CHECK-NEXT: movsd %xmm0, %xmm1
21 ; CHECK-NEXT: movaps %xmm1, %xmm0
22 ; CHECK-NEXT: retq
23 %1 = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x float> %a, <4 x float> %b
24 ret <4 x float> %1
25 }
27 define <4 x float> @test3(<4 x float> %a, <4 x float> %b) {
28 ; CHECK-LABEL: test3:
29 ; CHECK: # BB#0:
30 ; CHECK-NEXT: movsd %xmm1, %xmm0
31 ; CHECK-NEXT: retq
32 %1 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %a, <4 x float> %b
33 ret <4 x float> %1
34 }
36 define <4 x float> @test4(<4 x float> %a, <4 x float> %b) {
37 ; CHECK-LABEL: test4:
38 ; CHECK: # BB#0:
39 ; CHECK-NEXT: movaps %xmm1, %xmm0
40 ; CHECK-NEXT: retq
41 %1 = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>, <4 x float> %a, <4 x float> %b
42 ret <4 x float> %1
43 }
45 define <4 x float> @test5(<4 x float> %a, <4 x float> %b) {
46 ; CHECK-LABEL: test5:
47 ; CHECK: # BB#0:
48 ; CHECK-NEXT: retq
49 %1 = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %b
50 ret <4 x float> %1
51 }
53 define <8 x i16> @test6(<8 x i16> %a, <8 x i16> %b) {
54 ; CHECK-LABEL: test6:
55 ; CHECK: # BB#0:
56 ; CHECK-NEXT: movaps {{.*#+}} xmm1 = [65535,0,65535,0,65535,0,65535,0]
57 ; CHECK-NEXT: orps {{.*}}(%rip), %xmm1
58 ; CHECK-NEXT: andps %xmm1, %xmm0
59 ; CHECK-NEXT: retq
60 %1 = select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>, <8 x i16> %a, <8 x i16> %a
61 ret <8 x i16> %1
62 }
64 define <8 x i16> @test7(<8 x i16> %a, <8 x i16> %b) {
65 ; CHECK-LABEL: test7:
66 ; CHECK: # BB#0:
67 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm1
68 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
69 ; CHECK-NEXT: orps %xmm1, %xmm0
70 ; CHECK-NEXT: retq
71 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %a, <8 x i16> %b
72 ret <8 x i16> %1
73 }
75 define <8 x i16> @test8(<8 x i16> %a, <8 x i16> %b) {
76 ; CHECK-LABEL: test8:
77 ; CHECK: # BB#0:
78 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm1
79 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
80 ; CHECK-NEXT: orps %xmm1, %xmm0
81 ; CHECK-NEXT: retq
82 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 false, i1 true, i1 true, i1 true, i1 true>, <8 x i16> %a, <8 x i16> %b
83 ret <8 x i16> %1
84 }
86 define <8 x i16> @test9(<8 x i16> %a, <8 x i16> %b) {
87 ; CHECK-LABEL: test9:
88 ; CHECK: # BB#0:
89 ; CHECK-NEXT: movaps %xmm1, %xmm0
90 ; CHECK-NEXT: retq
91 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %a, <8 x i16> %b
92 ret <8 x i16> %1
93 }
95 define <8 x i16> @test10(<8 x i16> %a, <8 x i16> %b) {
96 ; CHECK-LABEL: test10:
97 ; CHECK: # BB#0:
98 ; CHECK-NEXT: retq
99 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x i16> %a, <8 x i16> %b
100 ret <8 x i16> %1
101 }
103 define <8 x i16> @test11(<8 x i16> %a, <8 x i16> %b) {
104 ; CHECK-LABEL: test11:
105 ; CHECK: # BB#0:
106 ; CHECK-NEXT: movaps {{.*#+}} xmm2 = <0,65535,65535,0,u,65535,65535,u>
107 ; CHECK-NEXT: andps %xmm2, %xmm0
108 ; CHECK-NEXT: andnps %xmm1, %xmm2
109 ; CHECK-NEXT: orps %xmm2, %xmm0
110 ; CHECK-NEXT: retq
111 %1 = select <8 x i1> <i1 false, i1 true, i1 true, i1 false, i1 undef, i1 true, i1 true, i1 undef>, <8 x i16> %a, <8 x i16> %b
112 ret <8 x i16> %1
113 }
115 define <8 x i16> @test12(<8 x i16> %a, <8 x i16> %b) {
116 ; CHECK-LABEL: test12:
117 ; CHECK: # BB#0:
118 ; CHECK-NEXT: movaps %xmm1, %xmm0
119 ; CHECK-NEXT: retq
120 %1 = select <8 x i1> <i1 false, i1 false, i1 undef, i1 false, i1 false, i1 false, i1 false, i1 undef>, <8 x i16> %a, <8 x i16> %b
121 ret <8 x i16> %1
122 }
124 define <8 x i16> @test13(<8 x i16> %a, <8 x i16> %b) {
125 ; CHECK-LABEL: test13:
126 ; CHECK: # BB#0:
127 ; CHECK-NEXT: movaps %xmm1, %xmm0
128 ; CHECK-NEXT: retq
129 %1 = select <8 x i1> <i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef>, <8 x i16> %a, <8 x i16> %b
130 ret <8 x i16> %1
131 }
133 ; Fold (vselect (build_vector AllOnes), N1, N2) -> N1
134 define <4 x float> @test14(<4 x float> %a, <4 x float> %b) {
135 ; CHECK-LABEL: test14:
136 ; CHECK: # BB#0:
137 ; CHECK-NEXT: retq
138 %1 = select <4 x i1> <i1 true, i1 undef, i1 true, i1 undef>, <4 x float> %a, <4 x float> %b
139 ret <4 x float> %1
140 }
142 define <8 x i16> @test15(<8 x i16> %a, <8 x i16> %b) {
143 ; CHECK-LABEL: test15:
144 ; CHECK: # BB#0:
145 ; CHECK-NEXT: retq
146 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 undef, i1 undef, i1 true, i1 true, i1 undef>, <8 x i16> %a, <8 x i16> %b
147 ret <8 x i16> %1
148 }
150 ; Fold (vselect (build_vector AllZeros), N1, N2) -> N2
151 define <4 x float> @test16(<4 x float> %a, <4 x float> %b) {
152 ; CHECK-LABEL: test16:
153 ; CHECK: # BB#0:
154 ; CHECK-NEXT: movaps %xmm1, %xmm0
155 ; CHECK-NEXT: retq
156 %1 = select <4 x i1> <i1 false, i1 undef, i1 false, i1 undef>, <4 x float> %a, <4 x float> %b
157 ret <4 x float> %1
158 }
160 define <8 x i16> @test17(<8 x i16> %a, <8 x i16> %b) {
161 ; CHECK-LABEL: test17:
162 ; CHECK: # BB#0:
163 ; CHECK-NEXT: movaps %xmm1, %xmm0
164 ; CHECK-NEXT: retq
165 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 undef, i1 undef, i1 false, i1 false, i1 undef>, <8 x i16> %a, <8 x i16> %b
166 ret <8 x i16> %1
167 }
169 define <4 x float> @test18(<4 x float> %a, <4 x float> %b) {
170 ; CHECK-LABEL: test18:
171 ; CHECK: # BB#0:
172 ; CHECK-NEXT: movss %xmm1, %xmm0
173 ; CHECK-NEXT: retq
174 %1 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %b
175 ret <4 x float> %1
176 }
178 define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) {
179 ; CHECK-LABEL: test19:
180 ; CHECK: # BB#0:
181 ; CHECK-NEXT: movss %xmm1, %xmm0
182 ; CHECK-NEXT: retq
183 %1 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x i32> %a, <4 x i32> %b
184 ret <4 x i32> %1
185 }
187 define <2 x double> @test20(<2 x double> %a, <2 x double> %b) {
188 ; CHECK-LABEL: test20:
189 ; CHECK: # BB#0:
190 ; CHECK-NEXT: movsd %xmm1, %xmm0
191 ; CHECK-NEXT: retq
192 %1 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %b
193 ret <2 x double> %1
194 }
196 define <2 x i64> @test21(<2 x i64> %a, <2 x i64> %b) {
197 ; CHECK-LABEL: test21:
198 ; CHECK: # BB#0:
199 ; CHECK-NEXT: movsd %xmm1, %xmm0
200 ; CHECK-NEXT: retq
201 %1 = select <2 x i1> <i1 false, i1 true>, <2 x i64> %a, <2 x i64> %b
202 ret <2 x i64> %1
203 }
205 define <4 x float> @test22(<4 x float> %a, <4 x float> %b) {
206 ; CHECK-LABEL: test22:
207 ; CHECK: # BB#0:
208 ; CHECK-NEXT: movss %xmm0, %xmm1
209 ; CHECK-NEXT: movaps %xmm1, %xmm0
210 ; CHECK-NEXT: retq
211 %1 = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %a, <4 x float> %b
212 ret <4 x float> %1
213 }
215 define <4 x i32> @test23(<4 x i32> %a, <4 x i32> %b) {
216 ; CHECK-LABEL: test23:
217 ; CHECK: # BB#0:
218 ; CHECK-NEXT: movss %xmm0, %xmm1
219 ; CHECK-NEXT: movaps %xmm1, %xmm0
220 ; CHECK-NEXT: retq
221 %1 = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> %a, <4 x i32> %b
222 ret <4 x i32> %1
223 }
225 define <2 x double> @test24(<2 x double> %a, <2 x double> %b) {
226 ; CHECK-LABEL: test24:
227 ; CHECK: # BB#0:
228 ; CHECK-NEXT: movsd %xmm0, %xmm1
229 ; CHECK-NEXT: movaps %xmm1, %xmm0
230 ; CHECK-NEXT: retq
231 %1 = select <2 x i1> <i1 true, i1 false>, <2 x double> %a, <2 x double> %b
232 ret <2 x double> %1
233 }
235 define <2 x i64> @test25(<2 x i64> %a, <2 x i64> %b) {
236 ; CHECK-LABEL: test25:
237 ; CHECK: # BB#0:
238 ; CHECK-NEXT: movsd %xmm0, %xmm1
239 ; CHECK-NEXT: movaps %xmm1, %xmm0
240 ; CHECK-NEXT: retq
241 %1 = select <2 x i1> <i1 true, i1 false>, <2 x i64> %a, <2 x i64> %b
242 ret <2 x i64> %1
243 }
245 define <4 x float> @select_of_shuffles_0(<2 x float> %a0, <2 x float> %b0, <2 x float> %a1, <2 x float> %b1) {
246 ; CHECK-LABEL: select_of_shuffles_0:
247 ; CHECK: # BB#0:
248 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
249 ; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm3[0]
250 ; CHECK-NEXT: subps %xmm1, %xmm0
251 ; CHECK-NEXT: retq
252 %1 = shufflevector <2 x float> %a0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
253 %2 = shufflevector <2 x float> %a1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
254 %3 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %2, <4 x float> %1
255 %4 = shufflevector <2 x float> %b0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
256 %5 = shufflevector <2 x float> %b1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
257 %6 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %5, <4 x float> %4
258 %7 = fsub <4 x float> %3, %6
259 ret <4 x float> %7
260 }
262 ; PR20677
263 define <16 x double> @select_illegal(<16 x double> %a, <16 x double> %b) {
264 ; CHECK-LABEL: select_illegal:
265 ; CHECK: # BB#0:
266 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm4
267 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm5
268 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm6
269 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm7
270 ; CHECK-NEXT: movaps %xmm7, 112(%rdi)
271 ; CHECK-NEXT: movaps %xmm6, 96(%rdi)
272 ; CHECK-NEXT: movaps %xmm5, 80(%rdi)
273 ; CHECK-NEXT: movaps %xmm4, 64(%rdi)
274 ; CHECK-NEXT: movaps %xmm3, 48(%rdi)
275 ; CHECK-NEXT: movaps %xmm2, 32(%rdi)
276 ; CHECK-NEXT: movaps %xmm1, 16(%rdi)
277 ; CHECK-NEXT: movaps %xmm0, (%rdi)
278 ; CHECK-NEXT: retq
279 %sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b
280 ret <16 x double> %sel
281 }