author | Tom Stellard <thomas.stellard@amd.com> | |
Fri, 16 May 2014 20:56:47 +0000 (20:56 +0000) | ||
committer | Tom Stellard <thomas.stellard@amd.com> | |
Fri, 16 May 2014 20:56:47 +0000 (20:56 +0000) | ||
commit | 17200e3bb3ae6c677f5d53aad13c0fbd761cfda7 | |
tree | 2536466e9bd2fd68020d1929b66b8c7b2c70383e | tree | snapshot (tar.xz tar.gz zip) |
parent | 9d99d7a1854b9aa00091f6588664512a6213fc77 | commit | diff |
R600/SI: Refactor the VOP3_32 tablegen class
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209028 91177308-0d34-0410-b5e6-96231b3b80d8
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209028 91177308-0d34-0410-b5e6-96231b3b80d8