| author | Rafael Espindola <rafael.espindola@gmail.com> | |
| Wed, 4 Jun 2014 15:39:14 +0000 (15:39 +0000) | ||
| committer | Rafael Espindola <rafael.espindola@gmail.com> | |
| Wed, 4 Jun 2014 15:39:14 +0000 (15:39 +0000) | ||
| commit | 82db274d157927fcc0599969d6aaa5fa560d88cc | |
| tree | ebbe35036ee0638107b41536e75610526bee2977 | tree | snapshot (tar.xz tar.gz zip) |
| parent | 45a8d99f590b37f4c33cbcd5822ec55058d866b5 | commit | diff |
InstCombine: Improvement to check if signed addition overflows.
This patch implements two things:
1. If we know one number is positive and another is negative, we return true as
signed addition of two opposite signed numbers will never overflow.
2. Implemented TODO : If one of the operands only has one non-zero bit, and if
the other operand has a known-zero bit in a more significant place than it
(not including the sign bit) the ripple may go up to and fill the zero, but
won't change the sign. e.x - (x & ~4) + 1
We make sure that we are ignoring 0 at MSB.
Patch by Suyog Sarda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210186 91177308-0d34-0410-b5e6-96231b3b80d8
This patch implements two things:
1. If we know one number is positive and another is negative, we return true as
signed addition of two opposite signed numbers will never overflow.
2. Implemented TODO : If one of the operands only has one non-zero bit, and if
the other operand has a known-zero bit in a more significant place than it
(not including the sign bit) the ripple may go up to and fill the zero, but
won't change the sign. e.x - (x & ~4) + 1
We make sure that we are ignoring 0 at MSB.
Patch by Suyog Sarda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210186 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Transforms/InstCombine/InstCombineAddSub.cpp | diff | blob | history | |
| test/Transforms/InstCombine/AddOverFlow.ll | [new file with mode: 0644] | blob |