author | Craig Topper <craig.topper@gmail.com> | |
Mon, 7 Oct 2013 05:42:48 +0000 (05:42 +0000) | ||
committer | Craig Topper <craig.topper@gmail.com> | |
Mon, 7 Oct 2013 05:42:48 +0000 (05:42 +0000) | ||
commit | 8fdba75d5b865246455c335adf439def1c3daaeb | |
tree | 10367cba7f90d1814f80a8513b9bc04724166e27 | tree | snapshot (tar.xz tar.gz zip) |
parent | 36a9b31b981553350f5cc4adad9917656c20e96e | commit | diff |
Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not.
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192088 91177308-0d34-0410-b5e6-96231b3b80d8
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192088 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/AsmParser/X86AsmParser.cpp | diff | blob | history | |
lib/Target/X86/X86InstrSSE.td | diff | blob | history | |
test/MC/X86/x86_64-avx-encoding.s | diff | blob | history |