]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - opencl/llvm.git/commit
Instruction scheduling itinerary for Intel Atom.
authorAndrew Trick <atrick@apple.com>
Wed, 1 Feb 2012 23:20:51 +0000 (23:20 +0000)
committerAndrew Trick <atrick@apple.com>
Wed, 1 Feb 2012 23:20:51 +0000 (23:20 +0000)
commit922d314e8f9f0d8e447c055485a2969ee9cf2dd2
tree8b831e717e2570a14fb1c0dcc77a7ad416de4050
parent521804a1f702b80158b6490c8f22d1dc6a8b9c65
Instruction scheduling itinerary for Intel Atom.

Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
53 files changed:
lib/Target/X86/X86.td
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrArithmetic.td
lib/Target/X86/X86InstrCMovSetCC.td
lib/Target/X86/X86InstrControl.td
lib/Target/X86/X86InstrFormats.td
lib/Target/X86/X86InstrMMX.td
lib/Target/X86/X86InstrSSE.td
lib/Target/X86/X86InstrShiftRotate.td
lib/Target/X86/X86Schedule.td [new file with mode: 0644]
lib/Target/X86/X86ScheduleAtom.td [new file with mode: 0644]
lib/Target/X86/X86Subtarget.cpp
lib/Target/X86/X86Subtarget.h
lib/Target/X86/X86TargetMachine.cpp
lib/Target/X86/X86TargetMachine.h
test/CodeGen/X86/2007-01-08-InstrSched.ll
test/CodeGen/X86/2007-11-06-InstrSched.ll
test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll
test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
test/CodeGen/X86/abi-isel.ll
test/CodeGen/X86/add.ll
test/CodeGen/X86/atom-sched.ll [new file with mode: 0644]
test/CodeGen/X86/byval6.ll
test/CodeGen/X86/divide-by-constant.ll
test/CodeGen/X86/epilogue.ll
test/CodeGen/X86/fast-cc-merge-stack-adj.ll
test/CodeGen/X86/fast-isel-x86.ll
test/CodeGen/X86/fold-load.ll
test/CodeGen/X86/inline-asm-fpstack.ll
test/CodeGen/X86/masked-iv-safe.ll
test/CodeGen/X86/optimize-max-3.ll
test/CodeGen/X86/peep-test-3.ll
test/CodeGen/X86/pic.ll
test/CodeGen/X86/red-zone.ll
test/CodeGen/X86/red-zone2.ll
test/CodeGen/X86/reghinting.ll
test/CodeGen/X86/segmented-stacks-dynamic.ll
test/CodeGen/X86/segmented-stacks.ll
test/CodeGen/X86/stack-align2.ll
test/CodeGen/X86/tailcallbyval64.ll
test/CodeGen/X86/tailcallstack64.ll
test/CodeGen/X86/twoaddr-lea.ll
test/CodeGen/X86/v-binop-widen.ll
test/CodeGen/X86/vec_call.ll
test/CodeGen/X86/widen_arith-1.ll
test/CodeGen/X86/widen_arith-3.ll
test/CodeGen/X86/widen_load-2.ll
test/CodeGen/X86/win64_alloca_dynalloca.ll
test/CodeGen/X86/win64_vararg.ll
test/CodeGen/X86/zext-fold.ll