| author | Tim Northover <tnorthover@apple.com> | |
| Fri, 28 Mar 2014 12:31:39 +0000 (12:31 +0000) | ||
| committer | Tim Northover <tnorthover@apple.com> | |
| Fri, 28 Mar 2014 12:31:39 +0000 (12:31 +0000) | ||
| commit | b7de4288bc0b712a7691fe8bf9305d3963363b4f | |
| tree | 6bcf42ec33266e20e65e14b3e92ac208ad11b438 | tree | snapshot (tar.xz tar.gz zip) |
| parent | efb8deb6407ef731f17f622d317b122f7c4bd0a1 | commit | diff |
Intrinsics: expand semantics of LLVMExtendedVectorType (& trunc)
These are used in the ARM backends to aid type-checking on patterns involving
intrinsics. By making sure one argument is an extended/truncated version of
another.
However, there's no reason to limit them to just vectors types. For example
AArch64 has the instruction "uqshrn sD, dN, #imm" which would naturally use an
intrinsic taking an i64 and returning an i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205003 91177308-0d34-0410-b5e6-96231b3b80d8
These are used in the ARM backends to aid type-checking on patterns involving
intrinsics. By making sure one argument is an extended/truncated version of
another.
However, there's no reason to limit them to just vectors types. For example
AArch64 has the instruction "uqshrn sD, dN, #imm" which would naturally use an
intrinsic taking an i64 and returning an i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205003 91177308-0d34-0410-b5e6-96231b3b80d8