author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | |
Tue, 8 Jul 2014 16:16:02 +0000 (16:16 +0000) | ||
committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | |
Tue, 8 Jul 2014 16:16:02 +0000 (16:16 +0000) | ||
commit | b7fdc7ff16d6a4d4d7e67f2b4a72b47121531717 | |
tree | 3303fb4a803ad89348e0c4b83f20ef141d80ccf2 | tree | snapshot (tar.xz tar.gz zip) |
parent | b8245a45995a8da5331ec01f69a6176c30bc871f | commit | diff |
[PowerPC] Implement atomic NAND operations as actual NAND
This changes the implementation of atomic NAND operations
from "a & ~b" (compatible with GCC < 4.4) to actual "~(a & b)"
(compatible with GCC >= 4.4).
This is in line with the common-code and ARM back-end change
implemented in r212433.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212547 91177308-0d34-0410-b5e6-96231b3b80d8
This changes the implementation of atomic NAND operations
from "a & ~b" (compatible with GCC < 4.4) to actual "~(a & b)"
(compatible with GCC >= 4.4).
This is in line with the common-code and ARM back-end change
implemented in r212433.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212547 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelLowering.cpp | diff | blob | history |