author | Hal Finkel <hfinkel@anl.gov> | |
Wed, 11 Sep 2013 23:25:21 +0000 (23:25 +0000) | ||
committer | Hal Finkel <hfinkel@anl.gov> | |
Wed, 11 Sep 2013 23:25:21 +0000 (23:25 +0000) | ||
commit | d24ba9ff6e7ffc64c0597171b1980cc4e9556eb0 | |
tree | 8ac8fe16211e1f64c8a5204fb54a177d2d1a3155 | tree | snapshot (tar.xz tar.gz zip) |
parent | b7fbc5baad87eb5cc143193e66139824993883d3 | commit | diff |
Greatly simplify the PPC A2 scheduling itinerary
As Andy pointed out to me a long time ago, there are no structural hazards in
the later pipeline stages of the A2, and so modeling them is useless. Also,
modeling the top pre-dispatch stages is deceiving because, when multiple
hardware threads are active, those resources are shared among the threads. The
bypass definitions were mostly wrong, and so those have been removed. The
resulting itinerary is much simpler, and more accurate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190562 91177308-0d34-0410-b5e6-96231b3b80d8
As Andy pointed out to me a long time ago, there are no structural hazards in
the later pipeline stages of the A2, and so modeling them is useless. Also,
modeling the top pre-dispatch stages is deceiving because, when multiple
hardware threads are active, those resources are shared among the threads. The
bypass definitions were mostly wrong, and so those have been removed. The
resulting itinerary is much simpler, and more accurate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190562 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCScheduleA2.td | diff | blob | history | |
lib/Target/PowerPC/PPCScheduleE500mc.td | diff | blob | history | |
lib/Target/PowerPC/PPCScheduleE5500.td | diff | blob | history |