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raw | patch | inline | side by side (parent: f931867)
author | Craig Topper <craig.topper@gmail.com> | |
Sat, 12 Oct 2013 05:41:08 +0000 (05:41 +0000) | ||
committer | Craig Topper <craig.topper@gmail.com> | |
Sat, 12 Oct 2013 05:41:08 +0000 (05:41 +0000) |
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192525 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td | patch | blob | history | |
utils/TableGen/X86RecognizableInstr.cpp | patch | blob | history |
index fd28b1c7a3804413b8ed05e29cac8734a3ce53ca..3fd725cd95f9499dab3f031d58fe0d0983fe4128 100644 (file)
@@ -1177,6 +1177,7 @@ def VMOV64toPQIZrr : AVX512SI<0x6E, MRMSrcReg, (outs VR128X:$dst), (ins GR64:$sr
[(set VR128X:$dst,
(v2i64 (scalar_to_vector GR64:$src)))],
IIC_SSE_MOVDQ>, EVEX, VEX_W, VEX_LIG;
+let isCodeGenOnly = 1 in {
def VMOV64toSDZrr : AVX512SI<0x6E, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src),
"vmovq{z}\t{$src, $dst|$dst, $src}",
[(set FR64:$dst, (bitconvert GR64:$src))],
@@ -1185,6 +1186,7 @@ def VMOVSDto64Zrr : AVX512SI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64:$src)
"vmovq{z}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (bitconvert FR64:$src))],
IIC_SSE_MOVDQ>, EVEX, VEX_W, Sched<[WriteMove]>;
+}
def VMOVSDto64Zmr : AVX512SI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$src),
"vmovq{z}\t{$src, $dst|$dst, $src}",
[(store (i64 (bitconvert FR64:$src)), addr:$dst)],
@@ -1193,6 +1195,7 @@ def VMOVSDto64Zmr : AVX512SI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$s
// Move Int Doubleword to Single Scalar
//
+let isCodeGenOnly = 1 in {
def VMOVDI2SSZrr : AVX512SI<0x6E, MRMSrcReg, (outs FR32X:$dst), (ins GR32:$src),
"vmovd{z}\t{$src, $dst|$dst, $src}",
[(set FR32X:$dst, (bitconvert GR32:$src))],
@@ -1202,6 +1205,7 @@ def VMOVDI2SSZrm : AVX512SI<0x6E, MRMSrcMem, (outs FR32X:$dst), (ins i32mem:$sr
"vmovd{z}\t{$src, $dst|$dst, $src}",
[(set FR32X:$dst, (bitconvert (loadi32 addr:$src)))],
IIC_SSE_MOVDQ>, EVEX, VEX_LIG, EVEX_CD8<32, CD8VT1>;
+}
// Move Packed Doubleword Int to Packed Double Int
//
// Move Scalar Single to Double Int
//
+let isCodeGenOnly = 1 in {
def VMOVSS2DIZrr : AVX512SI<0x7E, MRMDestReg, (outs GR32:$dst),
(ins FR32X:$src),
"vmovd{z}\t{$src, $dst|$dst, $src}",
"vmovd{z}\t{$src, $dst|$dst, $src}",
[(store (i32 (bitconvert FR32X:$src)), addr:$dst)],
IIC_SSE_MOVDQ>, EVEX, VEX_LIG, EVEX_CD8<32, CD8VT1>;
+}
// Move Quadword Int to Packed Quadword Int
//
index c6770b80793a32f837692e8e1d9c35d2994b45d3..d3320f93cb64a4483e5a2d1e4fdc403debdf614c 100644 (file)
Name == "XRELEASE_PREFIX")
return FILTER_WEAK;
- if (HasFROperands && Name.find("MOV") != Name.npos &&
- ((Name.find("2") != Name.npos && Name.find("32") == Name.npos) ||
- (Name.find("to") != Name.npos)))
- return FILTER_STRONG;
-
return FILTER_NORMAL;
}