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raw | patch | inline | side by side (parent: 1e264de)
raw | patch | inline | side by side (parent: 1e264de)
author | Eric Christopher <echristo@gmail.com> | |
Thu, 22 May 2014 01:46:02 +0000 (01:46 +0000) | ||
committer | Eric Christopher <echristo@gmail.com> | |
Thu, 22 May 2014 01:46:02 +0000 (01:46 +0000) |
the pass pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209382 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209382 91177308-0d34-0410-b5e6-96231b3b80d8
index 1e7712c2df860a625ed3a6b0de446ddbe98e828d..6c5b86f61969ca59eaa7080d454fcd6bff089f8b 100644 (file)
bool FixupLEAPass::runOnMachineFunction(MachineFunction &Func) {
TM = &Func.getTarget();
+ const X86Subtarget &ST = TM->getSubtarget<X86Subtarget>();
+ if (!ST.LEAusesAG() && !ST.slowLEA())
+ return false;
+
TII = static_cast<const X86InstrInfo*>(TM->getInstrInfo());
DEBUG(dbgs() << "Start X86FixupLEAs\n";);
index 8edce9fd46265181fc8c691d61d857f2795e6108..6993577d19c0ba7e71d8af9a9256f2a71860acd3 100644 (file)
const X86TargetMachine *TM =
static_cast<const X86TargetMachine *>(&MF.getTarget());
- assert(!TM->getSubtarget<X86Subtarget>().is64Bit() &&
- "X86-64 PIC uses RIP relative addressing");
+ // Don't do anything if this is 64-bit as 64-bit PIC
+ // uses RIP relative addressing.
+ if (TM->getSubtarget<X86Subtarget>().is64Bit())
+ return false;
// Only emit a global base reg in PIC mode.
if (TM->getRelocationModel() != Reloc::PIC_)
index 84521ccee481c616652fc30a4551e66aa656183d..6639875d07e3add3ee839f30f195594a0ef14e29 100644 (file)
#include "X86.h"
#include "X86InstrInfo.h"
+#include "X86Subtarget.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
}
TM = &MF.getTarget();
+ if (!TM->getSubtarget<X86Subtarget>().padShortFunctions())
+ return false;
+
TII = TM->getInstrInfo();
// Search through basic blocks and mark the ones that have early returns
index 1970ffa0bd15c545ea637f80816ec60319187c74..93760efe666d0c500a58de56b57805a88b5abcbb 100644 (file)
if (getX86Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None)
addPass(createCleanupLocalDynamicTLSPass());
- // For 32-bit, prepend instructions to set the "global base reg" for PIC.
- if (!getX86Subtarget().is64Bit())
- addPass(createX86GlobalBaseRegPass());
+ addPass(createX86GlobalBaseRegPass());
return false;
}
ShouldPrint = true;
}
- if (getX86Subtarget().hasAVX() && UseVZeroUpper) {
+ if (UseVZeroUpper) {
addPass(createX86IssueVZeroUpperPass());
ShouldPrint = true;
}
- if (getOptLevel() != CodeGenOpt::None &&
- getX86Subtarget().padShortFunctions()) {
+ if (getOptLevel() != CodeGenOpt::None) {
addPass(createX86PadShortFunctions());
- ShouldPrint = true;
- }
- if (getOptLevel() != CodeGenOpt::None &&
- (getX86Subtarget().LEAusesAG() ||
- getX86Subtarget().slowLEA())){
addPass(createX86FixupLEAs());
ShouldPrint = true;
}
index 945ea3e88179b96dd4e10681c54716630b75dce6..0bb5f990cae791d183550f13540d54f061e1fbca 100644 (file)
/// runOnMachineFunction - Loop over all of the basic blocks, inserting
/// vzero upper instructions before function calls.
bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
- if (MF.getTarget().getSubtarget<X86Subtarget>().hasAVX512())
+ const X86Subtarget &ST = MF.getTarget().getSubtarget<X86Subtarget>();
+ if (!ST.hasAVX() || ST.hasAVX512())
return false;
TII = MF.getTarget().getInstrInfo();
MachineRegisterInfo &MRI = MF.getRegInfo();