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raw | patch | inline | side by side (parent: f390c22)
author | Daniel Sanders <daniel.sanders@imgtec.com> | |
Thu, 16 Jan 2014 13:45:53 +0000 (13:45 +0000) | ||
committer | Daniel Sanders <daniel.sanders@imgtec.com> | |
Thu, 16 Jan 2014 13:45:53 +0000 (13:45 +0000) |
Affects:
DMULT, DMULTu, MADD, MADD_MM, MADDU, MADDU_MM, MSUB, MSUB_MM, MSUBU,
MSUBU_MM, MULT, MULTu
Does not affect MULT_MM, MULTu_MM since they are currently miscategorised
as IIImul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199381 91177308-0d34-0410-b5e6-96231b3b80d8
DMULT, DMULTu, MADD, MADD_MM, MADDU, MADDU_MM, MSUB, MSUB_MM, MSUBU,
MSUBU_MM, MULT, MULTu
Does not affect MULT_MM, MULTu_MM since they are currently miscategorised
as IIImul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199381 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsSchedule.td | patch | blob | history |
index 2779064c41491909853c7486289371f306386f46..111d9c72c471e3eb67b67e58d7fcf22eca80b8d6 100644 (file)
InstrItinData<IIBranch , [InstrStage<1, [ALU]>]>,
InstrItinData<IIHiLo , [InstrStage<1, [IMULDIV]>]>,
InstrItinData<IIImul , [InstrStage<17, [IMULDIV]>]>,
+ InstrItinData<IIImult , [InstrStage<17, [IMULDIV]>]>,
InstrItinData<IIIdiv , [InstrStage<38, [IMULDIV]>]>,
InstrItinData<IIFcvt , [InstrStage<1, [ALU]>]>,
InstrItinData<IIFmove , [InstrStage<2, [ALU]>]>,