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author | Benjamin Kramer <benny.kra@googlemail.com> | |
Tue, 24 Jun 2014 10:38:10 +0000 (10:38 +0000) | ||
committer | Benjamin Kramer <benny.kra@googlemail.com> | |
Tue, 24 Jun 2014 10:38:10 +0000 (10:38 +0000) |
We can't analyze the individual values of a vector expression. PR20114.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211581 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211581 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Transforms/InstCombine/InstructionCombining.cpp | patch | blob | history | |
test/Transforms/InstCombine/vec_shuffle.ll | patch | blob | history |
diff --git a/lib/Transforms/InstCombine/InstructionCombining.cpp b/lib/Transforms/InstCombine/InstructionCombining.cpp
index 88d7a0d59eacc7934f57ccb04e47a18445a1f5b5..88d461e1b238060bd91254c7016ef31d88b03bbd 100644 (file)
if (isa<ShuffleVectorInst>(RHS)) Shuffle = cast<ShuffleVectorInst>(RHS);
if (isa<Constant>(LHS)) C1 = cast<Constant>(LHS);
if (isa<Constant>(RHS)) C1 = cast<Constant>(RHS);
- if (Shuffle && C1 && isa<UndefValue>(Shuffle->getOperand(1)) &&
+ if (Shuffle && C1 &&
+ (isa<ConstantVector>(C1) || isa<ConstantDataVector>(C1)) &&
+ isa<UndefValue>(Shuffle->getOperand(1)) &&
Shuffle->getType() == Shuffle->getOperand(0)->getType()) {
SmallVector<int, 16> ShMask = Shuffle->getShuffleMask();
// Find constant C2 that has property:
diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll
index fc0f8bd0aa99c2cc804b869ee386c7fcd245779f..eb4e9d6f8c308ee82f0c55dfda66dfa2cd99cdcc 100644 (file)
%rv = extractelement <4 x i32> %and.i, i32 0
ret i32 %rv
}
+
+define <4 x i32> @pr20114(<4 x i32> %__mask) {
+; CHECK-LABEL: @pr20114
+; CHECK: shufflevector
+; CHECK: and
+ %mask01.i = shufflevector <4 x i32> %__mask, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
+ %masked_new.i.i.i = and <4 x i32> bitcast (<2 x i64> <i64 ptrtoint (<4 x i32> (<4 x i32>)* @pr20114 to i64), i64 ptrtoint (<4 x i32> (<4 x i32>)* @pr20114 to i64)> to <4 x i32>), %mask01.i
+ ret <4 x i32> %masked_new.i.i.i
+}