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raw | patch | inline | side by side (parent: f59d05c)
author | Greg Fitzgerald <gregf@codeaurora.org> | |
Thu, 20 Mar 2014 22:55:15 +0000 (22:55 +0000) | ||
committer | Greg Fitzgerald <gregf@codeaurora.org> | |
Thu, 20 Mar 2014 22:55:15 +0000 (22:55 +0000) |
Patch by Ted Woodward
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204409 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204409 91177308-0d34-0410-b5e6-96231b3b80d8
test/MC/ARM/elf-jump24-fixup.s | patch | blob | history | |
test/MC/ARM/symbol-variants.s | patch | blob | history | |
test/tools/llvm-objdump/hex-relocation-addr.test | [new file with mode: 0644] | patch | blob |
tools/llvm-objdump/llvm-objdump.cpp | patch | blob | history |
index 75a4b869dc608c86f75d63f657f2620bbc71b846..affdcda8d74e61772a85e7b47d83f342cfd1029b 100644 (file)
foo:
b.w bar
-@ CHECK: {{[0-9]+}} R_ARM_THM_JUMP24 bar
+@ CHECK: {{[0-9a-f]+}} R_ARM_THM_JUMP24 bar
index cf3535eafa47c15fbd19a7b7aac54d8963ece3a1..e1036a33e318c9051c89e44a819748c87200db0f 100644 (file)
.word f02(NONE)
.word f03(none)
@CHECK: 8 R_ARM_NONE f02
-@CHECK: 12 R_ARM_NONE f03
+@CHECK: c R_ARM_NONE f03
@ plt
bl f04(PLT)
bl f05(plt)
-@ARM: 16 R_ARM_PLT32 f04
-@ARM: 20 R_ARM_PLT32 f05
-@THUMB: 16 R_ARM_THM_CALL f04
-@THUMB: 20 R_ARM_THM_CALL f05
+@ARM: 10 R_ARM_PLT32 f04
+@ARM: 14 R_ARM_PLT32 f05
+@THUMB: 10 R_ARM_THM_CALL f04
+@THUMB: 14 R_ARM_THM_CALL f05
@ got
.word f06(GOT)
.word f07(got)
-@CHECK: 24 R_ARM_GOT_BREL f06
-@CHECK: 28 R_ARM_GOT_BREL f07
+@CHECK: 18 R_ARM_GOT_BREL f06
+@CHECK: 1c R_ARM_GOT_BREL f07
@ gotoff
.word f08(GOTOFF)
.word f09(gotoff)
-@CHECK: 32 R_ARM_GOTOFF32 f08
-@CHECK: 36 R_ARM_GOTOFF32 f09
+@CHECK: 20 R_ARM_GOTOFF32 f08
+@CHECK: 24 R_ARM_GOTOFF32 f09
@ tpoff
.word f10(TPOFF)
.word f11(tpoff)
-@CHECK: 40 R_ARM_TLS_LE32 f10
-@CHECK: 44 R_ARM_TLS_LE32 f11
+@CHECK: 28 R_ARM_TLS_LE32 f10
+@CHECK: 2c R_ARM_TLS_LE32 f11
@ tlsgd
.word f12(TLSGD)
.word f13(tlsgd)
-@CHECK: 48 R_ARM_TLS_GD32 f12
-@CHECK: 52 R_ARM_TLS_GD32 f13
+@CHECK: 30 R_ARM_TLS_GD32 f12
+@CHECK: 34 R_ARM_TLS_GD32 f13
@ target1
.word f14(TARGET1)
.word f15(target1)
-@CHECK: 56 R_ARM_TARGET1 f14
-@CHECK: 60 R_ARM_TARGET1 f15
+@CHECK: 38 R_ARM_TARGET1 f14
+@CHECK: 3c R_ARM_TARGET1 f15
@ target2
.word f16(TARGET2)
.word f17(target2)
-@CHECK: 64 R_ARM_TARGET2 f16
-@CHECK: 68 R_ARM_TARGET2 f17
+@CHECK: 40 R_ARM_TARGET2 f16
+@CHECK: 44 R_ARM_TARGET2 f17
@ prel31
.word f18(PREL31)
.word f19(prel31)
-@CHECK: 72 R_ARM_PREL31 f18
-@CHECK: 76 R_ARM_PREL31 f19
+@CHECK: 48 R_ARM_PREL31 f18
+@CHECK: 4c R_ARM_PREL31 f19
@ tlsldo
.word f20(TLSLDO)
.word f21(tlsldo)
-@CHECK: 80 R_ARM_TLS_LDO32 f20
-@CHECK: 84 R_ARM_TLS_LDO32 f21
+@CHECK: 50 R_ARM_TLS_LDO32 f20
+@CHECK: 54 R_ARM_TLS_LDO32 f21
@ tlscall
.word f22(TLSCALL)
.word f23(tlscall)
-@ CHECK: 88 R_ARM_TLS_CALL f22
-@ CHECK: 92 R_ARM_TLS_CALL f23
+@ CHECK: 58 R_ARM_TLS_CALL f22
+@ CHECK: 5c R_ARM_TLS_CALL f23
@ tlsdesc
.word f24(TLSDESC)
.word f25(tlsdesc)
-@ CHECK: 96 R_ARM_TLS_GOTDESC f24
-@ CHECK: 100 R_ARM_TLS_GOTDESC f25
+@ CHECK: 60 R_ARM_TLS_GOTDESC f24
+@ CHECK: 64 R_ARM_TLS_GOTDESC f25
diff --git a/test/tools/llvm-objdump/hex-relocation-addr.test b/test/tools/llvm-objdump/hex-relocation-addr.test
--- /dev/null
@@ -0,0 +1,17 @@
+// This test checks that relocation addresses are printed in hex
+// RUN: llvm-objdump -r %p/Inputs/win64-unwind.exe.coff-x86_64.obj | FileCheck %s
+
+CHECK: RELOCATION RECORDS FOR [.pdata]:
+CHECK-NEXT: 0 IMAGE_REL_AMD64_ADDR32NB func
+CHECK-NEXT: 4 IMAGE_REL_AMD64_ADDR32NB func
+CHECK-NEXT: 8 IMAGE_REL_AMD64_ADDR32NB .xdata
+CHECK-NEXT: c IMAGE_REL_AMD64_ADDR32NB func
+CHECK-NEXT: 10 IMAGE_REL_AMD64_ADDR32NB func
+CHECK-NEXT: 14 IMAGE_REL_AMD64_ADDR32NB .xdata
+CHECK-NEXT: 18 IMAGE_REL_AMD64_ADDR32NB smallFunc
+CHECK-NEXT: 1c IMAGE_REL_AMD64_ADDR32NB smallFunc
+CHECK-NEXT: 20 IMAGE_REL_AMD64_ADDR32NB .xdata
+CHECK-NEXT: 24 IMAGE_REL_AMD64_ADDR32NB allocFunc
+CHECK-NEXT: 28 IMAGE_REL_AMD64_ADDR32NB allocFunc
+CHECK-NEXT: 2c IMAGE_REL_AMD64_ADDR32NB .xdata
+
index f5328a959e91a40de48ca6cebf2d22d0951d8876..42bbf731ff9bc29bffd778f587f08f9956dc35c0 100644 (file)
}
}
+ StringRef Fmt = Obj->getBytesInAddress() > 4 ? "\t\t%016" PRIx64 ": " :
+ "\t\t\t%08" PRIx64 ": ";
+
// Create a mapping, RelocSecs = SectionRelocMap[S], where sections
// in RelocSecs contain the relocations for section S.
error_code EC;
if (error(rel_cur->getTypeName(name))) goto skip_print_rel;
if (error(rel_cur->getValueString(val))) goto skip_print_rel;
- outs() << format("\t\t\t%8" PRIx64 ": ", SectionAddr + addr) << name
+ outs() << format(Fmt.data(), SectionAddr + addr) << name
<< "\t" << val << "\n";
skip_print_rel:
}
static void PrintRelocations(const ObjectFile *Obj) {
+ StringRef Fmt = Obj->getBytesInAddress() > 4 ? "%016" PRIx64 :
+ "%08" PRIx64;
for (const SectionRef &Section : Obj->sections()) {
if (Section.relocation_begin() == Section.relocation_end())
continue;
continue;
if (error(Reloc.getValueString(valuestr)))
continue;
- outs() << address << " " << relocname << " " << valuestr << "\n";
+ outs() << format(Fmt.data(), address) << " " << relocname << " "
+ << valuestr << "\n";
}
outs() << "\n";
}