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raw | patch | inline | side by side (parent: d51ffcf)
raw | patch | inline | side by side (parent: d51ffcf)
| author | Torok Edwin <edwintorok@gmail.com> | |
| Sat, 11 Jul 2009 20:10:48 +0000 (20:10 +0000) | ||
| committer | Torok Edwin <edwintorok@gmail.com> | |
| Sat, 11 Jul 2009 20:10:48 +0000 (20:10 +0000) |
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
153 files changed:
diff --git a/include/llvm/Analysis/ScalarEvolutionExpressions.h b/include/llvm/Analysis/ScalarEvolutionExpressions.h
index e87d063501e9a417a2b65f9a2a7de35bec296d93..fc03e9fe78ea003679ca6b1a865fe14259c42237 100644 (file)
#define LLVM_ANALYSIS_SCALAREVOLUTION_EXPRESSIONS_H
#include "llvm/Analysis/ScalarEvolution.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
class ConstantInt;
case scCouldNotCompute:
return ((SC*)this)->visitCouldNotCompute((const SCEVCouldNotCompute*)S);
default:
- assert(0 && "Unknown SCEV type!");
- abort();
+ LLVM_UNREACHABLE("Unknown SCEV type!");
}
}
RetVal visitCouldNotCompute(const SCEVCouldNotCompute *S) {
- assert(0 && "Invalid use of SCEVCouldNotCompute!");
- abort();
+ LLVM_UNREACHABLE("Invalid use of SCEVCouldNotCompute!");
return RetVal();
}
};
diff --git a/include/llvm/MDNode.h b/include/llvm/MDNode.h
index d632e4ea4a6fb9037418c9961879e1dfcba7d64d..dcda5d05eb6b182cb36ce0df9011cd4bed4049ce 100644 (file)
--- a/include/llvm/MDNode.h
+++ b/include/llvm/MDNode.h
#include "llvm/Type.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ValueHandle.h"
namespace llvm {
virtual void destroyConstant();
virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U) {
- assert(0 && "This should never be called because MDNodes have no ops");
- abort();
+ LLVM_UNREACHABLE("This should never be called because MDNodes have no ops");
}
/// Methods for support type inquiry through isa, cast, and dyn_cast:
index c7e4297f00c835a8b3b17a1d632a87ddb03b2aee..1a401eb7c0df26b029cb48d70760b2995a9e001a 100644 (file)
/// This function calls abort().
/// Call this after assert(0), so that compiler knows the path is not
/// reachable.
- void llvm_unreachable(void) NORETURN;
+ void llvm_unreachable(const char *msg=0) NORETURN;
}
#ifndef NDEBUG
-#define LLVM_UNREACHABLE(msg) do {cerr<<msg<<"\n";llvm_unreachable();}while(0)
+#define LLVM_UNREACHABLE(msg) llvm_unreachable(msg)
#else
#define LLVM_UNREACHABLE(msg) llvm_unreachable()
#endif
index 768f4877aded1caaf4510a112d852829114d00cc..2fa8c4793c69565f14ca287941631446e1347500 100644 (file)
#include "llvm/Function.h"
#include "llvm/Instructions.h"
#include "llvm/Module.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
//
RetTy visit(Instruction &I) {
switch (I.getOpcode()) {
- default: assert(0 && "Unknown instruction type encountered!");
- abort();
+ default: LLVM_UNREACHABLE("Unknown instruction type encountered!");
// Build the switch statement using the Instruction.def file...
#define HANDLE_INST(NUM, OPCODE, CLASS) \
case Instruction::OPCODE: return \
index e489e0a6f0b5625fc3c135e4f971307cb5017b68..12c124074d71a4c321b16aa0b28a73f9bd0d6e4f 100644 (file)
#define LLVM_SUPPORT_PASS_NAME_PARSER_H
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Pass.h"
#include <algorithm>
#include <cstring>
if (findOption(P->getPassArgument()) != getNumOptions()) {
cerr << "Two passes with the same argument (-"
<< P->getPassArgument() << ") attempted to be registered!\n";
- abort();
+ llvm_unreachable();
}
addLiteralOption(P->getPassArgument(), P, P->getPassName());
}
index 82abfc72864fd4916abc29be705f25aabd3cc767..c06165c62d0da6070bdabdb381235e59bb63d132 100644 (file)
#include "llvm/Pass.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallVector.h"
#include <string>
/// @note This has to exist, because this is a pass, but it should never be
/// used.
TargetData() : ImmutablePass(&ID) {
- assert(0 && "ERROR: Bad TargetData ctor used. "
- "Tool did not specify a TargetData to use?");
- abort();
+ llvm_report_error("ERROR: Bad TargetData ctor used. "
+ "Tool did not specify a TargetData to use?");
}
/// Constructs a TargetData from a specification string. See init().
index 0635c23cbea10161e587d2f4348d7a05bf148747..242bbdcef4dd7dc566f867a26b9ccbd7b674c488 100644 (file)
#ifndef LLVM_TARGET_TARGETINSTRINFO_H
#define LLVM_TARGET_TARGETINSTRINFO_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrDesc.h"
#include "llvm/CodeGen/MachineFunction.h"
/// point.
virtual void insertNoop(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const {
- assert(0 && "Target didn't implement insertNoop!");
- abort();
+ LLVM_UNREACHABLE("Target didn't implement insertNoop!");
}
/// isPredicated - Returns true if the instruction is already predicated.
index 4362d7d301a80ed8bdd943f30debdfab761ed7b6..2ed11ac6be51c739f63d7c00287e8d450611bdf3 100644 (file)
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Streams.h"
using namespace llvm;
const char *AliasString;
switch (R) {
- default: assert(0 && "Unknown alias type!");
+ default: LLVM_UNREACHABLE("Unknown alias type!");
case NoAlias: No++; AliasString = "No alias"; break;
case MayAlias: May++; AliasString = "May alias"; break;
case MustAlias: Must++; AliasString = "Must alias"; break;
const char *MRString;
switch (R) {
- default: assert(0 && "Unknown mod/ref type!");
+ default: LLVM_UNREACHABLE("Unknown mod/ref type!");
case NoModRef: NoMR++; MRString = "NoModRef"; break;
case Ref: JustRef++; MRString = "JustRef"; break;
case Mod: JustMod++; MRString = "JustMod"; break;
index 18c2b66505f636811c4338b0974bb3bb1b3464e6..7ba98dd4ce85dbc89b15ba1aafe2866920fc9971 100644 (file)
#include "llvm/Target/TargetData.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/InstIterator.h"
#include "llvm/Support/Streams.h"
using namespace llvm;
case Refs : OS << "Ref "; break;
case Mods : OS << "Mod "; break;
case ModRef : OS << "Mod/Ref "; break;
- default: assert(0 && "Bad value for AccessTy!");
+ default: LLVM_UNREACHABLE("Bad value for AccessTy!");
}
if (isVolatile()) OS << "[volatile] ";
if (Forward)
index c474fe7a570437b4586219b0d05a93da105c94fc..daa3c9aebe3a2b9a4ecb0245d0ead5fa530f04b9 100644 (file)
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include <algorithm>
using namespace llvm;
virtual void getArgumentAccesses(Function *F, CallSite CS,
std::vector<PointerAccessInfo> &Info) {
- assert(0 && "This method may not be called on this function!");
+ LLVM_UNREACHABLE("This method may not be called on this function!");
}
virtual void getMustAliases(Value *P, std::vector<Value*> &RetVals) { }
index ffdc52ce743b0329e43472220f0dfae9ae6f9a7f..7e6b877b70433a8260d355bdd44cd7388a0a9aac 100644 (file)
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include <cerrno>
return 0;
case Instruction::ICmp:
case Instruction::FCmp:
- assert(0 &&"This function is invalid for compares: no predicate specified");
+ LLVM_UNREACHABLE("This function is invalid for compares: no predicate specified");
case Instruction::PtrToInt:
// If the input is a inttoptr, eliminate the pair. This requires knowing
// the width of a pointer, so it can't be done in ConstantExpr::getCast.
return Context->getConstantFP(APFloat((float)V));
if (Ty == Type::DoubleTy)
return Context->getConstantFP(APFloat(V));
- assert(0 && "Can only constant fold float/double");
+ LLVM_UNREACHABLE("Can only constant fold float/double");
return 0; // dummy return to suppress warning
}
return Context->getConstantFP(APFloat((float)V));
if (Ty == Type::DoubleTy)
return Context->getConstantFP(APFloat(V));
- assert(0 && "Can only constant fold float/double");
+ LLVM_UNREACHABLE("Can only constant fold float/double");
return 0; // dummy return to suppress warning
}
index f453a6f8ef236fd1c7a8095a12878afdc65632dc..3f1dcb75b1651da8ab379f44aaba5569299e165d 100644 (file)
#ifndef NDEBUG
V->dump();
#endif
- assert(0 && "Value does not have a node in the points-to graph!");
+ LLVM_UNREACHABLE("Value does not have a node in the points-to graph!");
}
return I->second;
}
return getNodeForConstantPointer(CE->getOperand(0));
default:
cerr << "Constant Expr not yet handled: " << *CE << "\n";
- assert(0);
+ llvm_unreachable();
}
} else {
- assert(0 && "Unknown constant pointer!");
+ LLVM_UNREACHABLE("Unknown constant pointer!");
}
return 0;
}
return getNodeForConstantPointerTarget(CE->getOperand(0));
default:
cerr << "Constant Expr not yet handled: " << *CE << "\n";
- assert(0);
+ llvm_unreachable();
}
} else {
- assert(0 && "Unknown constant pointer!");
+ LLVM_UNREACHABLE("Unknown constant pointer!");
}
return 0;
}
}
void Andersens::visitVAArg(VAArgInst &I) {
- assert(0 && "vaarg not handled yet!");
+ LLVM_UNREACHABLE("vaarg not handled yet!");
}
/// AddConstraintsForCall - Add constraints for a call with actual arguments
index f6057839266f277b602c50ffcd623aab90679fef..79f92a6d77e99268fb7c808d0660b683746d667e 100644 (file)
#include "llvm/Analysis/ScalarEvolution.h"
#include "llvm/Instructions.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetData.h"
using namespace llvm;
return i->getPointerOperand();
if (StoreInst *i = dyn_cast<StoreInst>(I))
return i->getPointerOperand();
- assert(0 && "Value is no load or store instruction!");
+ LLVM_UNREACHABLE("Value is no load or store instruction!");
// Never reached.
return 0;
}
index a9528cf19cba3498c90542f077b03a544aa6d29a..86a7613175885f3e6267ce133348b114319d138f 100644 (file)
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ConstantRange.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/InstIterator.h"
#include "llvm/Support/MathExtras.h"
SCEV(scCouldNotCompute) {}
void SCEVCouldNotCompute::Profile(FoldingSetNodeID &ID) const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
}
bool SCEVCouldNotCompute::isLoopInvariant(const Loop *L) const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
return false;
}
const Type *SCEVCouldNotCompute::getType() const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
return 0;
}
bool SCEVCouldNotCompute::hasComputableLoopEvolution(const Loop *L) const {
- assert(0 && "Attempt to use a SCEVCouldNotCompute object!");
+ LLVM_UNREACHABLE("Attempt to use a SCEVCouldNotCompute object!");
return false;
}
else if (isa<SCEVUMaxExpr>(this))
return SE.getUMaxExpr(NewOps);
else
- assert(0 && "Unknown commutative expr!");
+ LLVM_UNREACHABLE("Unknown commutative expr!");
}
}
return this;
return operator()(LC->getOperand(), RC->getOperand());
}
- assert(0 && "Unknown SCEV kind!");
+ LLVM_UNREACHABLE("Unknown SCEV kind!");
return false;
}
};
if (Idx >= ATy->getNumElements()) return 0; // Bogus program
Init = Constant::getNullValue(ATy->getElementType());
} else {
- assert(0 && "Unknown constant aggregate type!");
+ LLVM_UNREACHABLE("Unknown constant aggregate type!");
}
return 0;
} else {
return getSMaxExpr(NewOps);
if (isa<SCEVUMaxExpr>(Comm))
return getUMaxExpr(NewOps);
- assert(0 && "Unknown commutative SCEV type!");
+ LLVM_UNREACHABLE("Unknown commutative SCEV type!");
}
}
// If we got here, all operands are loop invariant.
return getTruncateExpr(Op, Cast->getType());
}
- assert(0 && "Unknown SCEV type!");
+ LLVM_UNREACHABLE("Unknown SCEV type!");
return 0;
}
switch (Pred) {
default:
- assert(0 && "Unexpected ICmpInst::Predicate value!");
+ LLVM_UNREACHABLE("Unexpected ICmpInst::Predicate value!");
break;
case ICmpInst::ICMP_SGT:
Pred = ICmpInst::ICMP_SLT;
index 10e5a60ec9e2e2409035b1b5d1781db9b1e02fb8..c854031bca4948bb43d35a60fee4f21225a3c5b5 100644 (file)
#include "llvm/DerivedTypes.h"
#include "llvm/Instruction.h"
#include "llvm/LLVMContext.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/SourceMgr.h"
uint64_t Pair[2];
switch (Kind) {
- default: assert(0 && "Unknown kind!");
+ default: LLVM_UNREACHABLE("Unknown kind!");
case 'K':
// F80HexFPConstant - x87 long double in hexadecimal format (10 bytes)
FP80HexToIntPair(TokStart+3, CurPtr, Pair);
index 64212f61934991fe6654ee63d8081be6e9a7be0b..fca24607bb0e4ff89efe34c9042760fe5645be05 100644 (file)
#include "llvm/ValueSymbolTable.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
return Error(ID.Loc, "functions are not values, refer to them as pointers");
switch (ID.Kind) {
- default: assert(0 && "Unknown ValID!");
+ default: LLVM_UNREACHABLE("Unknown ValID!");
case ValID::t_LocalID:
case ValID::t_LocalName:
return Error(ID.Loc, "invalid use of function-local name");
bool Valid;
switch (OperandType) {
- default: assert(0 && "Unknown operand type!");
+ default: LLVM_UNREACHABLE("Unknown operand type!");
case 0: // int or FP.
Valid = LHS->getType()->isIntOrIntVector() ||
LHS->getType()->isFPOrFPVector();
index 1f3fd551e6c0e2b43372e31616584a0e42915a0f..18f3262d24026f60789364d539ddd4468a2b80ce 100644 (file)
#include "llvm/Module.h"
#include "llvm/TypeSymbolTable.h"
#include "llvm/ValueSymbolTable.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
static unsigned GetEncodedCastOpcode(unsigned Opcode) {
switch (Opcode) {
- default: assert(0 && "Unknown cast instruction!");
+ default: LLVM_UNREACHABLE("Unknown cast instruction!");
case Instruction::Trunc : return bitc::CAST_TRUNC;
case Instruction::ZExt : return bitc::CAST_ZEXT;
case Instruction::SExt : return bitc::CAST_SEXT;
static unsigned GetEncodedBinaryOpcode(unsigned Opcode) {
switch (Opcode) {
- default: assert(0 && "Unknown binary instruction!");
+ default: LLVM_UNREACHABLE("Unknown binary instruction!");
case Instruction::Add:
case Instruction::FAdd: return bitc::BINOP_ADD;
case Instruction::Sub:
@@ -200,7 +201,7 @@ static void WriteTypeTable(const ValueEnumerator &VE, BitstreamWriter &Stream) {
unsigned Code = 0;
switch (T->getTypeID()) {
- default: assert(0 && "Unknown type!");
+ default: LLVM_UNREACHABLE("Unknown type!");
case Type::VoidTyID: Code = bitc::TYPE_CODE_VOID; break;
case Type::FloatTyID: Code = bitc::TYPE_CODE_FLOAT; break;
case Type::DoubleTyID: Code = bitc::TYPE_CODE_DOUBLE; break;
@@ -278,7 +279,7 @@ static void WriteTypeTable(const ValueEnumerator &VE, BitstreamWriter &Stream) {
static unsigned getEncodedLinkage(const GlobalValue *GV) {
switch (GV->getLinkage()) {
- default: assert(0 && "Invalid linkage!");
+ default: LLVM_UNREACHABLE("Invalid linkage!");
case GlobalValue::GhostLinkage: // Map ghost linkage onto external.
case GlobalValue::ExternalLinkage: return 0;
case GlobalValue::WeakAnyLinkage: return 1;
static unsigned getEncodedVisibility(const GlobalValue *GV) {
switch (GV->getVisibility()) {
- default: assert(0 && "Invalid visibility!");
+ default: LLVM_UNREACHABLE("Invalid visibility!");
case GlobalValue::DefaultVisibility: return 0;
case GlobalValue::HiddenVisibility: return 1;
case GlobalValue::ProtectedVisibility: return 2;
}
}
} else {
- assert(0 && "Unknown constant!");
+ LLVM_UNREACHABLE("Unknown constant!");
}
Stream.EmitRecord(Code, Record, AbbrevToUse);
Record.clear();
@@ -1126,7 +1127,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_ENTRY_8_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // 7-bit fixed width VST_ENTRY strings.
@@ -1137,7 +1138,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_ENTRY_7_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // 6-bit char6 VST_ENTRY strings.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1147,7 +1148,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_ENTRY_6_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // 6-bit char6 VST_BBENTRY strings.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1157,7 +1158,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6));
if (Stream.EmitBlockInfoAbbrev(bitc::VALUE_SYMTAB_BLOCK_ID,
Abbv) != VST_BBENTRY_6_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
@@ -1169,7 +1170,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Log2_32_Ceil(VE.getTypes().size()+1)));
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_SETTYPE_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INTEGER abbrev for CONSTANTS_BLOCK.
@@ -1178,7 +1179,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 8));
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_INTEGER_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // CE_CAST abbrev for CONSTANTS_BLOCK.
@@ -1191,14 +1192,14 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_CE_CAST_Abbrev)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // NULL abbrev for CONSTANTS_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_NULL));
if (Stream.EmitBlockInfoAbbrev(bitc::CONSTANTS_BLOCK_ID,
Abbv) != CONSTANTS_NULL_Abbrev)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
// FIXME: This should only use space for first class types!
@@ -1211,7 +1212,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // volatile
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_LOAD_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_BINOP abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1221,7 +1222,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_BINOP_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_CAST abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1232,7 +1233,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_CAST_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_RET abbrev for FUNCTION_BLOCK.
@@ -1240,7 +1241,7 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_RET));
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_RET_VOID_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_RET abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
@@ -1248,14 +1249,14 @@ static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // ValID
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_RET_VAL_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
{ // INST_UNREACHABLE abbrev for FUNCTION_BLOCK.
BitCodeAbbrev *Abbv = new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNREACHABLE));
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID,
Abbv) != FUNCTION_INST_UNREACHABLE_ABBREV)
- assert(0 && "Unexpected abbrev ordering!");
+ LLVM_UNREACHABLE("Unexpected abbrev ordering!");
}
Stream.ExitBlock();
index daa4a702dce0f0e955ec8c61b16b67fedcc77138..ea27490fa14daf31063ee039c702242b0c41c97f 100644 (file)
else if (I->hasWeakLinkage())
O << TAI->getWeakRefDirective() << Name << '\n';
else if (!I->hasLocalLinkage())
- assert(0 && "Invalid alias linkage");
+ LLVM_UNREACHABLE("Invalid alias linkage");
printVisibility(Name, I->getVisibility());
case Instruction::SIToFP:
case Instruction::FPToUI:
case Instruction::FPToSI:
- assert(0 && "FIXME: Don't yet support this kind of constant cast expr");
+ LLVM_UNREACHABLE("FIXME: Don't yet support this kind of constant cast expr");
break;
case Instruction::BitCast:
return EmitConstantValueOnly(CE->getOperand(0));
O << ')';
break;
default:
- assert(0 && "Unsupported operator!");
+ LLVM_UNREACHABLE("Unsupported operator!");
}
} else {
- assert(0 && "Unknown constant value!");
+ LLVM_UNREACHABLE("Unknown constant value!");
}
}
O << '\n';
}
return;
- } else assert(0 && "Floating point constant type not handled");
+ } else LLVM_UNREACHABLE("Floating point constant type not handled");
}
void AsmPrinter::EmitGlobalConstantLargeInt(const ConstantInt *CI,
"Target cannot handle 64-bit constant exprs!");
O << TAI->getData64bitsDirective(AddrSpace);
} else {
- assert(0 && "Target cannot handle given data directive width!");
+ LLVM_UNREACHABLE("Target cannot handle given data directive width!");
}
break;
}
index 01c431c849a3c72a403883bbc52703fb274ae8fe..dd61ca339fe42e26fd953562855d678fe8779e56 100644 (file)
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Support/ErrorHandling.h"
#include <ostream>
using namespace llvm;
case dwarf::DW_FORM_data8: Asm->EmitInt64(Integer); break;
case dwarf::DW_FORM_udata: Asm->EmitULEB128Bytes(Integer); break;
case dwarf::DW_FORM_sdata: Asm->EmitSLEB128Bytes(Integer); break;
- default: assert(0 && "DIE Value form not supported yet"); break;
+ default: LLVM_UNREACHABLE("DIE Value form not supported yet");
}
}
case dwarf::DW_FORM_data8: return sizeof(int64_t);
case dwarf::DW_FORM_udata: return TargetAsmInfo::getULEB128Size(Integer);
case dwarf::DW_FORM_sdata: return TargetAsmInfo::getSLEB128Size(Integer);
- default: assert(0 && "DIE Value form not supported yet"); break;
+ default: LLVM_UNREACHABLE("DIE Value form not supported yet"); break;
}
return 0;
}
case dwarf::DW_FORM_block2: Asm->EmitInt16(Size); break;
case dwarf::DW_FORM_block4: Asm->EmitInt32(Size); break;
case dwarf::DW_FORM_block: Asm->EmitULEB128Bytes(Size); break;
- default: assert(0 && "Improper form for block"); break;
+ default: LLVM_UNREACHABLE("Improper form for block"); break;
}
const SmallVector<DIEAbbrevData, 8> &AbbrevData = Abbrev.getData();
case dwarf::DW_FORM_block2: return Size + sizeof(int16_t);
case dwarf::DW_FORM_block4: return Size + sizeof(int32_t);
case dwarf::DW_FORM_block: return Size + TargetAsmInfo::getULEB128Size(Size);
- default: assert(0 && "Improper form for block"); break;
+ default: LLVM_UNREACHABLE("Improper form for block"); break;
}
return 0;
}
index a1b97df82afce03f4d2b50bc4a855a8377b29a35..be274caf69699c0eb220cfbfdbb794d06246c37f 100644 (file)
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
Asm->EmitULEB128Bytes(Offset);
Asm->EOL("Offset");
} else {
- assert(0 && "Machine move not supported yet.");
+ LLVM_UNREACHABLE("Machine move not supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), isEH));
Asm->EOL("Register");
} else {
- assert(0 && "Machine move not supported yet.");
+ LLVM_UNREACHABLE("Machine move not supported yet.");
}
} else {
unsigned Reg = RI->getDwarfRegNum(Src.getReg(), isEH);
index 26353035ae2f8cf84a58806dc16386c7ba48e816..c839b3ee99098f995377368d998a2c73321e4f7e 100644 (file)
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
// _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
// an object with itself.
#ifndef _GLIBCXX_DEBUG
- assert(0 && "Predecessor appears twice");
+ LLVM_UNREACHABLE("Predecessor appears twice");
#endif
return false;
}
index 78f0dae51c0a9f9fa95836a4f1b21b1425fb4786..07aa1cb5bd9a74a12e173ba45a0fe38a530df3f1 100644 (file)
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
//===----------------------------------------------------------------------===//
// ELFCodeEmitter Implementation
MR.setResultPointer((void*)Addr);
MR.setConstantVal(JumpTableSectionIdx);
} else {
- assert(0 && "Unhandled relocation type");
+ LLVM_UNREACHABLE("Unhandled relocation type");
}
ES->addRelocation(MR);
}
index ddc3670665d69a96b9c2a3d2f67c645ac22154b2..13180175c2ded87fef12e38138131450213d6c13 100644 (file)
#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
unsigned ELFWriter::getGlobalELFVisibility(const GlobalValue *GV) {
switch (GV->getVisibility()) {
default:
- assert(0 && "unknown visibility type");
+ LLVM_UNREACHABLE("unknown visibility type");
case GlobalValue::DefaultVisibility:
return ELFSym::STV_DEFAULT;
case GlobalValue::HiddenVisibility:
else if (CFP->getType() == Type::FloatTy)
GblS.emitWord32(Val);
else if (CFP->getType() == Type::X86_FP80Ty) {
- assert(0 && "X86_FP80Ty global emission not implemented");
+ LLVM_UNREACHABLE("X86_FP80Ty global emission not implemented");
} else if (CFP->getType() == Type::PPC_FP128Ty)
- assert(0 && "PPC_FP128Ty global emission not implemented");
+ LLVM_UNREACHABLE("PPC_FP128Ty global emission not implemented");
return;
} else if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) {
if (Size == 4)
else if (Size == 8)
GblS.emitWord64(CI->getZExtValue());
else
- assert(0 && "LargeInt global emission not implemented");
+ LLVM_UNREACHABLE("LargeInt global emission not implemented");
return;
} else if (const ConstantVector *CP = dyn_cast<ConstantVector>(CV)) {
const VectorType *PTy = CP->getType();
EmitGlobalConstant(CP->getOperand(I), GblS);
return;
}
- assert(0 && "unknown global constant");
+ LLVM_UNREACHABLE("unknown global constant");
}
index 14177dacdc2d11837718f8c2f0754159a3c290ad..f711157980fcf063b574ba1d7d15e56bbfce7806 100644 (file)
static const char *DescKind(GC::PointKind Kind) {
switch (Kind) {
- default: assert(0 && "Unknown GC point kind");
+ default: LLVM_UNREACHABLE("Unknown GC point kind");
case GC::Loop: return "loop";
case GC::Return: return "return";
case GC::PreCall: return "pre-call";
index 9eacdfe4d55a6b1abe94460e810f374a64969716..2c286608266b6decee37edcfee6b12ae98db21fb 100644 (file)
IRBuilder<> Builder(IP->getParent(), IP);
switch(BitSize) {
- default: assert(0 && "Unhandled type size of value to byteswap!");
+ default: LLVM_UNREACHABLE("Unhandled type size of value to byteswap!");
case 16: {
Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8),
"bswap.2");
index 6abe465cb1b53f989257a83b77d91e6be586cda7..ed23bef214fdce1dbfc8350d3628c18de64cf45d 100644 (file)
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if (tii_->isMoveInstr(*VNI->copy, SrcReg, DstReg, SrcSubReg, DstSubReg))
return SrcReg;
- assert(0 && "Unrecognized copy instruction!");
+ LLVM_UNREACHABLE("Unrecognized copy instruction!");
return 0;
}
index fccbf657057c9619174622b7c9013910483568fa..a076a3c47522cea5cb639eb5bd1fce21e6a5f490 100644 (file)
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/OutputBuffer.h"
#include <vector>
// FIXME: This should be a set or something that uniques
MOW.PendingGlobals.push_back(MR.getGlobalValue());
} else {
- assert(0 && "Unhandled relocation type");
+ LLVM_UNREACHABLE("Unhandled relocation type");
}
MOS->addRelocation(MR);
}
index 12f5cecbefe9abc70066e3a83262d004bf98a9d9..7542d9ed102cbec6ba55dfdcf52dd3317d2ce323 100644 (file)
ptr[6] = val >> 48;
ptr[7] = val >> 56;
} else {
- assert(0 && "Not implemented: bit widths > 64");
+ LLVM_UNREACHABLE("Not implemented: bit widths > 64");
}
break;
}
PA+SL->getElementOffset(i)));
} else {
cerr << "Bad Type: " << *PC->getType() << "\n";
- assert(0 && "Unknown constant type to initialize memory with!");
+ LLVM_UNREACHABLE("Unknown constant type to initialize memory with!");
}
}
}
switch (GV->getLinkage()) {
default:
- assert(0 && "Unexpected linkage type!");
+ LLVM_UNREACHABLE("Unexpected linkage type!");
break;
case GlobalValue::WeakAnyLinkage:
case GlobalValue::WeakODRLinkage:
index d44305f33338774339bd312d08493acc8edb8b00..2435855ca6869e387acfae5f1e24817dabfd1e1b 100644 (file)
#include "llvm/Target/TargetInstrDesc.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Analysis/DebugInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/LeakDetector.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
return false;
switch (getType()) {
- default: assert(0 && "Unrecognized operand type");
+ default: LLVM_UNREACHABLE("Unrecognized operand type");
case MachineOperand::MO_Register:
return getReg() == Other.getReg() && isDef() == Other.isDef() &&
getSubReg() == Other.getSubReg();
OS << '>';
break;
default:
- assert(0 && "Unrecognized operand type");
+ LLVM_UNREACHABLE("Unrecognized operand type");
}
if (unsigned TF = getTargetFlags())
index 1d8109eb8d9954549854278d3229269e81054ddf..798492bf329a9ee0ead91770cefaa5772e633245 100644 (file)
#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Streams.h"
using namespace llvm;
using namespace llvm::dwarf;
}
// This should never happen
- assert(0 && "Personality function should be set!");
+ LLVM_UNREACHABLE("Personality function should be set!");
return 0;
}
index de7746855b3f48e51f207cbd0ef4e10792325bc7..77cbf2966b1f69c53dbdf7b04bd946a3d3041b32 100644 (file)
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/Statistic.h"
#include <map>
using namespace llvm;
cerr << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
index b4c20e6bfd311c377b6567c5cfe46fece91479f1..55a6cf51c906220d38690e7dad20bb77a2708da2 100644 (file)
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/raw_ostream.h"
#include <map>
this == getConstantPool() ||
this == getJumpTable())
return true;
- assert(0 && "Unknown PseudoSourceValue!");
+ LLVM_UNREACHABLE("Unknown PseudoSourceValue!");
return false;
}
index eb9dccb28991509283f61b75bc4b71a46f222056..7f233b219b89704a59d6c7b6af175e724ef94e31 100644 (file)
assert(Depth <= 6 && "GetNegatedExpression doesn't match isNegatibleForFree");
switch (Op.getOpcode()) {
- default: assert(0 && "Unknown code");
+ default: LLVM_UNREACHABLE("Unknown code");
case ISD::ConstantFP: {
APFloat V = cast<ConstantFPSDNode>(Op)->getValueAPF();
V.changeSign();
if (Value.getOpcode() != ISD::TargetConstantFP) {
SDValue Tmp;
switch (CFP->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unknown FP type");
+ default: LLVM_UNREACHABLE("Unknown FP type");
case MVT::f80: // We don't do this for these yet.
case MVT::f128:
case MVT::ppcf128:
SrcValue = ST->getSrcValue();
SrcValueOffset = ST->getSrcValueOffset();
} else {
- assert(0 && "FindAliasInfo expected a memory operand");
+ LLVM_UNREACHABLE("FindAliasInfo expected a memory operand");
}
return false;
index a4fff892daa91648d329381e8456b940538142be..5cd3182bf4ba3f36ac489607949421637e12f779 100644 (file)
return Tmp2;
case ISD::BUILD_VECTOR:
switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Custom:
Tmp3 = TLI.LowerOperation(Result, DAG);
if (Tmp3.getNode()) {
Tmp4 = Result.getValue(1);
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned load and the target doesn't support it,
// expand it.
Tmp2 = LegalizeOp(Ch);
} else {
switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Custom:
isCustom = true;
// FALLTHROUGH
MVT VT = Tmp3.getValueType();
switch (TLI.getOperationAction(ISD::STORE, VT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned store and the target doesn't support it,
// expand it.
ST->getOffset());
switch (TLI.getTruncStoreAction(ST->getValue().getValueType(), StVT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: LLVM_UNREACHABLE("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned store and the target doesn't support it,
// expand it.
MVT OpVT = LHS.getValueType();
ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
switch (TLI.getCondCodeAction(CCCode, OpVT)) {
- default: assert(0 && "Unknown condition code action!");
+ default: LLVM_UNREACHABLE("Unknown condition code action!");
case TargetLowering::Legal:
// Nothing to do.
break;
RTLIB::Libcall Call_PPCF128) {
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: LLVM_UNREACHABLE("Unexpected request for libcall!");
case MVT::f32: LC = Call_F32; break;
case MVT::f64: LC = Call_F64; break;
case MVT::f80: LC = Call_F80; break;
RTLIB::Libcall Call_I128) {
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: LLVM_UNREACHABLE("Unexpected request for libcall!");
case MVT::i16: LC = Call_I16; break;
case MVT::i32: LC = Call_I32; break;
case MVT::i64: LC = Call_I64; break;
// offset depending on the data type.
uint64_t FF;
switch (Op0.getValueType().getSimpleVT()) {
- default: assert(0 && "Unsupported integer type!");
+ default: LLVM_UNREACHABLE("Unsupported integer type!");
case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
DebugLoc dl) {
switch (Opc) {
- default: assert(0 && "Cannot expand this yet!");
+ default: LLVM_UNREACHABLE("Cannot expand this yet!");
case ISD::CTPOP: {
static const uint64_t mask[6] = {
0x5555555555555555ULL, 0x3333333333333333ULL,
else if (VT.isFloatingPoint())
Results.push_back(DAG.getConstantFP(0, VT));
else
- assert(0 && "Unknown value type!");
+ LLVM_UNREACHABLE("Unknown value type!");
break;
}
case ISD::TRAP: {
// type in some cases cases.
// Also, we can fall back to a division in some cases, but that's a big
// performance hit in the general case.
- assert(0 && "Don't know how to expand this operation yet!");
+ LLVM_UNREACHABLE("Don't know how to expand this operation yet!");
}
if (isSigned) {
Tmp1 = DAG.getConstant(VT.getSizeInBits() - 1, TLI.getShiftAmountTy());
break;
}
if (NewInTy.isInteger())
- assert(0 && "Cannot promote Legal Integer SETCC yet");
+ LLVM_UNREACHABLE("Cannot promote Legal Integer SETCC yet");
else {
Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NewInTy, Tmp1);
Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NewInTy, Tmp2);
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 730619c7f4853716cbbf27d140da02216f3243dc..63ddbed18d17f0d4caa9ebf07eea6099e7731854 100644 (file)
SDValue Res;
switch (getTypeAction(N->getOperand(0).getValueType())) {
- default: assert(0 && "Unknown type action!");
+ default: LLVM_UNREACHABLE("Unknown type action!");
case Legal:
case ExpandInteger:
Res = N->getOperand(0);
// insert sign extends for ALL conditions, but zero extend is cheaper on
// many machines (an AND instead of two shifts), so prefer it.
switch (CCCode) {
- default: assert(0 && "Unknown integer comparison!");
+ default: LLVM_UNREACHABLE("Unknown integer comparison!");
case ISD::SETEQ:
case ISD::SETNE:
case ISD::SETUGE:
DAG.getConstant(~HighBitMask, ShTy));
switch (N->getOpcode()) {
- default: assert(0 && "Unknown shift");
+ default: LLVM_UNREACHABLE("Unknown shift");
case ISD::SHL:
Lo = DAG.getConstant(0, NVT); // Low part is zero.
Hi = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part.
Amt);
unsigned Op1, Op2;
switch (N->getOpcode()) {
- default: assert(0 && "Unknown shift");
+ default: LLVM_UNREACHABLE("Unknown shift");
case ISD::SHL: Op1 = ISD::SHL; Op2 = ISD::SRL; break;
case ISD::SRL:
case ISD::SRA: Op1 = ISD::SRL; Op2 = ISD::SHL; break;
SDValue Lo1, Hi1, Lo2, Hi2;
switch (N->getOpcode()) {
- default: assert(0 && "Unknown shift");
+ default: LLVM_UNREACHABLE("Unknown shift");
case ISD::SHL:
// ShAmt < NVTBits
Lo1 = DAG.getConstant(0, NVT); // Low part is zero.
}
if (!ExpandShiftWithUnknownAmountBit(N, Lo, Hi))
- assert(0 && "Unsupported shift!");
+ LLVM_UNREACHABLE("Unsupported shift!");
}
void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N,
// FIXME: This generated code sucks.
ISD::CondCode LowCC;
switch (CCCode) {
- default: assert(0 && "Unknown integer setcc!");
+ default: LLVM_UNREACHABLE("Unknown integer setcc!");
case ISD::SETLT:
case ISD::SETULT: LowCC = ISD::SETULT; break;
case ISD::SETGT:
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index d4e886d25400f35c730c397e12d3404e8e7a1d7e..013b18b8ef3b349ed8ecd0441aa7a85e728cc79b 100644 (file)
cerr << "ScalarizeVectorOperand Op #" << OpNo << ": ";
N->dump(&DAG); cerr << "\n";
#endif
- assert(0 && "Do not know how to scalarize this operator's operand!");
+ LLVM_UNREACHABLE("Do not know how to scalarize this operator's operand!");
case ISD::BIT_CONVERT:
Res = ScalarizeVecOp_BIT_CONVERT(N);
break;
SDValue VLo, VHi;
MVT InVT = N->getOperand(0).getValueType();
switch (getTypeAction(InVT)) {
- default: assert(0 && "Unexpected type action!");
+ default: LLVM_UNREACHABLE("Unexpected type action!");
case Legal: {
MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
LoVT.getVectorNumElements());
// Split the input.
MVT InVT = N->getOperand(0).getValueType();
switch (getTypeAction(InVT)) {
- default: assert(0 && "Unexpected type action!");
+ default: LLVM_UNREACHABLE("Unexpected type action!");
case Legal: {
MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(),
LoVT.getVectorNumElements());
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
index 4f6e59cd0d741027a799a82b6bbd6311ea0bfea6..52626db269fc6b8211fd813c111c07cd35322794 100644 (file)
cerr << "*** Scheduling failed! ***\n";
PredSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
index c4325349990d3b989a5ac9face71d887e622bbc5..afce34879c2c0f1bbef2d5d17217f63c68f966ea 100644 (file)
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/PriorityQueue.h"
#include "llvm/ADT/Statistic.h"
#include <climits>
cerr << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index c97e2a8c86bf7afb8a9dd8ab72e95afb94918603..85794b95ad831cd0ce4f3adbcfa3916093bd1d08 100644 (file)
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/PriorityQueue.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
cerr << "*** Scheduling failed! ***\n";
PredSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
cerr << "*** Scheduling failed! ***\n";
SuccSU->dump(this);
cerr << " has been released too many times!\n";
- assert(0);
+ llvm_unreachable();
}
#endif
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
index f9bfe003ed6c225ee7747896fd7a09b2ca456265..80a8ae92c7f21527948551d9ca240fc62f6be4f8 100644 (file)
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
using namespace llvm;
MI->addOperand(MachineOperand::CreateImm(SubIdx));
BB->insert(InsertPos, MI);
} else
- assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg");
+ LLVM_UNREACHABLE("Node is not insert_subreg, extract_subreg, or subreg_to_reg");
SDValue Op(Node, 0);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
#ifndef NDEBUG
Node->dump(DAG);
#endif
- assert(0 && "This target-independent node should have been selected!");
+ LLVM_UNREACHABLE("This target-independent node should have been selected!");
break;
case ISD::EntryToken:
- assert(0 && "EntryToken should have been excluded from the schedule!");
+ LLVM_UNREACHABLE("EntryToken should have been excluded from the schedule!");
break;
case ISD::TokenFactor: // fall thru
break;
++i; // Skip the ID value.
switch (Flags & 7) {
- default: assert(0 && "Bad flags!");
+ default: LLVM_UNREACHABLE("Bad flags!");
case 2: // Def of register.
for (; NumVals; --NumVals, ++i) {
unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
index 29f0cb22d9aea672365ed5af9f66244e5938251d..98841f876de98c765433dc1a49f6ebe62c26059d 100644 (file)
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
switch (VT.getSimpleVT()) {
- default: assert(0 && "Unknown FP format");
+ default: LLVM_UNREACHABLE("Unknown FP format");
case MVT::f32: return &APFloat::IEEEsingle;
case MVT::f64: return &APFloat::IEEEdouble;
case MVT::f80: return &APFloat::x87DoubleExtended;
/// if the operation does not depend on the sign of the input (setne and seteq).
static int isSignedOp(ISD::CondCode Opcode) {
switch (Opcode) {
- default: assert(0 && "Illegal integer setcc operation!");
+ default: LLVM_UNREACHABLE("Illegal integer setcc operation!");
case ISD::SETEQ:
case ISD::SETNE: return 0;
case ISD::SETLT:
switch (N->getOpcode()) {
case ISD::TargetExternalSymbol:
case ISD::ExternalSymbol:
- assert(0 && "Should only be used on nodes with operands");
+ LLVM_UNREACHABLE("Should only be used on nodes with operands");
default: break; // Normal nodes don't need extra info.
case ISD::ARG_FLAGS:
ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
bool Erased = false;
switch (N->getOpcode()) {
case ISD::EntryToken:
- assert(0 && "EntryToken should not be in CSEMaps!");
+ LLVM_UNREACHABLE("EntryToken should not be in CSEMaps!");
return false;
case ISD::HANDLENODE: return false; // noop.
case ISD::CONDCODE:
!N->isMachineOpcode() && !doNotCSE(N)) {
N->dump(this);
cerr << "\n";
- assert(0 && "Node is not in map!");
+ LLVM_UNREACHABLE("Node is not in map!");
}
#endif
return Erased;
const APInt &C1 = N1C->getAPIntValue();
switch (Cond) {
- default: assert(0 && "Unknown integer setcc!");
+ default: LLVM_UNREACHABLE("Unknown integer setcc!");
case ISD::SETEQ: return getConstant(C1 == C2, VT);
case ISD::SETNE: return getConstant(C1 != C2, VT);
case ISD::SETULT: return getConstant(C1.ult(C2), VT);
case ISD::MERGE_VALUES:
case ISD::CONCAT_VECTORS:
return Operand; // Factor, merge or concat of one node? No need.
- case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
+ case ISD::FP_ROUND: LLVM_UNREACHABLE("Invalid method to make FP_ROUND node");
case ISD::FP_EXTEND:
assert(VT.isFloatingPoint() &&
Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
}
break;
case ISD::VECTOR_SHUFFLE:
- assert(0 && "should use getVectorShuffle constructor!");
+ LLVM_UNREACHABLE("should use getVectorShuffle constructor!");
break;
case ISD::BIT_CONVERT:
// Fold bit_convert nodes from a type to themselves.
SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
switch (NumVTs) {
- case 0: assert(0 && "Cannot have nodes without results!");
+ case 0: LLVM_UNREACHABLE("Cannot have nodes without results!");
case 1: return getVTList(VTs[0]);
case 2: return getVTList(VTs[0], VTs[1]);
case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
case ISD::CONVERT_RNDSAT: {
switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
- default: assert(0 && "Unknown cvt code!");
+ default: LLVM_UNREACHABLE("Unknown cvt code!");
case ISD::CVT_FF: return "cvt_ff";
case ISD::CVT_FS: return "cvt_fs";
case ISD::CVT_FU: return "cvt_fu";
case ISD::CONDCODE:
switch (cast<CondCodeSDNode>(this)->get()) {
- default: assert(0 && "Unknown setcc condition!");
+ default: LLVM_UNREACHABLE("Unknown setcc condition!");
case ISD::SETOEQ: return "setoeq";
case ISD::SETOGT: return "setogt";
case ISD::SETOGE: return "setoge";
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 1e31b8f551d61643ecf0e3e8a7d3f017ef650ac2..3882abdf9ae142a4de25955006a08b445f87683f 100644 (file)
if (PartVT.getSizeInBits() == ValueVT.getSizeInBits())
return DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val);
- assert(0 && "Unknown mismatch!");
+ LLVM_UNREACHABLE("Unknown mismatch!");
return SDValue();
}
ValueVT = MVT::getIntegerVT(NumParts * PartBits);
Val = DAG.getNode(ExtendKind, dl, ValueVT, Val);
} else {
- assert(0 && "Unknown mismatch!");
+ LLVM_UNREACHABLE("Unknown mismatch!");
}
} else if (PartBits == ValueVT.getSizeInBits()) {
// Different types of the same size.
ValueVT = MVT::getIntegerVT(NumParts * PartBits);
Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val);
} else {
- assert(0 && "Unknown mismatch!");
+ LLVM_UNREACHABLE("Unknown mismatch!");
}
}
case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break;
case FCmpInst::FCMP_TRUE: FOC = FPC = ISD::SETTRUE; break;
default:
- assert(0 && "Invalid FCmp predicate opcode!");
+ LLVM_UNREACHABLE("Invalid FCmp predicate opcode!");
FOC = FPC = ISD::SETFALSE;
break;
}
case ICmpInst::ICMP_SGT: return ISD::SETGT;
case ICmpInst::ICMP_UGT: return ISD::SETUGT;
default:
- assert(0 && "Invalid ICmp predicate opcode!");
+ LLVM_UNREACHABLE("Invalid ICmp predicate opcode!");
return ISD::SETNE;
}
}
Condition = getFCmpCondCode(FC->getPredicate());
} else {
Condition = ISD::SETEQ; // silence warning.
- assert(0 && "Unknown compare instruction");
+ LLVM_UNREACHABLE("Unknown compare instruction");
}
CaseBlock CB(Condition, BOp->getOperand(0),
case Intrinsic::gcread:
case Intrinsic::gcwrite:
- assert(0 && "GC failed to lower gcread/gcwrite intrinsics!");
+ LLVM_UNREACHABLE("GC failed to lower gcread/gcwrite intrinsics!");
return 0;
case Intrinsic::flt_rounds: {
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
index b5c3d4db0afa921baeff4ee933a458e9f291ab0f..6039ef56f2eb90d570cfad4e3af029f0fd360828 100644 (file)
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <vector>
#include <set>
void visitVACopy(CallInst &I);
void visitUserOp1(Instruction &I) {
- assert(0 && "UserOp1 should not exist at instruction selection time!");
- abort();
+ LLVM_UNREACHABLE("UserOp1 should not exist at instruction selection time!");
}
void visitUserOp2(Instruction &I) {
- assert(0 && "UserOp2 should not exist at instruction selection time!");
- abort();
+ LLVM_UNREACHABLE("UserOp2 should not exist at instruction selection time!");
}
const char *implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op);
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index cadf854f210ae65118853fa88ac227c130a292e3..b084ab79a7906ee969ae42059cc61e4061a9c056 100644 (file)
BI->dump();
}
if (EnableFastISelAbort)
- assert(0 && "FastISel didn't handle a PHI in a successor");
+ LLVM_UNREACHABLE("FastISel didn't handle a PHI in a successor");
break;
}
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index b9b518afc00689c422ff574bfca3a49e4c2d97bc..cddb5162afc5687bc00673164ddf748c905ab223 100644 (file)
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
using namespace llvm;
if (CFP->getValueAPF().isNaN()) {
// If an operand is known to be a nan, we can fold it.
switch (ISD::getUnorderedFlavor(Cond)) {
- default: assert(0 && "Unknown flavor!");
+ default: LLVM_UNREACHABLE("Unknown flavor!");
case 0: // Known false.
return DAG.getConstant(0, VT);
case 1: // Known true.
SDValue Temp;
if (N0.getValueType() == MVT::i1 && foldBooleans) {
switch (Cond) {
- default: assert(0 && "Unknown integer setcc!");
+ default: LLVM_UNREACHABLE("Unknown integer setcc!");
case ISD::SETEQ: // X == Y -> ~(X^Y)
Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
N0 = DAG.getNOT(dl, Temp, MVT::i1);
/// is.
static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
switch (CT) {
- default: assert(0 && "Unknown constraint type!");
+ default: LLVM_UNREACHABLE("Unknown constraint type!");
case TargetLowering::C_Other:
case TargetLowering::C_Unknown:
return 0;
index d1523f82e9f0c4091db45e5f40709ff8a4f0ec89..7dcd4cc6ed3d81c805f0e18d6cbe577d77bae80e 100644 (file)
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
DstSubIdx = CopyMI->getOperand(3).getImm();
SrcReg = CopyMI->getOperand(2).getReg();
} else if (!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)){
- assert(0 && "Unrecognized copy instruction!");
- return false;
+ LLVM_UNREACHABLE("Unrecognized copy instruction!");
}
// If they are already joined we continue.
@@ -2051,7 +2051,7 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){
*tri_->getSuperRegisters(LHS.reg))
// Imprecise sub-register information. Can't handle it.
return false;
- assert(0 && "No copies from the RHS?");
+ LLVM_UNREACHABLE("No copies from the RHS?");
} else {
LHSValNo = EliminatedLHSVals[0];
}
index 48558fe74fca76664dd0e1f29ae057d8802108cc..7a8b39a799432bbe186931aa5bd3b9b89f19dd0b 100644 (file)
#define DEBUG_TYPE "virtregrewriter"
#include "VirtRegRewriter.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
// Unfold current MI.
SmallVector<MachineInstr*, 4> NewMIs;
if (!TII->unfoldMemoryOperand(MF, &MI, VirtReg, false, false, NewMIs))
- assert(0 && "Unable unfold the load / store folding instruction!");
+ LLVM_UNREACHABLE("Unable unfold the load / store folding instruction!");
assert(NewMIs.size() == 1);
AssignPhysToVirtReg(NewMIs[0], VirtReg, PhysReg);
VRM.transferRestorePts(&MI, NewMIs[0]);
NextMII = next(NextMII);
NewMIs.clear();
if (!TII->unfoldMemoryOperand(MF, &NextMI, VirtReg, false, false, NewMIs))
- assert(0 && "Unable unfold the load / store folding instruction!");
+ LLVM_UNREACHABLE("Unable unfold the load / store folding instruction!");
assert(NewMIs.size() == 1);
AssignPhysToVirtReg(NewMIs[0], VirtReg, PhysReg);
VRM.transferRestorePts(&NextMI, NewMIs[0]);
assert(RC && "Unable to determine register class!");
int SS = VRM.getEmergencySpillSlot(RC);
if (UsedSS.count(SS))
- assert(0 && "Need to spill more than one physical registers!");
+ LLVM_UNREACHABLE("Need to spill more than one physical registers!");
UsedSS.insert(SS);
TII->storeRegToStackSlot(MBB, MII, PhysReg, true, SS, RC);
MachineInstr *StoreMI = prior(MII);
llvm::VirtRegRewriter* llvm::createVirtRegRewriter() {
switch (RewriterOpt) {
- default: assert(0 && "Unreachable!");
+ default: LLVM_UNREACHABLE("Unreachable!");
case local:
return new LocalRewriter();
case trivial:
index 7c7456562bb039f4a846e4c9743d75f64e2a4dd7..226cd4fea0a8687473f9778a28ca7d939bb3eaf9 100644 (file)
const_cast<GlobalVariable *>(dyn_cast<GlobalVariable>(GV)))
EmitGlobalVariable(GVar);
else
- assert(0 && "Global hasn't had an address allocated yet!");
+ LLVM_UNREACHABLE("Global hasn't had an address allocated yet!");
return state.getGlobalAddressMap(locked)[GV];
}
GenericValue GV = getConstantValue(Op0);
const Type* DestTy = CE->getType();
switch (Op0->getType()->getTypeID()) {
- default: assert(0 && "Invalid bitcast operand");
+ default: LLVM_UNREACHABLE("Invalid bitcast operand");
case Type::IntegerTyID:
assert(DestTy->isFloatingPoint() && "invalid bitcast");
if (DestTy == Type::FloatTy)
default: LLVM_UNREACHABLE("Bad add type!");
case Type::IntegerTyID:
switch (CE->getOpcode()) {
- default: assert(0 && "Invalid integer opcode");
+ default: LLVM_UNREACHABLE("Invalid integer opcode");
case Instruction::Add: GV.IntVal = LHS.IntVal + RHS.IntVal; break;
case Instruction::Sub: GV.IntVal = LHS.IntVal - RHS.IntVal; break;
case Instruction::Mul: GV.IntVal = LHS.IntVal * RHS.IntVal; break;
case Type::FP128TyID: {
APFloat apfLHS = APFloat(LHS.IntVal);
switch (CE->getOpcode()) {
- default: assert(0 && "Invalid long double opcode");llvm_unreachable();
+ default: LLVM_UNREACHABLE("Invalid long double opcode");llvm_unreachable();
case Instruction::FAdd:
apfLHS.add(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven);
GV.IntVal = apfLHS.bitcastToAPInt();
else if (const GlobalVariable* GV = dyn_cast<GlobalVariable>(C))
Result = PTOGV(getOrEmitGlobalVariable(const_cast<GlobalVariable*>(GV)));
else
- assert(0 && "Unknown constant pointer type!");
+ LLVM_UNREACHABLE("Unknown constant pointer type!");
break;
default:
std::string msg;
}
cerr << "Bad Type: " << *Init->getType() << "\n";
- assert(0 && "Unknown constant type to initialize memory with!");
+ LLVM_UNREACHABLE("Unknown constant type to initialize memory with!");
}
/// EmitGlobals - Emit all of the global variables to memory, storing their
diff --git a/lib/ExecutionEngine/ExecutionEngineBindings.cpp b/lib/ExecutionEngine/ExecutionEngineBindings.cpp
index 401a22647e1d849c8591263a69ea03a287e26959..43389e0bbfe831d515169a86e90db545279d1d36 100644 (file)
#include "llvm-c/ExecutionEngine.h"
#include "llvm/ExecutionEngine/GenericValue.h"
#include "llvm/ExecutionEngine/ExecutionEngine.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstring>
using namespace llvm;
GenVal->DoubleVal = N;
break;
default:
- assert(0 && "LLVMGenericValueToFloat supports only float and double.");
- break;
+ LLVM_UNREACHABLE("LLVMGenericValueToFloat supports only float and double.");
}
return wrap(GenVal);
}
case Type::DoubleTyID:
return unwrap(GenVal)->DoubleVal;
default:
- assert(0 && "LLVMGenericValueToFloat supports only float and double.");
+ LLVM_UNREACHABLE("LLVMGenericValueToFloat supports only float and double.");
break;
}
return 0; // Not reached
diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp
index 872bfeb737d55978e5846a1a9827ff650022cc5f..4a6cafefac0f464f77297d7def89852a97e71cb1 100644 (file)
@@ -1079,7 +1079,7 @@ GenericValue Interpreter::executeBitCastInst(Value *SrcVal, const Type *DstTy,
} else if (SrcTy->isInteger()) {
Dest.IntVal = Src.IntVal;
} else
- assert(0 && "Invalid BitCast");
+ LLVM_UNREACHABLE("Invalid BitCast");
} else if (DstTy == Type::FloatTy) {
if (SrcTy->isInteger())
Dest.FloatVal = Src.IntVal.bitsToFloat();
@@ -1091,7 +1091,7 @@ GenericValue Interpreter::executeBitCastInst(Value *SrcVal, const Type *DstTy,
else
Dest.DoubleVal = Src.DoubleVal;
} else
- assert(0 && "Invalid Bitcast");
+ LLVM_UNREACHABLE("Invalid Bitcast");
return Dest;
}
DOUT << " --> ";
const GenericValue &Val = SF.Values[&I];
switch (I.getType()->getTypeID()) {
- default: assert(0 && "Invalid GenericValue Type");
+ default: LLVM_UNREACHABLE("Invalid GenericValue Type");
case Type::VoidTyID: DOUT << "void"; break;
case Type::FloatTyID: DOUT << "float " << Val.FloatVal; break;
case Type::DoubleTyID: DOUT << "double " << Val.DoubleVal; break;
diff --git a/lib/ExecutionEngine/Interpreter/Interpreter.h b/lib/ExecutionEngine/Interpreter/Interpreter.h
index d56161f2945aa66a13e784fa63420a34956e4a29..f9d4770d4bd4dc484b36830c7f65b40ce8da5097 100644 (file)
#include "llvm/Support/CallSite.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
void visitLoadInst(LoadInst &I);
void visitStoreInst(StoreInst &I);
void visitGetElementPtrInst(GetElementPtrInst &I);
- void visitPHINode(PHINode &PN) { assert(0 && "PHI nodes already handled!"); }
+ void visitPHINode(PHINode &PN) {
+ LLVM_UNREACHABLE("PHI nodes already handled!");
+ }
void visitTruncInst(TruncInst &I);
void visitZExtInst(ZExtInst &I);
void visitSExtInst(SExtInst &I);
void visitVAArgInst(VAArgInst &I);
void visitInstruction(Instruction &I) {
cerr << I;
- assert(0 && "Instruction not interpretable yet!");
+ LLVM_UNREACHABLE("Instruction not interpretable yet!");
}
GenericValue callExternalFunction(Function *F,
index f8f3f20fe28771a9fddcbcec9e7769bc59ad51fb..3edea73efe7b2d9399698c01919f89a29998421f 100644 (file)
if (ArgValues.empty()) {
GenericValue rv;
switch (RetTy->getTypeID()) {
- default: assert(0 && "Unknown return type for function call!");
+ default: LLVM_UNREACHABLE("Unknown return type for function call!");
case Type::IntegerTyID: {
unsigned BitWidth = cast<IntegerType>(RetTy)->getBitWidth();
if (BitWidth == 1)
else if (BitWidth <= 64)
rv.IntVal = APInt(BitWidth, ((int64_t(*)())(intptr_t)FPtr)());
else
- assert(0 && "Integer types > 64 bits not supported");
+ LLVM_UNREACHABLE("Integer types > 64 bits not supported");
return rv;
}
case Type::VoidTyID:
case Type::X86_FP80TyID:
case Type::FP128TyID:
case Type::PPC_FP128TyID:
- assert(0 && "long double not supported yet");
+ LLVM_UNREACHABLE("long double not supported yet");
return rv;
case Type::PointerTyID:
return PTOGV(((void*(*)())(intptr_t)FPtr)());
const Type *ArgTy = FTy->getParamType(i);
const GenericValue &AV = ArgValues[i];
switch (ArgTy->getTypeID()) {
- default: assert(0 && "Unknown argument type for function call!");
+ default: LLVM_UNREACHABLE("Unknown argument type for function call!");
case Type::IntegerTyID:
C = ConstantInt::get(AV.IntVal);
break;
diff --git a/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp b/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
index e101ef371ed0458a2c03f4899fa5fb0065d11b9e..86218f776cf9f0bb15312fd245afa31247d24e3d 100644 (file)
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/ExecutionEngine/JITMemoryManager.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetInstrInfo.h"
JCE->emitULEB128Bytes(Offset);
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
JCE->emitByte(dwarf::DW_CFA_def_cfa_register);
JCE->emitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), true));
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else {
unsigned Reg = RI->getDwarfRegNum(Src.getReg(), true);
FinalSize += TargetAsmInfo::getULEB128Size(Offset);
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
unsigned RegNum = RI->getDwarfRegNum(Dst.getReg(), true);
FinalSize += TargetAsmInfo::getULEB128Size(RegNum);
} else {
- assert(0 && "Machine move no supported yet.");
+ LLVM_UNREACHABLE("Machine move no supported yet.");
}
} else {
unsigned Reg = RI->getDwarfRegNum(Src.getReg(), true);
index dc0f7c17bf42dbe6150ad4be8cc384b8ae55cd1a..a4e7db5017b7713f69676d33cb0e968d60d14531 100644 (file)
--- a/lib/Linker/LinkItems.cpp
+++ b/lib/Linker/LinkItems.cpp
#include "llvm/Linker.h"
#include "llvm/Module.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Bitcode/ReaderWriter.h"
std::string Magic;
Pathname.getMagicNumber(Magic, 64);
switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
- default: assert(0 && "Bad file type identification");
+ default: LLVM_UNREACHABLE("Bad file type identification");
case sys::Unknown_FileType:
return warning("Supposed library '" + Lib + "' isn't a library.");
std::string Magic;
File.getMagicNumber(Magic, 64);
switch (sys::IdentifyFileType(Magic.c_str(), 64)) {
- default: assert(0 && "Bad file type identification");
+ default: LLVM_UNREACHABLE("Bad file type identification");
case sys::Unknown_FileType:
return warning("Ignoring file '" + File.toString() +
"' because does not contain bitcode.");
index a69f724bccefabd1e83ac96d47a121f5a373d2c3..3b1fcebffcf7cb5f221491e1f13fb5cfda984f7b 100644 (file)
#include "llvm/Instructions.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/Streams.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/System/Path.h"
#include "llvm/ADT/DenseMap.h"
#include <sstream>
Result = CE->getWithOperands(Ops);
} else {
assert(!isa<GlobalValue>(CPV) && "Unmapped global?");
- assert(0 && "Unknown type of derived type constant value!");
+ LLVM_UNREACHABLE("Unknown type of derived type constant value!");
}
} else if (isa<InlineAsm>(In)) {
Result = const_cast<Value*>(In);
PrintMap(ValueMap);
cerr << "Couldn't remap value: " << (void*)In << " " << *In << "\n";
- assert(0 && "Couldn't remap value!");
+ LLVM_UNREACHABLE("Couldn't remap value!");
#endif
return 0;
}
// Nothing is required, mapped values will take the new global
// automatically.
} else if (DGVar->hasAppendingLinkage()) {
- assert(0 && "Appending linkage unimplemented!");
+ LLVM_UNREACHABLE("Appending linkage unimplemented!");
} else {
- assert(0 && "Unknown linkage!");
+ LLVM_UNREACHABLE("Unknown linkage!");
}
} else {
// Copy the initializer over now...
index 9640fd9121cbbf2401d264d695667d1c22434a81..172ae9ec958b8a687ab37977c3553054bd020774 100644 (file)
--- a/lib/MC/MCAsmStreamer.cpp
+++ b/lib/MC/MCAsmStreamer.cpp
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCValue.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
+
using namespace llvm;
namespace {
// Need target hooks to know how to print this.
switch (Size) {
default:
- assert(0 && "Invalid size for machine code value!");
+ LLVM_UNREACHABLE("Invalid size for machine code value!");
case 1: OS << ".byte"; break;
case 2: OS << ".short"; break;
case 4: OS << ".long"; break;
switch (ValueSize) {
default:
- assert(0 && "Invalid size for machine code value!");
+ LLVM_UNREACHABLE("Invalid size for machine code value!");
case 8:
- assert(0 && "Unsupported alignment size!");
+ LLVM_UNREACHABLE("Unsupported alignment size!");
case 1: OS << (IsPow2 ? ".p2align" : ".balign"); break;
case 2: OS << (IsPow2 ? ".p2alignw" : ".balignw"); break;
case 4: OS << (IsPow2 ? ".p2alignl" : ".balignl"); break;
index 3b03c54e9764155953d6bbf752170e2c45dcb5b5..29bf0b4c35f2fcd9e918a1939aca2fd9722d654d 100644 (file)
--- a/lib/Support/APFloat.cpp
+++ b/lib/Support/APFloat.cpp
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/FoldingSet.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cstring>
switch (rounding_mode) {
default:
- assert(0);
+ llvm_unreachable();
case rmNearestTiesToAway:
return lost_fraction == lfExactlyHalf || lost_fraction == lfMoreThanHalf;
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
{
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
switch (convolve(category, rhs.category)) {
default:
- assert(0);
+ llvm_unreachable();
case convolve(fcNaN, fcZero):
case convolve(fcNaN, fcNormal):
else if (api.getBitWidth()==128 && !isIEEE)
return initFromPPCDoubleDoubleAPInt(api);
else
- assert(0);
+ llvm_unreachable();
}
APFloat::APFloat(const APInt& api, bool isIEEE)
diff --git a/lib/Support/APInt.cpp b/lib/Support/APInt.cpp
index 30dc3526abd43eea7bc5a324ec04f459e52219b7..bd5abecd6740671cef4be9384b5089edfb675b88 100644 (file)
--- a/lib/Support/APInt.cpp
+++ b/lib/Support/APInt.cpp
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <cmath>
else
return x_old + 1;
} else
- assert(0 && "Error in APInt::sqrt computation");
+ LLVM_UNREACHABLE("Error in APInt::sqrt computation");
return x_old + 1;
}
char cdigit = str[i];
if (radix == 16) {
if (!isxdigit(cdigit))
- assert(0 && "Invalid hex digit in string");
+ LLVM_UNREACHABLE("Invalid hex digit in string");
if (isdigit(cdigit))
digit = cdigit - '0';
else if (cdigit >= 'a')
else if (cdigit >= 'A')
digit = cdigit - 'A' + 10;
else
- assert(0 && "huh? we shouldn't get here");
+ LLVM_UNREACHABLE("huh? we shouldn't get here");
} else if (isdigit(cdigit)) {
digit = cdigit - '0';
assert((radix == 10 ||
(radix == 2 && (digit == 0 || digit == 1))) &&
"Invalid digit in string for given radix");
} else {
- assert(0 && "Invalid character in digit string");
+ LLVM_UNREACHABLE("Invalid character in digit string");
}
// Shift or multiply the value by the radix
index 0fe949c877239c9b3ff9c59d652c85dc608b1d27..400241f4d4bb92585fa59ec624b652b93a3bc55e 100644 (file)
ValNo++;
break;
default:
- assert(0 && "Internal error, unexpected NumOccurrences flag in "
+ LLVM_UNREACHABLE("Internal error, unexpected NumOccurrences flag in "
"positional argument processing!");
}
}
diff --git a/lib/Support/Dwarf.cpp b/lib/Support/Dwarf.cpp
index fa99035b679f287c9d17c06c0b15e610fe8971c5..c2ce680d89dfa1700761c3c5861c451ce5f7abd1 100644 (file)
--- a/lib/Support/Dwarf.cpp
+++ b/lib/Support/Dwarf.cpp
//===----------------------------------------------------------------------===//
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
case DW_TAG_lo_user: return "DW_TAG_lo_user";
case DW_TAG_hi_user: return "DW_TAG_hi_user";
}
- assert(0 && "Unknown Dwarf Tag");
+ LLVM_UNREACHABLE("Unknown Dwarf Tag");
return "";
}
case DW_CHILDREN_no: return "CHILDREN_no";
case DW_CHILDREN_yes: return "CHILDREN_yes";
}
- assert(0 && "Unknown Dwarf ChildrenFlag");
+ LLVM_UNREACHABLE("Unknown Dwarf ChildrenFlag");
return "";
}
case DW_AT_APPLE_major_runtime_vers: return "DW_AT_APPLE_major_runtime_vers";
case DW_AT_APPLE_runtime_class: return "DW_AT_APPLE_runtime_class";
}
- assert(0 && "Unknown Dwarf Attribute");
+ LLVM_UNREACHABLE("Unknown Dwarf Attribute");
return "";
}
case DW_FORM_ref_udata: return "FORM_ref_udata";
case DW_FORM_indirect: return "FORM_indirect";
}
- assert(0 && "Unknown Dwarf Form Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Form Encoding");
return "";
}
case DW_OP_lo_user: return "OP_lo_user";
case DW_OP_hi_user: return "OP_hi_user";
}
- assert(0 && "Unknown Dwarf Operation Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Operation Encoding");
return "";
}
case DW_ATE_lo_user: return "ATE_lo_user";
case DW_ATE_hi_user: return "ATE_hi_user";
}
- assert(0 && "Unknown Dwarf Attribute Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Attribute Encoding");
return "";
}
case DW_DS_leading_separate: return "DS_leading_separate";
case DW_DS_trailing_separate: return "DS_trailing_separate";
}
- assert(0 && "Unknown Dwarf Decimal Sign Attribute");
+ LLVM_UNREACHABLE("Unknown Dwarf Decimal Sign Attribute");
return "";
}
case DW_END_lo_user: return "END_lo_user";
case DW_END_hi_user: return "END_hi_user";
}
- assert(0 && "Unknown Dwarf Endianity");
+ LLVM_UNREACHABLE("Unknown Dwarf Endianity");
return "";
}
case DW_ACCESS_protected: return "ACCESS_protected";
case DW_ACCESS_private: return "ACCESS_private";
}
- assert(0 && "Unknown Dwarf Accessibility");
+ LLVM_UNREACHABLE("Unknown Dwarf Accessibility");
return "";
}
case DW_VIS_exported: return "VIS_exported";
case DW_VIS_qualified: return "VIS_qualified";
}
- assert(0 && "Unknown Dwarf Visibility");
+ LLVM_UNREACHABLE("Unknown Dwarf Visibility");
return "";
}
case DW_VIRTUALITY_virtual: return "VIRTUALITY_virtual";
case DW_VIRTUALITY_pure_virtual: return "VIRTUALITY_pure_virtual";
}
- assert(0 && "Unknown Dwarf Virtuality");
+ LLVM_UNREACHABLE("Unknown Dwarf Virtuality");
return "";
}
case DW_LANG_lo_user: return "LANG_lo_user";
case DW_LANG_hi_user: return "LANG_hi_user";
}
- assert(0 && "Unknown Dwarf Language");
+ LLVM_UNREACHABLE("Unknown Dwarf Language");
return "";
}
case DW_ID_down_case: return "ID_down_case";
case DW_ID_case_insensitive: return "ID_case_insensitive";
}
- assert(0 && "Unknown Dwarf Identifier Case");
+ LLVM_UNREACHABLE("Unknown Dwarf Identifier Case");
return "";
}
case DW_CC_lo_user: return "CC_lo_user";
case DW_CC_hi_user: return "CC_hi_user";
}
- assert(0 && "Unknown Dwarf Calling Convention");
+ LLVM_UNREACHABLE("Unknown Dwarf Calling Convention");
return "";
}
case DW_INL_declared_not_inlined: return "INL_declared_not_inlined";
case DW_INL_declared_inlined: return "INL_declared_inlined";
}
- assert(0 && "Unknown Dwarf Inline Code");
+ LLVM_UNREACHABLE("Unknown Dwarf Inline Code");
return "";
}
case DW_ORD_row_major: return "ORD_row_major";
case DW_ORD_col_major: return "ORD_col_major";
}
- assert(0 && "Unknown Dwarf Array Order");
+ LLVM_UNREACHABLE("Unknown Dwarf Array Order");
return "";
}
case DW_DSC_label: return "DSC_label";
case DW_DSC_range: return "DSC_range";
}
- assert(0 && "Unknown Dwarf Discriminant Descriptor");
+ LLVM_UNREACHABLE("Unknown Dwarf Discriminant Descriptor");
return "";
}
case DW_LNS_set_epilogue_begin: return "LNS_set_epilogue_begin";
case DW_LNS_set_isa: return "LNS_set_isa";
}
- assert(0 && "Unknown Dwarf Line Number Standard");
+ LLVM_UNREACHABLE("Unknown Dwarf Line Number Standard");
return "";
}
case DW_LNE_lo_user: return "LNE_lo_user";
case DW_LNE_hi_user: return "LNE_hi_user";
}
- assert(0 && "Unknown Dwarf Line Number Extended Opcode Encoding");
+ LLVM_UNREACHABLE("Unknown Dwarf Line Number Extended Opcode Encoding");
return "";
}
case DW_MACINFO_end_file: return "MACINFO_end_file";
case DW_MACINFO_vendor_ext: return "MACINFO_vendor_ext";
}
- assert(0 && "Unknown Dwarf Macinfo Type Encodings");
+ LLVM_UNREACHABLE("Unknown Dwarf Macinfo Type Encodings");
return "";
}
case DW_CFA_lo_user: return "CFA_lo_user";
case DW_CFA_hi_user: return "CFA_hi_user";
}
- assert(0 && "Unknown Dwarf Call Frame Instruction Encodings");
+ LLVM_UNREACHABLE("Unknown Dwarf Call Frame Instruction Encodings");
return "";
}
index 2a5d906c87893200e4d5920caad990b1ce001285..f2e247c5274779868efd673b974b8c86c5514572 100644 (file)
exit(1);
}
-void llvm_unreachable(void) {
+void llvm_unreachable(const char *msg) {
+ if (msg)
+ errs() << msg << "\n";
abort();
}
}
index 41c730e3e1e62ed56f0994150f81cd6ab702a1d3..0f61067d60df220ac992afa9be237210ab6304ba 100644 (file)
//===----------------------------------------------------------------------===//
#include "llvm/ADT/FoldingSet.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <cstring>
else if (sizeof(long) == sizeof(long long)) {
AddInteger((unsigned long long)I);
} else {
- assert(0 && "unexpected sizeof(long)");
+ LLVM_UNREACHABLE("unexpected sizeof(long)");
}
}
void FoldingSetNodeID::AddInteger(long long I) {
diff --git a/lib/Target/ARM/ARM.h b/lib/Target/ARM/ARM.h
index 0e654d8e64d61c98cb5b219afa041b0ea772c449..471c212583caba3cab5191e729c61aec97705b19 100644 (file)
--- a/lib/Target/ARM/ARM.h
+++ b/lib/Target/ARM/ARM.h
#ifndef TARGET_ARM_H
#define TARGET_ARM_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
inline static CondCodes getOppositeCondition(CondCodes CC){
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case EQ: return NE;
case NE: return EQ;
case HS: return LO;
inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case ARMCC::EQ: return "eq";
case ARMCC::NE: return "ne";
case ARMCC::HS: return "hs";
index 6b90b73d13d3c52484fc997faa1bda1d867c2e8a..40e3e8690f347d56b0340f41cd7fdfa2161e2218 100644 (file)
#define LLVM_TARGET_ARM_ARMADDRESSINGMODES_H
#include "llvm/CodeGen/SelectionDAGNodes.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
static inline const char *getShiftOpcStr(ShiftOpc Op) {
switch (Op) {
- default: assert(0 && "Unknown shift opc!");
+ default: LLVM_UNREACHABLE("Unknown shift opc!");
case ARM_AM::asr: return "asr";
case ARM_AM::lsl: return "lsl";
case ARM_AM::lsr: return "lsr";
static inline const char *getAMSubModeStr(AMSubMode Mode) {
switch (Mode) {
- default: assert(0 && "Unknown addressing sub-mode!");
+ default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
case ARM_AM::ia: return "ia";
case ARM_AM::ib: return "ib";
case ARM_AM::da: return "da";
static inline const char *getAMSubModeAltStr(AMSubMode Mode, bool isLD) {
switch (Mode) {
- default: assert(0 && "Unknown addressing sub-mode!");
+ default: LLVM_UNREACHABLE("Unknown addressing sub-mode!");
case ARM_AM::ia: return isLD ? "fd" : "ea";
case ARM_AM::ib: return isLD ? "ed" : "fa";
case ARM_AM::da: return isLD ? "fa" : "ed";
index d7ba73c3e4bf80c7d2eb33ddf04ffbec6943bdfc..9bca6a787da2ab08afd204ed334b774e48401516 100644 (file)
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
static cl::opt<bool>
return 0;
switch (MI->getOpcode()) {
default:
- assert(0 && "Unknown or unset size field for instr!");
- break;
+ LLVM_UNREACHABLE("Unknown or unset size field for instr!");
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::DECLARE:
case TargetInstrInfo::DBG_LABEL:
index 377de19456c8d9599658a50fce19094b43d3c5f0..c93473d62e630bbcb164722c4a8b766e930efe6f 100644 (file)
}
unsigned ARMBaseRegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned ARMBaseRegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
index 34c9d70e6948a85c56befbfa30f2f5f53b49b42d..1f2376e638fe04e855441768f669e2ead323b20e 100644 (file)
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Statistic.h"
Bits = 8; // Taking the address of a CP entry.
break;
}
- assert(0 && "Unknown addressing mode for CP reference!");
+ LLVM_UNREACHABLE("Unknown addressing mode for CP reference!");
case ARMII::AddrMode1: // AM1: 8 bits << 2
Bits = 8;
Scale = 4; // Taking the address of a CP entry.
index 5c604a92cf422e8318b8275eda80a544c0880224..dec7a72bedaaff5cbf7478a2965e951a9c48c6fc 100644 (file)
/// IntCCToARMCC - Convert a DAG integer condition code to an ARM CC
static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code!");
+ default: LLVM_UNREACHABLE("Unknown condition code!");
case ISD::SETNE: return ARMCC::NE;
case ISD::SETEQ: return ARMCC::EQ;
case ISD::SETGT: return ARMCC::GT;
bool Invert = false;
CondCode2 = ARMCC::AL;
switch (CC) {
- default: assert(0 && "Unknown FP condition!");
+ default: LLVM_UNREACHABLE("Unknown FP condition!");
case ISD::SETEQ:
case ISD::SETOEQ: CondCode = ARMCC::EQ; break;
case ISD::SETGT:
bool Return) const {
switch (CC) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::Fast:
// Use target triple & subtarget features to do actual dispatch.
}
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::BCvt:
Val = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), Val);
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
SDValue Arg = Op.getOperand(realRVLocIdx*2+1);
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::BCvt:
Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg);
// to 32 bits. Insert an assert[sz]ext to capture this, then
// truncate to the right size.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::BCvt:
ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue);
if (Op.getOperand(1).getValueType().isFloatingPoint()) {
switch (SetCCOpcode) {
- default: assert(0 && "Illegal FP comparison"); break;
+ default: LLVM_UNREACHABLE("Illegal FP comparison"); break;
case ISD::SETUNE:
case ISD::SETNE: Invert = true; // Fallthrough
case ISD::SETOEQ:
} else {
// Integer comparisons.
switch (SetCCOpcode) {
- default: assert(0 && "Illegal integer comparison"); break;
+ default: LLVM_UNREACHABLE("Illegal integer comparison"); break;
case ISD::SETNE: Invert = true;
case ISD::SETEQ: Opc = ARMISD::VCEQ; break;
case ISD::SETLT: Swap = true;
}
default:
- assert(0 && "unexpected size for isVMOVSplat");
+ LLVM_UNREACHABLE("unexpected size for isVMOVSplat");
break;
}
@@ -2191,7 +2191,7 @@ static SDValue BuildSplat(SDValue Val, MVT VT, SelectionDAG &DAG, DebugLoc dl) {
case 16: CanonicalVT = MVT::v4i16; break;
case 32: CanonicalVT = MVT::v2i32; break;
case 64: CanonicalVT = MVT::v1i64; break;
- default: assert(0 && "unexpected splat element type"); break;
+ default: LLVM_UNREACHABLE("unexpected splat element type"); break;
}
} else {
assert(VT.is128BitVector() && "unknown splat vector size");
@@ -2200,7 +2200,7 @@ static SDValue BuildSplat(SDValue Val, MVT VT, SelectionDAG &DAG, DebugLoc dl) {
case 16: CanonicalVT = MVT::v8i16; break;
case 32: CanonicalVT = MVT::v4i32; break;
case 64: CanonicalVT = MVT::v2i64; break;
- default: assert(0 && "unexpected splat element type"); break;
+ default: LLVM_UNREACHABLE("unexpected splat element type"); break;
}
}
SelectionDAG &DAG) {
switch (N->getOpcode()) {
default:
- assert(0 && "Don't know how to custom expand this!");
+ LLVM_UNREACHABLE("Don't know how to custom expand this!");
return;
case ISD::BIT_CONVERT:
Results.push_back(ExpandBIT_CONVERT(N, DAG));
LLVM_UNREACHABLE("invalid shift count for narrowing vector shift intrinsic");
default:
- assert(0 && "unhandled vector shift");
+ LLVM_UNREACHABLE("unhandled vector shift");
}
switch (IntNo) {
int64_t Cnt;
switch (N->getOpcode()) {
- default: assert(0 && "unexpected shift opcode");
+ default: LLVM_UNREACHABLE("unexpected shift opcode");
case ISD::SHL:
if (isVShiftLImm(N->getOperand(1), VT, false, Cnt))
unsigned Opc = 0;
switch (N->getOpcode()) {
- default: assert(0 && "unexpected opcode");
+ default: LLVM_UNREACHABLE("unexpected opcode");
case ISD::SIGN_EXTEND:
Opc = ARMISD::VGETLANEs;
break;
index 6fa05fc10867e7bdb1995fa38bb4f2993525b373..977e621b6502e69e6df8f897f225ee91ae4b883a 100644 (file)
bool rev = false;
bool inv = false;
switch(CC) {
- default: DEBUG(N->dump(CurDAG)); assert(0 && "Unknown FP comparison!");
+ default: DEBUG(N->dump(CurDAG)); LLVM_UNREACHABLE("Unknown FP comparison!");
case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ:
Opc = Alpha::CMPTEQ; break;
case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT:
} else if (TypeOperands[i] == MVT::f64) {
Opc = Alpha::STT;
} else
- assert(0 && "Unknown operand");
+ LLVM_UNREACHABLE("Unknown operand");
SDValue Ops[] = { CallOperands[i], getI64Imm((i - 6) * 8),
CurDAG->getCopyFromReg(Chain, dl, Alpha::R30, MVT::i64),
CallOperands[i], InFlag);
InFlag = Chain.getValue(1);
} else
- assert(0 && "Unknown operand");
+ LLVM_UNREACHABLE("Unknown operand");
}
// Finally, once everything is in registers to pass to the call, emit the
std::vector<SDValue> CallResults;
switch (N->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected ret value!");
+ default: LLVM_UNREACHABLE("Unexpected ret value!");
case MVT::Other: break;
case MVT::i64:
Chain = CurDAG->getCopyFromReg(Chain, dl,
index 49fb262b5a84741f5d985bd3ea78e4c04064b7bd..289353631e8e557e88a0972d3fe81478e44c789c 100644 (file)
for (unsigned i = 0, e = Args.size(); i != e; ++i)
{
switch (getValueType(Args[i].Ty).getSimpleVT()) {
- default: assert(0 && "Unexpected ValueType for argument!");
+ default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
SDValue AlphaTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
DebugLoc dl = Op.getDebugLoc();
switch (Op.getOpcode()) {
- default: assert(0 && "Wasn't expecting to be able to lower this!");
+ default: LLVM_UNREACHABLE("Wasn't expecting to be able to lower this!");
case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG,
VarArgsBase,
VarArgsOffset);
return Lo;
}
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for Alpha.");
+ LLVM_UNREACHABLE("TLS not implemented for Alpha.");
case ISD::GlobalAddress: {
GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
GlobalValue *GV = GSDN->getGlobal();
index 62b5d4c301265430de181a7dac9bfa552de73d3a..139a4db655c859b5de4af193ac5116bb2e3737da 100644 (file)
case Alpha::FBLE: return Alpha::FBGT;
case Alpha::FBLT: return Alpha::FBGE;
default:
- assert(0 && "Unknown opcode");
+ LLVM_UNREACHABLE("Unknown opcode");
}
return 0; // Not reached
}
index c62ab75523ffe2c18bc821021c5f68ce5ecb77e4..8919dc0492b39d0d3bbdf6578acc9792bff28e10 100644 (file)
void AlphaJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
//FIXME
- assert(0);
+ llvm_unreachable();
}
static TargetJITInfo::JITCompilerFn JITCompilerFunction;
long idx = 0;
bool doCommon = true;
switch ((Alpha::RelocationType)MR->getRelocationType()) {
- default: assert(0 && "Unknown relocation type!");
+ default: LLVM_UNREACHABLE("Unknown relocation type!");
case Alpha::reloc_literal:
//This is a LDQl
idx = MR->getGOTIndex();
DOUT << "LDA: " << idx << "\n";
break;
default:
- assert(0 && "Cannot handle gpdist yet");
+ LLVM_UNREACHABLE("Cannot handle gpdist yet");
}
break;
case Alpha::reloc_bsr: {
index 1194a0fe3b7dc4781b7d5d3e1488d6c31deb8dd9..f1e651c6a805894ee2eea08146f981a482a3d17f 100644 (file)
}
unsigned AlphaRegisterInfo::getRARegister() const {
- assert(0 && "What is the return address register");
+ LLVM_UNREACHABLE("What is the return address register");
return 0;
}
}
unsigned AlphaRegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned AlphaRegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
diff --git a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
index 11f177dd27991c189a607e3a2aed45f042c41d93..cc278b73118a1ff5d889613d5b494314dc04798b 100644 (file)
EmitAlignment(MF.getAlignment(), F);
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
break;
index 70495d07268588184f10aed08e1012b20f10dc1e..f922146cd06bccb2377291c77f927068be25b0c3 100644 (file)
void visitBranchInst(BranchInst &I);
void visitSwitchInst(SwitchInst &I);
void visitInvokeInst(InvokeInst &I) {
- assert(0 && "Lowerinvoke pass didn't work!");
+ LLVM_UNREACHABLE("Lowerinvoke pass didn't work!");
}
void visitUnwindInst(UnwindInst &I) {
- assert(0 && "Lowerinvoke pass didn't work!");
+ LLVM_UNREACHABLE("Lowerinvoke pass didn't work!");
}
void visitUnreachableInst(UnreachableInst &I);
Out << ')';
break;
default:
- assert(0 && "Invalid cast opcode");
+ LLVM_UNREACHABLE("Invalid cast opcode");
}
// Print the source type cast
case Instruction::FPToUI:
break; // These don't need a source cast.
default:
- assert(0 && "Invalid cast opcode");
+ LLVM_UNREACHABLE("Invalid cast opcode");
break;
}
}
case ICmpInst::ICMP_UGT: Out << " > "; break;
case ICmpInst::ICMP_SGE:
case ICmpInst::ICMP_UGE: Out << " >= "; break;
- default: assert(0 && "Illegal ICmp predicate");
+ default: LLVM_UNREACHABLE("Illegal ICmp predicate");
}
break;
- default: assert(0 && "Illegal opcode here!");
+ default: LLVM_UNREACHABLE("Illegal opcode here!");
}
printConstantWithCast(CE->getOperand(1), CE->getOpcode());
if (NeedsClosingParens)
else {
const char* op = 0;
switch (CE->getPredicate()) {
- default: assert(0 && "Illegal FCmp predicate");
+ default: LLVM_UNREACHABLE("Illegal FCmp predicate");
case FCmpInst::FCMP_ORD: op = "ord"; break;
case FCmpInst::FCMP_UNO: op = "uno"; break;
case FCmpInst::FCMP_UEQ: op = "ueq"; break;
<< "}; /* Long double constant */\n";
} else {
- assert(0 && "Unknown float type!");
+ LLVM_UNREACHABLE("Unknown float type!");
}
}
const char* op = 0;
switch (I.getPredicate()) {
- default: assert(0 && "Illegal FCmp predicate");
+ default: LLVM_UNREACHABLE("Illegal FCmp predicate");
case FCmpInst::FCMP_ORD: op = "ord"; break;
case FCmpInst::FCMP_UNO: op = "uno"; break;
case FCmpInst::FCMP_UEQ: op = "ueq"; break;
static const char * getFloatBitCastField(const Type *Ty) {
switch (Ty->getTypeID()) {
- default: assert(0 && "Invalid Type");
+ default: LLVM_UNREACHABLE("Invalid Type");
case Type::FloatTyID: return "Float";
case Type::DoubleTyID: return "Double";
case Type::IntegerTyID: {
Out << ')';
// Multiple GCC builtins multiplex onto this intrinsic.
switch (cast<ConstantInt>(I.getOperand(3))->getZExtValue()) {
- default: assert(0 && "Invalid llvm.x86.sse.cmp!");
+ default: LLVM_UNREACHABLE("Invalid llvm.x86.sse.cmp!");
case 0: Out << "__builtin_ia32_cmpeq"; break;
case 1: Out << "__builtin_ia32_cmplt"; break;
case 2: Out << "__builtin_ia32_cmple"; break;
}
void CWriter::visitMallocInst(MallocInst &I) {
- assert(0 && "lowerallocations pass didn't work!");
+ LLVM_UNREACHABLE("lowerallocations pass didn't work!");
}
void CWriter::visitAllocaInst(AllocaInst &I) {
}
void CWriter::visitFreeInst(FreeInst &I) {
- assert(0 && "lowerallocations pass didn't work!");
+ LLVM_UNREACHABLE("lowerallocations pass didn't work!");
}
void CWriter::printGEPExpression(Value *Ptr, gep_type_iterator I,
diff --git a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
index 4d516438defde116dec41fa9fe3522a4cc29f72c..cc2965f1ecfa612769bd8e8b227b9a6b42f2fab1 100644 (file)
&& "Invalid negated immediate rotate 7-bit argument");
O << -value;
} else {
- assert(0 &&"Invalid/non-immediate rotate amount in printRotateNeg7Imm");
+ LLVM_UNREACHABLE("Invalid/non-immediate rotate amount in printRotateNeg7Imm");
}
}
&& "Invalid negated immediate rotate 7-bit argument");
O << -value;
} else {
- assert(0 &&"Invalid/non-immediate rotate amount in printRotateNeg7Imm");
+ LLVM_UNREACHABLE("Invalid/non-immediate rotate amount in printRotateNeg7Imm");
}
}
EmitAlignment(MF.getAlignment(), F);
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage: // Symbols default to internal.
break;
index f9801d53494dc2d2f152b5ba8fca9294c35fed44..ddb9a36885eafea946f4c20c3d800d1ee2f342e6 100644 (file)
break;
case 'v': // not offsetable
#if 1
- assert(0 && "InlineAsmMemoryOperand 'v' constraint not handled.");
+ LLVM_UNREACHABLE("InlineAsmMemoryOperand 'v' constraint not handled.");
#else
SelectAddrIdxOnly(Op, Op, Op0, Op1);
#endif
index fe28b631bf829493de79c045ec80e217bfd3aed0..58a9b3a467160b161245c32c1ac5b13141702d0b 100644 (file)
}
}
- assert(0 &&
+ LLVM_UNREACHABLE(
"LowerConstantPool: Relocation model other than static"
" not supported.");
return SDValue();
}
}
- assert(0 &&
+ LLVM_UNREACHABLE(
"LowerJumpTable: Relocation model other than static not supported.");
return SDValue();
}
PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
switch (Arg.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected ValueType for argument!");
+ default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
case MVT::i8:
case MVT::i16:
case MVT::i32:
// If the call has results, copy the values out of the ret val registers.
switch (TheCall->getValueType(0).getSimpleVT()) {
- default: assert(0 && "Unexpected ret value!");
+ default: LLVM_UNREACHABLE("Unexpected ret value!");
case MVT::Other: break;
case MVT::i32:
if (TheCall->getValueType(1) == MVT::i32) {
} else if (EltVT == MVT::i64 || EltVT == MVT::f64) {
V2EltIdx0 = 2;
} else
- assert(0 && "Unhandled vector type in LowerVECTOR_SHUFFLE");
+ LLVM_UNREACHABLE("Unhandled vector type in LowerVECTOR_SHUFFLE");
for (unsigned i = 0; i != MaxElts; ++i) {
if (SVN->getMaskElt(i) < 0)
// Create a constant vector:
switch (Op.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected constant value type in "
+ default: LLVM_UNREACHABLE("Unexpected constant value type in "
"LowerSCALAR_TO_VECTOR");
case MVT::v16i8: n_copies = 16; VT = MVT::i8; break;
case MVT::v8i16: n_copies = 8; VT = MVT::i16; break;
} else {
// Otherwise, copy the value from one register to another:
switch (Op0.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected value type in LowerSCALAR_TO_VECTOR");
+ default: LLVM_UNREACHABLE("Unexpected value type in LowerSCALAR_TO_VECTOR");
case MVT::i8:
case MVT::i16:
case MVT::i32:
// sanity checks:
if (VT == MVT::i8 && EltNo >= 16)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i8 extraction slot > 15");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i8 extraction slot > 15");
else if (VT == MVT::i16 && EltNo >= 8)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i16 extraction slot > 7");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i16 extraction slot > 7");
else if (VT == MVT::i32 && EltNo >= 4)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i32 extraction slot > 4");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i32 extraction slot > 4");
else if (VT == MVT::i64 && EltNo >= 2)
- assert(0 && "SPU LowerEXTRACT_VECTOR_ELT: i64 extraction slot > 2");
+ LLVM_UNREACHABLE("SPU LowerEXTRACT_VECTOR_ELT: i64 extraction slot > 2");
if (EltNo == 0 && (VT == MVT::i32 || VT == MVT::i64)) {
// i32 and i64: Element 0 is the preferred slot
assert(Op.getValueType() == MVT::i8);
switch (Opc) {
default:
- assert(0 && "Unhandled i8 math operator");
+ LLVM_UNREACHABLE("Unhandled i8 math operator");
/*NOTREACHED*/
break;
case ISD::ADD: {
index 06eb5753f71d9dfaa9147156bbb7b05deb070fc3..162e9fd12c3987d5920bdd94a69db330d5b64a2d 100644 (file)
void CppWriter::printVisibilityType(GlobalValue::VisibilityTypes VisType) {
switch (VisType) {
- default: assert(0 && "Unknown GVar visibility");
+ default: LLVM_UNREACHABLE("Unknown GVar visibility");
case GlobalValue::DefaultVisibility:
Out << "GlobalValue::DefaultVisibility";
break;
printConstant(CE->getOperand(0));
Out << "Constant* " << constName << " = ConstantExpr::getCast(";
switch (CE->getOpcode()) {
- default: assert(0 && "Invalid cast opcode");
+ default: LLVM_UNREACHABLE("Invalid cast opcode");
case Instruction::Trunc: Out << "Instruction::Trunc"; break;
case Instruction::ZExt: Out << "Instruction::ZExt"; break;
case Instruction::SExt: Out << "Instruction::SExt"; break;
index d7d675abf255ba1e687b944d885138e0ecf97e58..609497638a04ef59e9f0a1f4d6fdd32a44e4631d 100644 (file)
#include "llvm/Function.h"
#include "llvm/GlobalVariable.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Target/DarwinTargetAsmInfo.h"
#include "llvm/Target/TargetMachine.h"
ConstDataCoalSection:
MergeableConstSection(cast<GlobalVariable>(GV)));
default:
- assert(0 && "Unsuported section kind for global");
+ LLVM_UNREACHABLE("Unsuported section kind for global");
}
// FIXME: Do we have any extra special weird cases?
std::string
DarwinTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
SectionKind::Kind kind) const {
- assert(0 && "Darwin does not use unique sections");
+ LLVM_UNREACHABLE("Darwin does not use unique sections");
return "";
}
index 8f6e96e2751dfec4bba4b7343b2aa5e7dfa1a8fc..b513a604c00dea8d5bae79d0bb265d45f737994d 100644 (file)
#include "llvm/GlobalVariable.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/ELFTargetAsmInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetData.h"
if (const Function *F = dyn_cast<Function>(GV)) {
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE("Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage:
case Function::DLLExportLinkage:
case SectionKind::ThreadBSS:
return TLSBSSSection;
default:
- assert(0 && "Unsuported section kind for global");
+ LLVM_UNREACHABLE("Unsuported section kind for global");
}
}
} else
- assert(0 && "Unsupported global");
+ LLVM_UNREACHABLE("Unsupported global");
return NULL;
}
index 739ae3115fbe16217474cb47d575d286cb0803d8..adb4c4b5fb9bbded28a8aeee588706450b033afb 100644 (file)
if(isFP) { // if this is an FP divide, we finish up here and exit early
if(isModulus)
- assert(0 && "Sorry, try another FORTRAN compiler.");
+ LLVM_UNREACHABLE("Sorry, try another FORTRAN compiler.");
SDValue TmpE2, TmpY3, TmpQ0, TmpR0;
APFloat(+1.0f) : APFloat(+1.0))) {
V = CurDAG->getCopyFromReg(Chain, dl, IA64::F1, MVT::f64);
} else
- assert(0 && "Unexpected FP constant!");
+ LLVM_UNREACHABLE("Unexpected FP constant!");
ReplaceUses(SDValue(N, 0), V);
return 0;
#ifndef NDEBUG
N->dump(CurDAG);
#endif
- assert(0 && "Cannot load this type!");
+ LLVM_UNREACHABLE("Cannot load this type!");
case MVT::i1: { // this is a bool
Opc = IA64::LD1; // first we load a byte, then compare for != 0
if(N->getValueType(0) == MVT::i1) { // XXX: early exit!
unsigned Opc;
if (ISD::isNON_TRUNCStore(N)) {
switch (N->getOperand(1).getValueType().getSimpleVT()) {
- default: assert(0 && "unknown type in store");
+ default: LLVM_UNREACHABLE("unknown type in store");
case MVT::i1: { // this is a bool
Opc = IA64::ST1; // we store either 0 or 1 as a byte
// first load zero!
}
} else { // Truncating store
switch(ST->getMemoryVT().getSimpleVT()) {
- default: assert(0 && "unknown type in truncstore");
+ default: LLVM_UNREACHABLE("unknown type in truncstore");
case MVT::i8: Opc = IA64::ST1; break;
case MVT::i16: Opc = IA64::ST2; break;
case MVT::i32: Opc = IA64::ST4; break;
index 1b661eba2312f8a26643b3a934b6a46041bb0ca6..094f8c2f9994f194a33651b186bf941b9a9cf4f7 100644 (file)
switch (getValueType(I->getType()).getSimpleVT()) {
default:
- assert(0 && "ERROR in LowerArgs: can't lower this type of arg.\n");
+ LLVM_UNREACHABLE("ERROR in LowerArgs: can't lower this type of arg.\n");
case MVT::f32:
// fixme? (well, will need to for weird FP structy stuff,
// see intel ABI docs)
// Finally, inform the code generator which regs we return values in.
// (see the ISD::RET: case in the instruction selector)
switch (getValueType(F.getReturnType()).getSimpleVT()) {
- default: assert(0 && "i have no idea where to return this type!");
+ default: LLVM_UNREACHABLE("i have no idea where to return this type!");
case MVT::isVoid: break;
case MVT::i1:
case MVT::i8:
SDValue ValToStore(0, 0), ValToConvert(0, 0);
unsigned ObjSize=8;
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "unexpected argument type!");
+ default: LLVM_UNREACHABLE("unexpected argument type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
if (InFlag.getNode())
CallOperands.push_back(InFlag);
else
- assert(0 && "this should never happen!\n");
+ LLVM_UNREACHABLE("this should never happen!\n");
// to make way for a hack:
Chain = DAG.getNode(IA64ISD::BRCALL, dl, NodeTys,
SDValue RetVal;
if (RetTyVT != MVT::isVoid) {
switch (RetTyVT.getSimpleVT()) {
- default: assert(0 && "Unknown value type to return!");
+ default: LLVM_UNREACHABLE("Unknown value type to return!");
case MVT::i1: { // bools are just like other integers (returned in r8)
// we *could* fall through to the truncate below, but this saves a
// few redundant predicate ops
LowerOperation(SDValue Op, SelectionDAG &DAG) {
DebugLoc dl = Op.getDebugLoc();
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for IA64.");
+ LLVM_UNREACHABLE("TLS not implemented for IA64.");
case ISD::RET: {
SDValue AR_PFSVal, Copy;
index 5f89d4f13994047fab3ab79eb826cac92a54cafd..0537c3ed01a15b28365a507ad34f242f1c3c4618 100644 (file)
#include "IA64InstrBuilder.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
#include "IA64GenInstrInfo.inc"
using namespace llvm;
BuildMI(MBB, MI, DL, get(IA64::ST8))
.addFrameIndex(FrameIdx)
.addReg(IA64::r2);
- } else assert(0 &&
- "sorry, I don't know how to store this sort of reg in the stack\n");
+ } else
+ LLVM_UNREACHABLE("sorry, I don't know how to store this sort of reg in the stack");
}
void IA64InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
} else if (RC == IA64::PRRegisterClass) {
Opc = IA64::ST1;
} else {
- assert(0 &&
+ LLVM_UNREACHABLE(
"sorry, I don't know how to store this sort of reg\n");
}
.addReg(IA64::r2)
.addReg(IA64::r0);
} else {
- assert(0 &&
+ LLVM_UNREACHABLE(
"sorry, I don't know how to load this sort of reg from the stack\n");
}
}
} else if (RC == IA64::PRRegisterClass) {
Opc = IA64::LD1;
} else {
- assert(0 &&
+ LLVM_UNREACHABLE(
"sorry, I don't know how to load this sort of reg\n");
}
index 7ad6f51a9b8bded96aee93d072df6f0a71f8b4b9..a1a7574c84f5acc25d87a73ba61f221a34e858ef 100644 (file)
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
}
unsigned IA64RegisterInfo::getRARegister() const {
- assert(0 && "What is the return address register");
+ LLVM_UNREACHABLE("What is the return address register");
return 0;
}
}
unsigned IA64RegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned IA64RegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int IA64RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
index ee73c381cd4ace054132dc7102d86b49b68e2689..8429c27eb6bb761399a91055f114e89408240179 100644 (file)
#include "llvm/TypeSymbolTable.h"
#include "llvm/Analysis/ConstantsScanner.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/InstVisitor.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Transforms/Scalar.h"
return "modopt([mscorlib]System.Runtime.CompilerServices.CallConvStdcall) ";
default:
cerr << "CallingConvID = " << CallingConvID << '\n';
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
}
return ""; // Not reached
}
return "float64 ";
default:
cerr << "Type = " << *Ty << '\n';
- assert(0 && "Invalid primitive type");
+ LLVM_UNREACHABLE("Invalid primitive type");
}
return ""; // Not reached
}
return "valuetype '"+getArrayTypeName(Ty->getTypeID(),Ty)+"' ";
default:
cerr << "Type = " << *Ty << '\n';
- assert(0 && "Invalid type in getTypeName()");
+ LLVM_UNREACHABLE("Invalid type in getTypeName()");
}
return ""; // Not reached
}
return "i"+utostr(TD->getTypeAllocSize(Ty));
default:
cerr << "TypeID = " << Ty->getTypeID() << '\n';
- assert(0 && "Invalid type in TypeToPostfix()");
+ LLVM_UNREACHABLE("Invalid type in TypeToPostfix()");
}
return ""; // Not reached
}
printSimpleInstruction("conv.u8");
break;
default:
- assert(0 && "Module use not supporting pointer size");
+ LLVM_UNREACHABLE("Module use not supporting pointer size");
}
}
// FIXME: Need overflow test?
if (!isUInt32(N)) {
cerr << "Value = " << utostr(N) << '\n';
- assert(0 && "32-bit pointer overflowed");
+ LLVM_UNREACHABLE("32-bit pointer overflowed");
}
break;
case Module::Pointer64:
printSimpleInstruction("ldc.i8",utostr(N).c_str());
break;
default:
- assert(0 && "Module use not supporting pointer size");
+ LLVM_UNREACHABLE("Module use not supporting pointer size");
}
}
printPtrLoad(0);
} else {
cerr << "Constant = " << *C << '\n';
- assert(0 && "Invalid constant value");
+ LLVM_UNREACHABLE("Invalid constant value");
}
Out << '\n';
}
break;
default:
cerr << "Value = " << *V << '\n';
- assert(0 && "Invalid value location");
+ LLVM_UNREACHABLE("Invalid value location");
}
}
break;
default:
cerr << "Value = " << *V << '\n';
- assert(0 && "Invalid value location");
+ LLVM_UNREACHABLE("Invalid value location");
}
}
break;
default:
cerr << "Opcode = " << Op << '\n';
- assert(0 && "Invalid conversion instruction");
+ LLVM_UNREACHABLE("Invalid conversion instruction");
}
}
Name = getConvModopt(Invoke->getCallingConv());
else {
cerr << "Instruction = " << Inst->getName() << '\n';
- assert(0 && "Need \"Invoke\" or \"Call\" instruction only");
+ LLVM_UNREACHABLE("Need \"Invoke\" or \"Call\" instruction only");
}
if (const Function* F = dyn_cast<Function>(FnVal)) {
// Direct call.
break;
default:
cerr << "Intrinsic ID = " << Inst->getIntrinsicID() << '\n';
- assert(0 && "Invalid intrinsic function");
+ LLVM_UNREACHABLE("Invalid intrinsic function");
}
}
break;
default:
cerr << "Predicate = " << Predicate << '\n';
- assert(0 && "Invalid icmp predicate");
+ LLVM_UNREACHABLE("Invalid icmp predicate");
}
}
printSimpleInstruction("or");
break;
default:
- assert(0 && "Illegal FCmp predicate");
+ LLVM_UNREACHABLE("Illegal FCmp predicate");
}
}
printAllocaInstruction(cast<AllocaInst>(Inst));
break;
case Instruction::Malloc:
- assert(0 && "LowerAllocationsPass used");
+ LLVM_UNREACHABLE("LowerAllocationsPass used");
break;
case Instruction::Free:
- assert(0 && "LowerAllocationsPass used");
+ LLVM_UNREACHABLE("LowerAllocationsPass used");
break;
case Instruction::Unreachable:
printSimpleInstruction("ldstr", "\"Unreachable instruction\"");
break;
default:
cerr << "Instruction = " << Inst->getName() << '\n';
- assert(0 && "Unsupported instruction");
+ LLVM_UNREACHABLE("Unsupported instruction");
}
}
break;
default:
cerr << "Expression = " << *CE << "\n";
- assert(0 && "Invalid constant expression");
+ LLVM_UNREACHABLE("Invalid constant expression");
}
}
printSimpleInstruction(postfix.c_str());
} else {
cerr << "Constant = " << *I->constant << '\n';
- assert(0 && "Invalid static initializer");
+ LLVM_UNREACHABLE("Invalid static initializer");
}
}
}
return N;
default:
cerr << "Bits = " << N << '\n';
- assert(0 && "Unsupported integer width");
+ LLVM_UNREACHABLE("Unsupported integer width");
}
return 0; // Not reached
}
// Null pointer initialization
if (TySize==4) Out << "int32 (0)";
else if (TySize==8) Out << "int64 (0)";
- else assert(0 && "Invalid pointer size");
+ else LLVM_UNREACHABLE("Invalid pointer size");
}
break;
default:
cerr << "TypeID = " << Ty->getTypeID() << '\n';
- assert(0 && "Invalid type in printStaticConstant()");
+ LLVM_UNREACHABLE("Invalid type in printStaticConstant()");
}
// Increase offset.
Offset += TySize;
break;
default:
cerr << "Type = " << *C << "\n";
- assert(0 && "Invalid constant type");
+ LLVM_UNREACHABLE("Invalid constant type");
}
// Print initializer
std::string label = Name;
index b1fa3f0e7dace56fdbf554c8571071fdfc3832bd..0f711abc4f86666f8e34707a7bfdc316d005001e 100644 (file)
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
EmitAlignment(FnAlign, F);
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE("Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
break;
if (printInstruction(MI))
return;
- assert(0 && "Should not happen");
+ LLVM_UNREACHABLE("Should not happen");
}
void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
return;
}
default:
- assert(0 && "Not implemented yet!");
+ LLVM_UNREACHABLE("Not implemented yet!");
}
}
printOperand(MI, OpNum);
}
} else
- assert(0 && "Unsupported memory operand");
+ LLVM_UNREACHABLE("Unsupported memory operand");
}
void MSP430AsmPrinter::printCCOperand(const MachineInstr *MI, int OpNum) {
switch (CC) {
default:
- assert(0 && "Unsupported CC code");
+ LLVM_UNREACHABLE("Unsupported CC code");
break;
case MSP430::COND_E:
O << "eq";
index 1522e5006d782bcadea85583e74583370841ab7b..69d9caea94599a5efa082e2cf07609e5e3a0e539 100644 (file)
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG);
default:
- assert(0 && "unimplemented operand");
+ LLVM_UNREACHABLE("unimplemented operand");
return SDValue();
}
}
unsigned CC = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
switch (CC) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::Fast:
return LowerCCCArguments(Op, DAG);
unsigned CallingConv = TheCall->getCallingConv();
switch (CallingConv) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::Fast:
case CallingConv::C:
return LowerCCCCallTo(Op, DAG, CallingConv);
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
// FIXME: Handle jump negative someday
TargetCC = MSP430::COND_INVALID;
switch (CC) {
- default: assert(0 && "Invalid integer condition!");
+ default: LLVM_UNREACHABLE("Invalid integer condition!");
case ISD::SETEQ:
TargetCC = MSP430::COND_E; // aka COND_Z
break;
index 91112c3d732ff6020815504e5d79ef8cafb82d71..8dc71df7b1fb03eef10f6f8ae9cf22cdee95f146 100644 (file)
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
.addFrameIndex(FrameIdx).addImm(0)
.addReg(SrcReg, getKillRegState(isKill));
else
- assert(0 && "Cannot store this register to stack slot!");
+ LLVM_UNREACHABLE("Cannot store this register to stack slot!");
}
void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
BuildMI(MBB, MI, DL, get(MSP430::MOV8rm))
.addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
else
- assert(0 && "Cannot store this register to stack slot!");
+ LLVM_UNREACHABLE("Cannot store this register to stack slot!");
}
bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
// Conditional branch.
unsigned Count = 0;
- assert(0 && "Implement conditional branches!");
+ LLVM_UNREACHABLE("Implement conditional branches!");
return Count;
}
index d40bac73eab87b0bc8a930f667ba9d0891c1165d..2c96f85aafb0d06973798d2aea60ad1230b462f1 100644 (file)
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/BitVector.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
switch (RetOpcode) {
case MSP430::RET: break; // These are ok
default:
- assert(0 && "Can only insert epilog into returning blocks");
+ LLVM_UNREACHABLE("Can only insert epilog into returning blocks");
}
// Get the number of bytes to allocate from the FrameInfo
// mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
if (MFI->hasVarSizedObjects()) {
- assert(0 && "Not implemented yet!");
+ LLVM_UNREACHABLE("Not implemented yet!");
} else {
// adjust stack pointer back: SPW += numbytes
if (NumBytes) {
}
int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "Not implemented yet!");
+ LLVM_UNREACHABLE("Not implemented yet!");
return 0;
}
diff --git a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
index 837e389a188acdd75a522a12b5e01079da83d429..17c7640e36be52f68a34b680162c347335d837b3 100644 (file)
default: break;
}
- assert(0 && "Unknown Mips ABI");
+ LLVM_UNREACHABLE( "Unknown Mips ABI");
return NULL;
}
index f132d2de8b83a27e8b7698264f6cf0c4eab4ef09..f3fa17938b36bbe1bce57438826171f0406f8b5f 100644 (file)
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
const char *MipsTargetLowering::
static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) {
switch(BC) {
default:
- assert(0 && "Unknown branch code");
+ LLVM_UNREACHABLE("Unknown branch code");
case Mips::BRANCH_T : return Mips::BC1T;
case Mips::BRANCH_F : return Mips::BC1F;
case Mips::BRANCH_TL : return Mips::BC1TL;
static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown fp condition code!");
+ default: LLVM_UNREACHABLE("Unknown fp condition code!");
case ISD::SETEQ:
case ISD::SETOEQ: return Mips::FCOND_EQ;
case ISD::SETUNE: return Mips::FCOND_OGL;
return DAG.getNode(ISD::ADD, dl, MVT::i32, ResNode, Lo);
}
- assert(0 && "Dont know how to handle GlobalAddress");
+ LLVM_UNREACHABLE("Dont know how to handle GlobalAddress");
return SDValue(0,0);
}
SDValue MipsTargetLowering::
LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
{
- assert(0 && "TLS not implemented for MIPS.");
+ LLVM_UNREACHABLE("TLS not implemented for MIPS.");
return SDValue(); // Not reached
}
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full:
if (Subtarget->isABI_O32() && VA.isRegLoc()) {
if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i32)
if (!Subtarget->isSingleFloat())
RC = Mips::AFGR64RegisterClass;
} else
- assert(0 && "RegVT not supported by FORMAL_ARGUMENTS Lowering");
+ LLVM_UNREACHABLE("RegVT not supported by FORMAL_ARGUMENTS Lowering");
// Transform the arguments stored on
// physical registers into virtual ones
unsigned Reg = MipsFI->getSRetReturnReg();
if (!Reg)
- assert(0 && "sret virtual register not created in the entry block");
+ LLVM_UNREACHABLE("sret virtual register not created in the entry block");
SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());
Chain = DAG.getCopyToReg(Chain, dl, Mips::V0, Val, Flag);
index e16fd8e400c5d5378a213dec7ef87578afac05e7..1150765822fe2af97e9cb0ebc19d8a493b923990 100644 (file)
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include "MipsGenInstrInfo.inc"
using namespace llvm;
unsigned Mips::GetCondBranchFromCond(Mips::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case Mips::COND_E : return Mips::BEQ;
case Mips::COND_NE : return Mips::BNE;
case Mips::COND_GZ : return Mips::BGTZ;
Mips::CondCode Mips::GetOppositeBranchCondition(Mips::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case Mips::COND_E : return Mips::COND_NE;
case Mips::COND_NE : return Mips::COND_E;
case Mips::COND_GZ : return Mips::COND_LEZ;
index 6655c6749fdf78f296a950b6e15e6eb8d1821f87..9c47d8e0d544f8428aaaa959601965c48b235f0f 100644 (file)
#define MIPSINSTRUCTIONINFO_H
#include "Mips.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "MipsRegisterInfo.h"
inline static const char *MipsFCCToString(Mips::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case FCOND_F:
case FCOND_T: return "f";
case FCOND_UN:
index 579d4db6422f6836f1816cc7d77656da558c1322..816d7c7980407a13a7e2ea9e0426e8d726bf5204 100644 (file)
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
case Mips::SP : case Mips::F29: return 29;
case Mips::FP : case Mips::F30: case Mips::D15: return 30;
case Mips::RA : case Mips::F31: return 31;
- default: assert(0 && "Unknown register number!");
+ default: LLVM_UNREACHABLE("Unknown register number!");
}
return 0; // Not reached
}
unsigned MipsRegisterInfo::
getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned MipsRegisterInfo::
getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int MipsRegisterInfo::
getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
index 0a71b130a0bb613466280418fdca441ada4e6970..6af4664b84bcd8874e350860025d0ea57e981c01 100644 (file)
--- a/lib/Target/PIC16/PIC16.h
+++ b/lib/Target/PIC16/PIC16.h
#ifndef LLVM_TARGET_PIC16_H
#define LLVM_TARGET_PIC16_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <iosfwd>
#include <cassert>
inline static const char *PIC16CondCodeToString(PIC16CC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case PIC16CC::NE: return "ne";
case PIC16CC::EQ: return "eq";
case PIC16CC::LT: return "lt";
inline static bool isSignedComparison(PIC16CC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case PIC16CC::NE:
case PIC16CC::EQ:
case PIC16CC::LT:
index 6466ad6a22ec4561e9459cf8ea0a2cdb4a4e4df3..d80476cdfad0ecacf8d56d4955a36e8330562c71 100644 (file)
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Mangler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
else
- assert(0 && "not implemented");
- return;
+ LLVM_UNREACHABLE("not implemented");
+ return;
case MachineOperand::MO_Immediate:
O << (int)MO.getImm();
return;
default:
- assert(0 && " Operand type not supported.");
+ LLVM_UNREACHABLE(" Operand type not supported.");
}
}
index 02547b549fc6a006f5dc7bfcf8f5c6193d230197..c8c353f9118b307d7604aea99e64d31277c26f82 100644 (file)
static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code!");
+ default: LLVM_UNREACHABLE("Unknown condition code!");
case ISD::SETNE: return PIC16CC::NE;
case ISD::SETEQ: return PIC16CC::EQ;
case ISD::SETGT: return PIC16CC::GT;
index 8418423fa06a6cca64462a8dc7b2bf500cb0878c..dad0266b7b3d55baf2c0b1bd863a9fd6d238de96 100644 (file)
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstdio>
.addImm(1); // Emit banksel for it.
}
else
- assert(0 && "Can't store this register to stack slot");
+ LLVM_UNREACHABLE("Can't store this register to stack slot");
}
void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
.addImm(1); // Emit banksel for it.
}
else
- assert(0 && "Can't load this register from stack slot");
+ LLVM_UNREACHABLE("Can't load this register from stack slot");
}
bool PIC16InstrInfo::copyRegToReg (MachineBasicBlock &MBB,
index eb758d8543d078ccbbc48360c810824ffe571f3e..bb4f278cbf45383420a77262c06f6a6ac3844e85 100644 (file)
#include "PIC16.h"
#include "PIC16RegisterInfo.h"
#include "llvm/ADT/BitVector.h"
-
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
int PIC16RegisterInfo::
getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "Not keeping track of debug information yet!!");
+ LLVM_UNREACHABLE("Not keeping track of debug information yet!!");
return -1;
}
unsigned PIC16RegisterInfo::getFrameRegister(MachineFunction &MF) const {
- assert(0 && "PIC16 Does not have any frame register");
+ LLVM_UNREACHABLE("PIC16 Does not have any frame register");
return 0;
}
unsigned PIC16RegisterInfo::getRARegister() const {
- assert(0 && "PIC16 Does not have any return address register");
+ LLVM_UNREACHABLE("PIC16 Does not have any return address register");
return 0;
}
diff --git a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
index 373a2efc00813cd053e52aafe82df292245839eb..fd7cbffa407e4afd63eb313fece404a03f57e688 100644 (file)
SwitchToSection(TAI->SectionForGlobal(F));
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage: // Symbols default to internal.
break;
SwitchToSection(TAI->SectionForGlobal(F));
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage: // Symbols default to internal.
break;
index c191f65888dfde548ff7c867af8db469efb4012c..4943e5c8e11740e52f79f4a7e8e2964ab2836d69 100644 (file)
assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
}
switch (MI.getOpcode()) {
- default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
+ default: MI.dump(); LLVM_UNREACHABLE("Unknown instruction for relocation!");
case PPC::LIS:
case PPC::LIS8:
case PPC::ADDIS:
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index ec3e757651f40eac13124c4f6986ec4d04c34201..244d3954affb14ecb98efbc0ec90939b178fc813 100644 (file)
#include "PPCInstrInfo.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
return Hazard;
switch (InstrType) {
- default: assert(0 && "Unknown instruction type!");
+ default: LLVM_UNREACHABLE("Unknown instruction type!");
case PPCII::PPC970_FXU:
case PPCII::PPC970_LSU:
case PPCII::PPC970_FPU:
if (isLoad && NumStores) {
unsigned LoadSize;
switch (Opcode) {
- default: assert(0 && "Unknown load!");
+ default: LLVM_UNREACHABLE("Unknown load!");
case PPC::LBZ: case PPC::LBZU:
case PPC::LBZX:
case PPC::LBZ8: case PPC::LBZU8:
if (isStore) {
unsigned ThisStoreSize;
switch (Opcode) {
- default: assert(0 && "Unknown store instruction!");
+ default: LLVM_UNREACHABLE("Unknown store instruction!");
case PPC::STB: case PPC::STB8:
case PPC::STBU: case PPC::STBU8:
case PPC::STBX: case PPC::STBX8:
index 398a1fecc34f0466a36e0c659e993764d97e1ae2..b17e54dd5a32745dcca07739aea35f577e59779c 100644 (file)
case ISD::SETOGE:
case ISD::SETOLE:
case ISD::SETONE:
- assert(0 && "Invalid branch code: should be expanded by legalize");
+ LLVM_UNREACHABLE("Invalid branch code: should be expanded by legalize");
// These are invalid for floating point. Assume integer.
case ISD::SETULT: return 0;
case ISD::SETUGT: return 1;
// Handle PPC32 integer and normal FP loads.
assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
switch (LoadedVT.getSimpleVT()) {
- default: assert(0 && "Invalid PPC load type!");
+ default: LLVM_UNREACHABLE("Invalid PPC load type!");
case MVT::f64: Opcode = PPC::LFDU; break;
case MVT::f32: Opcode = PPC::LFSU; break;
case MVT::i32: Opcode = PPC::LWZU; break;
assert(LD->getValueType(0) == MVT::i64 && "Unknown load result type!");
assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
switch (LoadedVT.getSimpleVT()) {
- default: assert(0 && "Invalid PPC load type!");
+ default: LLVM_UNREACHABLE("Invalid PPC load type!");
case MVT::i64: Opcode = PPC::LDU; break;
case MVT::i32: Opcode = PPC::LWZU8; break;
case MVT::i16: Opcode = isSExt ? PPC::LHAU8 : PPC::LHZU8; break;
PPCLowering.getPointerTy(),
MVT::Other, Ops, 3);
} else {
- assert(0 && "R+R preindex loads not supported yet!");
+ LLVM_UNREACHABLE("R+R preindex loads not supported yet!");
}
}
index abd428c5763667e0d73b113be83734cd81410e15..842361fe970b2b9fb703ad44671aff3f0da33539 100644 (file)
SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
SelectionDAG &DAG) {
- assert(0 && "TLS not implemented for PPC.");
+ LLVM_UNREACHABLE("TLS not implemented for PPC.");
return SDValue(); // Not reached
}
unsigned VarArgsNumFPR,
const PPCSubtarget &Subtarget) {
- assert(0 && "VAARG not yet implemented for the SVR4 ABI!");
+ LLVM_UNREACHABLE("VAARG not yet implemented for the SVR4 ABI!");
return SDValue(); // Not reached
}
switch (ValVT.getSimpleVT()) {
default:
- assert(0 && "ValVT not supported by FORMAL_ARGUMENTS Lowering");
+ LLVM_UNREACHABLE("ValVT not supported by FORMAL_ARGUMENTS Lowering");
case MVT::i32:
RC = PPC::GPRCRegisterClass;
break;
}
switch(ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
case MVT::f32:
VecArgOffset += isPPC64 ? 8 : 4;
}
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
if (!isPPC64) {
if (GPR_idx != Num_GPR_Regs) {
}
switch (Arg.getValueType().getSimpleVT()) {
- default: assert(0 && "Unexpected ValueType for argument!");
+ default: LLVM_UNREACHABLE("Unexpected ValueType for argument!");
case MVT::i32:
case MVT::i64:
if (GPR_idx != NumGPRs) {
SDValue Tmp;
switch (Op.getValueType().getSimpleVT()) {
- default: assert(0 && "Unhandled FP_TO_INT type in custom expander!");
+ default: LLVM_UNREACHABLE("Unhandled FP_TO_INT type in custom expander!");
case MVT::i32:
Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIWZ :
PPCISD::FCTIDZ,
int ShufIdxs[16];
switch (OpNum) {
- default: assert(0 && "Unknown i32 permute!");
+ default: LLVM_UNREACHABLE("Unknown i32 permute!");
case OP_VMRGHW:
ShufIdxs[ 0] = 0; ShufIdxs[ 1] = 1; ShufIdxs[ 2] = 2; ShufIdxs[ 3] = 3;
ShufIdxs[ 4] = 16; ShufIdxs[ 5] = 17; ShufIdxs[ 6] = 18; ShufIdxs[ 7] = 19;
///
SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Wasn't expecting to be able to lower this!");
+ default: LLVM_UNREACHABLE("Wasn't expecting to be able to lower this!");
case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
BB = exitMBB;
BuildMI(BB, dl, TII->get(PPC::SRW),dest).addReg(TmpReg).addReg(ShiftReg);
} else {
- assert(0 && "Unexpected instr type to insert");
+ LLVM_UNREACHABLE("Unexpected instr type to insert");
}
F->DeleteMachineInstr(MI); // The pseudo instruction is gone now.
if (!CST) return; // Must be an immediate to match.
unsigned Value = CST->getZExtValue();
switch (Letter) {
- default: assert(0 && "Unknown constraint letter!");
+ default: LLVM_UNREACHABLE("Unknown constraint letter!");
case 'I': // "I" is a signed 16-bit constant.
if ((short)Value == (int)Value)
Result = DAG.getTargetConstant(Value, Op.getValueType());
index 25f3785ad385f491633a529411a99279c66d93c6..91deca1ef3187586a410448e8c3b6c1c6583c9d5 100644 (file)
unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
switch ((PPC::RelocationType)MR->getRelocationType()) {
- default: assert(0 && "Unknown relocation type!");
+ default: LLVM_UNREACHABLE("Unknown relocation type!");
case PPC::reloc_pcrel_bx:
// PC-relative relocation for b and bl instructions.
ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
index 3bfa6d71910575d6709fbcb490abdf2b2b5eaa31..9e57bd952da16b40387f545471323d387a473e9d 100644 (file)
#include "PPCTargetMachine.h"
#include "llvm/CodeGen/MachORelocation.h"
#include "llvm/Support/OutputBuffer.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstdio>
using namespace llvm;
Addr = (uintptr_t)MR.getResultPointer() + ToAddr;
switch ((PPC::RelocationType)MR.getRelocationType()) {
- default: assert(0 && "Unknown PPC relocation type!");
+ default: LLVM_UNREACHABLE("Unknown PPC relocation type!");
case PPC::reloc_absolute_low_ix:
- assert(0 && "Unhandled PPC relocation type!");
+ LLVM_UNREACHABLE("Unhandled PPC relocation type!");
break;
case PPC::reloc_vanilla:
{
index 08a281259e1fa35f6936f18e133c3a44fb5d0af6..bb9e16606aba648015c448cc89e74bb13ee9a533 100644 (file)
//===----------------------------------------------------------------------===//
#include "PPCPredicates.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
using namespace llvm;
PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) {
switch (Opcode) {
- default: assert(0 && "Unknown PPC branch opcode!");
+ default: LLVM_UNREACHABLE("Unknown PPC branch opcode!");
case PPC::PRED_EQ: return PPC::PRED_NE;
case PPC::PRED_NE: return PPC::PRED_EQ;
case PPC::PRED_LT: return PPC::PRED_GE;
index 26d08d098326139060fb474ca9d01539f962d7da..6f807fe90bf077d775b319abbfe38708eb2031ff 100644 (file)
MinVR = Reg;
}
} else {
- assert(0 && "Unknown RegisterClass!");
+ LLVM_UNREACHABLE("Unknown RegisterClass!");
}
}
index f72a4c4645c15c89dfb957c69fc632c91076aed6..0f251de6a8645fea8ca9db66427b8614acf279f4 100644 (file)
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
STATISTIC(NumFpDs , "Number of instructions translated");
OddReg = OddHalvesOfPairs[i];
return;
}
- assert(0 && "Can't find reg");
+ LLVM_UNREACHABLE("Can't find reg");
}
/// runOnMachineBasicBlock - Fixup FpMOVD instructions in this MBB.
else if (MI->getOpcode() == SP::FpABSD)
MI->setDesc(TII->get(SP::FABSS));
else
- assert(0 && "Unknown opcode!");
+ LLVM_UNREACHABLE("Unknown opcode!");
MI->getOperand(0).setReg(EvenDestReg);
MI->getOperand(1).setReg(EvenSrcReg);
index c7d0ca8a0875efb1c082f8eca46326545c93e975..539e50addeb3d7e4b64b308ce271e5d8766a2909 100644 (file)
--- a/lib/Target/Sparc/Sparc.h
+++ b/lib/Target/Sparc/Sparc.h
#ifndef TARGET_SPARC_H
#define TARGET_SPARC_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: LLVM_UNREACHABLE("Unknown condition code");
case SPCC::ICC_NE: return "ne";
case SPCC::ICC_E: return "e";
case SPCC::ICC_G: return "g";
index 850d8e3725cb06d1d8b7066436f513f19101c98d..4f5060ed990ae090d37da3471de876c2a1a08611 100644 (file)
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/ADT/VectorExtras.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
MVT ObjectVT = getValueType(I->getType());
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
unsigned ArgsSize = 0;
for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) {
switch (TheCall->getArg(i).getValueType().getSimpleVT()) {
- default: assert(0 && "Unknown value type!");
+ default: LLVM_UNREACHABLE("Unknown value type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg);
SDValue ValToStore(0, 0);
unsigned ObjSize;
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
ObjSize = 4;
/// condition.
static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ISD::SETEQ: return SPCC::ICC_E;
case ISD::SETNE: return SPCC::ICC_NE;
case ISD::SETLT: return SPCC::ICC_L;
/// FCC condition.
static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown fp condition code!");
+ default: LLVM_UNREACHABLE("Unknown fp condition code!");
case ISD::SETEQ:
case ISD::SETOEQ: return SPCC::FCC_E;
case ISD::SETNE:
SDValue SparcTargetLowering::
LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
// Frame & Return address. Currently unimplemented
case ISD::RETURNADDR: return SDValue();
case ISD::FRAMEADDR: return SDValue();
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for Sparc.");
+ LLVM_UNREACHABLE("TLS not implemented for Sparc.");
case ISD::GlobalAddress: return LowerGLOBALADDRESS(Op, DAG);
case ISD::ConstantPool: return LowerCONSTANTPOOL(Op, DAG);
case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
DebugLoc dl = MI->getDebugLoc();
// Figure out the conditional branch opcode to use for this select_cc.
switch (MI->getOpcode()) {
- default: assert(0 && "Unknown SELECT_CC!");
+ default: LLVM_UNREACHABLE("Unknown SELECT_CC!");
case SP::SELECT_CC_Int_ICC:
case SP::SELECT_CC_FP_ICC:
case SP::SELECT_CC_DFP_ICC:
index 12c286af9428d773d39e6b987e3b32f173546c90..451c458ac0ab03f80c7e43f0dcd718bea4f05b87 100644 (file)
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Support/ErrorHandling.h"
#include "SparcGenInstrInfo.inc"
using namespace llvm;
BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0)
.addReg(SrcReg, getKillRegState(isKill));
else
- assert(0 && "Can't store this register to stack slot");
+ LLVM_UNREACHABLE("Can't store this register to stack slot");
}
void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
else if (RC == SP::DFPRegsRegisterClass)
Opc = SP::STDFri;
else
- assert(0 && "Can't load this register");
+ LLVM_UNREACHABLE("Can't load this register");
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
MIB.addOperand(Addr[i]);
else if (RC == SP::DFPRegsRegisterClass)
BuildMI(MBB, I, DL, get(SP::LDDFri), DestReg).addFrameIndex(FI).addImm(0);
else
- assert(0 && "Can't load this register from stack slot");
+ LLVM_UNREACHABLE("Can't load this register from stack slot");
}
void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
else if (RC == SP::DFPRegsRegisterClass)
Opc = SP::LDDFri;
else
- assert(0 && "Can't load this register");
+ LLVM_UNREACHABLE("Can't load this register");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
index 59efb19ab9c5a2ae7c42e86b39b814faaa1b0dc9..ab3c25e34348f00a53e2f8ff71cb80f4be708f32 100644 (file)
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineLocation.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Type.h"
#include "llvm/ADT/BitVector.h"
}
unsigned SparcRegisterInfo::getRARegister() const {
- assert(0 && "What is the return address register");
+ LLVM_UNREACHABLE("What is the return address register");
return 0;
}
unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const {
- assert(0 && "What is the frame register");
+ LLVM_UNREACHABLE("What is the frame register");
return SP::G1;
}
unsigned SparcRegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned SparcRegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
- assert(0 && "What is the dwarf register number");
+ LLVM_UNREACHABLE("What is the dwarf register number");
return -1;
}
index 3f5f1bd3eb26d0ef1b53806bf20e4d23a88ed2c3..782e7b4d8714909a43e29ddd63c1269d854b674a 100644 (file)
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cctype>
#include <cstring>
using namespace llvm;
Flags |= SectionFlags::Small;
break;
default:
- assert(0 && "Unexpected section kind!");
+ LLVM_UNREACHABLE("Unexpected section kind!");
}
if (GV->isWeakForLinker())
case SectionKind::ThreadBSS:
return ".gnu.linkonce.tb." + GV->getName();
default:
- assert(0 && "Unknown section kind");
+ LLVM_UNREACHABLE("Unknown section kind");
}
return NULL;
}
index 7dfa05764346c65acc1876ce731ff34e46318547..b3f2e98f63fa568a5bf15804580f45a3d32d895f 100644 (file)
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/ManagedStatic.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/System/Mutex.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringExtras.h"
case Type::VectorTyID:
return cast<VectorType>(Ty)->getBitWidth();
default:
- assert(0 && "TargetData::getTypeSizeInBits(): Unsupported type");
+ LLVM_UNREACHABLE("TargetData::getTypeSizeInBits(): Unsupported type");
break;
}
return 0;
@@ -508,7 +509,7 @@ unsigned char TargetData::getAlignment(const Type *Ty, bool abi_or_pref) const {
AlignType = VECTOR_ALIGN;
break;
default:
- assert(0 && "Bad type for getAlignment!!!");
+ LLVM_UNREACHABLE("Bad type for getAlignment!!!");
break;
}
diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
index 4cd332bda20619825063c30f34b99f56bee0ec21..b9f1dbd984b29ae108a700e7d81848dbfff84cb7 100644 (file)
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
else if (Subtarget->isTargetELF())
O << ".Lllvm$" << getFunctionNumber() << ".$piclabel";
else
- assert(0 && "Don't know how to print PIC label!\n");
+ LLVM_UNREACHABLE( "Don't know how to print PIC label!\n");
}
/// PrintUnmangledNameSafely - Print out the printable characters in the name.
}
break;
default:
- assert(0 && "Unsupported DecorationStyle");
+ LLVM_UNREACHABLE( "Unsupported DecorationStyle");
}
}
SwitchToSection(TAI->SectionForGlobal(F));
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE( "Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
EmitAlignment(FnAlign, F);
void X86ATTAsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- default: assert(0 && "Unknown pcrel immediate operand");
+ default: LLVM_UNREACHABLE( "Unknown pcrel immediate operand");
case MachineOperand::MO_Immediate:
O << MO.getImm();
return;
const char *Modifier) {
const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- default: assert(0 && "unknown operand type!");
+ default: LLVM_UNREACHABLE( "unknown operand type!");
case MachineOperand::MO_Register: {
assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Virtual registers should not make it this far!");
switch (MO.getTargetFlags()) {
default:
- assert(0 && "Unknown target flag on GV operand");
+ LLVM_UNREACHABLE( "Unknown target flag on GV operand");
case X86II::MO_NO_FLAG: // No flag.
break;
case X86II::MO_DARWIN_NONLAZY:
} else if (MO.isMBB()) {
MCOp.MakeMBBLabel(getFunctionNumber(), MO.getMBB()->getNumber());
} else {
- assert(0 && "Unimp");
+ LLVM_UNREACHABLE( "Unimp");
}
TmpInst.addOperand(MCOp);
case GlobalValue::InternalLinkage:
break;
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE( "Unknown linkage type!");
}
EmitAlignment(Align, GVar);
diff --git a/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
index 5b10c7bdcf6226d40a152e89a40dd3e62dba66d9..6b9167f40930c4dc6b9856173e91ea5243d4f16d 100644 (file)
void X86ATTAsmPrinter::printSSECC(const MCInst *MI, unsigned Op) {
switch (MI->getOperand(Op).getImm()) {
- default: assert(0 && "Invalid ssecc argument!");
+ default: LLVM_UNREACHABLE( "Invalid ssecc argument!");
case 0: O << "eq"; break;
case 1: O << "lt"; break;
case 2: O << "le"; break;
void X86ATTAsmPrinter::printPICLabel(const MCInst *MI, unsigned Op) {
- assert(0 &&
+ LLVM_UNREACHABLE(
"This is only used for MOVPC32r, should lower before asm printing!");
}
O << TAI->getPrivateGlobalPrefix() << "BB" << Op.getMBBLabelFunction()
<< '_' << Op.getMBBLabelBlock();
else
- assert(0 && "Unknown pcrel immediate operand");
+ LLVM_UNREACHABLE( "Unknown pcrel immediate operand");
}
diff --git a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
index ad8d6adde7ea87ba5cebf19e0b5e8b48389aee64..31b2654279e7423deeb0dae775bfce6c32fb397b 100644 (file)
#include "llvm/ADT/StringExtras.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/DwarfWriter.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetOptions.h"
break;
default:
- assert(0 && "Unsupported DecorationStyle");
+ LLVM_UNREACHABLE( "Unsupported DecorationStyle");
}
}
SwitchToTextSection("_text", F);
switch (F->getLinkage()) {
- default: assert(0 && "Unsupported linkage type!");
+ default: LLVM_UNREACHABLE( "Unsupported linkage type!");
case Function::PrivateLinkage:
case Function::InternalLinkage:
EmitAlignment(FnAlign);
void X86IntelAsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo){
const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- default: assert(0 && "Unknown pcrel immediate operand");
+ default: LLVM_UNREACHABLE( "Unknown pcrel immediate operand");
case MachineOperand::MO_Immediate:
O << MO.getImm();
return;
SwitchToSection(TAI->getDataSection());
break;
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE( "Unknown linkage type!");
}
if (!bCustomSegment)
index e3161e59890712b3049136ed647330169b3b1d4f..acaeea33b13b410ff82100599865388b27ca4d19 100644 (file)
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
emitJumpTableAddress(RelocOp->getIndex(), rt, PCAdj);
} else {
- assert(0 && "Unknown value to relocate!");
+ LLVM_UNREACHABLE("Unknown value to relocate!");
}
}
case X86II::GS:
MCE.emitByte(0x65);
break;
- default: assert(0 && "Invalid segment!");
+ default: LLVM_UNREACHABLE("Invalid segment!");
case 0: break; // No segment override!
}
(((Desc->TSFlags & X86II::Op0Mask)-X86II::D8)
>> X86II::Op0Shift));
break; // Two-byte opcode prefix
- default: assert(0 && "Invalid prefix!");
+ default: LLVM_UNREACHABLE("Invalid prefix!");
case 0: break; // No prefix!
}
unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
switch (Desc->TSFlags & X86II::FormMask) {
- default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
+ default: LLVM_UNREACHABLE("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
switch (Opcode) {
default:
- assert(0 && "psuedo instructions should be removed before code emission");
+ LLVM_UNREACHABLE("psuedo instructions should be removed before code emission");
break;
case TargetInstrInfo::INLINEASM: {
// We allow inline assembler nodes with empty bodies - they can
} else
emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc));
} else {
- assert(0 && "Unknown RawFrm operand!");
+ LLVM_UNREACHABLE("Unknown RawFrm operand!");
}
}
break;
index 912ab0e886f4d8539567eb918e94ae05f7ec2cb6..9be7021a49ef430029f10ebcad778780363ac685 100644 (file)
#include "X86ELFWriterInfo.h"
#include "X86Relocations.h"
#include "llvm/Function.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
return R_X86_64_64;
case X86::reloc_picrel_word:
default:
- assert(0 && "unknown relocation type");
+ LLVM_UNREACHABLE("unknown relocation type");
}
} else {
switch(MachineRelTy) {
case X86::reloc_absolute_dword:
case X86::reloc_picrel_word:
default:
- assert(0 && "unknown relocation type");
+ LLVM_UNREACHABLE("unknown relocation type");
}
}
return 0;
case R_X86_64_PC32: return -4;
break;
default:
- assert(0 && "unknown x86 relocation type");
+ LLVM_UNREACHABLE("unknown x86 relocation type");
}
}
return 0;
index f5892208b7a47be74a139ce97318f0d263b272e8..feb3d4c72e0e791045f21f6e9c175fccfaf256c5 100644 (file)
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt: {
bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(),
index 37027ee8bebae506808503a4afa55ded703ba386..c15e3487c6a473c8387451b3ef01ccba510507d9 100644 (file)
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Compiler.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/SmallPtrSet.h"
case X86II::CompareFP: handleCompareFP(I); break;
case X86II::CondMovFP: handleCondMovFP(I); break;
case X86II::SpecialFP: handleSpecialFP(I); break;
- default: assert(0 && "Unknown FP Type!");
+ default: LLVM_UNREACHABLE("Unknown FP Type!");
}
// Check to see if any of the values defined by this instruction are dead
MachineInstr *MI = I;
DebugLoc dl = MI->getDebugLoc();
switch (MI->getOpcode()) {
- default: assert(0 && "Unknown SpecialFP instruction!");
+ default: LLVM_UNREACHABLE("Unknown SpecialFP instruction!");
case X86::FpGET_ST0_32:// Appears immediately after a call returning FP type!
case X86::FpGET_ST0_64:// Appears immediately after a call returning FP type!
case X86::FpGET_ST0_80:// Appears immediately after a call returning FP type!
index b8cbbfa185f5b69e1a475f047f3ec9a117fd1f0b..5e2ff3f8b694634b8ee3104041f6dd6659a2e167 100644 (file)
bool isSigned = Opcode == ISD::SMUL_LOHI;
if (!isSigned)
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::MUL8r; MOpc = X86::MUL8m; break;
case MVT::i16: Opc = X86::MUL16r; MOpc = X86::MUL16m; break;
case MVT::i32: Opc = X86::MUL32r; MOpc = X86::MUL32m; break;
}
else
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::IMUL8r; MOpc = X86::IMUL8m; break;
case MVT::i16: Opc = X86::IMUL16r; MOpc = X86::IMUL16m; break;
case MVT::i32: Opc = X86::IMUL32r; MOpc = X86::IMUL32m; break;
unsigned LoReg, HiReg;
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: LoReg = X86::AL; HiReg = X86::AH; break;
case MVT::i16: LoReg = X86::AX; HiReg = X86::DX; break;
case MVT::i32: LoReg = X86::EAX; HiReg = X86::EDX; break;
bool isSigned = Opcode == ISD::SDIVREM;
if (!isSigned)
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::DIV8r; MOpc = X86::DIV8m; break;
case MVT::i16: Opc = X86::DIV16r; MOpc = X86::DIV16m; break;
case MVT::i32: Opc = X86::DIV32r; MOpc = X86::DIV32m; break;
}
else
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8: Opc = X86::IDIV8r; MOpc = X86::IDIV8m; break;
case MVT::i16: Opc = X86::IDIV16r; MOpc = X86::IDIV16m; break;
case MVT::i32: Opc = X86::IDIV32r; MOpc = X86::IDIV32m; break;
unsigned LoReg, HiReg;
unsigned ClrOpcode, SExtOpcode;
switch (NVT.getSimpleVT()) {
- default: assert(0 && "Unsupported VT!");
+ default: LLVM_UNREACHABLE("Unsupported VT!");
case MVT::i8:
LoReg = X86::AL; HiReg = X86::AH;
ClrOpcode = 0;
index 2c6a727f08f1cef51ccdb3737e85be6faac1b904..d14b1aaa07c2d74cfa035815d4b0792a45cf0524 100644 (file)
}
}
} else {
- assert(0 && "Unknown argument type!");
+ LLVM_UNREACHABLE("Unknown argument type!");
}
unsigned Reg = DAG.getMachineFunction().addLiveIn(VA.getLocReg(), RC);
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
}
switch (SetCCOpcode) {
- default: assert(0 && "Invalid integer condition!");
+ default: LLVM_UNREACHABLE("Invalid integer condition!");
case ISD::SETEQ: return X86::COND_E;
case ISD::SETGT: return X86::COND_G;
case ISD::SETGE: return X86::COND_GE;
// 1 | 0 | 0 | X == Y
// 1 | 1 | 1 | unordered
switch (SetCCOpcode) {
- default: assert(0 && "Condcode should be pre-legalized away");
+ default: LLVM_UNREACHABLE("Condcode should be pre-legalized away");
case ISD::SETUEQ:
case ISD::SETEQ: return X86::COND_E;
case ISD::SETOLT: // flipped
Subtarget->is64Bit());
}
- assert(0 && "Unreachable");
+ LLVM_UNREACHABLE("Unreachable");
return SDValue();
}
unsigned Opc;
switch (DstTy.getSimpleVT()) {
- default: assert(0 && "Invalid FP_TO_SINT to lower!");
+ default: LLVM_UNREACHABLE("Invalid FP_TO_SINT to lower!");
case MVT::i16: Opc = X86ISD::FP_TO_INT16_IN_MEM; break;
case MVT::i32: Opc = X86ISD::FP_TO_INT32_IN_MEM; break;
case MVT::i64: Opc = X86ISD::FP_TO_INT64_IN_MEM; break;
NEQ = DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(4, MVT::i8));
return DAG.getNode(ISD::AND, dl, VT, ORD, NEQ);
}
- assert(0 && "Illegal FP comparison");
+ LLVM_UNREACHABLE("Illegal FP comparison");
}
// Handle all other FP comparisons here.
return DAG.getNode(Opc, dl, VT, Op0, Op1, DAG.getConstant(SSECC, MVT::i8));
switch (CC) {
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::X86_StdCall: {
// Pass 'nest' parameter in ECX.
DebugLoc dl = Op.getDebugLoc();
switch (Op.getOpcode()) {
- default: assert(0 && "Unknown ovf instruction!");
+ default: LLVM_UNREACHABLE("Unknown ovf instruction!");
case ISD::SADDO:
// A subtract of one will be selected as a INC. Note that INC doesn't
// set CF, so we can't do this for UADDO.
///
SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
case ISD::ATOMIC_CMP_SWAP: return LowerCMP_SWAP(Op,DAG);
case ISD::ATOMIC_LOAD_SUB: return LowerLOAD_SUB(Op,DAG);
case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
// Get the X86 opcode to use.
unsigned Opc;
switch (MI->getOpcode()) {
- default: assert(0 && "illegal opcode!");
+ default: LLVM_UNREACHABLE("illegal opcode!");
case X86::FP32_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m32; break;
case X86::FP32_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m32; break;
case X86::FP32_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m32; break;
SDValue ValOp = N->getOperand(0);
switch (N->getOpcode()) {
default:
- assert(0 && "Unknown shift opcode!");
+ LLVM_UNREACHABLE("Unknown shift opcode!");
break;
case ISD::SHL:
if (VT == MVT::v2i64)
index 8bb96424313b2d7b7bc2d40fc27446c3544d34b2..572b71dbc01da538b759c26ba131dd5489691bfe 100644 (file)
unsigned Opc;
unsigned Size;
switch (MI->getOpcode()) {
- default: assert(0 && "Unreachable!");
+ default: LLVM_UNREACHABLE("Unreachable!");
case X86::SHRD16rri8: Size = 16; Opc = X86::SHLD16rri8; break;
case X86::SHLD16rri8: Size = 16; Opc = X86::SHRD16rri8; break;
case X86::SHRD32rri8: Size = 32; Opc = X86::SHLD32rri8; break;
unsigned X86::GetCondBranchFromCond(X86::CondCode CC) {
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case X86::COND_E: return X86::JE;
case X86::COND_NE: return X86::JNE;
case X86::COND_L: return X86::JL;
/// e.g. turning COND_E to COND_NE.
X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) {
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case X86::COND_E: return X86::COND_NE;
case X86::COND_NE: return X86::COND_E;
case X86::COND_L: return X86::COND_GE;
case X86II::Imm16: return 2;
case X86II::Imm32: return 4;
case X86II::Imm64: return 8;
- default: assert(0 && "Immediate size not set!");
+ default: LLVM_UNREACHABLE("Immediate size not set!");
return 0;
}
}
} else if (RelocOp->isJTI()) {
FinalSize += sizeJumpTableAddress(false);
} else {
- assert(0 && "Unknown value to relocate!");
+ LLVM_UNREACHABLE("Unknown value to relocate!");
}
return FinalSize;
}
case X86II::GS:
++FinalSize;
break;
- default: assert(0 && "Invalid segment!");
+ default: LLVM_UNREACHABLE("Invalid segment!");
case 0: break; // No segment override!
}
case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF:
++FinalSize;
break; // Two-byte opcode prefix
- default: assert(0 && "Invalid prefix!");
+ default: LLVM_UNREACHABLE("Invalid prefix!");
case 0: break; // No prefix!
}
--NumOps;
switch (Desc->TSFlags & X86II::FormMask) {
- default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
+ default: LLVM_UNREACHABLE("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
} else if (MO.isImm()) {
FinalSize += sizeConstant(X86InstrInfo::sizeOfImm(Desc));
} else {
- assert(0 && "Unknown RawFrm operand!");
+ LLVM_UNREACHABLE("Unknown RawFrm operand!");
}
}
break;
index eb09def0c125bddfe4367768331a3fa3bd2fb692..5b44e4f6de4b36966c56c9f339104cf24ed09376 100644 (file)
TLSOffset -= size;
return TLSOffset;
#else
- assert(0 && "Cannot allocate thread local storage on this arch!\n");
+ LLVM_UNREACHABLE("Cannot allocate thread local storage on this arch!\n");
return 0;
#endif
}
index c9d3950217bd506565eca8bd0c638bb23a631159..6bb05c5ebe2851f4ebe8e9bb921f976fe7be21ff 100644 (file)
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm,
default:
assert(isVirtualRegister(RegNo) && "Unknown physical register!");
- assert(0 && "Register allocator hasn't allocated reg correctly yet!");
+ LLVM_UNREACHABLE("Register allocator hasn't allocated reg correctly yet!");
return 0;
}
}
case X86::TAILJMPr:
case X86::TAILJMPm: break; // These are ok
default:
- assert(0 && "Can only insert epilog into returning blocks");
+ LLVM_UNREACHABLE("Can only insert epilog into returning blocks");
}
// Get the number of bytes to allocate from the FrameInfo
}
unsigned X86RegisterInfo::getEHExceptionRegister() const {
- assert(0 && "What is the exception register");
+ LLVM_UNREACHABLE("What is the exception register");
return 0;
}
unsigned X86RegisterInfo::getEHHandlerRegister() const {
- assert(0 && "What is the exception handler register");
+ LLVM_UNREACHABLE("What is the exception handler register");
return 0;
}
index f49ca15a05a46bfd2324d0da4a7c9b0eb78b9ff1..4b24ccc2d96e9be53bd052fb9a19939a01c2eca2 100644 (file)
#include "llvm/Module.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
using namespace llvm::dwarf;
case SectionKind::RODataMergeStr:
return ".rdata$linkonce" + GV->getName();
default:
- assert(0 && "Unknown section kind");
+ LLVM_UNREACHABLE("Unknown section kind");
}
return NULL;
}
index 6f2af779f3d6f57970fafe3fced472bc2b8eab51..5234a9ba1f39a70e7760f80f47382bfc518d7b6f 100644 (file)
O << "\t.cc_top " << CurrentFnName << ".function," << CurrentFnName << "\n";
switch (F->getLinkage()) {
- default: assert(0 && "Unknown linkage type!");
+ default: LLVM_UNREACHABLE("Unknown linkage type!");
case Function::InternalLinkage: // Symbols default to internal.
case Function::PrivateLinkage:
break;
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
else
- assert(0 && "not implemented");
+ LLVM_UNREACHABLE("not implemented");
break;
case MachineOperand::MO_Immediate:
O << MO.getImm();
<< '_' << MO.getIndex();
break;
default:
- assert(0 && "not implemented");
+ LLVM_UNREACHABLE("not implemented");
}
}
if (printInstruction(MI)) {
return;
}
- assert(0 && "Unhandled instruction in asm writer!");
+ LLVM_UNREACHABLE("Unhandled instruction in asm writer!");
}
bool XCoreAsmPrinter::doInitialization(Module &M) {
index df5006b99a874fe598ab0525a827e998bd6be36d..c2cc09cc66664d8b1729e283a84089e767e4e27b 100644 (file)
case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG);
case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
default:
- assert(0 && "unimplemented operand");
+ LLVM_UNREACHABLE("unimplemented operand");
return SDValue();
}
}
SelectionDAG &DAG) {
switch (N->getOpcode()) {
default:
- assert(0 && "Don't know how to custom expand this!");
+ LLVM_UNREACHABLE("Don't know how to custom expand this!");
return;
case ISD::ADD:
case ISD::SUB:
GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal());
}
if (! GVar) {
- assert(0 && "Thread local object not a GlobalVariable?");
+ LLVM_UNREACHABLE("Thread local object not a GlobalVariable?");
return SDValue();
}
const Type *Ty = cast<PointerType>(GV->getType())->getElementType();
// FIXME there isn't really debug info here
DebugLoc dl = CP->getDebugLoc();
if (Subtarget.isXS1A()) {
- assert(0 && "Lowering of constant pool unimplemented");
+ LLVM_UNREACHABLE("Lowering of constant pool unimplemented");
return SDValue();
} else {
MVT PtrVT = Op.getValueType();
SDValue XCoreTargetLowering::
LowerVAARG(SDValue Op, SelectionDAG &DAG)
{
- assert(0 && "unimplemented");
+ LLVM_UNREACHABLE("unimplemented");
// FIX Arguments passed by reference need a extra dereference.
SDNode *Node = Op.getNode();
DebugLoc dl = Node->getDebugLoc();
switch (CallingConv)
{
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::Fast:
case CallingConv::C:
return LowerCCCCallTo(Op, DAG, CallingConv);
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
switch(CC)
{
default:
- assert(0 && "Unsupported calling convention");
+ LLVM_UNREACHABLE("Unsupported calling convention");
case CallingConv::C:
case CallingConv::Fast:
return LowerCCCArguments(Op, DAG);
index 504d2025edcff56e796d6b82ff2f0f97f343a250..147d29d870b3e2d28b52fb5b65185e4db65136df 100644 (file)
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "XCoreGenInstrInfo.inc"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
namespace llvm {
namespace XCore {
static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case XCore::COND_TRUE : return XCore::BRFT_lru6;
case XCore::COND_FALSE : return XCore::BRFF_lru6;
}
static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
{
switch (CC) {
- default: assert(0 && "Illegal condition code!");
+ default: LLVM_UNREACHABLE("Illegal condition code!");
case XCore::COND_TRUE : return XCore::COND_FALSE;
case XCore::COND_FALSE : return XCore::COND_TRUE;
}
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const
{
- assert(0 && "unimplemented\n");
+ LLVM_UNREACHABLE("unimplemented\n");
}
void XCoreInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const
{
- assert(0 && "unimplemented\n");
+ LLVM_UNREACHABLE("unimplemented\n");
}
bool XCoreInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
index 9bf99ac0dad370e5bf4013e1a156d59c7edf677b..f0ff246c2c978c9fd5543a8f2e5876ebaba28dc3 100644 (file)
.addReg(ScratchReg, RegState::Kill);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ LLVM_UNREACHABLE("Unexpected Opcode\n");
}
} else {
switch (MI.getOpcode()) {
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ LLVM_UNREACHABLE("Unexpected Opcode\n");
}
}
} else {
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ LLVM_UNREACHABLE("Unexpected Opcode\n");
}
}
// Erase old instruction.
index 366005bb132112be1fc0556937d073bf5a059a96..57a8d281e06b1cb59a71f93cdad3d0f269abf413 100644 (file)
#include "llvm/Support/CallSite.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/ADT/DenseMap.h"
Value *LV = new LoadInst(InitBool, InitBool->getName()+".val", CI);
InitBoolUsed = true;
switch (CI->getPredicate()) {
- default: assert(0 && "Unknown ICmp Predicate!");
+ default: LLVM_UNREACHABLE("Unknown ICmp Predicate!");
case ICmpInst::ICMP_ULT:
case ICmpInst::ICMP_SLT:
LV = Context->getConstantIntFalse(); // X < null -> always false
PN->getName()+".f"+utostr(FieldNo), PN);
PHIsToRewrite.push_back(std::make_pair(PN, FieldNo));
} else {
- assert(0 && "Unknown usable value");
+ LLVM_UNREACHABLE("Unknown usable value");
Result = 0;
}
for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i)
Elts.push_back(Context->getUndef(STy->getElementType(i)));
} else {
- assert(0 && "This code is out of sync with "
+ LLVM_UNREACHABLE("This code is out of sync with "
" ConstantFoldLoadThroughGEPConstantExpr");
}
Constant *Elt = Context->getUndef(ATy->getElementType());
Elts.assign(ATy->getNumElements(), Elt);
} else {
- assert(0 && "This code is out of sync with "
+ LLVM_UNREACHABLE("This code is out of sync with "
" ConstantFoldLoadThroughGEPConstantExpr");
}
index 9d87403bdc5a0ea4b4cb89e7a6d4244d377af328..31e36d8994cc6a8cfd0ee8f38241c9b8b404e622 100644 (file)
#include "llvm/Support/CallSite.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include <map>
#include <vector>
using namespace llvm;
return false;
default:
- assert(0 && "Unknown type!");
+ LLVM_UNREACHABLE("Unknown type!");
return false;
case Type::PointerTyID: {
return ExternalStrong;
}
- assert(0 && "Unknown LinkageType.");
+ LLVM_UNREACHABLE("Unknown LinkageType.");
return ExternalWeak;
}
case Internal:
switch (catG) {
case ExternalStrong:
- assert(0);
+ llvm_unreachable();
// fall-through
case ExternalWeak:
if (F->hasAddressTaken())
diff --git a/lib/Transforms/Instrumentation/RSProfiling.cpp b/lib/Transforms/Instrumentation/RSProfiling.cpp
index c1f29fec55fa40c7161189ddd58eabfd53e4e60e..51a0bae67d3e04457e6af16e91136bc4bd8cbb2a 100644 (file)
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Transforms/Instrumentation.h"
#include "RSProfiling.h"
#include <set>
TransCache[v] = v;
return v;
}
- assert(0 && "Value not handled");
+ LLVM_UNREACHABLE("Value not handled");
return 0;
}
index b2fdd24c2c28e411ec535097bc515f7ba575d7d4..f0d131c6771b5a78c8bdd0f07710a7c803604b29 100644 (file)
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include "llvm/Transforms/Utils/Local.h"
#include <cstdio>
Expression::ExpressionOpcode ValueTable::getOpcode(BinaryOperator* BO) {
switch(BO->getOpcode()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Binary operator with unknown opcode?");
+ LLVM_UNREACHABLE("Binary operator with unknown opcode?");
case Instruction::Add: return Expression::ADD;
case Instruction::FAdd: return Expression::FADD;
case Instruction::Sub: return Expression::SUB;
if (isa<ICmpInst>(C)) {
switch (C->getPredicate()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
case ICmpInst::ICMP_EQ: return Expression::ICMPEQ;
case ICmpInst::ICMP_NE: return Expression::ICMPNE;
case ICmpInst::ICMP_UGT: return Expression::ICMPUGT;
} else {
switch (C->getPredicate()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
case FCmpInst::FCMP_OEQ: return Expression::FCMPOEQ;
case FCmpInst::FCMP_OGT: return Expression::FCMPOGT;
case FCmpInst::FCMP_OGE: return Expression::FCMPOGE;
Expression::ExpressionOpcode ValueTable::getOpcode(CastInst* C) {
switch(C->getOpcode()) {
default: // THIS SHOULD NEVER HAPPEN
- assert(0 && "Cast operator with unknown opcode?");
+ LLVM_UNREACHABLE("Cast operator with unknown opcode?");
case Instruction::Trunc: return Expression::TRUNC;
case Instruction::ZExt: return Expression::ZEXT;
case Instruction::SExt: return Expression::SEXT;
index af7e039eb97946cba0025f8c1039767584a96705..d5098f29532fa3432768800d2858986fe4b1e471 100644 (file)
#include "llvm/Support/CFG.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <deque>
#include <map>
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Binary operator with unknown opcode?");
+ LLVM_UNREACHABLE("Binary operator with unknown opcode?");
return Expression::ADD;
}
}
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
return Expression::ICMPEQ;
}
} else {
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Comparison with unknown predicate?");
+ LLVM_UNREACHABLE("Comparison with unknown predicate?");
return Expression::FCMPOEQ;
}
}
// THIS SHOULD NEVER HAPPEN
default:
- assert(0 && "Cast operator with unknown opcode?");
+ LLVM_UNREACHABLE("Cast operator with unknown opcode?");
return Expression::BITCAST;
}
}
if (VI != valueNumbering.end())
return VI->second;
else
- assert(0 && "Value not numbered?");
+ LLVM_UNREACHABLE("Value not numbered?");
return 0;
}
if (v == VN.lookup(*I))
return *I;
- assert(0 && "No leader found, but present bit is set?");
+ LLVM_UNREACHABLE("No leader found, but present bit is set?");
return 0;
}
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 89881f739fbb332a70f562279f1ae915b28d7bc4..6aa653012608bdb57a418051e9fca39d2849b55f 100644 (file)
UndefElts = UndefElts2;
if (VWidth > InVWidth) {
- assert(0 && "Unimp");
+ LLVM_UNREACHABLE("Unimp");
// If there are more elements in the result than there are in the source,
// then an output element is undef if the corresponding input element is
// undef.
if (UndefElts2[OutIdx/Ratio])
UndefElts.set(OutIdx);
} else if (VWidth < InVWidth) {
- assert(0 && "Unimp");
+ LLVM_UNREACHABLE("Unimp");
// If there are more elements in the source than there are in the result,
// then a result element is undef if all of the corresponding input
// elements are undef.
RHS = InsertNewInstBefore(new ExtractElementInst(RHS, 0U,"tmp"), *II);
switch (II->getIntrinsicID()) {
- default: assert(0 && "Case stmts out of sync!");
+ default: LLVM_UNREACHABLE("Case stmts out of sync!");
case Intrinsic::x86_sse_sub_ss:
case Intrinsic::x86_sse2_sub_sd:
TmpV = InsertNewInstBefore(BinaryOperator::CreateFSub(LHS, RHS,
PN->getIncomingValue(i), C, "phitmp",
NonConstBB->getTerminator());
else
- assert(0 && "Unknown binop!");
+ LLVM_UNREACHABLE("Unknown binop!");
AddToWorkList(cast<Instruction>(InV));
}
case ICmpInst::ICMP_SLE: return 6; // 110
// True -> 7
default:
- assert(0 && "Invalid ICmp predicate!");
+ LLVM_UNREACHABLE("Invalid ICmp predicate!");
return 0;
}
}
// True -> 7
default:
// Not expecting FCMP_FALSE and FCMP_TRUE;
- assert(0 && "Unexpected FCmp predicate!");
+ LLVM_UNREACHABLE("Unexpected FCmp predicate!");
return 0;
}
}
static Value *getICmpValue(bool sign, unsigned code, Value *LHS, Value *RHS,
LLVMContext *Context) {
switch (code) {
- default: assert(0 && "Illegal ICmp code!");
+ default: LLVM_UNREACHABLE("Illegal ICmp code!");
case 0: return Context->getConstantIntFalse();
case 1:
if (sign)
static Value *getFCmpValue(bool isordered, unsigned code,
Value *LHS, Value *RHS, LLVMContext *Context) {
switch (code) {
- default: assert(0 && "Illegal FCmp code!");
+ default: LLVM_UNREACHABLE("Illegal FCmp code!");
case 0:
if (isordered)
return new FCmpInst(*Context, FCmpInst::FCMP_ORD, LHS, RHS);
case Instruction::And: Code = LHSCode & RHSCode; break;
case Instruction::Or: Code = LHSCode | RHSCode; break;
case Instruction::Xor: Code = LHSCode ^ RHSCode; break;
- default: assert(0 && "Illegal logical opcode!"); return 0;
+ default: LLVM_UNREACHABLE("Illegal logical opcode!"); return 0;
}
bool isSigned = ICmpInst::isSignedPredicate(RHSICI->getPredicate()) ||
assert(LHSCst != RHSCst && "Compares not folded above?");
switch (LHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X == 13 & X == 15) -> false
case ICmpInst::ICMP_UGT: // (X == 13 & X > 15) -> false
case ICmpInst::ICMP_SGT: // (X == 13 & X > 15) -> false
}
case ICmpInst::ICMP_NE:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_ULT:
if (LHSCst == SubOne(RHSCst, Context)) // (X != 13 & X u< 14) -> X < 13
return new ICmpInst(*Context, ICmpInst::ICMP_ULT, Val, LHSCst);
break;
case ICmpInst::ICMP_ULT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u< 13 & X == 15) -> false
case ICmpInst::ICMP_UGT: // (X u< 13 & X u> 15) -> false
return ReplaceInstUsesWith(I, Context->getConstantIntFalse());
break;
case ICmpInst::ICMP_SLT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s< 13 & X == 15) -> false
case ICmpInst::ICMP_SGT: // (X s< 13 & X s> 15) -> false
return ReplaceInstUsesWith(I, Context->getConstantIntFalse());
break;
case ICmpInst::ICMP_UGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u> 13 & X == 15) -> X == 15
case ICmpInst::ICMP_UGT: // (X u> 13 & X u> 15) -> X u> 15
return ReplaceInstUsesWith(I, RHS);
break;
case ICmpInst::ICMP_SGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s> 13 & X == 15) -> X == 15
case ICmpInst::ICMP_SGT: // (X s> 13 & X s> 15) -> X s> 15
return ReplaceInstUsesWith(I, RHS);
assert(LHSCst != RHSCst && "Compares not folded above?");
switch (LHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ:
if (LHSCst == SubOne(RHSCst, Context)) {
// (X == 13 | X == 14) -> X-13 <u 2
break;
case ICmpInst::ICMP_NE:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X != 13 | X == 15) -> X != 13
case ICmpInst::ICMP_UGT: // (X != 13 | X u> 15) -> X != 13
case ICmpInst::ICMP_SGT: // (X != 13 | X s> 15) -> X != 13
break;
case ICmpInst::ICMP_ULT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u< 13 | X == 14) -> no change
break;
case ICmpInst::ICMP_UGT: // (X u< 13 | X u> 15) -> (X-13) u> 2
break;
case ICmpInst::ICMP_SLT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s< 13 | X == 14) -> no change
break;
case ICmpInst::ICMP_SGT: // (X s< 13 | X s> 15) -> (X-13) s> 2
break;
case ICmpInst::ICMP_UGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X u> 13 | X == 15) -> X u> 13
case ICmpInst::ICMP_UGT: // (X u> 13 | X u> 15) -> X u> 13
return ReplaceInstUsesWith(I, LHS);
break;
case ICmpInst::ICMP_SGT:
switch (RHSCC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ICmpInst::ICMP_EQ: // (X s> 13 | X == 15) -> X > 13
case ICmpInst::ICMP_SGT: // (X s> 13 | X s> 15) -> X > 13
return ReplaceInstUsesWith(I, LHS);
ICmpInst::Predicate Pred;
switch (I.getPredicate()) {
- default: assert(0 && "Unexpected predicate!");
+ default: LLVM_UNREACHABLE("Unexpected predicate!");
case FCmpInst::FCMP_UEQ:
case FCmpInst::FCMP_OEQ:
Pred = ICmpInst::ICMP_EQ;
// the compare predicate and sometimes the value. RHSC is rounded towards
// zero at this point.
switch (Pred) {
- default: assert(0 && "Unexpected integer comparison!");
+ default: LLVM_UNREACHABLE("Unexpected integer comparison!");
case ICmpInst::ICMP_NE: // (float)int != 4.4 --> true
return ReplaceInstUsesWith(I, Context->getConstantIntTrue());
case ICmpInst::ICMP_EQ: // (float)int == 4.4 --> false
// Simplify 'fcmp pred X, X'
if (Op0 == Op1) {
switch (I.getPredicate()) {
- default: assert(0 && "Unknown predicate!");
+ default: LLVM_UNREACHABLE("Unknown predicate!");
case FCmpInst::FCMP_UEQ: // True if unordered or equal
case FCmpInst::FCMP_UGE: // True if unordered, greater than, or equal
case FCmpInst::FCMP_ULE: // True if unordered, less than, or equal
// icmp's with boolean values can always be turned into bitwise operations
if (Ty == Type::Int1Ty) {
switch (I.getPredicate()) {
- default: assert(0 && "Invalid icmp instruction!");
+ default: LLVM_UNREACHABLE("Invalid icmp instruction!");
case ICmpInst::ICMP_EQ: { // icmp eq i1 A, B -> ~(A^B)
Instruction *Xor = BinaryOperator::CreateXor(Op0, Op1, I.getName()+"tmp");
InsertNewInstBefore(Xor, I);
// Based on the range information we know about the LHS, see if we can
// simplify this comparison. For example, (x&4) < 8 is always true.
switch (I.getPredicate()) {
- default: assert(0 && "Unknown icmp opcode!");
+ default: LLVM_UNREACHABLE("Unknown icmp opcode!");
case ICmpInst::ICMP_EQ:
if (Op0Max.ult(Op1Min) || Op0Min.ugt(Op1Max))
return ReplaceInstUsesWith(I, Context->getConstantIntFalse());
@@ -6645,7 +6645,7 @@ Instruction *InstCombiner::FoldICmpDivCst(ICmpInst &ICI, BinaryOperator *DivI,
Value *X = DivI->getOperand(0);
switch (Pred) {
- default: assert(0 && "Unhandled icmp opcode!");
+ default: LLVM_UNREACHABLE("Unhandled icmp opcode!");
case ICmpInst::ICMP_EQ:
if (LoOverflow && HiOverflow)
return ReplaceInstUsesWith(ICI, Context->getConstantIntFalse());
}
default:
// TODO: Can handle more cases here.
- assert(0 && "Unreachable!");
+ LLVM_UNREACHABLE("Unreachable!");
break;
}
default:
// All the others use floating point so we shouldn't actually
// get here because of the check above.
- assert(0 && "Unknown cast type");
+ LLVM_UNREACHABLE("Unknown cast type");
case Instruction::Trunc:
DoXForm = true;
break;
assert(Res->getType() == DestTy);
switch (CI.getOpcode()) {
- default: assert(0 && "Unknown cast type!");
+ default: LLVM_UNREACHABLE("Unknown cast type!");
case Instruction::Trunc:
case Instruction::BitCast:
// Just replace this cast with the result.
else
return BinaryOperator::Create(BO->getOpcode(), NewSI, MatchOp);
}
- assert(0 && "Shouldn't get here");
+ LLVM_UNREACHABLE("Shouldn't get here");
return 0;
}
NewSel->takeName(TVI);
if (BinaryOperator *BO = dyn_cast<BinaryOperator>(TVI))
return BinaryOperator::Create(BO->getOpcode(), FalseVal, NewSel);
- assert(0 && "Unknown instruction!!");
+ LLVM_UNREACHABLE("Unknown instruction!!");
}
}
}
NewSel->takeName(FVI);
if (BinaryOperator *BO = dyn_cast<BinaryOperator>(FVI))
return BinaryOperator::Create(BO->getOpcode(), TrueVal, NewSel);
- assert(0 && "Unknown instruction!!");
+ LLVM_UNREACHABLE("Unknown instruction!!");
}
}
}
index 2de64c15ab153a5b2552effaf6d6c2179f3ef424..e521be2db253a95a03e7518fa39d1081c81cae0c 100644 (file)
} else if (SCValue.isConstant())
Succs[SI->findCaseValue(cast<ConstantInt>(SCValue.getConstant()))] = true;
} else {
- assert(0 && "SCCP: Don't know how to handle this terminator!");
+ LLVM_UNREACHABLE("SCCP: Don't know how to handle this terminator!");
}
}
} else if (SwitchInst *SI = dyn_cast<SwitchInst>(I)) {
assert(isa<UndefValue>(SI->getCondition()) && "Switch should fold");
} else {
- assert(0 && "Didn't fold away reference to block!");
+ LLVM_UNREACHABLE("Didn't fold away reference to block!");
}
#endif
diff --git a/lib/Transforms/Scalar/ScalarReplAggregates.cpp b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
index da2c375be9090bd7f054703ad9f30e4df7079a92..2c97e5796f93860dc9cd39f2324ff4fcd3584564 100644 (file)
// Check that all of the users of the allocation are capable of being
// transformed.
switch (isSafeAllocaToScalarRepl(AI)) {
- default: assert(0 && "Unexpected value!");
+ default: LLVM_UNREACHABLE("Unexpected value!");
case 0: // Not safe to scalar replace.
break;
case 1: // Safe, but requires cleanup/canonicalizations first
diff --git a/lib/Transforms/Utils/BreakCriticalEdges.cpp b/lib/Transforms/Utils/BreakCriticalEdges.cpp
index c4fd1eae43cd978a54c85df5f685cf3eb8208f4f..f45f24ccfc0ddc2a06fa9703cd398d0b2d1d9635 100644 (file)
#include "llvm/Type.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
using namespace llvm;
// If NewBBDominatesDestBB hasn't been computed yet, do so with DF.
if (!OtherPreds.empty()) {
// FIXME: IMPLEMENT THIS!
- assert(0 && "Requiring domfrontiers but not idom/domtree/domset."
- " not implemented yet!");
+ LLVM_UNREACHABLE("Requiring domfrontiers but not idom/domtree/domset."
+ " not implemented yet!");
}
// Since the new block is dominated by its only predecessor TIBB,
index 21b3a220c30a841f8c42e93d0c3c6932173ed475..951d24f121ffd9bb19adb2f28544cb8008662c24 100644 (file)
#include "llvm/LLVMContext.h"
#include "llvm/MDNode.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
Value *llvm::MapValue(const Value *V, ValueMapTy &VM, LLVMContext *Context) {
return VM[V] = C;
} else {
- assert(0 && "Unknown type of constant!");
+ LLVM_UNREACHABLE("Unknown type of constant!");
}
}
index face5a192adf95c9c5a00131ef0436dea59dc9af..959da81b0d841744b48a4ff654600fc4aab57e33 100644 (file)
--- a/lib/VMCore/AsmWriter.cpp
+++ b/lib/VMCore/AsmWriter.cpp
unsigned NameLen, PrefixType Prefix) {
assert(NameStr && "Cannot get empty name!");
switch (Prefix) {
- default: assert(0 && "Bad prefix!");
+ default: LLVM_UNREACHABLE("Bad prefix!");
case NoPrefix: break;
case GlobalPrefix: OS << '@'; break;
case LabelPrefix: break;
else if (&CFP->getValueAPF().getSemantics() == &APFloat::PPCDoubleDouble)
Out << 'M';
else
- assert(0 && "Unsupported floating point type");
+ LLVM_UNREACHABLE("Unsupported floating point type");
// api needed to prevent premature destruction
APInt api = CFP->getValueAPF().bitcastToAPInt();
const uint64_t* p = api.getRawData();
else if (const Function *F = dyn_cast<Function>(G))
printFunction(F);
else
- assert(0 && "Unknown global");
+ LLVM_UNREACHABLE("Unknown global");
}
void write(const BasicBlock *BB) { printBasicBlock(BB); }
static void PrintVisibility(GlobalValue::VisibilityTypes Vis,
raw_ostream &Out) {
switch (Vis) {
- default: assert(0 && "Invalid visibility style!");
+ default: LLVM_UNREACHABLE("Invalid visibility style!");
case GlobalValue::DefaultVisibility: break;
case GlobalValue::HiddenVisibility: Out << "hidden "; break;
case GlobalValue::ProtectedVisibility: Out << "protected "; break;
} else if (isa<InlineAsm>(this)) {
WriteAsOperand(OS, this, true, 0);
} else {
- assert(0 && "Unknown value to print out!");
+ LLVM_UNREACHABLE("Unknown value to print out!");
}
}
index 378df839ad4a1bd07a00833cb51fc1b51124a60e..f3aa742c6bd978cdd27536cc440bb4c181b969e8 100644 (file)
#include "llvm/Instructions.h"
#include "llvm/Intrinsics.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstring>
using namespace llvm;
// Clean up the old call now that it has been completely upgraded.
CI->eraseFromParent();
} else {
- assert(0 && "Unknown function for CallInst upgrade.");
+ LLVM_UNREACHABLE("Unknown function for CallInst upgrade.");
}
return;
}
switch (NewFn->getIntrinsicID()) {
- default: assert(0 && "Unknown function for CallInst upgrade.");
+ default: LLVM_UNREACHABLE("Unknown function for CallInst upgrade.");
case Intrinsic::x86_mmx_psll_d:
case Intrinsic::x86_mmx_psll_q:
case Intrinsic::x86_mmx_psll_w:
index e019e6c29c1b590458e4556ac41103b04c01883c..3919643c004b58dedce3a3593ea01217ce6cbc9b 100644 (file)
#include "llvm/GlobalAlias.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/MathExtras.h"
break;
}
- assert(0 && "Failed to cast constant expression");
+ LLVM_UNREACHABLE("Failed to cast constant expression");
return 0;
}
APInt V1 = cast<ConstantInt>(C1)->getValue();
APInt V2 = cast<ConstantInt>(C2)->getValue();
switch (pred) {
- default: assert(0 && "Invalid ICmp Predicate"); return 0;
+ default: LLVM_UNREACHABLE("Invalid ICmp Predicate"); return 0;
case ICmpInst::ICMP_EQ: return ConstantInt::get(Type::Int1Ty, V1 == V2);
case ICmpInst::ICMP_NE: return ConstantInt::get(Type::Int1Ty, V1 != V2);
case ICmpInst::ICMP_SLT:return ConstantInt::get(Type::Int1Ty, V1.slt(V2));
APFloat C2V = cast<ConstantFP>(C2)->getValueAPF();
APFloat::cmpResult R = C1V.compare(C2V);
switch (pred) {
- default: assert(0 && "Invalid FCmp Predicate"); return 0;
+ default: LLVM_UNREACHABLE("Invalid FCmp Predicate"); return 0;
case FCmpInst::FCMP_FALSE: return ConstantInt::getFalse();
case FCmpInst::FCMP_TRUE: return ConstantInt::getTrue();
case FCmpInst::FCMP_UNO:
if (C1->getType()->isFloatingPoint()) {
int Result = -1; // -1 = unknown, 0 = known false, 1 = known true.
switch (evaluateFCmpRelation(C1, C2)) {
- default: assert(0 && "Unknown relation!");
+ default: LLVM_UNREACHABLE("Unknown relation!");
case FCmpInst::FCMP_UNO:
case FCmpInst::FCMP_ORD:
case FCmpInst::FCMP_UEQ:
// Evaluate the relation between the two constants, per the predicate.
int Result = -1; // -1 = unknown, 0 = known false, 1 = known true.
switch (evaluateICmpRelation(C1, C2, CmpInst::isSigned(pred))) {
- default: assert(0 && "Unknown relational!");
+ default: LLVM_UNREACHABLE("Unknown relational!");
case ICmpInst::BAD_ICMP_PREDICATE:
break; // Couldn't determine anything about these constants.
case ICmpInst::ICMP_EQ: // We know the constants are equal!
index 78ef3a8a7ebd684a47a17094281ef32c93b0497a..0f3239baebed75e1fe7e72b810b177b8076dc610 100644 (file)
--- a/lib/VMCore/Constants.cpp
+++ b/lib/VMCore/Constants.cpp
if (V.opcode == Instruction::FCmp)
return new CompareConstantExpr(Ty, Instruction::FCmp, V.predicate,
V.operands[0], V.operands[1]);
- assert(0 && "Invalid ConstantExpr!");
+ LLVM_UNREACHABLE("Invalid ConstantExpr!");
return 0;
}
};
switch (opc) {
default:
- assert(0 && "Invalid cast opcode");
+ LLVM_UNREACHABLE("Invalid cast opcode");
break;
case Instruction::Trunc: return getTrunc(C, Ty);
case Instruction::ZExt: return getZExt(C, Ty);
Constant *ConstantExpr::getCompareTy(unsigned short predicate,
Constant *C1, Constant *C2) {
switch (predicate) {
- default: assert(0 && "Invalid CmpInst predicate");
+ default: LLVM_UNREACHABLE("Invalid CmpInst predicate");
case CmpInst::FCMP_FALSE: case CmpInst::FCMP_OEQ: case CmpInst::FCMP_OGT:
case CmpInst::FCMP_OGE: case CmpInst::FCMP_OLT: case CmpInst::FCMP_OLE:
case CmpInst::FCMP_ONE: case CmpInst::FCMP_ORD: case CmpInst::FCMP_UNO:
if (C2 == From) C2 = To;
Replacement = ConstantExpr::get(getOpcode(), C1, C2);
} else {
- assert(0 && "Unknown ConstantExpr type!");
+ LLVM_UNREACHABLE("Unknown ConstantExpr type!");
return;
}
diff --git a/lib/VMCore/Core.cpp b/lib/VMCore/Core.cpp
index 0e3d7e87b0ae12e9b9c67b3073f227bea6e27fbf..068735e490071c60bfbb027b17dd70b2e0859525 100644 (file)
--- a/lib/VMCore/Core.cpp
+++ b/lib/VMCore/Core.cpp
#include "llvm/IntrinsicInst.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdlib>
#include <cstring>
return CI->getCallingConv();
else if (InvokeInst *II = dyn_cast<InvokeInst>(V))
return II->getCallingConv();
- assert(0 && "LLVMGetInstructionCallConv applies only to call and invoke!");
+ LLVM_UNREACHABLE("LLVMGetInstructionCallConv applies only to call and invoke!");
return 0;
}
return CI->setCallingConv(CC);
else if (InvokeInst *II = dyn_cast<InvokeInst>(V))
return II->setCallingConv(CC);
- assert(0 && "LLVMSetInstructionCallConv applies only to call and invoke!");
+ LLVM_UNREACHABLE("LLVMSetInstructionCallConv applies only to call and invoke!");
}
void LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index,
index b56168a969bbb25740cd911460defb038d4803c4..475d8cdd56c2562095b64f495e13727a07941d20 100644 (file)
APInt Upper(C);
uint32_t BitWidth = C.getBitWidth();
switch (pred) {
- default: assert(0 && "Invalid ICmp opcode to ConstantRange ctor!");
+ default: LLVM_UNREACHABLE("Invalid ICmp opcode to ConstantRange ctor!");
case ICmpInst::ICMP_EQ: Upper++; break;
case ICmpInst::ICMP_NE: Lower++; break;
case ICmpInst::ICMP_ULT: Lower = APInt::getMinValue(BitWidth); break;
index 0878694b047156173559813fe738b5e016c830e4..a454b5678922ceb5657678ea9640dac1aac3dfef 100644 (file)
OtherDT.dump();
cerr << "----- Invalid -----\n";
DT->dump();
- assert(0 && "Invalid dominator info");
+ LLVM_UNREACHABLE("Invalid dominator info");
}
DominanceFrontier *DF = P.getAnalysisIfAvailable<DominanceFrontier>();
OtherDF.dump();
cerr << "----- Invalid -----\n";
DF->dump();
- assert(0 && "Invalid dominator info");
+ LLVM_UNREACHABLE("Invalid dominator info");
}
}
// Keep track of higher level analysis used by this manager.
HigherLevelAnalysis.push_back(PRequired);
} else
- assert(0 && "Unable to accomodate Required Pass");
+ LLVM_UNREACHABLE("Unable to accomodate Required Pass");
}
// Set P as P's last user until someone starts using P.
cerr << "Unable to schedule '" << RequiredPass->getPassName();
cerr << "' required by '" << P->getPassName() << "'\n";
#endif
- assert(0 && "Unable to schedule pass");
+ LLVM_UNREACHABLE("Unable to schedule pass");
}
// Destructor
diff --git a/lib/VMCore/Type.cpp b/lib/VMCore/Type.cpp
index 8daaf915e41a6ed7741a9588e77a3a698ef8f914..c94e911f403b47b34fc96b4ff67daf52b2ceb212 100644 (file)
--- a/lib/VMCore/Type.cpp
+++ b/lib/VMCore/Type.cpp
}
return true;
} else {
- assert(0 && "Unknown derived type!");
+ LLVM_UNREACHABLE("Unknown derived type!");
return false;
}
}
index 3c3a29355e7ab515605b542aa9f119621e414928..4a51208c6669f309077888a65714aedd2a9f6e7d 100644 (file)
#include "llvm/LLVMContext.h"
#include "llvm/Type.h"
#include "llvm/DerivedTypes.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
MVT MVT::getExtendedIntegerVT(unsigned BitWidth) {
getVectorElementType().getMVTString();
if (isInteger())
return "i" + utostr(getSizeInBits());
- assert(0 && "Invalid MVT!");
+ LLVM_UNREACHABLE("Invalid MVT!");
return "?";
case MVT::i1: return "i1";
case MVT::i8: return "i8";
switch (Ty->getTypeID()) {
default:
if (HandleUnknown) return MVT::Other;
- assert(0 && "Unknown type!");
+ LLVM_UNREACHABLE("Unknown type!");
return MVT::isVoid;
case Type::VoidTyID:
return MVT::isVoid;
index 5d800aff9062c7541674e5d692b5e8c32e03dac2..1f43569dde53c69d89e34af37c25ec7b8daea2f1 100644 (file)
--- a/lib/VMCore/Verifier.cpp
+++ b/lib/VMCore/Verifier.cpp
if (!Broken) return false;
msgs << "Broken module found, ";
switch (action) {
- default: assert(0 && "Unknown action");
+ default: LLVM_UNREACHABLE("Unknown action");
case AbortProcessAction:
msgs << "compilation aborted!\n";
cerr << msgs.str();
"Shift return type must be same as operands!", &B);
break;
default:
- assert(0 && "Unknown BinaryOperator opcode!");
+ LLVM_UNREACHABLE("Unknown BinaryOperator opcode!");
}
visitInstruction(B);