Make DwarfExpression store the AsmPrinter instead of the TargetMachine.

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225731 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h
index 683f1d78c49f7736f8c7b97fd6d852d0bb22794c..4f2c9495a4967c1d510934cef740f4f1bdd9500a 100644 (file)
--- a/include/llvm/CodeGen/AsmPrinter.h
+++ b/include/llvm/CodeGen/AsmPrinter.h
@@ -133,6 +133,7 @@ public:
   virtual ~AsmPrinter();
 
   DwarfDebug *getDwarfDebug() { return DD; }
   virtual ~AsmPrinter();
 
   DwarfDebug *getDwarfDebug() { return DD; }

+  DwarfDebug *getDwarfDebug() const { return DD; }

 
   /// Return true if assembly output should contain comments.
   ///
 
   /// Return true if assembly output should contain comments.
   ///

diff --git a/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp b/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
index 9a3377a49b6bd15be16dac960e2ad95660b2307c..d3131541eb366c74e0b8c4952cd445015cc33240 100644 (file)
--- a/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
@@ -37,8 +37,8 @@ class DebugLocDwarfExpression : public DwarfExpression {
   ByteStreamer &BS;
 
 public:
   ByteStreamer &BS;
 
 public:

-  DebugLocDwarfExpression(TargetMachine &TM, ByteStreamer &BS)
-      : DwarfExpression(TM), BS(BS) {}
+  DebugLocDwarfExpression(const AsmPrinter &AP, ByteStreamer &BS)
+      : DwarfExpression(AP), BS(BS) {}

 
   void EmitOp(uint8_t Op, const char *Comment) override;
   void EmitSigned(int Value) override;
 
   void EmitOp(uint8_t Op, const char *Comment) override;
   void EmitSigned(int Value) override;


@@ -222,14 +222,14 @@ void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer,
                                      unsigned PieceSizeInBits,
                                      unsigned PieceOffsetInBits) const {
   assert(MLoc.isReg() && "MLoc must be a register");
                                      unsigned PieceSizeInBits,
                                      unsigned PieceOffsetInBits) const {
   assert(MLoc.isReg() && "MLoc must be a register");

-  DebugLocDwarfExpression Expr(TM, Streamer);
+  DebugLocDwarfExpression Expr(*this, Streamer);

   Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
 }
 
 void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
                                   unsigned PieceSizeInBits,
                                   unsigned PieceOffsetInBits) const {
   Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
 }
 
 void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
                                   unsigned PieceSizeInBits,
                                   unsigned PieceOffsetInBits) const {

-  DebugLocDwarfExpression Expr(TM, Streamer);
+  DebugLocDwarfExpression Expr(*this, Streamer);

   Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
 }
 
   Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
 }
 


@@ -237,7 +237,7 @@ void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
 void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
                                 const MachineLocation &MLoc,
                                 bool Indirect) const {
 void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
                                 const MachineLocation &MLoc,
                                 bool Indirect) const {

-  DebugLocDwarfExpression Expr(TM, Streamer);
+  DebugLocDwarfExpression Expr(*this, Streamer);

   const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
   int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
   if (Reg < 0) {
   const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
   int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
   if (Reg < 0) {

diff --git a/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
index e398e46b323b4dfa71bf770dfb31ec2ca08d58b0..767846c224ada34b529049143961f75c99dd602d 100644 (file)
--- a/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
@@ -12,7 +12,10 @@
 //===----------------------------------------------------------------------===//
 
 #include "DwarfExpression.h"
 //===----------------------------------------------------------------------===//
 
 #include "DwarfExpression.h"

+
+#include "DwarfDebug.h"

 #include "llvm/ADT/SmallBitVector.h"
 #include "llvm/ADT/SmallBitVector.h"

+#include "llvm/CodeGen/AsmPrinter.h"

 #include "llvm/Support/Dwarf.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Support/Dwarf.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetRegisterInfo.h"


@@ -21,6 +24,10 @@
 
 using namespace llvm;
 
 
 using namespace llvm;
 

+const TargetRegisterInfo *DwarfExpression::getTRI() const {
+  return AP.TM.getSubtargetImpl()->getRegisterInfo();
+}
+

 void DwarfExpression::AddReg(int DwarfReg, const char* Comment) {
   assert(DwarfReg >= 0 && "invalid negative dwarf register number");
   if (DwarfReg < 32) {
 void DwarfExpression::AddReg(int DwarfReg, const char* Comment) {
   assert(DwarfReg >= 0 && "invalid negative dwarf register number");
   if (DwarfReg < 32) {


@@ -66,8 +73,7 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
 }
 
 bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
 }
 
 bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {

-  const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
-  int DwarfReg = TRI->getDwarfRegNum(MachineReg, false);
+  int DwarfReg = getTRI()->getDwarfRegNum(MachineReg, false);

   if (DwarfReg < 0)
     return false;
 
   if (DwarfReg < 0)
     return false;
 


@@ -84,7 +90,7 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
 void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
                                          unsigned PieceSizeInBits,
                                          unsigned PieceOffsetInBits) {
 void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
                                          unsigned PieceSizeInBits,
                                          unsigned PieceOffsetInBits) {

-  const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
+  const TargetRegisterInfo *TRI = getTRI();

   int Reg = TRI->getDwarfRegNum(MachineReg, false);
 
   // If this is a valid register number, emit it.
   int Reg = TRI->getDwarfRegNum(MachineReg, false);
 
   // If this is a valid register number, emit it.

diff --git a/lib/CodeGen/AsmPrinter/DwarfExpression.h b/lib/CodeGen/AsmPrinter/DwarfExpression.h
index 595ef30d112292ca1a3c2c45e6749f52b9b135d1..c02b4e197e7ae4ca2e6a101ef5154129c98254dd 100644 (file)
--- a/lib/CodeGen/AsmPrinter/DwarfExpression.h
+++ b/lib/CodeGen/AsmPrinter/DwarfExpression.h
@@ -18,16 +18,20 @@
 
 namespace llvm {
 
 
 namespace llvm {
 

-class TargetMachine;
+class AsmPrinter;
+class TargetRegisterInfo;

 
 /// Base class containing the logic for constructing DWARF expressions
 /// independently of whether they are emitted into a DIE or into a .debug_loc
 /// entry.
 class DwarfExpression {
 protected:
 
 /// Base class containing the logic for constructing DWARF expressions
 /// independently of whether they are emitted into a DIE or into a .debug_loc
 /// entry.
 class DwarfExpression {
 protected:

-  TargetMachine &TM;
+  const AsmPrinter ≈
+  // Various convenience accessors that extract things out of AsmPrinter.
+  const TargetRegisterInfo *getTRI() const;
+

 public:
 public:

-  DwarfExpression(TargetMachine &TM) : TM(TM) {}
+  DwarfExpression(const AsmPrinter &AP) : AP(AP) {}

   virtual ~DwarfExpression() {}
 
   virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
   virtual ~DwarfExpression() {}
 
   virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;

diff --git a/lib/CodeGen/AsmPrinter/DwarfUnit.cpp b/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
index 8998795358007502ff460313185c1f05d2c4e4a7..99a9205b8b23e41b4267ac6429031b4b7dc2555c 100644 (file)
--- a/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
@@ -49,8 +49,8 @@ class DIEDwarfExpression : public DwarfExpression {
   DwarfUnit &DU;
   DIELoc ¨
 public:
   DwarfUnit &DU;
   DIELoc ¨
 public:

-  DIEDwarfExpression(TargetMachine &TM, DwarfUnit &DU, DIELoc &DIE)
-  : DwarfExpression(TM), DU(DU), DIE(DIE) {}
+  DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE)
+  : DwarfExpression(AP), DU(DU), DIE(DIE) {}

 
   void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
   void EmitSigned(int Value) override;
 
   void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
   void EmitSigned(int Value) override;


@@ -68,8 +68,7 @@ void DIEDwarfExpression::EmitUnsigned(unsigned Value) {
   DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
 }
 unsigned DIEDwarfExpression::getFrameRegister() {
   DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
 }
 unsigned DIEDwarfExpression::getFrameRegister() {

-  const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
-  return TRI->getFrameRegister(*DU.getAsmPrinter()->MF);
+  return getTRI()->getFrameRegister(*AP.MF);

 }
 
 
 }
 
 


@@ -431,7 +430,7 @@ void DwarfUnit::addSourceLine(DIE &Die, DINameSpace NS) {
 /// addRegisterOp - Add register operand.
 bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
                                    unsigned SizeInBits, unsigned OffsetInBits) {
 /// addRegisterOp - Add register operand.
 bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
                                    unsigned SizeInBits, unsigned OffsetInBits) {

-  DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
+  DIEDwarfExpression Expr(*Asm, *this, TheDie);

   Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
   return true;
 }
   Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
   return true;
 }


@@ -439,7 +438,7 @@ bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
 /// addRegisterOffset - Add register offset.
 bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
                                   int64_t Offset) {
 /// addRegisterOffset - Add register offset.
 bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
                                   int64_t Offset) {

-  DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
+  DIEDwarfExpression Expr(*Asm, *this, TheDie);

   return Expr.AddMachineRegIndirect(Reg, Offset);
 }
 
   return Expr.AddMachineRegIndirect(Reg, Offset);
 }