Add support for PointerLikeRegClass to FixedLenDecoderEmitter

This is more prep for adding the PowerPC disassembler. FixedLenDecoderEmitter
should recognize PointerLikeRegClass operands as register types, and generate
register-like decoding calls instead of treating them like immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197680 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/FixedLenDecoderEmitter.cpp b/utils/TableGen/FixedLenDecoderEmitter.cpp
index d2d3f3dd07644034df6b92c57a684ca954fae306..0918d0b1dfa2cd68e583e8c0ab969b99438e5d4d 100644 (file)
--- a/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1771,6 +1771,10 @@ static bool populateInstruction(const CodeGenInstruction &CGI, unsigned Opc,
     if (TypeRecord->isSubClassOf("RegisterClass")) {
       Decoder = "Decode" + TypeRecord->getName() + "RegisterClass";
       isReg = true;
+    } else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) {
+      Decoder = "DecodePointerLikeRegClass" +
+                utostr(TypeRecord->getValueAsInt("RegClassKind"));
+      isReg = true;
     }
 
     RecordVal *DecoderString = TypeRecord->getValue("DecoderMethod");