]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - opencl/llvm.git/history - lib/Target/AArch64/AArch64ISelLowering.cpp
AArch64: Tidy up a few comments.
[opencl/llvm.git] / lib / Target / AArch64 / AArch64ISelLowering.cpp
2014-08-11 Jim GrosbachAArch64: Tidy up a few comments.
2014-08-06 Eric ChristopherRemove the target machine from CCState. Previously...
2014-08-06 James Molloy[AArch64] Conditional selects are expensive on out...
2014-08-05 Yi KongAArch64: Add support for instruction prefetch intrinsic
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn...
2014-08-01 Chad Rosier[AArch64] Generate tbz/tbnz when comparing against...
2014-07-31 Louis GerbargMake sure no loads resulting from load->switch DAGCombi...
2014-07-27 Matt ArsenaultAdd alignment value to allowsUnalignedMemoryAccess
2014-07-27 Tim NorthoverAArch64: fix conversion of 'J' inline asm constraints.
2014-07-25 Akira Hatanaka[stack protector] Fix a potential security bug in stack...
2014-07-25 Benjamin KramerRun sort_includes.py on the AArch64 backend.
2014-07-24 Tim NorthoverAArch64: refactor ReconstructShuffle function
2014-07-24 Kevin Qin[AArch64] Fix a bug generating incorrect instruction...
2014-07-23 Jim Grosbach[X86,AArch64] Extend vcmp w/ unary op combine to work...
2014-07-23 Jim GrosbachX86: restrict combine to when type sizes are safe.
2014-07-23 Chad Rosier[AArch64] Lower sdiv x, pow2 using add + select + shift.
2014-07-18 Tim NorthoverAArch64: implement efficient f16 bitcasts
2014-07-18 Tim NorthoverAArch64: support f16 extend/trunc operations.
2014-07-18 Jim GrosbachAArch64: Constant fold converting vector setcc results...
2014-07-15 Tim NorthoverAArch64: fall back to generic code for out of range...
2014-07-11 Oliver StannardARM: Allow __fp16 as a function arg or return type...
2014-07-07 Kevin Qin[AArch64] Normalize all constants to build a vector.
2014-07-03 Chandler Carruth[codegen,aarch64] Add a target hook to the code generat...
2014-07-01 Juergen Ributzka[DAG] Pass the argument list to the CallLoweringInfo...
2014-07-01 Tim NorthoverAArch64: fix comment typo
2014-06-30 Chad Rosier[AArch64] Convert mul x, -(pow2 +/- 1) to shift + add...
2014-06-19 Craig TopperConvert some assert(0) to llvm_unreachable or fold...
2014-06-18 Kevin Qin[AArch64] Fix a pattern match failure caused by creatin...
2014-06-18 Craig TopperReplace some assert(0)'s with llvm_unreachable.
2014-06-16 James Molloy[AArch64] Fix a fencepost error in lowering for llvm...
2014-06-15 Tim NorthoverAArch64: improve handling & modelling of FP_TO_XINT...
2014-06-15 Tim NorthoverAArch64: improve vector [su]itofp handling.
2014-06-10 Eric ChristopherMove AArch64TargetLowering to AArch64Subtarget.
2014-06-09 Chad Rosier[AArch64] When combining constant mul of power of 2...
2014-06-08 Craig Topper[C++11] Use 'nullptr'.
2014-06-03 Tim NorthoverAArch64: mark small types (i1, i8, i16) as promoted
2014-06-03 Jiangning Liu[AArch64] Correctly deal with VPR stack parameter passing.
2014-05-31 Eric ChristopherHave the TLOF creation take a Triple rather than needin...
2014-05-29 Hao LiuFix an assertion failure caused by v1i64 in DAGCombiner...
2014-05-26 Tim NorthoverAArch64: force i1 to be zero-extended at an ABI boundary.
2014-05-26 Tim NorthoverAArch64: simplify calling conventions slightly.
2014-05-24 Tim NorthoverAArch64/ARM64: move ARM64 into AArch64's place
2014-05-24 Tim NorthoverAArch64/ARM64: remove AArch64 from tree prior to renami...
2014-05-19 Benjamin KramerSDAG: Legalize vector BSWAP into a shuffle if the shuff...
2014-05-17 Saleem AbdulrasoolTarget: remove old constructors for CallLoweringInfo
2014-05-16 Rafael EspindolaRevert "Implement global merge optimization for global...
2014-05-15 Jiangning LiuImplement global merge optimization for global variables.
2014-05-11 Hal FinkelPass the value type to TLI::getRegisterByName
2014-05-06 Renato GolinImplememting named register intrinsics
2014-04-29 Benjamin KramerAArch64: Mark vector long multiplication as expand.
2014-04-27 Craig TopperConvert SelectionDAG::getMergeValues to use ArrayRef.
2014-04-26 Craig TopperConvert getMemIntrinsicNode to take ArrayRef of SDValue...
2014-04-26 Craig TopperConvert SelectionDAG::getNode methods to use ArrayRef...
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition.
2014-04-24 Reid KlecknerAdd 'musttail' marker to call instructions
2014-04-22 Jiangning Liu[AArch64] Enable global merge pass.
2014-04-22 Chandler Carruth[Modules] Fix potential ODR violations by sinking the...
2014-04-18 Jiangning LiuThis is one of the optimizations ported from ARM64...
2014-04-18 Jiangning LiuThis commit enables unaligned memory accesses of vector...
2014-04-16 Craig TopperConvert SelectionDAG::getVTList to use ArrayRef
2014-04-15 Nick LewyckyBreak PseudoSourceValue out of the Value hierarchy...
2014-04-12 Chad Rosier[AArch64] Implement the isLegalAddressingMode and getSc...
2014-04-09 Chad Rosier[AArch64] Implement the isZExtFree APIs.
2014-04-09 Chad Rosier[AArch64] Implement the isTruncateFree API.
2014-04-04 Tim NorthoverARM64: handle v1i1 types arising from setcc properly.
2014-04-04 Craig TopperMake consistent use of MCPhysReg instead of uint16_t...
2014-03-27 Logan Chien[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS
2014-03-26 Christian PirkerAArch64_BE function argument passing for ARM ABI
2014-03-10 Tim NorthoverAArch64: fix LowerCONCAT_VECTORS for new CodeGen.
2014-03-02 Benjamin Kramer[C++11] Replace llvm::next and llvm::prior with std...
2014-02-20 Oliver StannardAArch64: __va_list.__stack must be 8-byte aligned
2014-02-18 Ana Pazos[AArch64] Expanded sin, cos, pow with FP vector types...
2014-02-18 Jiangning LiuFix a typo about lowering AArch64 va_copy.
2014-02-14 Kevin Qin[AArch64 NEON] Fix a bug to avoid using floating type...
2014-02-14 Hao Liu[AArch64]Fix the assertion failure caused by "v1i1...
2014-01-30 Chad Rosier[AArch64] Custom lower concat_vector patterns with...
2014-01-29 Kevin Qin[AArch64 NEON] Lower SELECT_CC with vector operand.
2014-01-27 Kevin Qin[AArch64 NEON] Try to generate CONCAT_VECTOR when lower...
2014-01-27 Kevin QinRevert r199791.
2014-01-23 Kevin Qinfix some spell mistakes around 'ConcatVector' and ...
2014-01-22 Kevin Qin[AArch64 NEON] Try to generate CONCAT_VECTOR when lower...
2014-01-21 Kevin Qin[AArch64 NEON] Fix a bug caused by undef lane when...
2014-01-20 Chandler CarruthRevert r199628: "[AArch64 NEON] Fix a bug caused by...
2014-01-20 Kevin Qin[AArch64 NEON] Fix a bug caused by undef lane when...
2014-01-17 Kevin Qin[AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM...
2014-01-17 Kevin Qin[AArch64 NEON] Custom lower conversion between vector...
2014-01-17 Hao Liu[AArch64]Fix the problem can't select concat_vectors...
2014-01-15 Jiangning LiuFor AArch64, lowering sext_inreg and generate optimized...
2014-01-14 Tim NorthoverAArch64: don't try to handle [SU]MUL_LOHI nodes
2014-01-14 Lang HamesAdd FPExt option to CCValAssign::LocInfo. When generati...
2014-01-13 Andrea Di Biagio[AArch64] Fix assertion failure caused by an invalid...
2014-01-13 Kevin Qin[AArch64 NEON] Add more scenarios to use perm instructi...
2014-01-10 Kristof BeylsSilence unused variable warning for non-asserting build...
2014-01-10 Kristof BeylsMake sure -use-init-array has intended effect on all...
2014-01-08 Kevin Qin[AArch64 NEON] Fix generating incorrect value type...
2014-01-06 Bill WendlingRemove unnecessary #includes.
2014-01-06 Bill WendlingRefactor function that checks that __builtin_returnaddr...
2014-01-05 Bill WendlingEmit an error message if the value passed to __builtin_...
2014-01-01 Rafael EspindolaRemove the 's' DataLayout specification
2013-12-30 Hao Liu[AArch64]Fix the problem that can't select mul of v1i64...
next