[X86] Convert all the i8imm used by SSE and AVX instructions to u8imm.
[opencl/llvm.git] / lib / Target / X86 / X86InstrSSE.td
2015-01-21 Craig Topper[X86] Convert all the i8imm used by SSE and AVX instruc...
2015-01-21 Craig Topper[x86] Add assembly parser bounds checking to the immedi...
2015-01-20 Craig Topper[x86] Add some mayLoad/hasSideEffects flags. Remove...
2015-01-11 Simon Pilgrim[X86][SSE] Minor fix to VPBLENDW AVX2 commutation.
2014-12-27 Craig Topper[x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selec...
2014-12-19 Elena DemikhovskyMasked load and store codegen - fixed 128-bit vectors
2014-12-19 Sanjay PatelModel sqrtss as a binary operation with one source...
2014-12-18 Robert Khasanov[AVX512] Enable FP arithmetic lowering for AVX512VL...
2014-12-18 Craig Topper[X86] Don't use PS prefix on LDMXCSR/STMXCSR.
2014-12-16 Robert Khasanov[AVX512] Enable integer arithmetic lowering for AVX512B...
2014-12-16 Sanjay Patelcombine consecutive subvector 16-byte loads into one...
2014-12-12 Robert Khasanov[AVX512] Enabling bit logic lowering
2014-12-12 Robert Khasanov[AVX512] Enabling MIN/MAX lowering.
2014-12-11 Ahmed Bougacha[X86] Add a temporary testcase for PR21876/r223996.
2014-12-11 Ahmed Bougacha[X86] Add back AVX2 VR256 PMOVX patterns.
2014-12-10 Sanjay PatelMatch new shuffle codegen for MOVHPD patterns
2014-12-06 Ahmed Bougacha[X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.
2014-12-04 Elena DemikhovskyMasked Load / Store Intrinsics - the CodeGen part.
2014-12-04 Michael Liao[X86] Clean up whitespace as well as minor coding style
2014-12-02 Simon Pilgrim[X86][SSE] Keep 4i32 vector insertions in integer domai...
2014-11-28 Duncan P. N. Exon... Revert "Masked Vector Load and Store Intrinsics."
2014-11-26 Craig TopperReplace neverHasSideEffects=1 with hasSideEffects=0...
2014-11-23 Elena DemikhovskyMasked Vector Load and Store Intrinsics.
2014-11-04 Simon Pilgrim[X86][SSE] Enable commutation for SSE immediate blend...
2014-10-17 Andrea Di Biagio[X86] Fix missed selection of non-temporal store of...
2014-10-06 Benjamin KramerX86: Drop the isConvertibleTo3Addr bit from shufps...
2014-10-03 Chandler Carruth[x86] Add a really preposterous number of patterns...
2014-10-03 Chandler Carruth[x86] Adjust the patterns for lowering X86vzmovl nodes...
2014-10-03 Chandler Carruth[x86] Teach the new vector shuffle lowering to aggressi...
2014-10-02 Chandler Carruth[x86] Teach the new vector shuffle lowering to widen...
2014-10-01 Chandler Carruth[x86] Teach the new vector shuffle lowering about VBROA...
2014-09-26 Andrea Di Biagio[X86][SchedModel] SSE reciprocal square root instructio...
2014-09-26 Robert Khasanov[AVX512] Added load/store from BW/VL subsets to Registe...
2014-09-25 Akira Hatanaka[X86,AVX] Add an isel pattern for X86VBroadcast.
2014-09-23 Chandler Carruth[x86] Teach the AVX1 path of the new vector shuffle...
2014-09-22 Chandler Carruth[x86] Rename X86ISD::VPERMILP to X86ISD::VPERMILPI...
2014-09-22 Sanjay PatelUse broadcasts to optimize overall size when loading...
2014-09-16 Chandler Carruth[x86] Remove the last vestiges of the BLENDI-based...
2014-09-15 Chandler Carruth[x86] Start fixing our emission of ADDSUBPS and ADDSUBP...
2014-09-06 Chandler Carruth[x86] Fix a pretty horrible bug and inconsistency in...
2014-08-13 Robert Khasanov[SKX] Extended non-temporal load/store instructions...
2014-08-07 Quentin Colombet[X86][SchedModel] Fixed missing/wrong scheduling model...
2014-08-06 Quentin Colombet[X86][SchedModel] Fixed some wrong scheduling model...
2014-07-17 Tim NorthoverCodeGen: extend f16 conversions to permit types > float.
2014-07-03 Andrea Di Biagio[X86] Add ISel patterns to select 'f32_to_f16' and...
2014-06-25 Andrea Di Biagio[X86] Always prefer to lower a VECTOR_SHUFFLE into...
2014-06-25 Andrea Di Biagio[X86] Add target combine rule to select ADDSUB instruct...
2014-06-21 Andrea Di Biagio[X86] Add ISel patterns to select SSE3/AVX ADDSUB instr...
2014-06-20 Chandler Carruth[x86] Make the x86 PACKSSWB, PACKSSDW, PACKUSWB, and...
2014-05-29 Adam Nemet[X86] Remove AVX1 vbroadcast intrinsics
2014-05-19 Filipe CabecinhasAdded more insertps optimizations
2014-05-15 Tim NorthoverTableGen: use correct MIOperand when printing aliases
2014-05-15 Tim NorthoverTableGen/ARM64: print aliases even if they have syntax...
2014-04-26 Benjamin KramerX86: Lower SMUL_LOHI of v4i32 to pmuldq when SSE4.1...
2014-04-26 Benjamin KramerX86: Add patterns for MULHU/MULHS of v8i16 and v16i16.
2014-04-23 Quentin Colombet[X86] Fix missing/wrong scheduling model found by code...
2014-04-21 Filipe CabecinhasRename X86insrtps to the proper instruction name.
2014-04-18 Benjamin KramerX86: Pattern match scalar loads + vcvtph2ps into just...
2014-04-09 Jim GrosbachAdd support for load folding of avx1 logical instructions
2014-04-04 Quentin ColombetRevert r205599, the commit was not intended to have...
2014-04-04 Quentin Colombet[RegAllocGreedy][Last Chance Recoloring] Emit diagnosti...
2014-03-25 Cameron McInallyFix AVX2 Gather execution domains.
2014-03-24 Quentin Colombet[X86][ISelDAG] Add missing fallback patterns for avx2...
2014-02-24 Quentin Colombet[X86][SchedModel] Add missing scheduling model for...
2014-02-20 Craig Topper[x86] Switch PAUSE instruction to use XS prefix instead...
2014-02-18 Craig TopperAdd a bunch of OpSize32 tags to 64-bit mode only instru...
2014-02-18 Craig TopperAdd an x86 prefix encoding for instructions that would...
2014-02-10 Craig TopperRecommit r201059 and r201060 with hopefully a fix for...
2014-02-10 Bob WilsonRevert r201059 and r201060.
2014-02-10 Craig TopperAdd MRMXr/MRMXm form to X86 for use by instructions...
2014-02-07 Jim GrosbachX86: Resolve a long standing FIXME and properly isel...
2014-02-06 Tim NorthoverX86: deduplicate V[SZ]EXT_MOVL and V[SZ]EXT nodes
2014-02-02 Craig TopperMerge x86 HasOpSizePrefix/HasOpSize16Prefix into a...
2014-01-30 Craig TopperRemove duplicate patterns
2014-01-30 Craig TopperRemove some AddedComplexity tags that were forcing...
2014-01-17 Craig TopperAdd OpSize16 flags to 32-bit CRC32 instructions so...
2014-01-14 Craig TopperSeparate the concept of 16-bit/32-bit operand size...
2014-01-05 Craig TopperAdd the other form of movq xmm,xmm for the disassembler.
2014-01-05 Craig TopperUse patterns to remove some duplicate instructions.
2014-01-05 Craig TopperMark x86 _alt instructions as AsmParserOnly so they...
2014-01-05 Craig TopperAdd a new x86 specific instruction flag to force some...
2014-01-02 Craig TopperMark all x86 Int_ and _Int patterns as isCodeGenOnly...
2013-12-20 Eric Christopher[x86] Rename In32BitMode predicate to Not64BitMode
2013-12-16 Elena DemikhovskyAVX-512: Added legal type MVT::i1 and VK1 register...
2013-12-12 Andrea Di BiagioAdded new X86 patterns to select SSE scalar fp arithmet...
2013-12-10 Andrea Di BiagioEnsure that the backend no longer emits unnecessary...
2013-11-26 Cameron McInallyAdd an intrinsic for the SSE2 PAUSE instruction.
2013-11-19 Cameron McInallyFix assembly operands for the SSE2 cvtsd2ss instruction.
2013-11-05 Craig TopperLift alignment restrictions on load folding for a signi...
2013-11-02 Michael LiaoFix PR17764
2013-10-23 Benjamin KramerX86: Custom lower sext v16i8 to v16i16, and the corresp...
2013-10-23 Benjamin KramerX86: Custom lower zext v16i8 to v16i16.
2013-10-22 Craig TopperReplace (V)MOVZDI2PDIrr/rm instructions with patterns...
2013-10-21 Lang HamesX86 vector element shift-by-immediate instructions...
2013-10-15 Craig TopperRemove x86_sse42_crc32_64_8 intrinsic. It has no functi...
2013-10-14 Craig TopperCreate classes to reduce the size of the tablegen entri...
2013-10-14 Craig TopperAllow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd...
2013-10-14 Craig TopperAdd disassembler support for SSE4.1 register/register...
2013-10-14 Craig TopperMark MOVMSKPS/MOVMSKPD/VPINSRWrr64i as AsmParserOnly...
2013-10-14 Craig TopperDon't use 64-bit versions of MOVMSKPD in CodeGen. The...
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