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Updates to sync with changes in upstream.
[opencl/llvm.git] / test / CodeGen / ARM / reg_sequence.ll
2014-05-30 Tim NorthoverARM & AArch64: make use of common cmpxchg idioms after...
2014-02-10 Tim NorthoverARM: use LLVM IR to represent the vshrn operation
2013-10-11 Matthias BraunRevert "Tests: Be less dependent on a specific schedule...
2013-10-11 Matthias BraunTests: Be less dependent on a specific schedule/regalloc
2013-08-20 Tim NorthoverARM: implement some simple f64 materializations.
2013-07-14 Stephen LinMass update to CodeGen tests to use CHECK-LABEL for...
2013-02-22 Kristof BeylsMake ARMAsmPrinter generate the correct alignment speci...
2012-09-27 Jakob Stoklund OlesenEnable the new coalescer algorithm by default.
2012-09-20 Evan ChengTry to make these tests more portable.
2012-09-18 Evan ChengUse vld1 / vst2 for unaligned v2f64 load / store. e...
2012-04-01 Nadav RotemThis commit contains a few changes that had to go in...
2011-11-14 Jim GrosbachARM VLDR/VSTR instructions don't need a size suffix.
2011-11-07 Benjamin KramerSimplify some uses of utohexstr.
2011-07-15 Owen AndersonRemove VMOVDneon and VMOVQ, which are just aliases...
2011-03-31 Jakob Stoklund OlesenFix ARM tests to be register allocator independent.
2010-12-05 Evan ChengMaking use of VFP / NEON floating point multiply-accumu...
2010-11-03 Evan ChengTwo sets of changes. Sorry they are intermingled.
2010-10-21 Andrew Trickputback r116983 and fix simple-fp-encoding.ll tests
2010-10-21 Owen AndersonRevert r116983, which is breaking all the buildbots.
2010-10-21 Evan ChengAdd missing scheduling itineraries for transfers betwee...
2010-10-09 Evan ChengCorrect some load / store instruction itinerary mistakes:
2010-10-08 Bob WilsonChange register allocation order for ARM VFP and NEON...
2010-09-02 Bob WilsonConvert VLD1 and VLD2 instructions to use pseudo-instru...
2010-08-27 Bob WilsonAdd alignment arguments to all the NEON load/store...
2010-08-20 Bob WilsonReplace some NEON vmovl intrinsic that I missed earlier.
2010-07-13 Bob WilsonUse a target-specific VMOVIMM DAG node instead of BUILD...
2010-07-09 Bob WilsonPrint "dregpair" NEON operands with a space between...
2010-07-09 Bob WilsonReenable DAG combining for vector shuffles. It looks...
2010-06-24 Dan GohmanEliminate the other half of the BRCOND optimization...
2010-06-17 Rafael EspindolaRemove arm_apcscc from the test files. It is the defaul...
2010-05-28 Evan ChengFix some latency computation bugs: if the use is not...
2010-05-21 Evan ChengChange ARM scheduling default to list-hybrid if the...
2010-05-19 Jakob Stoklund OlesenTwoAddressInstructionPass doesn't really know how to...
2010-05-18 Evan ChengFix PR7162: Use source register classes and sub-indices...
2010-05-17 Evan ChengFix PR7175. Insert copies of a REG_SEQUENCE source...
2010-05-17 Evan ChengFix PR7156. If the sources of a REG_SEQUENCE are all...
2010-05-17 Evan ChengCareful with reg_sequence coalescing to not to overwrit...
2010-05-17 Evan ChengTurn on -neon-reg-sequence by default.