LLVMBuild: Add description files for the LLVM tools.
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LLVMBuild: Alphabetize required_libraries lists.
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Target/LLVMBuild: Order components alphabetically.
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Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
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Add an option '--enable-libcpp' that will have the compiler pass on
options to use libc++ as the default c++ library.
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options to use libc++ as the default c++ library.
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Nuke no longer accurate comment.
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Preserve MachineMemOperands in ARMLoadStoreOptimizer.
Fixes PR8113.
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Fixes PR8113.
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ARM allow Q registers in vldm/vstm register lists.
rdar://9672822
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rdar://9672822
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build/Make: Switch back to llvm-config for now, I foolishly forgot to think
about cross compiles.
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about cross compiles.
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Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.
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Move X86 specific test in X86 directory.
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Move X86 specific test in X86 directory.
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Remove FIXME comment that should have been removed with r144351.
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allow non-device function calls in PTX when natively handling device-side printf
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add rules in tabgen for PTX COPY_ADDRESS of frameindex
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12 years agoClients are responsible for initializing the targets, remove it from the disassembler...
Clients are responsible for initializing the targets, remove it from the disassembler API.
This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness
should be unaffected.
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This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness
should be unaffected.
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Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
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Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
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Add lowering for AVX2 shift instructions.
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Rename variables to avoid confusion. No functionallity change intended.
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Add support for using immediates with select instructions.
rdar://10412592
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rdar://10412592
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Do not try to detect DAG combine patterns for integer multiply-add/sub if value
type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
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type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
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64-bit atomic instructions.
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Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
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Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
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64-bit versions of jal, jalr and bal.
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Emit Mips64's sequence of instructions that set global register in prologue.
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Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
VK_Mips_GPOFF_HI/LO.
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VK_Mips_GPOFF_HI/LO.
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Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
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Initialize variable.
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When loading a value, treat an i1 as an i8.
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If we have a DIE with an AT_specification use that instead of the normal
addr DIE when adding to the dwarf accelerator tables.
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addr DIE when adding to the dwarf accelerator tables.
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Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
lead to it trying to re-mark a value marked as a constant with a different value. It also appears to trigger very rarely.
Fixes PR11357.
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lead to it trying to re-mark a value marked as a constant with a different value. It also appears to trigger very rarely.
Fixes PR11357.
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Reenable compact unwinding now that <rdar://problem/10430076> is fixed.
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If we have to reset the calculation of the compact encoding, then also reset the
"saved register" index.
<rdar://problem/10430076>
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"saved register" index.
<rdar://problem/10430076>
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Add support for using MVN to materialize negative constants.
rdar://10412592
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rdar://10412592
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Disable compact unwind generation until I can solve the codegen problems.
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llvm-build: Add --configure-target-def-file option.
- Can be used to generate the substitution values we currently use for the various target related .def files.
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- Can be used to generate the substitution values we currently use for the various target related .def files.
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LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
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Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
rdar://10429490
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rdar://10429490
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ARM let processInstruction() tranforms chain.
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Add blurb for VMKit.
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build/Make: llvm-config-2 needs to use EXEEXT, since it is an actual executable
now.
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now.
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Fix typo.
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Thumb2 parsing for push/pop w/ hi registers in the reglist.
rdar://10130228.
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rdar://10130228.
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Thumb1 diagnostics for reglist on PUSH/POP fix.
Was not checking the first register in the register list.
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Was not checking the first register in the register list.
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git: Add tools/lldb to the ignore list.
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Check in getOrCreateSubprogramDIE if a declaration exists and if so output
it first.
This is a more general fix to pr11300.
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it first.
This is a more general fix to pr11300.
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build/Make: Try to switch over to llvm-config-2 again, now that I've cleaned up
some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.
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some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.
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Thumb MUL assembly parsing for 3-operand form.
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
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Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
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build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.
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that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.
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build/MCDisassembler: Fix required libraries list of MCDisassembler to use
all-targets instead of an explicit list.
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all-targets instead of an explicit list.
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Make types and namespaces take multiple DIEs for the accelerator tables
as well.
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as well.
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Remove a really ancient line from the default 'make clean' rule that attempts
to delete core files. This causes a warning in clang/lib/StaticAnalyzer on
case insensitive filesystems, since it contains a "Core" directory. Since this
is pointless anyway, just zap it.
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to delete core files. This causes a warning in clang/lib/StaticAnalyzer on
case insensitive filesystems, since it contains a "Core" directory. Since this
is pointless anyway, just zap it.
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When in ARM mode, LDRH/STRH require special handling of negative offsets.
For correctness, disable this for now.
rdar://10418009
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For correctness, disable this for now.
rdar://10418009
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ARM .thumb_func directive for quoted symbol names.
Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.
rdar://10428015
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Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.
rdar://10428015
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144315 91177308-0d34-0410-b5e6-96231b3b80d8
test commit undo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144314 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144314 91177308-0d34-0410-b5e6-96231b3b80d8
test commit redux
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144313 91177308-0d34-0410-b5e6-96231b3b80d8
Fixed bug in DeadStoreElimination commit r144239
Size of data being pointed to wasn't always being checked so some small writes were killing big writes
Fixes <rdar://problem/10426753>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144312 91177308-0d34-0410-b5e6-96231b3b80d8
Size of data being pointed to wasn't always being checked so some small writes were killing big writes
Fixes <rdar://problem/10426753>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144312 91177308-0d34-0410-b5e6-96231b3b80d8
random notes, llvm-gcc is gone, fix a few broken tags.
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Revert r144300 "llvm-config: Replace with C++ version (was llvm-config-2).",
which didn't appear ready for prime time.
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which didn't appear ready for prime time.
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undo test commit
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test commit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144307 91177308-0d34-0410-b5e6-96231b3b80d8
Move type handling to make sure we get all created types that aren't
forward decls and have names into the dwarf accelerator types table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144306 91177308-0d34-0410-b5e6-96231b3b80d8
forward decls and have names into the dwarf accelerator types table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144306 91177308-0d34-0410-b5e6-96231b3b80d8
Rework adding function names to the dwarf accelerator tables, allow
multiple dies per function and support C++ basenames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144304 91177308-0d34-0410-b5e6-96231b3b80d8
multiple dies per function and support C++ basenames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144304 91177308-0d34-0410-b5e6-96231b3b80d8
Add additional checking to ensure that MachineMemOperands are never set to null, which can happen in weird circumstances where target intrinsic hooks are implemented incorrectly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144303 91177308-0d34-0410-b5e6-96231b3b80d8
ARM assembly parsing for LSR/LSL/ROR(immediate).
More of rdar://9704684
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More of rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144301 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-config: Replace with C++ version (was llvm-config-2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144300 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144300 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-config-2: Use USEDLIBS directly instead of LINK_COMPONENTS, which will
require this tool to resolve (currently).
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require this tool to resolve (currently).
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Release notes for DragonEgg.
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ARM assembly parsing for ASR(immediate).
Start of rdar://9704684
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Start of rdar://9704684
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build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for
consistency with other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144292 91177308-0d34-0410-b5e6-96231b3b80d8
consistency with other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144292 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-config-2: Fix thinko in maintenance of visited component set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144291 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144291 91177308-0d34-0410-b5e6-96231b3b80d8
test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots to specify explicit -mtriple=x86_64-darwin.
I guess it expects -relocation-model=pic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144290 91177308-0d34-0410-b5e6-96231b3b80d8
I guess it expects -relocation-model=pic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144290 91177308-0d34-0410-b5e6-96231b3b80d8
Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
instruction lower optimization" in the pre-RA scheduler.
The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.
Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8
instruction lower optimization" in the pre-RA scheduler.
The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.
Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8
AVX2: Add variable shift from memory.
Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144266 91177308-0d34-0410-b5e6-96231b3b80d8
Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144266 91177308-0d34-0410-b5e6-96231b3b80d8
For immediate encodings of icmp, zero or sign extend first. Then
determine if the value is negative and flip the sign accordingly.
rdar://10422026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8
determine if the value is negative and flip the sign accordingly.
rdar://10422026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8
build/Make & CMake: Pass the appropriate --native-target and --enable-targets
options to llvm-build, so the all-targets etc. components are defined properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144255 91177308-0d34-0410-b5e6-96231b3b80d8
options to llvm-build, so the all-targets etc. components are defined properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144255 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-build: Add --native-target and --enable-targets options, and add logic to
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-build: Split out the validation logic.
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llvm-build: Change CBackend and CppBackend to not use library_name. This will
change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144251 91177308-0d34-0410-b5e6-96231b3b80d8
change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144251 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-build: Add an explicit component type to represent targets.
- Gives us a place to hang target specific metadata (like whether the target has a JIT).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8
- Gives us a place to hang target specific metadata (like whether the target has a JIT).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-build: Tidy up options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144249 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144249 91177308-0d34-0410-b5e6-96231b3b80d8
Strip old implicit operands after foldMemoryOperand.
The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction. This is not what we want when those implicit
operands refer to the register being spilled.
Implicit operands referring to other registers are preserved.
This fixes PR11347.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144247 91177308-0d34-0410-b5e6-96231b3b80d8
The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction. This is not what we want when those implicit
operands refer to the register being spilled.
Implicit operands referring to other registers are preserved.
This fixes PR11347.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144247 91177308-0d34-0410-b5e6-96231b3b80d8
Remove this from the CMake build since I erased the file.
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Tidy up.
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Remove the old-style ARM disassembler, which is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144243 91177308-0d34-0410-b5e6-96231b3b80d8
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Thumb2 assembly parsing STMDB w/ optional .w suffix.
rdar://10422955
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rdar://10422955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144242 91177308-0d34-0410-b5e6-96231b3b80d8
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144241 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144241 91177308-0d34-0410-b5e6-96231b3b80d8
DeadStoreElimination can now trim the size of a store if the end of the store is dead.
Currently checks alignment and killing stores on a power of 2 boundary as this is likely
to trim the size of the earlier store without breaking large vector stores into scalar ones.
Fixes <rdar://problem/10140300>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144239 91177308-0d34-0410-b5e6-96231b3b80d8
Currently checks alignment and killing stores on a power of 2 boundary as this is likely
to trim the size of the earlier store without breaking large vector stores into scalar ones.
Fixes <rdar://problem/10140300>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144239 91177308-0d34-0410-b5e6-96231b3b80d8
Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144236 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144236 91177308-0d34-0410-b5e6-96231b3b80d8
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.
rdar://10418009
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rdar://10418009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144213 91177308-0d34-0410-b5e6-96231b3b80d8
AVX2: Add patterns for variable shift operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144212 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144212 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unnecessary include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144211 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144211 91177308-0d34-0410-b5e6-96231b3b80d8
Use REs to remove dependencies on the register allocation order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
Reformat the quote and tag the math stuff with <tt> tags.
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llvm-config: Drop 'backend' pseudo-component. We don't support/qualify the CBE
enough to have this be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144202 91177308-0d34-0410-b5e6-96231b3b80d8
enough to have this be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144202 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-config-2: Switch to using real library dependency table.
- Also, fix a refacto that left extra "all" component in list (this is now
defined in the groups explicitly)
- Reapply of r143879 now that Make should see needed deps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144201 91177308-0d34-0410-b5e6-96231b3b80d8
- Also, fix a refacto that left extra "all" component in list (this is now
defined in the groups explicitly)
- Reapply of r143879 now that Make should see needed deps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144201 91177308-0d34-0410-b5e6-96231b3b80d8
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144198 91177308-0d34-0410-b5e6-96231b3b80d8