opencl/llvm.git
9 years agocleanup testcase some more
Adrian Prantl [Fri, 26 Apr 2013 18:10:54 +0000 (18:10 +0000)]
cleanup testcase some more
rdar://problem/13056109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180619 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agofix a typo that due to cu&paste quadrupled itself
Adrian Prantl [Fri, 26 Apr 2013 18:10:50 +0000 (18:10 +0000)]
fix a typo that due to cu&paste quadrupled itself
rdar://problem/13056109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180618 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: Fix encoding of hint instruction for Thumb.
Quentin Colombet [Fri, 26 Apr 2013 17:54:54 +0000 (17:54 +0000)]
ARM: Fix encoding of hint instruction for Thumb.
"hint" space for Thumb actually overlaps the encoding space of the CPS
instruction. In actuality, hints can be defined as CPS instructions where imod
and M bits are all nil.

Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe,
sev) in DecodeT2CPSInstruction.

This commit adds a proper diagnostic message for Imm0_4 and updates all tests.

Patch by Mihail Popa <Mihail.Popa@arm.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180617 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd missing ':'.
Rafael Espindola [Fri, 26 Apr 2013 17:54:46 +0000 (17:54 +0000)]
Add missing ':'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180616 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoBugfix for the debug intrinsic handling in InstCombiner:
Adrian Prantl [Fri, 26 Apr 2013 17:48:33 +0000 (17:48 +0000)]
Bugfix for the debug intrinsic handling in InstCombiner:
Since we can't guarantee that the original dbg.declare instrinsic
is removed by LowerDbgDeclare(), we need to make sure that we are
not inserting the same dbg.value intrinsic over and over.
This removes tons of redundant DIEs when compiling optimized code.

rdar://problem/13056109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180615 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPowerPC: Use RegisterOperand instead of RegisterClass operands
Ulrich Weigand [Fri, 26 Apr 2013 16:53:15 +0000 (16:53 +0000)]
PowerPC: Use RegisterOperand instead of RegisterClass operands

In the default PowerPC assembler syntax, registers are specified simply
by number, so they cannot be distinguished from immediate values (without
looking at the opcode).  This means that the default operand matching logic
for the asm parser does not work, and we need to specify custom matchers.
Since those can only be specified with RegisterOperand classes and not
directly on the RegisterClass, all instructions patterns used by the asm
parser need to use a RegisterOperand (instead of a RegisterClass) for
all their register operands.

This patch adds one RegisterOperand for each RegisterClass, using the
same name as the class, just in lower case, and updates all instruction
patterns to use RegisterOperand instead of RegisterClass operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180611 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRe-write the address propagation code for pre-indexed loads/stores to take into accou...
Silviu Baranga [Fri, 26 Apr 2013 15:52:24 +0000 (15:52 +0000)]
Re-write the address propagation code for pre-indexed loads/stores to take into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180609 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPowerPC: Fix encoding of vsubcuw and vsum4sbs instructions
Ulrich Weigand [Fri, 26 Apr 2013 15:39:57 +0000 (15:39 +0000)]
PowerPC: Fix encoding of vsubcuw and vsum4sbs instructions

When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong sub-opcodes).

Tests will be added together with the asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180608 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPowerPC: Fix encoding of stfsu and stfdu instructions
Ulrich Weigand [Fri, 26 Apr 2013 15:39:40 +0000 (15:39 +0000)]
PowerPC: Fix encoding of stfsu and stfdu instructions

When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong sub-opcodes).  Note that apparently
the compiler currently never generates pre-inc instructions
for floating point types for some reason ...

Tests will be added together with the asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180607 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPowerPC: Fix encoding of rldimi and rldcl instructions
Ulrich Weigand [Fri, 26 Apr 2013 15:39:12 +0000 (15:39 +0000)]
PowerPC: Fix encoding of rldimi and rldcl instructions

When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong operand name in rldimi, wrong form
and sub-opcode for rldcl).

Tests will be added together with the asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180606 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPowerPC: Support PC-relative fixup_ppc_brcond14.
Ulrich Weigand [Fri, 26 Apr 2013 15:38:30 +0000 (15:38 +0000)]
PowerPC: Support PC-relative fixup_ppc_brcond14.

When testing the asm parser, I ran into an error when using a conditional
branch to an external symbol (this doesn't occur in compiler-generated
code) due to missing support in PPCELFObjectWriter::getRelocTypeInner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180605 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM/NEON: Pattern match vector integer abs to vabs.
Benjamin Kramer [Fri, 26 Apr 2013 15:00:57 +0000 (15:00 +0000)]
ARM/NEON: Pattern match vector integer abs to vabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180604 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoX86: Now that we have a canonical form for vector integer abs, match it into pabs.
Benjamin Kramer [Fri, 26 Apr 2013 12:05:21 +0000 (12:05 +0000)]
X86: Now that we have a canonical form for vector integer abs, match it into pabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180600 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDAGCombiner: Canonicalize vector integer abs in the same way we do it for scalars.
Benjamin Kramer [Fri, 26 Apr 2013 09:19:19 +0000 (09:19 +0000)]
DAGCombiner: Canonicalize vector integer abs in the same way we do it for scalars.

This already helps SSE2 x86 a lot because it lacks an efficient way to
represent a vector select. The long term goal is to enable the backend to match
a canonicalized pattern into a single instruction (e.g. vabs or pabs).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorizer: Calculate the number of pointers to disambiguate at runtime based...
Nadav Rotem [Fri, 26 Apr 2013 05:08:59 +0000 (05:08 +0000)]
LoopVectorizer:  Calculate the number of pointers to disambiguate at runtime based on the numbers of reads and writes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180593 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse 'git svn find-rev' in git-svnrevert instead of shell script fu.
Michael Gottesman [Fri, 26 Apr 2013 03:27:39 +0000 (03:27 +0000)]
Use 'git svn find-rev' in git-svnrevert instead of shell script fu.

Thanks Chandler!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180592 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that...
Michael Gottesman [Fri, 26 Apr 2013 01:12:18 +0000 (01:12 +0000)]
Revert "[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that were once autoreleaseRV instructions."

This reverts commit r180222.

I think this might tie in with a different problem which will require a
different approach potentially. I am reverting this in the case I need to go
down that second path.

My apologies for the noise. = /.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180590 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdated GettingStarted.rst so that it references utils/git-svn for git-svnup instead...
Michael Gottesman [Fri, 26 Apr 2013 01:04:45 +0000 (01:04 +0000)]
Updated GettingStarted.rst so that it references utils/git-svn for git-svnup instead of catting it into the documentation itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180589 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdded the scripts git-svnup/git-svnrevert to utils/git-svn.
Michael Gottesman [Fri, 26 Apr 2013 00:58:45 +0000 (00:58 +0000)]
Added the scripts git-svnup/git-svnrevert to utils/git-svn.

It makes more sense to have git-svnup here than catting said file in the
documentation (where we should rather point users to this directory).
I included git-svnrevert as an additional gift to the community. I will update
the documentation in a second commit later today.

git-svnrevert takes in a git hash for a commit, looks up the svn revision for
said commit and then creates the normal git revert commit message with the one
liner message, except instead of saying

  Revert "<<<INSERT ONELINER HERE>>>"

  This reverts commit <<<INSERT GITHASH HERE>>>

It says:

  Revert "<<<INSERT ONELINER HERE>>>"

  This reverts commit r<<<INSERT SVN REVISION HERE>>>

so git hashes will not escape into our svn logs (which just look unseemly).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180587 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMips assembler: .set reorder support
Jack Carter [Thu, 25 Apr 2013 23:31:35 +0000 (23:31 +0000)]
Mips assembler: .set reorder support

Mips have delayslots for certain instructions
like jumps and branches. These are instructions
that follow the branch or jump and are executed
before the jump or branch is completed.

Early Mips compilers could not cope with delayslots
and left them up to the assembler. The assembler would
fill the delayslots with the appropriate instruction,
usually just a nop to allow correct runtime behavior.

The default behavior for this is set with .set reorder.
To tell the assembler that you don't want it to mess with
the delayslot one used .set noreorder.

For backwards compatibility we need to support
.set reorder and have it be the default behavior in the
assembler.

Our support for it is to insert a NOP directly after an
instruction with a delayslot when in .set reorder mode.

Contributer: Vladimir Medic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180584 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove SMLoc paired with CHECK-NOT patterns. Not functionality change.
Michael Liao [Thu, 25 Apr 2013 21:31:34 +0000 (21:31 +0000)]
Remove SMLoc paired with CHECK-NOT patterns. Not functionality change.

Pattern has source location by itself. After adding a trivial method to
retrieve it, it's unnecessary to pair a source location for CHECK-NOT patterns.
One thing revised after this is the diagnostic info is more accurate by
pointing to the start of the CHECK-NOT pattern instead of the end of the
CHECK-NOT pattern. E.g. diagnostic message previously looks like

    <stdin>:1:1: error: CHECK-NOT: string occurred!
    test
    ^
    test.txt:1:16: note: CHECK-NOT: pattern specified here
    CHECK-NOT: test
                   ^

is changed to

    <stdin>:1:1: error: CHECK-NOT: string occurred!
    test
    ^
    test.txt:1:12: note: CHECK-NOT: pattern specified here
    CHECK-NOT: test
               ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180578 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake function documentation conform to llvm standards.
Preston Gurd [Thu, 25 Apr 2013 21:31:33 +0000 (21:31 +0000)]
Make function documentation conform to llvm standards.

Expunge all remaining traces and use of live variable information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180577 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM cost model: Integer div and rem is lowered to a function call
Arnold Schwaighofer [Thu, 25 Apr 2013 21:16:18 +0000 (21:16 +0000)]
ARM cost model: Integer div and rem is lowered to a function call

Reflect this in the cost model. I observed this in MiBench/consumer-lame.

radar://13354716

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180576 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRe-enabling MCJIT object caching with memory leak fixed
Andrew Kaylor [Thu, 25 Apr 2013 21:02:36 +0000 (21:02 +0000)]
Re-enabling MCJIT object caching with memory leak fixed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180575 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agorevert r179735, it has no testcases, and doesn't really make sense.
Chris Lattner [Thu, 25 Apr 2013 20:34:16 +0000 (20:34 +0000)]
revert r179735, it has no testcases, and doesn't really make sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180574 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoThis patch adds the X86FixupLEAs pass, which will reduce instruction
Preston Gurd [Thu, 25 Apr 2013 20:29:37 +0000 (20:29 +0000)]
This patch adds the X86FixupLEAs pass, which will reduce instruction
latency for certain models of the Intel Atom family, by converting
instructions into their equivalent LEA instructions, when it is both
useful and possible to do so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180573 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorizer: No need to generate pointer disambiguation checks between readonly...
Nadav Rotem [Thu, 25 Apr 2013 19:55:03 +0000 (19:55 +0000)]
LoopVectorizer: No need to generate pointer disambiguation checks between readonly pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180570 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mc-coff] Forward Linker Option flags into the .drectve section
Reid Kleckner [Thu, 25 Apr 2013 19:34:41 +0000 (19:34 +0000)]
[mc-coff] Forward Linker Option flags into the .drectve section

Summary:
This is modelled on the Mach-O linker options implementation and should
support a Clang implementation of #pragma comment(lib/linker).

Reviewers: rafael

CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D724

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180569 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix section relocation for SECTIONREL32 with immediate offset.
Rafael Espindola [Thu, 25 Apr 2013 19:27:05 +0000 (19:27 +0000)]
Fix section relocation for SECTIONREL32 with immediate offset.

Patch by Kai Nacke. This matches the gnu as output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180568 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove tailing whitespaces
Michael Liao [Thu, 25 Apr 2013 18:54:02 +0000 (18:54 +0000)]
Remove tailing whitespaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180564 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[inline asm] Add a test case for r180226. The specific issue is that the inline
Chad Rosier [Thu, 25 Apr 2013 17:10:21 +0000 (17:10 +0000)]
[inline asm] Add a test case for r180226.  The specific issue is that the inline
assembly is requesting a 64-bit register, which is invalid for i386.
rdar://13731657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180445 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse a pointer as the relocation iterator.
Rafael Espindola [Thu, 25 Apr 2013 12:45:46 +0000 (12:45 +0000)]
Use a pointer as the relocation iterator.

Since the relocation iterator walks only the relocations in one section, we
can just use a pointer and avoid fetching information about the section at
every reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180262 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoClarify getRelocationAddress x getRelocationOffset a bit.
Rafael Espindola [Thu, 25 Apr 2013 12:28:45 +0000 (12:28 +0000)]
Clarify getRelocationAddress x getRelocationOffset a bit.

getRelocationAddress is for dynamic libraries and executables,
getRelocationOffset for relocatable objects.

Mark the getRelocationAddress of COFF and MachO as not implemented yet. Add a
test of ELF's. llvm-readobj -r now prints the same values as readelf -r.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180259 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix constant folding for one lane vector types. Constant folding one lane vector...
Silviu Baranga [Thu, 25 Apr 2013 09:32:33 +0000 (09:32 +0000)]
Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180254 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Adding object caching support to MCJIT"
Rafael Espindola [Thu, 25 Apr 2013 03:47:41 +0000 (03:47 +0000)]
Revert "Adding object caching support to MCJIT"

This reverts commit 07f03923137a91e3cca5d7fc075a22f8c9baf33a.

Looks like it broke the valgrind bot:

http://lab.llvm.org:8011/builders/llvm-x86_64-linux-vg_leak/builds/649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180249 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Exposing MCJIT through C API"
Rafael Espindola [Thu, 25 Apr 2013 03:19:12 +0000 (03:19 +0000)]
Revert "Exposing MCJIT through C API"

This reverts commit 8c31b298149ca3c3f2bbd9e8aa9a01c4d91f3d74.

It looks like this commit broke some bots:

http://lab.llvm.org:8011/builders/llvm-ppc64-linux2/builds/5209

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180248 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDon't compute a std::vector<uint8_t> just to write it out a stream.
Rafael Espindola [Thu, 25 Apr 2013 03:07:42 +0000 (03:07 +0000)]
Don't compute a std::vector<uint8_t> just to write it out a stream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180247 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTest case for r180241.
Akira Hatanaka [Thu, 25 Apr 2013 02:22:07 +0000 (02:22 +0000)]
Test case for r180241.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180246 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTest case for r180238.
Akira Hatanaka [Thu, 25 Apr 2013 02:21:09 +0000 (02:21 +0000)]
Test case for r180238.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180245 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Add definitions of micromips load and store instructions.
Akira Hatanaka [Thu, 25 Apr 2013 01:21:25 +0000 (01:21 +0000)]
[mips] Add definitions of micromips load and store instructions.

Patch by Zoran Jovanovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180241 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAllow users to choose identity used to sign tools.
Filipe Cabecinhas [Thu, 25 Apr 2013 01:17:54 +0000 (01:17 +0000)]
Allow users to choose identity used to sign tools.

Summary:
No change if the identity isn't defined by the makefile.

Reviewers: echristo

Differential Revision: http://llvm-reviews.chandlerc.com/D632

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180240 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Add definitions of micromips shift instructions.
Akira Hatanaka [Thu, 25 Apr 2013 01:11:15 +0000 (01:11 +0000)]
[mips] Add definitions of micromips shift instructions.

Patch by Zoran Jovanovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180238 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixing OCAML bindings for MCJIT
Andrew Kaylor [Thu, 25 Apr 2013 00:03:58 +0000 (00:03 +0000)]
Fixing OCAML bindings for MCJIT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180232 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Initialize BooleanVectorContents
Tom Stellard [Wed, 24 Apr 2013 23:56:18 +0000 (23:56 +0000)]
R600: Initialize BooleanVectorContents

Fixes test/CodeGen/R600/setcc.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180231 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Use SHT_PROGBITS for the .AMDGPU.config section
Tom Stellard [Wed, 24 Apr 2013 23:56:14 +0000 (23:56 +0000)]
R600: Use SHT_PROGBITS for the .AMDGPU.config section

The libelf implementation that is distributed here:
http://www.mr511.de/software/english.html
will not parse sections that are marked SHT_NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180230 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoExposing MCJIT through C API
Andrew Kaylor [Wed, 24 Apr 2013 23:33:53 +0000 (23:33 +0000)]
Exposing MCJIT through C API

Patch by Filip Pizlo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180229 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix for r180193 - MI Sched: eliminate local vreg.
Andrew Trick [Wed, 24 Apr 2013 23:19:56 +0000 (23:19 +0000)]
Fix for r180193 - MI Sched: eliminate local vreg.

Fixes PR15838. Need to check for blocks with nothing but dbg.value.

I'm not sure how to force this situation with a unit test. I tried to
reduce the test case in PR15838 (1k lines of metadata) but gave up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180227 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[inline asm] Fix a crasher for an invalid value type/register class.
Chad Rosier [Wed, 24 Apr 2013 22:53:10 +0000 (22:53 +0000)]
[inline asm] Fix a crasher for an invalid value type/register class.
rdar://13731657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180226 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMaking invalidateInstructionCache automatic in SectionMemoryManager
Andrew Kaylor [Wed, 24 Apr 2013 22:39:12 +0000 (22:39 +0000)]
Making invalidateInstructionCache automatic in SectionMemoryManager

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180225 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that were once...
Michael Gottesman [Wed, 24 Apr 2013 22:18:18 +0000 (22:18 +0000)]
[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that were once autoreleaseRV instructions.

Due to the semantics of ARC, we must be extremely conservative with autorelease
calls inserted by the frontend since ARC gaurantees that said object will be in
the autorelease pool after that point, an optimization invariant that the
optimizer must respect.

On the other hand, we are allowed significantly more flexibility with
autoreleaseRV instructions.

Often times though this flexibility is disrupted by early transformations which
transform objc_autoreleaseRV => objc_autorelease if said instruction is no
longer being used as part of an RV pair (generally due to inlining). Since we
can not tell the difference in between an autorelease put into place by the
frontend and one created through said ``strength reduction'' we can not perform
these optimizations.

The addition of this set gets around said issues by allowing us to differentiate
in between said two cases.

rdar://problem/13697741.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180222 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixed comment typo.
Michael Gottesman [Wed, 24 Apr 2013 22:18:15 +0000 (22:18 +0000)]
Fixed comment typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180221 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMips assembler: Add 64 bit testing for JAL
Jack Carter [Wed, 24 Apr 2013 21:52:42 +0000 (21:52 +0000)]
Mips assembler: Add 64 bit testing for JAL

Contributer: Vladimir Medic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180220 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse pointers to iterate over symbols.
Rafael Espindola [Wed, 24 Apr 2013 19:47:55 +0000 (19:47 +0000)]
Use pointers to iterate over symbols.

While here, don't report a dummy symbol for relocations that don't have symbols.
We used to says such relocations were for the first defined symbol, but now we
return end_symbols(). The llvm-readobj output change agrees with otool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180214 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDon't produce an empty llvm.compiler.used in LTO.
Rafael Espindola [Wed, 24 Apr 2013 17:54:35 +0000 (17:54 +0000)]
Don't produce an empty llvm.compiler.used in LTO.

LTO was always creating an empty llvm.compiler.used. With this patch we
now first check if there is anything to be added first.

Unfortunately, there is no good way to test libLTO in isolation as it needs gold
or ld64, but there are bots doing LTO builds that found this problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180202 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDon't forward declare environ on Windows
Reid Kleckner [Wed, 24 Apr 2013 17:50:30 +0000 (17:50 +0000)]
Don't forward declare environ on Windows

That seems to interact poorly with the environ and _environ macros
defined in MSVC's <stdlib.h>.

Also remove the incorrect comment about _NSGetEnviron().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180200 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorizer: Change variable name Stride to ConsecutiveStride
Arnold Schwaighofer [Wed, 24 Apr 2013 16:16:03 +0000 (16:16 +0000)]
LoopVectorizer: Change variable name Stride to ConsecutiveStride

This makes it easier to read the code.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180197 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorize: Scalarize padded types
Arnold Schwaighofer [Wed, 24 Apr 2013 16:16:01 +0000 (16:16 +0000)]
LoopVectorize: Scalarize padded types

This patch disables memory-instruction vectorization for types that need padding
bytes, e.g., x86_fp80 has 10 bytes store size with 6 bytes padding in darwin on
x86_64. Because the load/store vectorization is performed by the bit casting to
a packed vector, which has incompatible memory layout due to the lack of padding
bytes, the present vectorizer produces inconsistent result for memory
instructions of those types.
This patch checks an equality of the AllocSize of a scalar type and allocated
size for each vector element, to ensure that there is no padding bytes and the
array can be read/written using vector operations.

Patch by Daisuke Takahashi!

Fixes PR15758.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180196 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorizer: Bail out if we don't have datalayout we need it
Arnold Schwaighofer [Wed, 24 Apr 2013 16:15:58 +0000 (16:15 +0000)]
LoopVectorizer: Bail out if we don't have datalayout we need it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180195 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r180189.
Rafael Espindola [Wed, 24 Apr 2013 16:10:49 +0000 (16:10 +0000)]
Revert r180189.

This should bring the ppc bots back. I will try to write a test that would
have found the problem on a little endian system too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180194 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMI Sched: eliminate local vreg copies.
Andrew Trick [Wed, 24 Apr 2013 15:54:43 +0000 (15:54 +0000)]
MI Sched: eliminate local vreg copies.

For now, we just reschedule instructions that use the copied vregs and
let regalloc elliminate it. I would really like to eliminate the
copies on-the-fly during scheduling, but we need a complete
implementation of repairIntervalsInRange() first.

The general strategy is for the register coalescer to eliminate as
many global copies as possible and shrink live ranges to be
extended-basic-block local. The coalescer should not have to worry
about resolving local copies (e.g. it shouldn't attemp to reorder
instructions). The scheduler is a much better place to deal with local
interference. The coalescer side of this equation needs work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180193 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRegister Coalescing: add a flag to disable rescheduling.
Andrew Trick [Wed, 24 Apr 2013 15:54:39 +0000 (15:54 +0000)]
Register Coalescing: add a flag to disable rescheduling.

When MachineScheduler is enabled, this functionality can be
removed. Until then, provide a way to disable it for test cases and
designing MachineScheduler heuristics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180192 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMI Sched: regpressure tracing.
Andrew Trick [Wed, 24 Apr 2013 15:54:36 +0000 (15:54 +0000)]
MI Sched: regpressure tracing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180191 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFormatting fixes.
Rafael Espindola [Wed, 24 Apr 2013 15:14:22 +0000 (15:14 +0000)]
Formatting fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180190 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse a pointer as the relocation iterator.
Rafael Espindola [Wed, 24 Apr 2013 15:02:03 +0000 (15:02 +0000)]
Use a pointer as the relocation iterator.

Since the relocation iterator walks only the relocations in one section, we
can just use a pointer and avoid fetching information about the section at
every reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180189 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd include guards.
Eric Christopher [Wed, 24 Apr 2013 14:49:26 +0000 (14:49 +0000)]
Add include guards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180188 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFormatting.
Eric Christopher [Wed, 24 Apr 2013 12:56:18 +0000 (12:56 +0000)]
Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180186 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAlign the __LD,__compact_unwind section.
Bill Wendling [Wed, 24 Apr 2013 03:11:14 +0000 (03:11 +0000)]
Align the __LD,__compact_unwind section.

I know what would be cool! We should align the compact unwind section because
aligned data access is faster.
<rdar://problem/13723271>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180171 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoremove cbe backend from sample configure
Jia Liu [Wed, 24 Apr 2013 02:17:19 +0000 (02:17 +0000)]
remove cbe backend from sample configure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180169 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCleanup testcase and ensure we actually exercise the inliner.
Adrian Prantl [Wed, 24 Apr 2013 01:44:15 +0000 (01:44 +0000)]
Cleanup testcase and ensure we actually exercise the inliner.
rdar://problem/12415623

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180168 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachine model: Generate table entries for super-resources.
Andrew Trick [Tue, 23 Apr 2013 23:45:16 +0000 (23:45 +0000)]
Machine model: Generate table entries for super-resources.

Super-resources and resource groups are two ways of expressing
overlapping sets of processor resources. Now we generate table entries
the same way for both so the scheduler never needs to explicitly check
for super-resources.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180162 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachine model: verify well-formed processor resource groups.
Andrew Trick [Tue, 23 Apr 2013 23:45:14 +0000 (23:45 +0000)]
Machine model: verify well-formed processor resource groups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180161 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachine model: rewrite a tablegen loop to avoid comparing record pointers.
Andrew Trick [Tue, 23 Apr 2013 23:45:11 +0000 (23:45 +0000)]
Machine model: rewrite a tablegen loop to avoid comparing record pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180160 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoComment a strange field in ScheduleDAG.
Andrew Trick [Tue, 23 Apr 2013 23:45:08 +0000 (23:45 +0000)]
Comment a strange field in ScheduleDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180159 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix dependency layering issues caused by r180112.
Eric Christopher [Tue, 23 Apr 2013 22:53:53 +0000 (22:53 +0000)]
Fix dependency layering issues caused by r180112.

Patch by Tom Stellard. (Committed while he's afk per request)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180157 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixing cmake build for MCJIT unit tests
Andrew Kaylor [Tue, 23 Apr 2013 21:46:56 +0000 (21:46 +0000)]
Fixing cmake build for MCJIT unit tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180150 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixing typo in comment.
Andrew Kaylor [Tue, 23 Apr 2013 21:32:32 +0000 (21:32 +0000)]
Fixing typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180147 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdding object caching support to MCJIT
Andrew Kaylor [Tue, 23 Apr 2013 21:26:38 +0000 (21:26 +0000)]
Adding object caching support to MCJIT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180146 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.
Jyotsna Verma [Tue, 23 Apr 2013 21:17:40 +0000 (21:17 +0000)]
Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180145 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHexagon: Define relations for GP-relative instructions.
Jyotsna Verma [Tue, 23 Apr 2013 21:05:55 +0000 (21:05 +0000)]
Hexagon: Define relations for GP-relative instructions.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180144 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake sure the instruction right after an inlined function has a
Adrian Prantl [Tue, 23 Apr 2013 19:56:03 +0000 (19:56 +0000)]
Make sure the instruction right after an inlined function has a
debug location. This solves a problem where range of an inlined
subroutine is emitted wrongly.
Patch by Manman Ren.

Fixes rdar://problem/12415623

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180140 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd more tests for r179925 to verify correct handling of signext/zeroext; strengthen...
Stephen Lin [Tue, 23 Apr 2013 19:42:25 +0000 (19:42 +0000)]
Add more tests for r179925 to verify correct handling of signext/zeroext; strengthen condition check to require actual MVT::i32 virtual register types, just in case (no actual functionality change)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180138 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix typo.
Rafael Espindola [Tue, 23 Apr 2013 19:39:34 +0000 (19:39 +0000)]
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180137 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLowercase "is" boolean variable prefix for consistency within function, no functional...
Stephen Lin [Tue, 23 Apr 2013 19:30:12 +0000 (19:30 +0000)]
Lowercase "is" boolean variable prefix for consistency within function, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180136 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSimplify yaml2obj a bit.
Rafael Espindola [Tue, 23 Apr 2013 19:26:43 +0000 (19:26 +0000)]
Simplify yaml2obj a bit.

The COFFParser now contains only a COFFYAML::Object and the string table
(which is recomputed, not serialized).

The structs in COFFParser now all begin with a Header field with what is
actually on the COFF object. The other fields are things that are semantically
part of the struct (relocations in a section for exmaple), but are not actually
represented that way in the object file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180134 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHexagon: Remove assembler mapped instruction definitions.
Jyotsna Verma [Tue, 23 Apr 2013 19:15:55 +0000 (19:15 +0000)]
Hexagon: Remove assembler mapped instruction definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180133 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChange commentary for PowerPC Boolean vector contents.
Bill Schmidt [Tue, 23 Apr 2013 18:49:44 +0000 (18:49 +0000)]
Change commentary for PowerPC Boolean vector contents.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180131 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Compare splat value with element size instead of calling isUIntN.
Akira Hatanaka [Tue, 23 Apr 2013 18:09:42 +0000 (18:09 +0000)]
[mips] Compare splat value with element size instead of calling isUIntN.

No intended changes in functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180130 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without...
Owen Anderson [Tue, 23 Apr 2013 18:09:28 +0000 (18:09 +0000)]
DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents.  The included change
fixes the PowerPC tests, and was OK'd by Hal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180129 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTesting for _XCR_XFEATURE_ENABLED_MASK instead of a specific MSVC version because...
Aaron Ballman [Tue, 23 Apr 2013 17:38:44 +0000 (17:38 +0000)]
Testing for _XCR_XFEATURE_ENABLED_MASK instead of a specific MSVC version because some MSVC 2010 SP1 installations do not have the _xgetbv intrinsic.  Patch thanks to Serge Pavlov!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180125 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Use .AMDGPU.config section to emit stacksize
Vincent Lejeune [Tue, 23 Apr 2013 17:34:12 +0000 (17:34 +0000)]
R600: Use .AMDGPU.config section to emit stacksize

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180124 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600: Add CF_END
Vincent Lejeune [Tue, 23 Apr 2013 17:34:00 +0000 (17:34 +0000)]
R600: Add CF_END

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180123 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLoopVectorizer: Fix 15830. When scalarizing and unrolling stores make sure that the...
Nadav Rotem [Tue, 23 Apr 2013 17:12:42 +0000 (17:12 +0000)]
LoopVectorizer: Fix 15830. When scalarizing and unrolling stores make sure that the order in which the elements are scalarized is the same as the original order.
This fixes a miscompilation in FreeBSD's regex library.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180121 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHexagon: Remove duplicate instructions to handle global/immediate values
Jyotsna Verma [Tue, 23 Apr 2013 17:11:46 +0000 (17:11 +0000)]
Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180120 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCall the potentially costly isAnnotatedParallel() only once.
Pekka Jaaskelainen [Tue, 23 Apr 2013 16:44:43 +0000 (16:44 +0000)]
Call the potentially costly isAnnotatedParallel() only once.
Made the uniform write test's checks a bit stricter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180119 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd some constraints to use of 'returned':
Stephen Lin [Tue, 23 Apr 2013 16:31:56 +0000 (16:31 +0000)]
Add some constraints to use of 'returned':

1) Disallow 'returned' on parameter that is also 'sret' (no sensible semantics, as far as I can tell).
2) Conservatively disallow tail calls through 'returned' parameters that also are 'zext' or 'sext' (for consistency with treatment of other zero-extending and sign-extending operations in tail call position detection...can be revised later to handle situations that can be determined to be safe).

This is a new attribute that is not yet used, so there is no impact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180118 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWrite relocations in yaml2obj.
Rafael Espindola [Tue, 23 Apr 2013 15:53:02 +0000 (15:53 +0000)]
Write relocations in yaml2obj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180115 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWrap.h: Define wrap / unwrap function for ExecutionEngine
Tom Stellard [Tue, 23 Apr 2013 15:13:36 +0000 (15:13 +0000)]
Wrap.h: Define wrap / unwrap function for ExecutionEngine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180112 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoc vs c++ mistake in header file typedef for AtomicRMW fix in rev 180100.
Carlo Kok [Tue, 23 Apr 2013 13:45:37 +0000 (13:45 +0000)]
c vs c++ mistake in header file typedef for AtomicRMW fix in rev 180100.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180104 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixup for r180094: properly use MSan interface functions
Alexey Samsonov [Tue, 23 Apr 2013 13:35:32 +0000 (13:35 +0000)]
Fixup for r180094: properly use MSan interface functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180103 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoExpose IRBuilder::CreateAtomicRMW as LLVMBuildAtomicRMW in llvm-c.
Carlo Kok [Tue, 23 Apr 2013 13:21:19 +0000 (13:21 +0000)]
Expose IRBuilder::CreateAtomicRMW as LLVMBuildAtomicRMW in llvm-c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180100 91177308-0d34-0410-b5e6-96231b3b80d8